Why SWPDM? i.MX8MMINI, i.MX8MNANO and IMX8MPLUS  In order to process human voice, it is required to have the best audio resolution in the incoming data captured by the microphones. This mean, having a resolution of 16bits is not enough to capture all the information to properly process the voice. Voice processing requires a peripheral capable of capture data on a 32bits resolution within the range of the most common sample rates (16kHz, 44.1kHz, 48Khz, etc.). On the i.MX8M family there is a peripheral which fulfill those requirements and is called MICFIL. MICFIL is a peripheral which convert PDM (Pulse Density Modulation) data to PCM (Pulse-Code Modulation) data. The PDM format encode the analog signal in just one bit. Where 1 means the signal is increasing in amplitude while 0 means the opposite. In the other hand, the PCM format encode the data in 8, 16, or 32 bits. The advantage of PDM is that the creation of microphones is cheaper than having PCM microphones but then you will need a software or hardware which do the conversion for PDM to PCM since PDM cannot be processed. This is the reason of the MICFIL peripheral. However, not all the MICFIL's on the difference SOMs are the same. While the i.MX8MPLUS has a resolution of 32bits its smaller brothers do not. i.MX8MMINI and i.MX8MNANO have a MICFIL which only allows a resolution up to 16bits. For most of the cases it will be enough but not for voice processing. Nevertheless, not everything is lost; As mentioned previously, the PDM to PCM conversation can be done by hardware or by software. NXP also have the algorithm in software to do the conversation. Therefore, if a Mini or Nano is being used for voice processing it is fully recommended to use the ALSA SWPDM Plugin and avoid MICFIL peripheral.   Using the Plugin   In order to use the plugin, it is required to change the DTB to  imx8mm-evk-8mic-swpdm.dtb , when using the i.MX8MM or  imx8mn-evk-8mic-swpdm.dtb , when using the i.MX8MN. In order to do so follow the next steps: Please notice below example if for Mini. For Nano will be the same just changing the DTB name to imx8mn-evk-8mic-swpdm.dtb. # Stop at U-boot u-boot=> edit fdtfile edit: imx8mm-evk-8mic-swpmd.dtb u-boot=> saveenv u-boot=> boot   The change in the DTB is required to disable MICFIL so Linux can receive the raw data and sent it to the plugin. However, the plugin is not enabled by default, users need to explicit add the plugin to their ALSA pipeline. The way of doing so is by adding the following device to  /etc/asound.conf : pcm.cic { type cicFilter slave "hw:imxswpdmaudio,0" delay 100000 gain 0 OSR 48 }   Where: pcm.cic : Is an arbitrary name which allow ALSA to find the requested devices when setting the  -D  flag with  arecord  or  aplay . type cicFilter : This is the plugin type which is named with the algorithm name. slave: Name of the physical or virtual device which will be controlled by the cicFilter plugin. The recommendation is to always have the actual hardware connected to this plugin. delay : Amount of time in microsecond which the plugin won't write to the buffer, but it still does the conversion. The value could be between 100us to 1'000,000us. By removing the property from the structure, the delay will be set to 0. gain : A value between 0 and 100. OSR : Is related to the quality of the signal by increasing the PDM sample rate. With a higher valuer a best quality on the audio can be achieved. However, keep in mind than having a higher value will also require more memory to store all the new data due to the oversampling. The valid values for the OSR are: 48, 64, 96, 128, and 192. With all being said, the only thing left is to test the plugin by running the following command: $ arecord -D cic -c4 -r16000 -f s32_le --period-size=96 -d5 -v test.wav   Data Flow   When using PDM Microphones the default data flows is as shown in figure 1. Where the data is capture in the MICFIL peripheral and when it get to the Sound Drivers the data is already converted to PCM, so from the Kernel perspective the data is treaty as PCM values and the conversion from PDM to PCM is done under the hardware. However, with the changes we made earlier on the device tree and adding the plugin on /etc/asound.conf the data flows is as follow: Where the conversion from PDM to PCM is done just before giving the buffer to the application layer; Thus, conversion is made on User Space and the kernel is aware data have a PDM format. Another difference you can see is that MICFIL is disable and instead the datalines are controlled by SAI5. This is true for i.MX8MM, i.MX8MN, and i.MX8MP. Although for the application is a transparent change the truth is that the entire pipeline change, so please be aware of how the data is flowing to your application.   Integration With AFE   The next and final step is integrating the plugin with AFE and VoiceSeeker. The integration of SWPDM requires to apply a patch to the SWPDM repository. The patch changes the amount of period sizes allowed on the plugin. By default, the plugin only allows certain values which are:  48 Samples = 3ch x 4bytes format x 16samples = 192 bytes. 48 Samples = 2ch x 4bytes format x 48samples = 384 bytes. 48 Samples = 4ch x 4bytes format x 48samples = 768 bytes. 96 Samples = 4ch x 4bytes format x 96samples = 1,536 bytes. Although, AFE and VoiceSeeker are extremely configurable, 48 or 96 samples for the algorithm is too small. Meaning that the SWPDM should support a bigger period size, not all the way around. By applying the attached file, the plugin can have a period size from 64 bytes (1ch and 16 samples) up to 16,384 bytes (4ch and 1024 samples). However, the number of samples can vary depending on the OSR value and the number of channels. Once the patch has been applied in must be installed on: /usr/lib/alsa-lib (if the repository is being built on a standalone environment). AFE opens a device called mic  for capture the microphones' input. This device can have anything below it. By default, have the following definition on /etc/asound.conf  (after following the steps described on the TODO.md file). # mic represents the physical source (capture) pcm.mic { type plug slave.pcm "hw:micfilaudio,0" }   The devices opens the MICFIL driver, but on this case MICFIL is disable, which means the definition of the device must change. From above cic  device the definition can be copy and paste and then tweak one parameter. The delay must be set to 0 by removing the property or setting it explicitly on the structure. If this step if forgotten this might cause some underrun issues. The device definition will be: pcm.mic { type cicFilter slave "hw:imxswpdmaudio,0" delay 0 gain 0 OSR 48 }   The last thing to do will be running AFE with VoiceSeeker as usual. $ /unit_tests/nxp-afe/voice_ui_app & $ /unit_tests/nxp-afe/afe libvoiceseekerlight &   Considerations and Restrictions With all that said, there are few things left to mention, which are the considerations and restrictions on the plugin itself. These are good things to know before adding the plugin into any application. The plugin is supported from the Linux BSP 5.15.32. Currently the plugin only supports up to 4 channels. Plugin only outputs a S32_LE format (if required another format please use MICFIL). By applying above patch, the period size must be a multiple of 16, due to a limitation on the algorithm itself, rather than the plugin. The driver only allows to have one mic per data-line while MICFIL allows to have two microphones per data-line. The SWPDM Plugin is based on the External Plugin: I/O Plugin. This means it also have the restriction of this ALSA plugin, being the following restriction the most important one: "The I/O-type plugin is a PCM plugin to work as the input or output terminal point, i.e. as a user-space PCM driver". In other words, there can't be any device/plugin on top of it, not even a "plug" type. 

Background   Wake-on-LAN ( WoL) is an Ethernet computer networking standard that allows a computer to be turned on or awakened from sleep mode by a network message. The message is usually sent to the target computer by a program executed on a device connected to the same local area network. Ethernet connections, including home and work networks, wireless data networks, and the Internet itself, are based on frames sent between computers. WoL is implemented using a specially designed frame called a magic packet, which is sent to all computers in a network, among them the computer to be awakened. The magic packet contains the MAC address of the destination computer. This is an identifying number, built into each network interface controller (NIC)/Ethernet Controller, that enables the NIC/EnetController to be uniquely recognized and addressed on a network What is a WOL Magic packet? The magic packet is a frame that is most often sent as a broadcast and that contains anywhere within its payload 6 bytes of all 255 (FF FF FF FF FF FF in hexadecimal), followed by sixteen repetitions of the target computer's 48-bit MAC address, for a total of 102 bytes. it is typically sent as a UDP datagram to port 0 (reserved port number), 7 (Echo Protocol) or 9 (Discard Protocol) or directly over Ethernet using EtherType 0x0842   Configure iMX93EVK to wake up on an Ethernet Wake On LAN Magic Packet   Pre-requisite:- Install 'Wake on  LAN' utility on windows from the Microsoft Store. This utility uses Port 7 to send magic packet as a broadcast to the devices on the network.   Step-1 Make the dts change to enable wake-up functionality on eth1   In the following dts:- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts   You would see the node entry for the corresponding ethernet, eth1 as eqos. Add fsl,magic-packet; to the node     After building the changes, boot with the imx93evk image.   Step-2 Enable wake on LAN By default in linux user-space the wake-on-lan is disabled, to enable the wake-on-lan run:  ethtool -s eth1 wol g     Now you are all set to wake up imx93evk via Ethernet WOL packet. Put the iMX93 to deep sleep via 'echo mem > /sys/power/state'   Step-3 Send WOL magic packet via Wake On LAN windows utility to wake up iMX93EVK   Make sure the devices are connected to the same local network like imx93evk and laptop connected to the same L2 switch. Add your imx93evk device to Wake on LAN software, you have to give iMX93EVK's MAC address of the ethernet that the RJ45 cable is connected to[you can get this from 'ifconfig -a' output].     After adding the device, it will look something like below:-     Right-click on the 'imx' device which is registered on Wake on LAN UI and click on 'Send WOL(magic packet)'. The moment you do that the WOL packet is sent to your iMX from your Laptop/PC on the same network and the iMX is woken up from deep sleep.     Hope you found it helpful. Please drop in any questions/comments just in case. 

Sometimes we need to use an SPI bus to communicate with sensors or another device. Unfortunately, by default on iMX8MN-EVK, we have the ECSPI2 disabled on our BSP.   We can use that peripheral on Linux enabling it in the device tree.   To enable the ECSPI2 on the device tree we have to add the next on imx8mn-evk.dtsi:     status = "okay"; }; +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + spidev0: spi@0 { + reg = <0>; + compatible = "rohm,dh2228fv"; + spi-max-frequency = <500000>; + }; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>;   On iomux node:   + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 + >; + }; + + pinctrl_ecspi2_cs: ecspi2cs { + fsl,pins = < + MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000 + >; + }; + pinctrl_ir_recv: ir-recv { fsl,pins = < MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f    after modifying and compiling the device tree you can see the device active like this:     Connection:   Test: spidev_test -D /dev/spidev1.0 -v       You can use the devsheell of yocto to make the changes:   https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-use-Devshell-to-compile-device-tree-files/ta-p/1727428

In the IMX8MM SDK unfortunately we cannot find any example about of use a GPIO as an input with interrupt.  To use a GPIO as input with interrupt we need to keep in mind how the GPIO IRQs works in the ARM Cortex M4.   We can find in Table 7-2 (CM4 Interrupt Summary) of IMX8MMRM (IMX8MM Reference Manual) the GPIOs IRQs are divided by two parts:     Combined interrupt indication for GPIOn signal 0 throughout 15  Combined interrupt indication for GPIOn signal 16 throughout 31    This basically means, the pines of GPIOn from 0 to 15 are handled by Combined interrupt indication for GPIOn signal 0 throughout 15 and the pines from 16 to 31 are handled by Combined interrupt indication for GPIOn signal 16 throughout 31.    In SDK we can find these definitions in:  <SDK root>/devices/MIMX8MM6/MIMX8MM6_cm4.h (Remember this is for IM8MM SDK)    In this example I will use GPIO5_IO12 (ECSPI2_MISO) as Input with IRQ and GPIO5_IO11 (ECSPI_MOSI) as Output of IMX8MM-EVK. I will connect the Output to the Input and will see the behavior of the IRQ in Rising and Falling edge.    For this example I will connect ECSPI2_MOSI (GPIO5_IO11) to ECSPI_MISO (GPIO5_IO12):   See the below definitions:   #define IN_GPIO   GPIO5  This define the GPIO base of the IN pin  #define IN_GPIO_PIN  12u  This define the pin number (for in)  #define IN_IRQ  GPIO5_Combined_0_15_IRQn  This define the IRQ number (72 in this case)  #define GPIO_IRQ_HANDLER  GPIO5_Combined_0_15_IRQHandler  This is a "pointer" to function that will handle the interrupt  #define IN_NAME  "IN GPIO5_IO12"  This is only a name or description for the pin    See below definitions:    #define OUT_GPIO  GPIO5  This is the GPIO base of OUT pin  #define OUT_GPIO_PIN  11u  This define the pin number (for out)  #define OUT_NAME  "OUT GPIO5_IO11"  This is only a name or description for the pin      Now the below section is the IRQ handler (which was defined before)😞   The GPIO_ClearPinsInterruptFlags(IN_GPIO, 1u << IN_GPIO_PIN); refers to GPIOx_ISR register:      For this example, the IRQ Handler will print "IRQ detected ............" in each interrupt.    We will create two different GPIOs config, one for Output and other one for Input with IRQ Falling edge:    Then configure the GPIOs and IRQ:     EnableIRQ refers to enable the 72 IRQ.   GPIO_PortEnableInterrupts refers to GPIOx_IMR: Finally, the example put the out GPIO5_IO11 in High state and then in low state many. First the IRQ is configured as Falling edge, then as Rising edge.     I will attach the complete source file.    To compile it you can use ARMGCC toolchain directly, but I like to use VSCode with MCUXpresso integration.  Once, when you have your .bin file (in my case igpio_led_output.bin) you can load to board with UUU tool: In your Linux machine: sudo uuu -b fat_write igpio_led_output.bin mmc 2:1 gpio.bin In U-boot board: u-boot=> fastboot 0   Then, when the .bin file was loaded, you can load to the CORTEX M4 in U-boot with: u-boot=> fatload mmc 2:1 ${loadaddr} gpio.bin 7076 bytes read in 14 ms (493.2 KiB/s) u-boot=> cp.b 0x80000000 0x7e0000 0x10000 u-boot=> bootaux 0x7e0000 ## No elf image ar address 0x007e0000 ## Starting auxiliary core stack = 0x20020000, pc = 0x1FFE02CD... u-boot=>   NOTE: You can load the binary to cortex m4 with Custom bootscripts for practicity.   Once the binary loaded in M4 core you should see in seria terminal this logs (Remember GPIO5_IO11 and GPIO5_IO12 must be connected to get the same logs):    And the logs when you disconnect the GPIO5_IO11 and GPIO5_IO12 in execution time:  🔴Disconnection (Red color) 🔵Reconnection (Blue color)   I hope this can helps.     Best regards!    Salas. 

We are pleased to announce that Config Tools for i.MX v15.0 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...)Version 15.0 • The product is based on Eclipse 2023-06 TEE – Setting a security level for a special three-state model is improved. Pins – Validation to ensure that elements can be configured by the selected core is added. – Rows are sorted in the Peripheral Signals routing dialog. – A connected pins column in External User Signals always shows the pin's full name. – The missing scroll bar in the External User Signals view is fixed. Clocks – Support for multicore code generation is added. – Global configuration elements now support a tree structure and can be categorized. – Fractional PLL now supports a custom range and negative numerator. – Scrolling in the clock diagram by pressing the mouse wheel (drag and drop) is supported. DCD – The issue with the code generation that stopped working after the drag and drop of a group is fixed.  

some customers doesn't have any issue on old bsp, but have bring up issue on new 6.1 bsp, this article is about this and how to fix this

In the era of digitization, concepts like smart homes and the Internet of Things (IoT) are continuously evolving. To realize these visions, a robust and efficient network infrastructure becomes crucial. OpenWRT, with its open-source nature, high customizability, and excellent stability, has become a key player in leading the future development of networks. NXP, as a global leader in semiconductor technology innovation, leverages its expertise in embedded systems and communication to introduce an intelligent network solution based on OpenWRT, empowering the flourishing smart home and IoT ecosystems. This article will explore the current status and ways to access NXP's chip support for the wireless router solution, enabling readers to build a solid foundation for the next generation of networks. 1. Unique Features of OpenWRT 1.1. Noble Value of Open Source Freedom OpenWRT stands out with its open-source nature, granting users unlimited freedom to access, modify, and share the source code, unlocking significant innovation potential. This openness not only drives continuous technological advancements but also allows users to take active control of the network direction, saving costs. 1.2. Stable and Reliable Network Foundation Built on a mature Linux kernel, OpenWRT undergoes extensive evolution and fine-tuning, ensuring outstanding system stability. This results in fewer network failures, longer device lifespans, and solid support for various network needs. OpenWRT becomes an ideal choice for building reliable home networks, alleviating concerns about network instability or crashes. 1.3. Powerful Software Package Management OpenWRT's proud software package management system provides users with great flexibility. Users can freely install, update, and uninstall various applications and services based on their needs, achieving a highly personalized network environment for a smarter networking experience. OpenWRT allows users to install various network services and applications such as VPNs and proxy servers to meet specific network requirements, providing greater freedom to create a network environment that suits individual or family needs. 1.4. Strong Community Support The vast OpenWRT community is the source of its powerful driving force. Users can exchange experiences, solve problems, and even participate in project development within the community. This collaborative spirit propels continuous innovation and progress in OpenWRT. 2. Applications of NXP wireless router Solution 2.1. Construction of Smart Home Ecosystem The seamless integration of NXP's wireless router solution with the NXP Matter solution provides an ideal platform for users to build smart home ecosystems. With its powerful customization capabilities, users can easily connect, manage, and control various smart devices, creating a highly intelligent home environment. The solution integrates NXP's Bluetooth and Wi-Fi chip drivers, such as IW612, 88W9098, 88W8997, allowing users to effortlessly build an OpenThread Border Router (OTBR) or Zigbee Bridge based on OpenWRT. 2.2. Customized Network Services The NXP wireless router solution supports the customized installation of various network services and applications. Users can create personalized network services, such as VPNs, proxy servers, home routers, or gateways, based on their individual needs, achieving a more flexible networking experience. 2.3. Transmission of High-Definition Video Streams The transmission of high-definition video streams in smart homes imposes higher demands on network performance. NXP's wireless router solution, with its excellent network performance, combined with NXP's industrial-grade IP Camera solution, ensures users can smoothly enjoy high-definition video streams, providing a superior home entertainment experience. 2.4. Construction of Smart Security Systems Security systems are an essential part of smart homes. NXP's wireless router solution, with its advanced network security features, builds a more reliable and intelligent security system for users, enhancing home security. 3. NXP's Support for OpenWRT Given the numerous advantages and wide-ranging application scenarios of wireless router, NXP early on adapted to support OpenWRT. Full support has been provided for the entire Layerscape series processors, and mainstream IMX processors are also supported. The specific supported IMX platforms and details are as follows: Processor and Board Support         ARMv8                                             ARMv7       I.MX93EVK                                •      I.MX6ULL       I.MX8MPlus       I.MX8MMini       I.MX8MNano       I.MX8MQuad OpenWrt Version  Based on OpenWrt v23.05 from mainline (tag: v23.05.0-rc1) Toolchain: ARMV8: gcc-11.3, binutils-2.37 ARMV7: gcc-12.3, binutils-2.40 U-Boot Boot Loader IMX LF release, tag: lf-5.15.71-2.2.1 v2022.04 Linux Kernel       OpenWrt kernel 5.15.114 based on IMX SDK release kernel v5.15.71_2.2.1 Firmware       firmware-imx-8.18       firmware-sentinel-0.5.1 Main Features       Squashfs rootfs support on SD card.       Supported CLI and web configuation. - U-Boot: lf-5.15.71-2.2.1. - Arm Trusted firmware (TF-A) integration. - Boot from SDHC       Linux Kernel Core - Linux kernel 5.15.114 - Cortex-A53 (AARCH64), little endian for imx8m platform - Cortex-A55 (AARCH64), little endian for imx93 platform - Cortex-A7, little endian for imx6ull platform - 64-bit effective kernel addressing [Cortex-A53/A55]       Linux Kernel Drivers - SDIO 3.0 / eMMC5.1 - USB 3.0/2.0 Dual-Role with PHY type C - 32-bit LPDDR4 - 2x Gigabit Ethernet with AVB, IEEE 1588, EEE   and 1x w/ TSN - PCIe Gen 3 + WIFI - CAN FD - Dual-ch. QuadSPI (XIP) or 1x OctalSPI(XIP) - RTC Licensing The majority of the software included in the OpenWrt release is licensed under a form of open source license (e.g. GPL, BSD). Some software is licensed under the NXP EULA license. 4. How to Start Deploying and Using wireless router? To experience the powerful features of the Layerscape series chips with wireless router, download the source code from the official OpenWRT repository: https://git.openwrt.org/openwrt/openwrt.git. The OpenWRT support code for Layerscape is already integrated into the official OpenWRT codebase. Taking IMX8MMini-EVK as an example, here are the deployment steps for wireless router on the IMX platform using Ubuntu 22.04: 4.1. Get the source code from GitHub: https://github.com/nxp-imx/imx_openwrt (Tag: imx_v23.05_v5.15.114) 4.2. Compile, Install, and Configure wireless router: $ ./scripts/feeds update -a; ./scripts/feeds install -a; cp config.default .config; make -j $ sudo dd if=/mnt/tftpboot/imx8/matter_20230908/openwrt-imx-imx8-imx8mmini-squashfs-sdcard.img of=/dev/sdX bs=1M && sync This way, an wireless router bootable disk for SD card has been generated. You can directly use an SD card to boot and experience wireless router. For more compilation assistance, please refer to the README file in the source code: target/linux/imx/README. 4.3. Configuration and Personalization Users can access the wireless router device through the web interface or SSH to begin configuring and personalizing the network environment. This includes setting network rules, installing software packages, and ensuring that the device operates according to individual needs. The following image shows the interface for installing and removing software. Isn't it simple and convenient! 4.4. What to Do If You Encounter Issues? Firstly, you can seek support in the vibrant OpenWRT community. You can not only get assistance but also share your development or usage experiences and even participate in project development. This open community provides users with more opportunities for learning and growth, collectively driving continuous progress in OpenWRT. You can also participate in the official NXP community at https://community.nxp.com/t5/i-MX-Processors/bd-p/imx-processors to ask questions and share technical insights. Professional engineers are available to help you troubleshoot and overcome challenges. NXP OpenWRT looks forward to your participation!   Disclaimer This wireless router release is an NXP's Systems Engineering Initiative and is not part of NXP's Linux base enablement strategy for its MPU platforms. NXP does not vouch for the quality of this release and any follow up releases including adding support to new platforms is at the sole discretion of the Systems Engineering team. For specific requirements or needs please reach out to NXP's systems engineering team on the following email address "[email protected]."

Symptoms   On i.MX8MP, when inputting a 80% duty, 0.4V-1.8V, 3KHz square wave, we observed that the system may hang. We also tested i.MX8MN and i.MX8MM and observed the same phenomenon. In i.MX8MN RM, there's a note in GPC chapter:     We believe that the issue described in this note exists not only in the iMX8MN, but also in the iMX8MP and iMX8MM. Meanwhile, there is not only a problem with power down in this issue, but also a problem with wait mode. Diagnosis   In debugging, we find that avoiding accessing LPCR_A53_AD register in imx_set_cluster_powerdown can fix the issue. So we think that due to frequently power up/down of cores, cores have chances failed to power up. When the IRQ behavior become more complex, because the IRQ is an async event, it will come in any time. if the wait mode is enabled, in some conner case, the GPC internal LPM mode state machine will run into problem, then lead to system failure. Solution   1. A workaround patch that bypass the wait mode setting during the cpuidle.. See the patch attached. 2. Will add the Note about "SCU power down should not be enabled in wait mode" to i.MX8MP and i.MX8MM RM. 3. Will try to identify this issue into errta document, ticket TKT0632147.

Hardware i.MX 93 EVK​ TFT LCD 480x272 RGB888 (NV3047E, parallel)​ Condition A55 off​ DDR self-refresh​ OCRAM for framebuffer, TCM for code/data​ LCDIF on with parallel interface​ M33 update panel content each second​ 255KB single frame buffer(RGB565) (fit in OCRAM: 0x20480000 ~ 0x204DFFFF)​ Code Bitbucket：ssh://[email protected]/mpucnse/imx93-cm33-usecase.git​ Branch: imx93_sdk_2.14.1-lcd_on_ocram​ Demo code: imx93-cm33-usecase/boards/mcimx93evk/demo_apps/lcd_on_ocram​ DTS: imx93-cm33-usecase/boards/mcimx93evk/demo_apps/lcd_on_ocram/dts​ Working Flow   ​Test Flow In uboot console,​ setenv mmcargs $mmcargs clk-imx93.mcore_booted​ setenv fdtfile imx93-11x11-evk-lcd_panel.dtb​ fatload mmc 1:1 0x80000000 sdk20-app.bin;cp.b 0x80000000 0x201e0000 0x10000;bootaux 0x1ffe0000 0​ boot​ In kernel console,​ echo mem > /sys/power/state​ start the power test Power Consumption SoC power: 94.4mW​ [email protected]​ CM33@100MHz​ CM33@100MHz​ A55 suspend​ DDR retention​ WAKEUPMIX off​ NICMIX and MEDIAMIX on​  ​  

  NXP的OpenWRT方案：连接未来的智能网络体验   在数字化时代，智能家居、物联网等概念正不断演进，而要实现这些愿景，一个强大而高效的网络基础设施变得至关重要。OpenWRT以其开源自由、高度可定制和卓越稳定性，成为引领未来网络发展的关键一环。NXP作为全球领先的半导体技术创新公司，以其在嵌入式系统和通信领域的卓越技术积累，推出的基于OpenWRT的智能网络解决方案，为蓬勃发展的智能家居、物联网赋能。本文将介绍NXP公司芯片对OpenWRT方案支持的现状及获取途径，为读者应用OpenWRT去构建全新的下一代网络构建坚实的基础。 1、OpenWRT的独特特性 1.1、开源自由的崇高价值 OpenWRT以其开放源代码的本质脱颖而出。用户享有无限的自由，可以自由获取、修改和分享源代码，释放出创新的巨大潜力。这种开放性既推动了技术的不断进步，也使用户能够更主动地掌控网络的方向，也节约了用户的成本。 1.2、稳定可靠的网络基石 建立在成熟的Linux内核之上，OpenWRT经过长时间的演化和精细调整，确保系统的出色稳定性。这意味着更少的网络故障、更长的设备使用寿命，为各类网络需求提供了坚实的支撑。这一特性使得OpenWRT成为构建可靠家庭网络的理想选择，用户不用担心网络不稳定或崩溃的问题。 1.3 强大的软件包管理 OpenWRT引以为傲的软件包管理系统给用户带来了极大的灵活性。用户可以根据需求自由安装、更新和卸载各类应用程序和服务，从而实现网络环境的高度个性化，实现更智能的网络体验。OpenWRT允许用户安装各种网络服务和应用程序，如VPN、代理服务器等，以满足特定的网络需求。这为用户提供了更大的自由度，使他们能够创建符合个人或家庭需求的网络环境。 1.4 强大的社区支持 OpenWRT庞大的社区是其强大动力的源泉。用户可以在社区中交流心得、解决问题，甚至参与到项目的开发中。这种协作精神推动了OpenWRT的不断创新和进步。   2、NXP OpenWRT方案的应用 2.1 智能家居生态系统的构建 NXP OpenWRT方案与NXP Matter方案无缝结合为用户提供了构建智能家居生态系统的理想平台。通过其强大的定制能力，用户可以轻松连接、管理和控制各类智能设备，打造一个高度智能化的家居环境。该方案完整集成了NXP的Bluetooth和WIFI的芯片驱动，如：IW612， 88W9098， 88W8997等。 用户只需勾选相应的驱动即可轻松构建一个基于OpenWRT的Matter的OpenThread Border Router （OTBR）或者Zigbee Bridge。   2.2 定制化的网络服务 NXP OpenWRT方案支持各类网络服务和应用程序的定制安装。用户可以根据个人需求，轻松创建个性化的网络服务，如VPN、代理服务器，家庭路由器或网关等，实现更灵活的网络体验。 2.3 高清晰度视频流的传输 智能家居中高清晰度视频流的传输对网络性能提出了更高的要求。NXP OpenWRT方案通过其卓越的网络性能，结合NXP的工业级IP Camera方案， 确保用户能够流畅地享受高清视频流，为家庭娱乐带来更为优质的体验。 2.4 智能安防系统的构建 安防系统是不可或缺的一部分。NXP OpenWRT方案通过其高级网络安全功能，为用户打造了更可靠、更智能的安防系统，提高家庭的安全性。 3、NXP对OpenWRT的支持现状 基于OpenWRT众多优点及广阔的应用场景，NXP也很早就对OpenWRT实现了适配。不但实现了全部Layerscape系列处理器对OpenWRT的支持，目前主流的IMX处理器也得到了支持。具体支持的IMX平台及细节如下所示： Processor and Board Support ARMv8                                             ARMv7       I.MX93EVK                                •      I.MX6ULL       I.MX8MPlus       I.MX8MMini       I.MX8MNano       I.MX8MQuad OpenWrt Version       Based on OpenWrt v23.05 from mainline (tag: v23.05.0-rc1) Toolchain: ARMV8: gcc-11.3, binutils-2.37 ARMV7: gcc-12.3, binutils-2.40 U-Boot Boot Loader       IMX LF release, tag: lf-5.15.71-2.2.1 v2022.04 Linux Kernel       OpenWrt kernel 5.15.114 based on IMX SDK release kernel v5.15.71_2.2.1 Firmware       firmware-imx-8.18       firmware-sentinel-0.5.1 Main Features       Squashfs rootfs support on SD card.       Supported CLI and web configuation.       U-Boot Boot Loader - U-Boot: lf-5.15.71-2.2.1. - Arm Trusted firmware (TF-A) integration. - Boot from SDHC       Linux Kernel Core - Linux kernel 5.15.114 - Cortex-A53 (AARCH64), little endian for imx8m platform - Cortex-A55 (AARCH64), little endian for imx93 platform - Cortex-A7, little endian for imx6ull platform - 64-bit effective kernel addressing [Cortex-A53/A55]       Linux Kernel Drivers - SDIO 3.0 / eMMC5.1 - USB 3.0/2.0 Dual-Role with PHY type C - 32-bit LPDDR4 - 2x Gigabit Ethernet with AVB, IEEE 1588, EEE   and 1x w/ TSN - PCIe Gen 3 + WIFI - CAN FD - Dual-ch. QuadSPI (XIP) or 1x OctalSPI(XIP) - RTC Licensing       The majority of the software included in the OpenWrt release is licensed under a form of open source license (e.g. GPL, BSD).       Some software is licensed under the NXP EULA license. 4、如何开始部署和使用OpenWRT？ 如果想体验Layerscape系列芯片的OpenWRT强大功能，请从OpenWRT官方下载，即：https://git.openwrt.org/openwrt/openwrt.git。Layerscape的OpenWRT支持代码已经全部集成到了OpenWRT官方代码库。 此处以IMX8MMini-EVK为例说明OpenWRT在IMX平台的部署步骤，编译环境为Ubuntu22.04。 4.1 从github.com上获取源码 https://github.com/nxp-imx/imx_openwrt Tag: imx_v23.05_v5.15.114 4.2 编译，安装，配置OpenWRT $ ./scripts/feeds update -a; ./scripts/feeds install -a; cp config.default .config; make -j $ sudo dd if=/mnt/tftpboot/imx8/matter_20230908/openwrt-imx-imx8-imx8mmini-squashfs-sdcard.img of=/dev/sdX bs=1M && sync 这样就有生成了一个可以SD卡启动的OpenWRT了启动盘了。 可以直接用SD卡来启动体验OpenWRT. 更多的编译帮助请参考源代码中的README文件：target/linux/imx/README。 4.3 配置和个性化 用户可通过Web界面或SSH访问OpenWRT设备，开始配置和个性化网络环境。包括设置网络规则、安装软件包等，确保设备按照个人需求运行。下图为安装删除软件的界面。是不是很简单，很方便！       4.4 遇到问题怎么办？ 首先可以到OpenWRT社区这个充满活力的地方获得支持。 当然也可以分享自己的开发或使用经验，甚至参与到项目的开发中。这个开放的社区为用户提供了更多学习和发展的机会，共同推动OpenWRT不断向前。 还可以参与到NXP官方社区https://community.nxp.com/t5/i-MX-Processors/bd-p/imx-processors 进行提问和技术分享。有专业的工程师为您排忧解难。NXP OpenWRT期待您的参与！   免责声明 此OpenWRT发布是NXP系统工程倡议的一部分，不属于NXP为其MPU平台的Linux基础支持策略。NXP不对本发布及其后续版本的质量负责，包括添加对新平台的支持，这完全由系统工程团队自行决定。对于具体需求或问题，请通过以下电子邮件地址联系NXP的系统工程团队：“[email protected]”.

This is a simple document for recording some known-how and tips for building up the Windows 10 IoT development environment for i.MX platform. It can only be used as a complement for official document in BSP package (Guide/Release Note/etc.). Applicable for: Windows 10 IoT, i.MX BSP v1.4.1 (date to Nov/2023) Please refer to the PDF attached.

Information about the transition from the NXP Demo Experience to GoPoint for i.MX Application Processors.

BSP: L6.1.36 Some customer need use adb under usb ffs. The adb in Yocto can greatly improves development efficiency. This is a demo for enabling adb on Yocto.   Yocto local.conf IMAGE_INSTALL:append = "android-tools android-tools-adbd" PREFERRED_PROVIDER_android-tools-conf = "android-tools-conf-configfs"   Test script for launching adbd modprobe g_ffs idVendor=0x1fc9 idProduct=0x0146 iSerialNumber="ZhimingLiu" mkdir -p /dev/usb-ffs/adb mount -t functionfs adb /dev/usb-ffs/adb -o uid=2000,gid=2000 adbd &   Test on Windows: PS C:\Users\Administrator\Desktop\platform-tools> .\adb.exe devices List of devices attached ZhimingLiu device PS C:\Users\Administrator\Desktop\platform-tools> .\adb.exe shell sh-5.2# uname -a Linux imx8mp-lpddr4-evk 6.1.36+g04b05c5527e9 #1 SMP PREEMPT Fri Nov 24 04:46:22 UTC 2023 aarch64 GNU/Linux sh-5.2# ls config ffs t.sh test2.sh sh-5.2# cd / sh-5.2# ls bin dev home lost+found mnt proc run srv tmp usr boot etc lib media opt root sbin sys unit_tests var sh-5.2#

Platform: Demo images, i.MX8MPlus EVK   Some customer need test ffs gadget function on i.MX8MPlus EVK. Here is demo for ffs test, please connect EVK and Ubuntu PC before test.   Test script: #!/bin/sh # Setup the device (configfs) modprobe libcomposite mkdir -p config mount none config -t configfs cd config/usb_gadget/ mkdir g1 cd g1 echo 0x1fc9 >idVendor echo 0x0146 >idProduct mkdir strings/0x409 echo 12345 >strings/0x409/serialnumber echo "Signal 11" >strings/0x409/manufacturer echo "Test" >strings/0x409/product mkdir configs/c.1 mkdir configs/c.1/strings/0x409 echo "Config1" >configs/c.1/strings/0x409/configuration # Setup functionfs mkdir functions/ffs.usb0 ln -s functions/ffs.usb0 configs/c.1 cd ../../../ mkdir -p ffs mount usb0 ffs -t functionfs cd ffs ffs-test 64 & # from the Linux kernel, with mods! sleep 3 cd .. # Enable the USB device echo 38100000.usb > config/usb_gadget/g1/UDC   EVK log root@imx8mpevk:~# ./test2.sh [ 17.859597] file system registered ffs-test: dbg: ep0: writing descriptors (in v2 format) ffs-test: dbg: ep0: writing strings ffs-test: dbg: ep1: starting ffs-test: dbg: ep2: starting ffs-test: dbg: ep1: starts ffs-test: dbg: ep0: starts ffs-test: dbg: ep2: starts Event BIND Event ENABLE Ubuntu PC log: lzm@lzm-GL552VW:~$ lsusb -D /dev/bus/usb/001/008 Device: ID 1fc9:0146 NXP Semiconductors Test Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.10 bDeviceClass 0 bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 idVendor 0x1fc9 NXP Semiconductors idProduct 0x0146 bcdDevice 6.01 iManufacturer 1 Signal 11 iProduct 2 Test iSerial 3 12345 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 0x0020 bNumInterfaces 1 bConfigurationValue 1 iConfiguration 4 Config1 bmAttributes 0x80 (Bus Powered) MaxPower 2mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 0 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 0 bInterfaceProtocol 0 iInterface 5 Source/Sink Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x81 EP 1 IN bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x01 EP 1 OUT bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 1 Binary Object Store Descriptor: bLength 5 bDescriptorType 15 wTotalLength 0x0016 bNumDeviceCaps 2 USB 2.0 Extension Device Capability: bLength 7 bDescriptorType 16 bDevCapabilityType 2 bmAttributes 0x0000010e BESL Link Power Management (LPM) Supported BESL value 256 us SuperSpeed USB Device Capability: bLength 10 bDescriptorType 16 bDevCapabilityType 3 bmAttributes 0x00 wSpeedsSupported 0x000f Device can operate at Low Speed (1Mbps) Device can operate at Full Speed (12Mbps) Device can operate at High Speed (480Mbps) Device can operate at SuperSpeed (5Gbps) bFunctionalitySupport 1 Lowest fully-functional device speed is Full Speed (12Mbps) bU1DevExitLat 0 micro seconds bU2DevExitLat 0 micro seconds Device Status: 0x0001 Self Powered  

Usually, device tree source files are not a signal pure dts file. It could include dtsi, dts or C code heads .h files. Need C compiler finish the pre-compile to a pure dts file first. It is integrated inside the like Linux build system(Makefile, etc.). This document shows the original way to compile device tree. This document will show compile device tree under windows.    

How to use UART4 on iMX8M from Linux User Space   The UART4 on iMX8MM-EVK and iMX8MN-EVK are thinking of debugging the M core which is not usable on Linux user space by default on pre-compiled images.   To use the UART4 on Linux user space you have to do the next modifications on the device tree and atf to assign that peripheral to Linux User Space     https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c     iMX8MN-EVK   imx8mn_bl31_setup.c   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c   /* Master domain assignment */ RDC_MDAn(RDC_MDA_M7, DID1), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),       Device tree configurations for iMX8MN-EVK   iMX8MN-EVK.dtsi   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MN_CLK_UART3>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MN_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; + status = "okay"; + }; ********************** pinctrl_uart3: uart3grp { fsl,pins = < MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + };   iMX8MM-EVK   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c   imx8mm_bl31_setup.c   /* Master domain assignment */ RDC_MDAn(RDC_MDA_M7, DID1), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),   Device tree configurations for iMX8MM-EVK   iMX8MM-EVK.dtsi   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MM_CLK_UART3>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MM_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; + status = "okay"; + }; ********************** pinctrl_uart3: uart3grp { fsl,pins = < MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + };   iMX8MP-EVK   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c   imx8mp_bl31_setup.c   RDC_MDAn(RDC_MDA_M7, DID1), RDC_MDAn(RDC_MDA_LCDIF, DID2), RDC_MDAn(RDC_MDA_LCDIF2, DID2), RDC_MDAn(RDC_MDA_HDMI_TX, DID2), /* peripherals domain permission */ + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_WDOG1, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),   Device tree configurations for iMX8MP-EVK   iMX8MP-EVK.dts   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MP_CLK_UART3>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; fsl,uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MP_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + status = "okay"; + }; ************************************ pinctrl_uart3: uart3grp { fsl,pins = < MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 + >; + };     After compiling the image with the changes previously shown, we obtained this result:      

Board : i.MX93 EVK BSP: imx L6.1.1-1.0.0 Gui guider: 1.6.1   We have a GUI software tool called GUI Guider. It is a user-friendly graphical user interface development tool from NXP that enables the rapid development of high quality displays with the open-source LVGL graphics library. The GUI demo can run on the i.MX93EVK board. (https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER)   This document will show you an example how the buttons(gpio) on the EVK to interacting with the GUI. Basically, customer could use the same method to use the gpio pins to control everything.   On the i.MX93 EVK board, there are two buttons BTN1 and BTN2. They are connected to GPIO IO23 and GPIO IO24. Below is the schematic.    Buttons on the board.      SW1005 on the board   In the EVK's device tree file, need to change the pinmux for the two buttons like this: pinctrl_spdif: spdifgrp { fsl,pins = < // MX93_PAD_GPIO_IO22__SPDIF_IN 0x31e // MX93_PAD_GPIO_IO23__SPDIF_OUT 0x31e MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e MX93_PAD_GPIO_IO24__GPIO2_IO24 0x31e >; note: all the pins are defined in imx93-pinfunc.h.   For getting the input value of the buttons in user's space, I use the sysfs gpio. Build the imx-image-multimedia image first and then select the GPIO_SYSFS in kernel's menuconfig.   $ DISTRO=fsl-imx-xwayland MACHINE=imx93evk source imx-setup-release.sh -b build-xwayland $ bitbake imx-image-multimedia   After the build completed, go to the kernel's menuconfig to select the GPIO sysfs. $ bitbake linux-imx -c menuconfig [*] General setup-> Configure standard kernel features (expert users) [*] Device Drivers->GPIO Support-> /sys/class/gpio/... (sysfs interface)   Build the whole image again by "$ bitbake imx-image-multimedia".   Using the UUU to program the image to the EMMC on the EVK board. uuu -b emmc_all imx-image-multimedia-imx93evk.rootfs.wic.zst   Connect the LVDS to the board. Use the corresponding dtb to boot the board. In u-boot, set the dtb file. => setenv fdtfile imx93-11x11-evk-boe-wxga-lvds-panel.dtb => saveenv   Then restart the board. After the board boot up, it will look like below.     You need to calibrate the LVDS touch screen before it can normally use. Please use this command: $ weston-touch-calibrator LVDS-1     Now, build the GUI guider example. I use the Air Conditioner example. Download the GUI guider from the gui-guider web page: https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER   Follow the steps from the below web page to build the i.MX BSP and the gui example code. https://docs.nxp.com/bundle/GUIGUIDERUG-1.6.1/page/topics/yocto.html   After the gui-guider build completed, use the 'scp' command to transfer the gui_guider executable file to the board. Execute the command on your host PC like this: $ scp bld-imx93evk/tmp/work/armv8a-poky-linux/gui-guider/1.6.0-r0/image/usr/bin/gui_guider root@<Your Board IP address>:/ Note: You could use a router to connect your board and your host PC. They are on the same network so could use the 'scp' command to transfer the file to your board.   On your board, type the following commands to execute the gui. $ chmod 755 gui_guider $ ./gui_guider &   Then the GUI is running like this:   Now, let me explain how to find out the gpio number. Type the following command to show the mapping addresses of gpio. root@imx93evk:/# cat /sys/kernel/debug/gpio gpiochip3: GPIOs 0-31, parent: platform/47400080.gpio, 47400080.gpio: gpiochip0: GPIOs 32-63, parent: platform/43810080.gpio, 43810080.gpio: gpiochip1: GPIOs 64-95, parent: platform/43820080.gpio, 43820080.gpio: gpio-64 ( |cd ) in hi IRQ ACTIVE LOW gpio-71 ( |regulator-usdhc2 ) out lo gpiochip2: GPIOs 96-127, parent: platform/43830080.gpio, 43830080.gpio: gpiochip6: GPIOs 472-477, parent: i2c/0-001a, wm8962, can sleep: gpiochip5: GPIOs 478-487, parent: platform/adp5585-gpio.1.auto, adp5585-gpio, can sleep: gpio-479 ( |regulator-audio-pwr ) out hi gpio-483 ( |regulator-can2-stby ) out hi ACTIVE LOW gpio-486 ( |enable ) out hi gpiochip4: GPIOs 488-511, parent: i2c/1-0022, 1-0022, can sleep: gpio-492 ( |Headphone detection ) in lo IRQ gpio-501 ( |? ) out hi gpio-502 ( |regulator-vdd-12v ) out hi gpio-505 ( |reset ) out lo gpio-507 ( |? ) out hi gpio-508 ( |reset ) out lo ACTIVE LOW   The gpio pins of two buttons are GPIO2_IO23 and GPIO2_IO24. They are belongs to gpio2. In the imx93.dtsi, the gpio2's address is "gpio2: gpio@43810080". So, base on the information output from "/sys/kernel/debug/gpio", the gpio2 is mapping to "gpiochip0: GPIOs 32-63". So, the GPIO2_IO23 is 32+23=55, and the GPIO2_IO24 is 32+24=56.   To verify the gpio number is correct or not. We could do the following test. root@imx93evk:/# echo 55 > /sys/class/gpio/export root@imx93evk:/# echo in > /sys/class/gpio/gpio55/direction root@imx93evk:/# echo 56 > /sys/class/gpio/export root@imx93evk:/# echo in > /sys/class/gpio/gpio56/direction   Then, run these two commands to check the values. root@imx93evk:/# cat /sys/class/gpio/gpio55/value root@imx93evk:/# cat /sys/class/gpio/gpio55/value   When the button is not pressed, the value is 1. When press the button, the value is 0.  We could add the same in the GUI's custom.c. Open the GUI Guider software and add the code in the custom.c. /********************* * INCLUDES *********************/ #include <stdio.h> #include <stdlib.h> #include <unistd.h> #include <errno.h> #include <fcntl.h> #include "lvgl.h" #include "custom.h" #include "ui_Aircon.h" #include "guider_customer_fonts.h" /********************** * STATIC VARIABLES **********************/ int fdbtn1,fdbtn2,fdgpio; int btn1_pressed; int btn2_pressed; char btn1_value, btn2_value; void custom_func(void) { fdbtn1 = open("/sys/class/gpio/gpio55/value", O_RDWR); fdbtn2 = open("/sys/class/gpio/gpio56/value", O_RDWR); read(fdbtn1, &btn1_value, 1); read(fdbtn2, &btn2_value, 1); if(btn1_value=='0' && btn1_pressed) { btn1_pressed=0; ui_aircon_update_temp(0, kAIRCON_TempUp); } if(btn1_value=='1') btn1_pressed=1; if(btn2_value=='0' && btn2_pressed) { btn2_pressed=0; ui_aircon_update_temp(0, kAIRCON_TempDown); } if(btn2_value=='1') btn2_pressed=1; close(fdbtn1); close(fdbtn2); } void custom_init(lv_ui *ui) { fdbtn1 = open("/sys/class/gpio/gpio55/value", O_WRONLY); if (fdbtn1 == -1) { fdgpio = open("/sys/class/gpio/export", O_WRONLY); write(fdgpio,"55",3); write(fdgpio,"56",3); close(fdgpio); fdgpio = open("/sys/class/gpio/gpio55/direction", O_WRONLY); write(fdgpio,"in",3); close(fdgpio); fdgpio = open("/sys/class/gpio/gpio56/direction", O_WRONLY); write(fdgpio,"in",3); close(fdgpio); } else close(fdbtn1); ... ... ... ...   Add the custom_func() in the custom.h. #ifndef __CUSTOM_H_ #define __CUSTOM_H_ #ifdef __cplusplus extern "C" { #endif #include "gui_guider.h" void custom_init(lv_ui *ui); + void custom_func(void);   Also, need to add the custom function() into the dead loop in main.c.   To modify the code, bld-imx93evk$ vim tmp/work/armv8a-poky-linux/gui-guider/1.6.0-r0/gui-guider-1.6.0/ports/linux/main.c   while(1) { + custom_func(); // <--- Add the custom function here. /* Periodically call the lv_task handler. * It could be done in a timer interrupt or an OS task too.*/ time_till_next = lv_wayland_timer_handler(); #if LV_USE_VIDEO video_play(&guider_ui); #endif /* Run until the last window closes */ if (!lv_wayland_window_is_open(NULL)) { break; }   Re-build the code after modified. bld-imx93evk$ bitbake gui-guider -c compile -f   Build the whole image again. bld-imx93evk$ bitbake gui-guider Then use the 'scp' command to transfer the new gui-guider file to the board.   Finally, you can use the buttons on the EVK board to set the temperature up and down.                          

    In i.MX93 EVK, it use RGMII in ethernet connection. Some customer use RMII connection. This article describe RMII HW design and SW config.  It listed four cases in attached.