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Low power demo on i.MX8MM.   9/28/2020: Attachments updated. 1. Fix a bug in 5.4.24 kernel that system can only wakeup once. 2. Remove 0x104 from atf patch. On 5.4.24, tested OK without PLL2.   9/8/2020: Attachments updated. Add patches for 5.4.24 kernel.   We use it to test power consumption on i.MX8MM EVK.   Usage: 1. Kernel: echo "mem" > /sys/power/state   2. M4: Select a power mode from menu and wait for wakeup. Default wakeup method is GPT.   Add more patches, which will add functions for the case: 1. M core RUN and A core in suspend with DDR OFF. 2. M core wakeup A core without DDR support.   Descriptions: 1. freertos_hello.c. A simple example for M4 RUN when A core in DSM. Generally, we use MU_TriggerInterrupts(MUB, kMU_GenInt0InterruptTrigger); to do wakeup.   2. atf patch: Allow A53 to enter fast-wakeup stop when M4 RUN. Also avoid bypass of some plls, which is important to make M4 RUN when A53 enters suspend.   3. 0001-iMX8MM-GIR-wakeup.patch: GIR wakeup patch for kernel. Need kernel to use fsl-imx8mm-evk-m4.dtb.   4. 0002-Don-t-keep-root-clks-when-M4-is-ON.patch. Don't keep root clocks when M4 is ON. 5. 0001-plat-imx8mm-keep-the-necessary-clock-enabled-for-rdc.patch. There's a design issue that when wakeup from DSM, described in patch: " if NOC power down is enabled in DSM mode, when system resume back, RDC need to reload the memory regions config into the MRCs, so PCIE, DDR, GPU bus related clock must on to make sure RDC MRCs can be successfully reloaded. " Note that this patch will keep PCIE, DDR and GPU clock on, which will increase the power. An optimization will be decrease PCIE, DDR and GPU clock before entering DSM.   Power measurement: Supply Domain Voltage(V) I(mA) P(mW) peak avg peak avg peak avg VDD_ARM(L6) 1.010029 1.009513 1.109 1.030 1.120 1.039 VDD_SOC(L5) 0.855199 0.854857 190.110 189.973 162.582 162.400 VDD_GPU_VPU_DRAM(L10) 0.977240 0.977050 19.865 19.800 19.413 19.346 NVCC_DRAM(L15) 1.094407 1.094168 2.059 1.984 2.253 2.171 Total         185.367 184.956   Notes: 1. This power measurements is got by putting Cortex-A in DSM and Cortex-M in RUNNING. 2. In other tests, if M core can be put to STOP mode, additional power can be saved (5 - 20mA in VDD_SOC). 3. From the table, we can see that by putting DDR to retain, a lot of power can be saved in VDD_SOC and NVCC_DRAM.
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Important:  If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the   i.MX community.  Please note that any private messages or direct emails are not monitored and will not receive a response. i.MX 8M Family DDR Tools Overview The i.MX 8M Family DDR Tool is a Windows-based software to help users to do LPDDR4/DDR4/DDR3L training, stress test and DDR initial code generation for u-boot SPL.  This page contains the latest releases for the i.MX 8M Family DDR Tools and cover the following SoCs :   i.MX 8M Quad and its derivatives i.MX 8 M Quadlite and i.MX 8M Dual i.MX 8M Mini Quad and its derivatives i.MX 8M Mini Quadlite/Dual/DualLite/Solo/SoloLite  i.MX 8M Nano Quad and   its derivatives i.MX 8M Nano Quadlite/Dual/DualLite/Solo/SoloLite    NOTE:   For the i.MX 8/8X Family of DDR tools please refer to the: i.MX 8/8X Family DDR Tools Release   The purpose of the i.MX 8M Family DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.).  This process equips the user to then proceed with the bring-up of a boot loader and an OS.  Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface.     The  i.MX 8M Family DDR Tools consist of: DDR Register Programming Aid (RPA) DDR Stress test   For more details regarding these DDR tools and their usage, refer to the i.MX 8M DDR Tools User Guide.   i.MX 8M Family DDR Register Programming Aid (RPA) The i.MX 8M DDR RPA (or simply RPA) is an Excel spreadsheet tool used to develop DDR initialization for a user’s specific DDR configuration (DDR device type, density, etc.). The RPA generates the DDR initialization(in separate Excel worksheet tab):   DDR Stress Test Script : This format is used specifically with the DDR stress test by first copying the contents in this worksheet tab and then pasting it to a text file, naming the document with the “.ds” file extension. The user will select this file when executing the DDR stress test. The How to Use  Excel worksheet tab provides instructions on using the RPA   i.MX 8M Family DDR Register Programming Aid (RPA): Current Versions To obtain the latest RPAs, please refer to the following links (note, existing RPAs have been removed from this main page and moved to the SoC specific links below): i.MX 8M (m850D): https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8M-m850D-DDR-Register-Programming-Aid-RPA/ta-p/1172441 i.MX 8MMini (m845S): https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MMini-m845S-DDR-Register-Programming-Aid-RPA/ta-p/1172443 i.MX 8MNano (m815S): https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MNano-m815S-DDR-Register-Programming-Aid-RPA/ta-p/1172444   Processor Mask Revisions Memory Supported Latest RPA Version * i.MX 8M Quad & Derivatives All LPDDR4 Rev 25 i.MX 8M Quad & Derivatives All DDR4 Rev 11 i.MX 8M Quad & Derivatives All DDR3L Rev 6 i.MX 8M Mini  & Derivatives A0 LPDDR4 Rev 16 i.MX 8M Mini  & Derivatives A0 DDR4 Rev 12 i.MX 8M Mini  & Derivatives A0 DDR3L Rev 7 i.MX 8M Nano  & Derivatives A0 LPDDR4 Rev 3 i.MX 8M  Nano   & Derivatives A0 DDR4 Rev 4 i.MX 8M  Nano   & Derivatives A0 DDR3L Rev 2 * For the details about the updates, please refer to the Revision History tab of the respective RPA.    To modify the DRAM Frequency for a custom setting refer to iMX 8M Mini Register Programming Aid DRAM PLL setting    i.MX 8M Family DDR Stress Test    The i.MX 8M Family  DDR stress test tool is a Windows-based software tool that is used as a mechanism to verify that the DDR initialization is operational for use with u-boot and OS bring-up. To install the DDR Stress Test, save and extract the zip file mscale_ddr_tool_vXXX_setup.exe.zip     (where 'xxx' is the current version number) and follow the on-screen installation instructions.     i.MX 8M Family DDR Stress Test   Requirements   The tool requires access to the Windows registry, hence  users must run it in administrator mode . When users design new i.MX 8M Family boards, please make sure to follow the rules outlined in the respective Hardware Developers Guide and the MSCALE_DDR_Tool_User_Guide , which can help users bring up DDR devices on their respective i.MX 8M boards.   i.MX 8M Family DDR Stress Test  User Guide   The i.MX 8M DDR Stress Test tool includes the document: MSCALE_DDR_Tool_User_Guide NOTE:   Please read the MSCALE_DDR_Tool_User_Guide   inside the package carefully before you use this tool.   DDR Stress Test Revision History   Rev Major Changes* (Features) Comments 3.10 Fixed UART communication issues for some specific characters between the PC software and the target board. Fine-tune DDRPHY registers in generated C code.   3.00 Add support to i.MX8M-nano Add support to different PMIC or PMIC configuration Add support to stress test for all DDR frequency points RPA tools for Nano include support for DDR3L, DDR4, and LPDDR4.   Note that the DDR3L and LPDDR4 RPAs contain the name preliminary only to denote that these RPAs are based on internal NXP validation boards where the DDR4 RPA is based on the released EVK.   2.10 Change DDR4 capacity computing method   2.00 Add support to i.MX8M-mini   * Further details available in the release notes   Sample configuration in the .ds script for i.MX8M debug UART2: ################step 0: configure debug uart port. Assumes use of UART IO Pads.   ##### ##### If using non-UART pads (i.e. using other pads to mux out the UART signals), ##### ##### then it is up to the user to overwrite the following IO register settings   ##### memory set 0x3033023C 32 0x00000000 #IOMUXC_SW_MUX_UART2_RXD memory set 0x30330240 32 0x00000000 #IOMUXC_SW_MUX_UART2_TXD memory set 0x303304A4 32 0x0000000E #IOMUXC_SW_PAD_UART2_RXD memory set 0x303304A8 32 0x0000000E #IOMUXC_SW_PAD_UART2_TXD memory set 0x303304FC 32 0x00000000 #IOMUXC_SW_MUX_UART2_SEL_RXD sysparam set debug_uart   1 #UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)   Sample configuration in the front of the .ds script for i.MX8M debug UART3  ################step 0: configure debug uart port. Assumes use of UART IO Pads.   ##### ##### If using non-UART pads (i.e. using other pads to mux out the UART signals), ##### ##### then it is up to the user to overwrite the following IO register settings   ##### memory set 0x30330244 32 0x00000000 #IOMUXC_SW_MUX_UART3_RXD memory set 0x30330248 32 0x00000000 #IOMUXC_SW_MUX_UART3_TXD memory set 0x303304AC 32 0x0000000E #IOMUXC_SW_PAD_UART3_RXD memory set 0x303304B0 32 0x0000000E #IOMUXC_SW_PAD_UART3_TXD memory set 0x30330504 32 0x00000002 #IOMUXC_SW_MUX_UART3_SEL_RXD sysparam set debug_uart   2 #UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)   Sample configuration in the front of the .ds script for i.MX8MM PMIC configuration: ##############step 0.5: configure I2C port IO pads according to your PCB design.   ##### ########### You can modify the following instructions to adapt to your board PMIC ####### memory set 0x30330214 32 0x00000010  #IOMUXC_SW_MUX_I2C1_SCL memory set 0x30330218 32 0x00000010  #IOMUXC_SW_MUX_I2C1_SDA memory set 0x3033047C 32 0x000000C6 #IOMUXC_SW_PAD_I2C1_SCL memory set 0x30330480 32 0x000000C6  #IOMUXC_SW_PAD_I2C1_SDA sysparam set pmic_cfg 0x004B #bit[7:0] = PMIC addr,bit[15:8]=I2C Bus Bus index from 0 ('0' = I2C1, '1' = I2C2, '2' = I2C3, '3' = I2C4) sysparam set pmic_set 0x2F01 #bit[7:0] = Reg addr, bit[15:8]=Reg val. #REG(0x2F) = 0x01 sysparam set pmic_set 0x0C02   #REG(0x0C) = 0x02 sysparam set pmic_set 0x171E   #REG(0x17) = 0x1E sysparam set pmic_set 0x0C00   #REG(0x0C) = 0x00 sysparam set pmic_set 0x2F11    #REG(0x2F)=0x11         Related Resources Links: iMX 8M Mini Register Programming Aid DRAM PLL setting  i.MX 8/8X Series DDR Tool Release  i.MX 6/7 DDR Stress test GUI Tool i.MX 8M Application Processor Related Resources i.MX8M (m850D) DDR Register Programming Aid (RPA)  i.MX8MMini (m845S) DDR Register Programming Aid (RPA)  i.MX8MNano (m815S) DDR Register Programming Aid (RPA) 
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GmSSL is an open source cryptographic toolbox that supports SM2 / SM3 / SM4 / SM9 and other national secret (national commercial password) algorithm, SM2 digital certificate and SM2 certificate based on SSL / TLS secure communication protocol to support the national security hardware password device , To provide in line with the national standard programming interface and command line tools, can be used to build PKI / CA, secure communication, data encryption and other standards in line with national security applications. For more information, please access GmSSL official website http://gmssl.org/english.html.   Software environments as the belows: Linux kernel: imx_4.14.98_2.0.0_ga cryptodev: 1.9 HW platform: i.MX6UL, i.MX7D/S, i.MX8M/MM, i.MX8QM/QXP. The patches include the following features: 1, Support SM2/SM9   encryption/decryption/sign/verify/ key exchange ,   RSA  encryption/decryption, DSA/ECDSA sign/verify, DH/ECDH key agreement, ECC & DLC & RSA key generation and big number  operation and   e lliptic  c urve   m ath by CAAM hardware   accelerating . 2, run "git apply 0001-Enhance-cryptodev-and-its-engine-in-GmSSL-by-CAAM-s-.patch" under folder sources/poky, and "git apply 0001-Add-public-key-cryptography-operations-in-CAAM-drive.patch"   under folder   sources/meta-fsl-bsp-release for patch these codes. 3, GmSSL Build command: $ tar zxvf GmSSL-master-iMX.tgz $  cd  GmSSL-master-iMX (For i.MX8M/MM, i.MX8QM/QXP) $  source /opt/arm-arch64/environment-setup-aarch64-poky-linux  $  ./Configure -DHAVE_CRYPTODEV -DUSE_CRYPTODEV_DIGESTS -DHW_ENDIAN_SWAP  --prefix= ~/install64   --openssldir=/etc/gmssl --libdir=/usr/lib no-saf no-sdf no-skf no-sof no-zuc -no-ssl3 shared linux-aarch64 $  make  $  make install                              /*image and config file will be installed to folder   ~ /install64   */   (For  i.MX6UL, i.MX7D/S ) $   source /opt/arm-arch32/environment-setup-cortexa7hf-neon-poky-linux-gnueabi $   ./Configure -DHAVE_CRYPTODEV -DUSE_CRYPTODEV_DIGESTS --prefix= ~ /install32   --openssldir=/etc/gmssl --libdir=/usr/lib no-saf no-sdf no-skf no-sof no-zuc -no-ssl3 shared linux-armv4 $  make  $  make install                             /*image and config file will be installed to folder   ~ /install32   */   4, How to use GmSSL: copy image gmssl to /usr/bin on i.MX board;  copy  gmssl libcrypto.so.1.1 and libssl.so.1.1 to /usr/lib  on i.MX board; copy folder etc/ gmssl to /etc/ on i.MX board. copy test examples (dhtest, dsatest, rsa_test, ecdhtest, ecdsatest, eciestest, sm3test, sms4test, sm2test, sm9test) under GmSSL-master-iMX/test  to U disk for running. You can run test examples by the following commands: #insmod /lib/modules/4.14.98-imx_4.14.98_2.0.0_ga+g5d6cbeafb80c/extra/cryptodev.ko #/run/media/sda1/dhtest #/run/media/sda1/dsatest #/run/media/sda1/rsa_test #/run/media/sda1/ecdhtest #/run/media/sda1/ecdsatest #/run/media/sda1/eciestest #/run/media/sda1/sm3test #/run/media/sda1/sms4test #/run/media/sda1/sm2test #/run/media/sda1/sm9test and speed test commands: #gmssl speed sm2 #gmssl genrsa -rand -f4 512 #gmssl speed dsa #gmssl genrsa -rand -f4 1024 #gmssl speed rsa #gmssl genrsa -rand -f4 2048 #gmssl speed ecdsa #gmssl genrsa -rand -f4 3072 #gmssl speed ecdh #gmssl genrsa -rand -f4 4096   ++++++++++++++++++++++++++++     updating at 2019-09-10    +++++++++++++++++++++++++++++++++++++++++++++ 0001-fix-the-bug-which-hash-and-cipher-key-don-t-use-DMA-.patch fix the issue which   dismatching on key buffer between crytodev and caam driver. Crytodev uses stack's buffer for key storage and caam driver use it to dma map which cause flush cache failure. The patch need to apply on cryptodev-module in Yocto build.   ++++++++++++++++++++++++++++     updating at 2019-10-14   +++++++++++++++++++++++++++++++++++++++++++++ This updating is for China C-V2X application. The package meta-cv2x_4.14.98_2.0.0_ga.tgz is Yocto layer which bases on GmSSL and Cryptodev. I add HW SM2 verification by dedicated CAAM job descriptor and enhanced SW  SM2 verification by precomputed multiples of generator and ARMv8 assembler language to accelerate point  operation.  Software environments as the belows: Linux kernel: imx_4.14.98_2.0.0_ga cryptodev: 1.9 HW platform: i.MX8M/MM/MN, i.MX8QM/QXP. How to build: 1, decompress  meta-cv2x_4.14.98_2.0.0_ga.tgz and copy meta-cv2x to folder (Yocto 4.14.98_2.0.0_ga dir)/sources/ 2, Run DISTRO=fsl-imx-wayland MACHINE=imx8qxpmek source fsl-setup-release.sh -b build-cv2x and add BBLAYERS += " ${BSPDIR}/sources/meta-cv2x " into ( Yocto 4.14.98_2.0.0_ga dir ) /build-cv2x/conf/bblayers.conf and  IMAGE_INSTALL_append += " gmssl-bin "  into local.conf 3, Run bitbake fsl-image-validation-imx. 4, You can find  cv2x-verify.c under (build dir)/tmp/work/aarch64-poky-linux/cryptodev-tests/1.9-r0/git/tests. It is example for using CAAM cryptdev interface to do C-V2X verification (includes SM2 p256, NIST p256 and brainpoolP256r1).   cv2x_benchmark.c   under ( build dir )/tmp/work/aarch64-poky-linux/gmssl/1.0-r0/gmssl-1.0/test is the benchmark test program of C-V2X verifying. It includes HW, SW and HW+SW(one CPU) verifying for  SM2 p256, NIST p256 and brainpoolP256r1. 5, Run the below command on your i.MX8QXP MEK board. modprobe cryptodev ./cv2x_benchmark Note: the udpated GmSSL also support projective coordinates and affine coordinates (CAAM only support affine  coordinates ). Affine  coordinates is used  by default. You can call EC_GROUP_set_coordinates() and EC_GROUP_restore_coordinates() to change coordinates and restore default. When you hope to use some EC APIs under expected coordinates, you need to call EC_GROUP_set_coordinates() before EC APIs and  EC_GROUP_restore_coordinates()  after them. Like the below example: orig_coordinate = EC_GROUP_set_coordinates(EC_PROJECTIVE_COORDINATES); group = EC_GROUP_new_by_curve_name(NID_sm2p256v1); EC_GROUP_restore_coordinates(orig_coordinate);   ++++++++++++++++++++++++++++     updating at 2020-11-09   +++++++++++++++++++++++++++++++++++++++++++++ This updating is for Yocto release of Linux 5.4.47_2.2.0​​. The package meta-gmcrypto_L5.4.47-2.2.0.tgz is Yocto layer which also support c-v2x feature in previous release .  Software environments as the belows: Linux kernel: imx_5.4.47_2.2.0 cryptodev: 1.10 HW platform: i.MX6UL, i.MX7D/S, i.MX8M/8M Mini/8M Nano/8M Plus, i.MX8/8X. How to build: 1, decompress meta-gmcrypto_L5.4.47-2.2.0.tgz and copy meta-gmcrypto to folder (Yocto 5.4.47_2.2.0 dir)/sources/ 2, Run DISTRO=fsl-imx-wayland MACHINE=imx8mmevk source imx-setup-release.sh -b build-imx8mmevk and add BBLAYERS += " ${BSPDIR}/sources/meta-gmcrypto " into ( Yocto 5.4.47_2.2.0 dir ) /build-imx8mmevk/conf/bblayers.conf and  IMAGE_INSTALL_append += " gmssl-bin "  into local.conf 3, Run bitbake fsl-image-validation-imx. 4, You can find  cv2x-verify.c under (build dir)/tmp/work/aarch64-poky-linux/cryptodev-tests/1.10caam-r0/git/tests. It is example for using CAAM cryptdev interface to do C-V2X verification (includes SM2 p256, NIST p256 and brainpoolP256r1).   cv2x_benchmark.c   under ( build dir )/tmp/work/aarch64-poky-linux/gmssl/1.0-r0/gmssl-1.0/test is the benchmark test program of C-V2X verifying. It includes HW, SW and HW+SW(one CPU) verifying for  SM2 p256, NIST p256 and brainpoolP256r1. 5, Run the below command on your i.MX8M Mini evk board. modprobe cryptodev ./cv2x_benchmark gmssl speed sm2 gmssl speed dsa gmssl speed rsa gmssl speed ecdsa gmssl speed ecdh gmssl genrsa -rand -f4 -engine cryptodev 4096 Note: 1, the udpated GmSSL also support projective coordinates and affine coordinates (CAAM only support affine  coordinates ). Affine  coordinates is used  by default. You can call EC_GROUP_set_coordinates() and EC_GROUP_restore_coordinates() to change coordinates and restore default. When you hope to use some EC APIs under expected coordinates, you need to call EC_GROUP_set_coordinates() before EC APIs and  EC_GROUP_restore_coordinates() after them. Like the below example: orig_coordinate = EC_GROUP_set_coordinates(EC_PROJECTIVE_COORDINATES); group = EC_GROUP_new_by_curve_name(NID_sm2p256v1); EC_GROUP_restore_coordinates(orig_coordinate); 2, Yocto Zeus integrates openssl 1.1.1g, so I change library name of gmssl from libcrypto to libgmcrypto and from libssl to libgmssl to avoid name confliction with openssl 1.1.1g (lib name are also libcrypto.so.1.1 and libssl.so.1.1). You should use -lgmcrypto and -lgmssl when you link gmssl library instead of -lcrypto and -lssl.
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This document is a user guide for the GStreamer version 1.0 based accelerated solution included in all the i.MX 8 family SoCs supported by NXP BSP L5.4.24_1.1.0. Some instructions assume a host machine running a Linux distribution, such as Ubuntu, connected to i.MX 8 device. These commands were tested using Ubuntu 18.04 LTD, and while Ubuntu is not required on the host machine, other distributions have not been tested. These instructions are targeted for use with the following hardware: • i.MX 8MQ EVK • i.MX 8MN EVK • i.MX 8MN EVK • i.MX 8QXP MEK B0 • i.MX 8QM MEK B0   Release History v1.0 - Mar 2020 - Initial release. v2.0 - Sep 2020: Added the following content: - Mux/Demux Examples - Audio Examples - Image Examples - Transcode Examples - Streaming Examples - Multi-Display Examples - Scaling and Rotation Examples - Zero-copy Examples - Debug Examples Maintainers: . Marco Franchi . Pedro Jardim
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1. HW Environment:     IMX8mp-evk board.     ITE6151 mipi dsi to eDP bridge board.   2. SW Environment:       IMX YOCTO 5.4.24-2.1.0 release.   3. Patch operation:     a. git clone   https://source.codeaurora.org/external/imx/linux-imx.git     b. git checkout -b  imx_5.4.24_2.1.0 origin/imx_5.4.24_2.1.0     c. patch -p1 < ../ite6151_mipi2edp_linux_5.4.24_20200921.patch   4. Tested on imx8mp-evk board with DP monitor on 1080p mode: 5. Attached doc list:     IT6151 demo board user guide v1.0.pdf ------  ite6151 bridge board HW guide     it6151_qfn48_v20_20190905-01_end.pdf  ------   ite6151 bridge board   SCH     imx8mp_ite6151_mipi2edp_linux_5.4.24_20200921.patch ------  Linux kernel driver patch     Image + imx8mp-evk-it6151.dtb  ------  test image and dtb  
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After following instructions on how to change DRAM PLL frequency, here is a quick comparison of Stream, running on the i.MX 8MM. Normalized to LPDDR4-3000, based on  5.4.24_2.1.0​ BSP Stream LP4-3000 LP4-2400 DDR4-2400 LPDDR-1866 Copy: 1 0.810 0.735 0.497 Scale: 1 0.896 0.765 0.756 Add: 1 0.899 0.683 0.762 Triad: 1 0.902 0.680 0.767      
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i.MX evaluation board can be a simple solution to program i.MX boards in a factory for instance. i.MX evaluation board are not for industrial usage, but you can find plenty of cheap i.MX insdustrial boards on the web. Here I am using an i.MX8QXP rev B0 MEK board and I will program an i.MX6Q SABRE SD board. The first step is to generate your image. Follow the documentation steps to generate the "validation" image. You will have to customize a little bit the local.conf file (in conf/local.conf) to have git, cmake, gcc and other missing package. edit local.conf and add the following lines at the end of the file: IMAGE_INSTALL_append = " git cmake htop packagegroup-core-buildessential xz p7zip rsync" ‍‍‍‍ ‍ I have added rsync package in local, it can replace cp (copy) but with the --progress option you can see the copy progression. P7zip replace unzip for our images archives avaialable on nxp.com as unzip as issues with big files. then rebake your image: bitbake - k fsl - image - validation - imx‍‍‍‍ ‍ When it is done, go in tmp/deploy/image/<your image generated> and use uuu to program your board (I use a sd card; thus I can increase the partition esily): sudo . / uuu - b sd_all imx - boot - imx8qxpmek - sd . bin - flash fsl - image - validation - imx - imx8qxpmek . sdcard . bz2 / * ‍‍‍‍ ‍ As the rootfs can be too small, use gparted under Linux for instance to increase the size of the partition. Put the SD card and start your board. Here here the dirty part... You may know archlinux|ARM websitesite (Arch Linux ARM ), you have a lots of precompiled packages. Thus on the board you can download it, and copy the file in /usr folder (you can use it to have the latest openSSL for  instance!). Plug an ethernet cable on the board and check if it is up: ifconfig - a ifconfig eth0 up‍‍‍‍‍‍‍‍ ‍ ‍ Now you should have access to the internet. On uuu webpage you can find all the packages you need (here I am using a 4.14.98_2.0.0 Linux): mkdir missinglibs cd missinglibs wget http : / / mirror . archlinuxarm . org / aarch64 / core / bzip2 -1.0 . 8 - 2 - aarch64 . pkg . tar . xz wget http : / / mirror . archlinuxarm . org / aarch64 / core / nettle -3.5 . 1 - 1 - aarch64 . pkg . tar . xz wget http : / / mirror . archlinuxarm . org / aarch64 / core / libusb -1.0 . 22 - 1 - aarch64 . pkg . tar . xz wget http : / / mirror . archlinuxarm . org / aarch64 / extra / libzip -1.5 . 2 - 2 - aarch64 . pkg . tar . xz wget http : / / mirror . archlinuxarm . org / aarch64 / core / zlib -1 : 1.2 . 11 - 3 - aarch64 . pkg . tar . xz wget http : / / mirror . archlinuxarm . org / aarch64 / extra / p7zip -16.02 - 5 - aarch64 . pkg . tar . xz cd . . ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ Wait all the archives are downloaded (otherwise you'll decompress before the archive is downloaded) as wget is running in background! Now untar the archives and copy it in the rootfs (dirty): tar - xJf libzip -1.5 . 2 - 2 - aarch64 . pkg . tar . xz tar - xJf libusb -1.0 . 22 - 1 - aarch64 . pkg . tar . xz tar - xJf nettle -3.5 . 1 - 1 - aarch64 . pkg . tar . xz tar - xJf bzip2 -1.0 . 8 - 2 - aarch64 . pkg . tar . xz cp zlib -1 : 1.2 . 11 - 3 - aarch64 . pkg . tar . xz zlib tar - xJf zlib tar - xJf p7zip -16.02 - 5 - aarch64 . pkg . tar . xz cd usr sudo cp - R . / usr cd . . / . . / ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ Download and compile uuu: git clone git : / / github . com / NXPmicro / mfgtools . git cd mfgtools / cmake . make‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍ Download an image on nxp.com for instance. I have downloaded on the i.MX6 4.14.98_2.0.0 image and put it on a usb key. then unzip it in the uuu folder: 7z e L4 .14 . 98_2 .0 . 0_ga_images_MX6QPDLSOLOX . zip‍‍‍ ‍ As mentionned before unzip cannot hadle big files... so use 7z as me plug the i.MX6Q SABRE SD to the i.MX8X and program your i.MX6 board: . / uuu uuu . auto - imx6qsabresd‍ uuu ( Universal Update Utility ) for nxp imx chips -- libuuu_1 .3 . 74 - 0 - g64eeca1 Success 1 Failure 0 ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍
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Tips collected from zhaoyang-b49593 and dandouglass-b41520 while enabling redundant boot: Using i.MX 8MQ, same method can be applied for other i.MX devices that support redundant boot, see SoC Reference Manual. As described on the RM, if primary image authentication fails the ROM can reset and try booting a secondary image. This feature is only available on closed mode with properly signed binaries , otherwise the ROM boots the primary image despite the auth failure. For the i.MX 8MQ, the secondary image must start with spl, not HDMI firmware. Note, there is no ROM redundancy for the hdmi fw, if it is corrupt user can store a 2nd copy on a different memory address and update at run time. Steps to generate a dual spl image: 1. Build and Sign bootable binary (spl, u-boot, atf, fw, etc) Use the Yocto BSP or follow this post to build outside the Yocto environment. To sign the binary, follow the documentation on u-boot source: <u-boot>/doc/imx/habv4/guides/mx8m_secure_boot.txt Program image to the SD card: dd if=signed_flash.bin of=<sd path> bs=1024 seek=33 After boot you can use "hab_status" to verify that no events were generated: u-boot=> hab_status Secure boot disabled HAB Configuration: 0xf0, HAB State: 0x66 2. Corrupt spl on your boot image You can corrupt anywhere on the spl signed area. For easier visualization at boot time we can corrupt the SPL banner. First create a copy: cp signed_flash.bin signed_flash_corrupt.bin Find the banner: hexdump -C signed_flash.bin | grep 2019 00020190 26 1c 40 92 04 00 80 d2 05 01 80 52 c4 20 04 aa |&.@........R. ..| 0002eac0 32 30 31 39 2e 30 34 2d 30 30 30 32 39 2d 67 34 |201 9 .04-00029-g4| 000dde10 3a 20 20 00 55 2d 42 6f 6f 74 20 32 30 31 39 2e |: .U-Boot 2019.| 0002eac3 is on spl area, where "9" for 2019 is, replace by "X" printf "X" > X dd if=X of=signed_flash_corrupt.bin seek=$((0x2eac3)) bs=1 conv=notrunc Verify corrupt binary hexdump -C -s 0x2eac0 -n 64 signed_flash_corrupt.bin 0002eac0 32 30 31 58 2e 30 34 2d 30 30 30 32 39 2d 67 34 |201 X .04-00029-g4| 0002ead0 37 63 31 39 32 32 20 28 41 70 72 20 32 37 20 32 |7c1922 (Apr 27 2| Transfer image to SD Card dd if=signed_flash_corrupt.bin of=<sd path> bs=1024 seek=33 Now, you should see hab events after running "hab_status" on u-boot 3. Create a secondary boot image This can be the same content as your primary image without the HDMI fw or it can be a different spl image. For easier visualization, we can change the SPL banner, on the code this time. Modify banner at ./common/spl/spl.c as: - puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - " + puts("\nSecondary U-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - " As mentioned above, we want our boot image without the HDMI fw, when running imx-mkimage use the flash_evk_no_hdmi target: make SOC=iMX8MQ flash_evk_no_hdmi Sign the image as in step 1. If you program the new image to the SD you should see the new banner. Make sure to run hab_status to confirm that no HAB events are generated. 4. Program SRK Hash and Close SoC Follow the documentation on   u-boot source  for SRK programming and closing the device : <u-boot>/doc/imx/habv4/guides/mx8m_secure_boot.txt Before closing the SoC, but after the SRK is programmed, try your images to confirm no HAB events are generated. Be careful with this step, errors could brick your board. This step is irreversible. After closing the SoC it will only boot signed images. 5. Create dual bootloader image We can concatenate our binaries to create a single file, let's use 2MB distance between primary and secondary images: For the working primary image: objcopy -I binary -O binary --pad-to 0x200000 --gap-fill=0x00 signed_flash.bin 1st-spl_pad.bin cat 1st-spl_pad.bin secondary2_nohdmifw_signed_flash.bin > 1st-spl_pad_2nd-spl.bin Or for the corrupt primary image experiment: objcopy -I binary -O binary --pad-to 0x200000 --gap-fill=0x00 signed_flash_corrupt.bin 1st-spl_pad.bin cat 1st-spl_pad.bin secondary2_nohdmifw_signed_flash.bin > 1st-spl_pad_2nd-spl.bin Program it to the SD card on 0x8400 offset (33k) dd if=1st-spl_pad_2nd-spl.bin of=<sd path> bs=1024 seek=33 && sync 6. Add Secondary image table Follow the format on the RM, this is only 20 bytes long. For a 2MB distance between the table and the secondary image we can use "0x1000" on the firstSectorNumber field. 2MB/512 = 4096 (0x1000) The perl script attached, genSecTable.pl, can be used to generate it. perl genSecTable.pl 0x1000 Program it to the SD card on 0x8200 offset dd if=secTable.bin of=<sd path> bs=1 seek=$((0x8200)) && sync 7. Verify secondary image is booting If using the corrupt primary image, you should see the spl with the "Secondary U-Boot SPL..." banner. You can also read the persist secondary boot bit. u-boot=> md.l 0x30390098 1 30390098: 40000000 ...@ The work can be extended patching spl for in case of u-boot authentication failure, spl can try to authenticate and jump to the secondary u-boot.
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Recently I published this i.MX Dev Blog post about the Gateworks plugin gst-variable-rtsp-server support for i.MX 6. Now, you can check how to use it on i.MX 8 SoCs as well. 1. Preparing the image In order to use gst-variable-rtsp-server plugin, prepare your machine and distro: Add the following line to conf/local.conf: IMAGE_INSTALL_append += " gstreamer1.0-rtsp-server gst-variable-rtsp-server " Download the attached patch and apply it by doing: $ cd <yocto_path>/sources/meta-fsl-bsp-release/ $ git am ~/Download/0001-Add-RTSP-support-for-i.MX-8-L4.14.78_ga1.0.0-or-olde.patch Note: This patch is not necessary for L4.14.98_ga2.0.0 BSP! Then, build the image with bitbake and deploy it to the SD card. 2. Video Test Source Example Server $ gst-variable-rtsp-server -p 9001 -u "videotestsrc ! v4l2h264enc ! rtph264pay name=pay0 pt=96" Client 2. Camera Example Server $ gst-variable-rtsp-server -p 9001 -u "v4l2src device=/dev/video0 ! video/x-raw,width=640,height=480 ! v4l2h264enc ! rtph264pay name=pay0 pt=96" Client In order to use VLC or other application as the client, just enter the URL as shown in the image below:
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Before reading: only a personal works and sharing, not any form of "release". I didn't find any confidential information from the packages. So, I'm publishing it here. This is only for testing purpose. Do NOT use it for building a product. Use it at your own risk!! Yocto is flexible and powerful, and also, big and slow (when building). Sometimes we only need to build uboot or kernel or some piece of testing code. It's really a waste of time to build-up the whole Yocto environment which may cost over 50GB disk space and over 3 hours of building. I've made some scripts and sum them up to form a toolset for building uboot, kernel and some testing code out of Yocto environment. It's only a simple container and expect to use with uboot and kernel source code from formal Freescale release and a SDK built from Yocto project. GitHub source repo:       https://github.com/gopise/gopbuild What’s made off (a full package, not only the container): 1.    Some scripts and configurations files. 2.    SDK built from Yocto. 3.    Uboot/kernel from specific version. 4.    A hello-world to demonstrate how to build app in this environment. 5.    A slimmed rootfs binary from specific BSP pre-built as base. Will customize base on the source under “rootfs” folder. Only a placeholder in the container-only version. How to use it: Several common used board configurations have been included in the script: 6qsabresd/6qsabreai/6qpsabreai. You can add more into the “gopbuild” script easily. The “sabresd” has been set as default.      If you want to build all for sabresd (First of all, de-compress the package): cd < de - compressed - folder > source envsetup [ It will prompt for selecting board configuration to be built . Choose one by input corresponding number or click < ENTER > for default board . ] gmk ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ ‍      If you want to build specific module for default board, such as uboot: gmk uboot ‍‍‍‍‍‍‍ ‍ ‍      Build kernel for sabreai board instead of default device: gmk kernel sabreai ‍‍‍‍‍‍‍ ‍ ‍      Clean everything? gmk all clean ‍‍‍‍‍‍‍ ‍ ‍ After a successfully full build, you will get everything under “output” folder, including a log folder contains full build log:      “u-boot.imx/zImage/rootfs.tar.bz2/*.dtb”, can be used with MFG or uuu.      “fsl-image.sdcard”, can be burn into SD card directly. "Ready-for-building" Package: The "gopbuild" itself is a "container-only" package which doesn't contain any source or SDK. I've also made some packages based on latest BSP release for i.MX6/i.MX7/i.MX8. These packages are "ready-for-build" package which you can de-compress and build it directly. -------------------------------------------------------------------------------------------------- URL:https://pan.baidu.com/s/1Xlh1OBGsTRXez_NQw-Rjxg Password: gdc9 -------------------------------------------------------------------------------------------------- Note: 1. To build for i.MX8 (8QM/8MQ/8QXP), you need L4.14.* or above. 2. To build for i.MX8, please download the SCFW from i.MX software page       i.MX Software and Development Tools | NXP      After download, decompress corresponding package for specific chip and put it under "/platform/scfw/". Take i.MX8QXP for example:             /platform/scfw/scfw_export_mx8qx/ All material (uboot/kernel/test code and SDK) are from official Yocto release. Thanks!
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The Register Programming Aid (RPA) provides a default DRAM PLL setting (DRAM frequency) based on the default setting supported in u-boot.  It is highly recommended to use the default DRAM frequency settings in the RPA for ease of use and to align with u-boot.  Otherwise, in addition to updating the RPA for the new DRAM frequency, the u-boot SPL code itself will need to be manually updated with the new DRAM PLL setting.   Should the user wish to change the DRAM frequency, the following steps are required:   First, the user needs to update the RPA Register Configuration worksheet tab Device Information table “ Clock Cycle Freq (MHz) “ setting to the desired DRAM frequency     2. Next, in the RPA DDR stress test file worksheet tab search for “ memory set 0x30360054 ”.  The address “ 0x30360054 ” is for the DRAM PLL register address and its setting needs to be updated to the desired frequency.      Note that there is another place where the DRAM frequency is also updated “ freq0 set 0x30360054 ” but it is automatically updated based on the setting above.    Below is a table of various frequencies to choose from.  For frequencies not listed in the table below, it is up to the user to calculate a new register setting based on the formula:    (24MHz x m)/(p x 2^s)   Where “m” represents the PLL_MAIN_DIV, “p” represents the PLL_PRE_DIV, and “s” represents the PLL_POST_DIV.  NOTE:  The DRAM frequency is double the DRAM PLL frequency DRAM_freq = DRAM_PLL x 2   The DRAM PLL register and bit settings are shown below:        The following table provides examples of the various settings to create the desired frequency:   For example, in the i.MX 8M Mini LPDDR4 RPA where the default DRAM frequency is 1500MHz, let’s assume that the user instead wants 1200MHz.  First, the user changes the RPA Register Configuration worksheet tab Device Information table “ Clock Cycle Freq (MHz ) “ setting to 1200. Next, in the RPA DDR stress test file worksheet tab search for “memory set 0x30360054” and replace “0xFA080” (original setting from DRAM frequency 1500MHz) with “ 0x0012C032 ” (updated for DRAM frequency 1200MHz).  Note that for a DRAM frequency of 1200MHz, the DRAM PLL is configured for 600MHz, as the DRAM frequency is double the DRAM_PLL.   The steps outlined above are sufficient in order to create a DDR script for use with the DDR stress test tool to run the calibration and execute the DDR stress test.  However, to deploy the generated code in SPL, more steps are needed as the u-boot SPL DDR driver does not automatically change the DRAM PLL according to the generated code. Hence the user will need to manually modify related code in u-boot.  It is highly recommended to work with a software engineer familiar with u-boot when making the following modifications.    3. Modify DRAM PLL configuration in   uboot-imx/drivers/ddr/imx8m.c , specifically the code highlighted below (function call dram_pll_init).  Note that the files and file paths in u-boot change frequently, so if this particular file (or file path) does not exist in the current u-boot, simply search for dram_pll_init or ddr_init.   void ddr_init(struct dram_timing_info *dram_timing) { ……    debug("DDRINFO: cfg clk\n");      if (is_imx8mq())           dram_pll_init(DRAM_PLL_OUT_800M);      else            dram_pll_init(DRAM_PLL_OUT_750M); ……  }   In the above code, the user should update the macro “ DRAM_PLL_OUT_750M ” with the new DRAM PLL value.  Note that the default DRAM_PLL_OUT_750M results in the DRAM frequency of 1500MHz, where the DRAM frequency is double the DRAM PLL (as previously stated above).   For example, if the user desires to run the DRAM at 1200MHz, they would change the above to:  dram_pll_init(DRAM_PLL_OUT_600M) ;   Note that DRAM_PLL_OUT_600M is a supported macro in the dram_pll_init() API.  If the desired DRAM PLL configuration does not exist in dram_pll_init(), you will need to add support in uboot-imx/arch/arm/mach-imx/imx8m.c  (as stated above, if this file path does not exist in the current u-boot simply search for dram_pll_init):   void dram_pll_init(enum dram_pll_out_val pll_val) { …… } Related Links i.MX8 MSCALE SERIES DDR Tool Release (V3.10) 
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NOTE: Always de-power the target board and the aggregator when plugging or unplugging smart sensors from the aggregator. NOTE: See this link to instrument a board with a Smart Sensor. This page documents the triple-range "smart" current sensor that's part of a larger system for profiling power on application boards. The smart sensor features a Kinetis KL05Z with three current sense amplifiers. It allows measurement currents in three ranges. Four assembly options allow measurement of rail voltages 0-3.3V (two overall current ranges), 0-6.6V, and 12V. It connects to an aggregator, which powers, controls and aggregates data from a number of smart sensor boards. One of the biggest improvements over the older dual-range measurement system is that the on-sensor microcontroller allows near-simultaneous measurement of all instrumented rails on a board. The dual range profiler can only make one measurement at a time.  These are intended to be used with a microncontroller board to act as a trigger and data aggregator. This aggregator could also be used to reprogram the sensors.  The series resistance added by the smart sensor when in run mode (highest current range) is under 11 milliOhms as measured with 4-point probes and a Keysight B2902B SMU.  A "power oscilloscope" can be made by triggering measurements at regular intervals and presenting the results graphically.... Schematic: Board Layout, Top: Board Layout, Bottom: Here's a photo of two with a nickel is included to show scale. The board measures about 0.5 by 1.3 inches. Connections: The smart sensor header connections are: 5V: powers the 3.3V regulator, which in turn powers everything else on the sensor board 12V: all the gates of all the switching FETs are pulled pulled up to 12V GND: ground connection SCL/TX: I2C clock line  SDA/RX:  I2C data line  SWD_CLK:  line for triggering smart sensors to make measurements RESET_B:  line for resetting the smart sensor board SWD_IO: select line for the smart sensor Theory of operation: Three shunts and current sense amplifiers are used to measure current in three ranges. One shunt/sense amp pair has a 0.002 Ω shunt integrated into the IC package (U1, INA250). The other two sense amps (U2 and U3, INA212) require an external shunt.  FETs Q1, Q2,  and Q3 are used to switch the two lower range shunt/sense amp pairs in and out of circuit. In normal run operation (highest current range), Q1 (FDMC012N03, with Rds(on) under 1.5m Ω ) is turned on, which shorts leaves only U1 in circuit. FETs Q4, Q5 and Q6 translate the voltages to 3.3V so that GPIO on U4 (MCU KL05Z) can control them.  Rail voltage measurement is facilitated via resistors R3, R4, and R12 and Q7. Not all of these are populated in every assembly option. For measuring rail voltages 0-3.3V, R12 is populated. To measure 0-6.6V, R3, R4,and Q7 are populated. When turned on Q7 enables the voltage divider. All of the assembly option population info can be found in the schematic (attached). Regulator U5 (AP2210N) provides the 3.3V supply for all of the components on the board. This 1% tolerance regulator is used to provide a good reference for the ADC in U4.  Microcontroller U4 detects the assembly population option of the board via resistors R9, R10, and R11 so that the same application code can be used across all variations of the sensor boards. GPIO control the FETs and four ADC channels are used to measure the sense amplifier outputs and the rail voltage. Having a microcontroller on the sensor board allows the user to do extra credit things like count coulombs as well as allowing all similarly instrumented rails to measure at the same time via trigger line SWD_CLK. Data communication can be via I2C or UART, since these two pins can do both.  But if multiple sensor boards are to be used with an aggregator, communication needs to be over I2C. Application Code: The latest application code for the KL05Z on the smart sensor resides here: https://os.mbed.com/users/r14793/code/30847-SMRTSNSR-KL05Z/. The latest binary is attached below. In order to re-flash a smart sensor, the modification detailed in the aggregator page needs to be made. Once the modification is completed, leave the aggregator unpowered while pluging the SWD debugger into J5 and the smart sensor to be programmed into JP15. Very old UART-based application code for the KL05Z, built in the on-line MBED compiler (note that it requires the modified mbed library for internal oscillator). This code was used while testing the first smart sensor prototypes. It has since been abandoned. It's published here in the event that a user wants to use a single sensor plugged into JP15 with UART breakout connector J6. /****************************************************************************** * * MIT License (https://spdx.org/licenses/MIT.html) * Copyright 2017-2018 NXP * * MBED code for KL05Z-based "smart" current sensor board, basic testing * of functions via UART (connected via FRDM board and OpenSDA USB virtual * COM port). * * Eventual goal is to have each smart sensor communicate over I2C to an * aggregator board (FRDM board with a custom shield), allowing 1-10 power * supply rails to be instrumented. Extra credit effort is to support * sensors and aggregator with sigrok... * * Because there is no crystal on the board, need to edit source mbed-dev library * to use internal oscillator with pound-define: * change to "#define CLOCK_SETUP 0" in file: * mbed-dev/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/system_MKL05Z4.c * ******************************************************************************/ #include "mbed.h" // These will be GPIO for programming I2C address... // not yet implemented, using as test pins... DigitalOut addr0 ( PTA3 ) ; DigitalOut addr1 ( PTA4 ) ; DigitalOut addr2 ( PTA5 ) ; DigitalOut addr3 ( PTA6 ) ; // configure pins for measurements... // analog inputs from sense amps and rail voltage divider... AnalogIn HIGH_ADC ( PTB10 ) ; AnalogIn VRAIL_ADC ( PTB11 ) ; AnalogIn LOW1_ADC ( PTA9 ) ; AnalogIn LOW2_ADC ( PTA8 ) ; // outputs which control switching FETs... DigitalOut VRAIL_MEAS ( PTA7 ) ; // turns on Q7, connecting voltage divider DigitalOut LOW_ENABLE ( PTB0 ) ; // turns on Q4, turning off Q1, enabling low measurement DigitalOut LOW1 ( PTB2 ) ; // turns on Q5, turning off Q2, disconnecting shunt R1 DigitalOut LOW2 ( PTB1 ) ; // turns on Q6, turning off Q3, disconnecting shunt R2 // input used for triggering measurement... // will eventually need to be set up as an interrupt so it minimizes delay before measurement InterruptIn trigger ( PTA0 ) ; // use as a trigger to make measurement... // PTB3/4 can be used as UART or I2C... // For easier development with one smart sensor, we are using UART here... Serial uart ( PTB3 , PTB4 ) ; // tx, rx long int count = 0 ; int n = 25 ; // global number of averages for each measurement int i , temp ; bool repeat = true ; // flag indicating whether measurements should repeat or not const float vref = 3.3 ; // set vref for use in calculations... float delay = 0.25 ; // default delay between measurement bool gui = false ; // flag for controlling human vs machine readable output bool statistics = false ; // flag for outputting min and max along with average (GUI mode only) void enableHighRange ( ) { LOW_ENABLE = 0 ; // short both low current shunts, close Q1 wait_us ( 5 ) ; // delay for FET to settle... (make before break) LOW1 = 0 ; LOW2 = 0 ; // connect both shunts to make lower series resistance VRAIL_MEAS = 0 ; // disconnect rail voltage divider wait_us ( 250 ) ; // wait for B2902A settling... } void enableLow1Range ( ) { LOW1 = 0 ; LOW2 = 1 ; // disconnect LOW2 shunt so LOW1 can measure wait_us ( 5 ) ; // delay for FET to settle... (make before break) LOW_ENABLE = 1 ; // unshort low current shunts, open Q1 VRAIL_MEAS = 0 ; // disconnect rail voltage divider wait_us ( 250 ) ; // wait for B2902A settling... } void enableLow2Range ( ) { LOW1 = 1 ; LOW2 = 0 ; // disconnect LOW1 shunt so LOW2 can measure wait_us ( 5 ) ; // delay for FET to settle... (make before break) LOW_ENABLE = 1 ; // unshort low current shunts, open Q1 VRAIL_MEAS = 0 ; // disconnect rail voltage divider wait_us ( 500 ) ; // wait for B2902A settling... } void enableRailV ( ) { VRAIL_MEAS = 1 ; // turn on Q7, to enable R3-R4 voltage divider wait_us ( 125 ) ; // wait for divider to settle... // Compensation cap can be used to make // voltage at ADC a "square wave" but it is // rail voltage and FET dependent. Cap will // need tuning if this wait time is to be // removed/reduced. // // So, as it turns out, this settling time and // compensation capacitance are voltage dependent // because of the depletion region changes in the // FET. Reminiscent of grad school and DLTS. // Gotta love device physics... } void disableRailV ( ) { VRAIL_MEAS = 0 ; // turn off Q7, disabling R3-R4 voltage divider } // this function measures current, autoranging as necessary // to get the best measurement... void measureAuto ( ) { Timer t ; float itemp ; float tempI = 0 ; float imin = 1.0 ; // used to keep track of the minimum... float imax = 0 ; // used to keep track of the maximum... t . start ( ) ; // use timer to see how long things take... enableHighRange ( ) ; // this should already be the case, but do it anyway... for ( i = 0 ; i < n ; i ++ ) { itemp = HIGH_ADC ; // read HIGH range sense amp output if ( statistics && itemp > imax ) imax = itemp ; // update max if necessary if ( statistics && itemp < imin ) imin = itemp ; // update min if necessary tempI + = itemp ; // add current sample to running sum } tempI = tempI / n * vref / 0.8 ; // compute average we just took... if ( gui ) uart . printf ( "=> %5.3f " , tempI ) ; if ( statistics && gui ) uart . printf ( "[%5.3f/%5.3f] " , imin * vref / 0.8 , imax * vref / 0.8 ) ; // if current is below this threshold, use LOW1 to measure... if ( tempI < 0.060 ) { if ( ! gui ) uart . printf ( "... too Low: %f A, switching to low1 ==>\r\n" , tempI ) ; tempI = 0 ; enableLow1Range ( ) ; // change FETs to enable LOW1 measurement... imin = 1.0 ; imax = 0 ; for ( i = 0 ; i < n ; i ++ ) { itemp = LOW1_ADC ; // read LOW1 sense amp output if ( statistics && itemp > imax ) imax = itemp ; // update max if necessary if ( statistics && itemp < imin ) imin = itemp ; // update min if necessary tempI + = itemp ; // add current sample to running sum } tempI = tempI / n * vref / 0.05 / 1000 ; // compute average we just took... if ( gui ) uart . printf ( "%6.4f " , tempI ) ; if ( statistics && gui ) uart . printf ( "[%6.4f/%6.4f] " , imin * vref / 0.05 / 1000 , imax * vref / 0.05 / 1000 ) ; // if current is below this threshold, use LOW2 to measure... if ( tempI < 0.0009 ) { if ( ! gui ) uart . printf ( "... too Low: %f A, switching to low2 ==>\r\n" , tempI ) ; tempI = 0 ; enableLow2Range ( ) ; // change FETs to enable LOW1 measurement... imin = 1.0 ; imax = 0 ; for ( i = 0 ; i < n ; i ++ ) { itemp = LOW2_ADC ; // read LOW2 sense amp output if ( statistics && itemp > imax ) imax = itemp ; // update max if necessary if ( statistics && itemp < imin ) imin = itemp ; // update min if necessary tempI + = itemp ; // add current sample to running sum } tempI = tempI / n * vref / 2 / 1000 ; // compute average we just took... if ( gui ) uart . printf ( "%8.6f " , tempI ) ; if ( statistics && gui ) uart . printf ( "[%8.6f/%8.6f] " , imin * vref / 2 / 1000 , imax * vref / 2 / 1000 ) ; } } t . stop ( ) ; // stop the timer to see how long it took do do this... enableHighRange ( ) ; if ( ! gui ) uart . printf ( "\r\nCurrent = %f A Current Measure Time = %f sec\r\n" , tempI , t . read ( ) ) ; } // the autoranging should really be done with functions that return values, as should the // functions below... This would make for shorter and more elegant code, but the author // is a bit of a pasta programmer... void measureHigh ( ) { float highI = 0 ; enableHighRange ( ) ; for ( i = 0 ; i < n ; i ++ ) { highI + = HIGH_ADC ; } highI = highI / n ; uart . printf ( "HIghI = %f A\r\n" , vref * highI / 0.8 ) ; } void measureLow1 ( ) { float low1I = 0 ; enableLow1Range ( ) ; for ( i = 0 ; i < n ; i ++ ) { low1I + = LOW1_ADC ; } enableHighRange ( ) ; low1I = low1I / n ; uart . printf ( "low1I = %f A\r\n" , vref * low1I / 0.05 / 1000 ) ; } void measureLow2 ( ) { float low2I = 0 ; enableLow2Range ( ) ; for ( i = 0 ; i < n ; i ++ ) { low2I + = LOW2_ADC ; } enableHighRange ( ) ; low2I = low2I / n ; uart . printf ( "low2I = %f A\r\n" , vref * low2I / 2 / 1000 ) ; } // measure the rail voltage, default being with // a divide by 2 resistor divider // It has to be switched out when not in use or it will // add to the measured current, at least in the low ranges... void measureRailV ( ) { float railv = 0 ; float mult = vref * 2 ; // since divide by 2, we can measure up to 6.6V... float vmin = 5 ; float vmax = 0 ; float vtemp ; enableRailV ( ) ; // switch FETs so divider is connected... for ( i = 0 ; i < n ; i ++ ) { vtemp = VRAIL_ADC ; // read voltage at divider output... if ( statistics && vtemp > vmax ) vmax = vtemp ; // update max if necessary if ( statistics && vtemp < vmin ) vmin = vtemp ; // update min if necessary railv + = vtemp ; // add current sample to running sum } disableRailV ( ) ; // now disconnect the voltage divider railv = railv / n ; // compute average (note this is in normalized ADC [0..1]) // Convert to voltage by multiplying by "mult" if ( ! gui ) uart . printf ( "RailV = %5.3f V " , mult * railv ) ; if ( gui ) uart . printf ( "%5.3f " , mult * railv ) ; if ( statistics && gui ) uart . printf ( "[%5.3f/%5.3f] " , mult * vmin , mult * vmax ) ; uart . printf ( "\r\n" ) ; } // not sure how useful this function is... void measureAll ( ) { measureHigh ( ) ; measureLow1 ( ) ; measureLow2 ( ) ; measureRailV ( ) ; } // test function to see if trigger pin is being hit... // intended for use later to do timed triggering of measurements... void triggerIn ( ) { uart . printf ( "You're triggering me! \r\n" ) ; measureAll ( ) ; } // main... int main ( ) { // set up basic conditions... Timer m ; uart . baud ( 115200 ) ; enableHighRange ( ) ; // default state - only HIGH sense amp in circuit, no divider // signal that we're alive... uart . printf ( "Hello World!\r\n" ) ; // configure the trigger interrupt... trigger . rise ( & triggerIn ) ; while ( true ) { count ++ ; wait ( delay ) ; if ( repeat ) { // if repeat flag is set, keep making measurements... m . reset ( ) ; // reset and start timer... m . start ( ) ; measureAuto ( ) ; // measuring current using auto-ranging... measureRailV ( ) ; // measure rail voltage... m . stop ( ) ; // stop the timer. if ( ! gui ) uart . printf ( " Total Measure Time = %f sec" , m . read ( ) ) ; if ( ! gui ) uart . printf ( "\r\n\r\n" ) ; } // see if there are any characters in the receive buffer... // this is how we change things on the fly... // Commands (single keystroke... it's easier) // t = one shot automeasure // v = measure volt // h = one shot high measure // k = one shot LOW1 measure // l = one shot LOW2 measure (letter l) // r = toggle repeat // R = turn off repeat // + = faster repeat rate // - = slower repeat rate // = = set repeat rate to 0.25 sec // g = use human readable text output // G = use compressed text format for GUI // s = turn statistics output off // S = turn statistics output on (only in GUI mode) // n = decrease number of averages for each measurement // N = increase number of averages for each measurement // // these were for testing FET switching... // 1 = LOW_ENABLE = 0 (the number 1) // 2 = LOW1 = 0 // 3 = LOW2 = 0 // 4 = VRAIL_MEAS = 0 // ! = LOW_ENABLE = 1 // @ = LOW1 = 1 // # = LOW2 = 1 // $ = VRAIL_MEAS = 1 if ( uart . readable ( ) ) { temp = uart . getc ( ) ; if ( temp == ( int ) 't' ) { if ( ! gui ) uart . printf ( "Keyboard trigger: " ) ; measureAuto ( ) ; measureRailV ( ) ; //measureAll(); } if ( temp == ( int ) 'v' ) { uart . printf ( "Keyboard trigger: " ) ; measureRailV ( ) ; } if ( temp == ( int ) 'h' ) { uart . printf ( "Keyboard trigger: " ) ; measureHigh ( ) ; } if ( temp == ( int ) 'k' ) { uart . printf ( "Keyboard trigger: " ) ; measureLow1 ( ) ; } if ( temp == ( int ) 'l' ) { uart . printf ( "Keyboard trigger: " ) ; measureLow2 ( ) ; } if ( temp == ( int ) '1' ) { LOW_ENABLE = 0 ; uart . printf ( "Keyboard trigger: LowEnable = %d\r\n" , 0 ) ; } if ( temp == ( int ) '2' ) { LOW1 = 0 ; uart . printf ( "Keyboard trigger: LOW1 = %d\r\n" , 0 ) ; } if ( temp == ( int ) '3' ) { LOW2 = 0 ; uart . printf ( "Keyboard trigger: LOW2 = %d\r\n" , 0 ) ; } if ( temp == ( int ) '4' ) { VRAIL_MEAS = 0 ; uart . printf ( "Keyboard trigger: VRAILMEAS = %d\r\n" , 0 ) ; } if ( temp == ( int ) '!' ) { LOW_ENABLE = 1 ; uart . printf ( "Keyboard trigger: LowEnable = %d\r\n" , 1 ) ; } if ( temp == ( int ) '@' ) { LOW1 = 1 ; uart . printf ( "Keyboard trigger: LOW1 = %d\r\n" , 1 ) ; } if ( temp == ( int ) '#' ) { LOW2 = 1 ; uart . printf ( "Keyboard trigger: LOW2 = %d\r\n" , 1 ) ; } if ( temp == ( int ) '$' ) { VRAIL_MEAS = 1 ; uart . printf ( "Keyboard trigger: VRAILMEAS = %d\r\n" , 1 ) ; } if ( temp == ( int ) 'r' ) { repeat = ! repeat ; uart . printf ( "Keyboard trigger: repeat toggle: %s \r\n" , repeat ? "true" : "false" ) ; } if ( temp == ( int ) 'R' ) repeat = false ; if ( temp == ( int ) '+' ) { delay - = 0.05 ; if ( delay < 0.05 ) delay = 0.05 ; } if ( temp == ( int ) '-' ) { delay + = 0.05 ; if ( delay > 1 ) delay = 1 ; } if ( temp == ( int ) '=' ) delay = 0.25 ; if ( temp == ( int ) 'g' ) gui = false ; if ( temp == ( int ) 'G' ) gui = true ; if ( temp == ( int ) 's' ) statistics = false ; if ( temp == ( int ) 'S' ) statistics = true ; if ( temp == ( int ) 'n' ) { n - = 25 ; if ( n < 25 ) n = 25 ; } if ( temp == ( int ) 'N' ) { n + = 25 ; if ( n > 1000 ) n = 1000 ; } if ( temp == ( int ) 'N' || temp == ( int ) 'n' ) uart . printf ( "/r/n/r/n Averages = %d \r\n\r\b" , n ) ; } } } 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‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍
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NXP i.MX 8 series of application processors support running ArmV8a 64-bit and ArmV7a 32-bit user space programs.  A Hello World program that prints the size of a long int is cross-compiled as 32-bit and as 64-bit from an Ubuntu host and then each is copied to MCIMX8MQ-EVK and run. Resources: Ubuntu 18.04 LTS Host i.MX 8M Evaluation Kit|NXP  MCIMX8MQ-EVK Linux Binary Demo Files - i.MX 8MQuad EVK L4.9.88_2.0.0_GA release Source Code: Create a file with contents below using your favorite editor, example name hello-sizeInt.c. #include <stdio.h> int main ( int argc , char * * argv ) { printf ( "Hello World, size of long int: %zd\n" , sizeof ( long int ) ) ; return 0 ; } ‍‍‍‍‍‍‍ Ubuntu host packages: $ sudo apt - get install - y gcc - arm - linux - gnueabihf $ sudo apt - get install - y gcc - aarch64 - linux - gnu‍‍ ‍ ‍ Line 1 installs the ArmV7a cross-compile tools: arm-linux-gnueabihf-gcc is used to cross compile on Ubuntu host Line 2 install the ArmV8a cross-compile tools: aarch64-linux-gnu-gcc is used to cross compile on Ubuntu host Create Linux User Space Applications Build each application and use the static option to gcc to include run time libraries. Build ArmV7a 32-bit application: $ arm - linux - gnueabihf - gcc - static hello - sizeInt . c - o hello - armv7a‍ - static ‍ ‍ Build ArmV8a 64-bit application: $ aarch64 - linux - gnu - gcc - static   hello - sizeInt . c - o hello - armv8a‍ - static ‍ ‍ Copy Hello applications from Ubuntu host and run on MCIMX8MQ-EVK Using a SDCARD written with images from L4.9.88_2.0.0 Linux release (see resources for image link), power on EVK with Ethernet connected to network and Serial Console port which was connected to a windows 10 PC. Launched a terminal client (TeraTerm) to access console port. Login credentials: root and no password needed. Since Ethernet was connected a DHCP IP address was acquired, 192.168.1.241 on the EVK.  On the Ubuntu host, secure copy the hello applications to EVK: $ scp hello - armv7a - static root@ 192.168 . 1.241 : ~ / hello - armv7a - static                           100 %   389KB   4 . 0MB / s   00 : 00     $ scp hello - armv8a - static root@ 192.168 . 1.241 : ~ / hello - armv8a - static                           100 %   605KB   4 . 7MB / s   00 : 00 ‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ Run: root @imx8mqevk : ~ # ./hello-armv8a-static Hello World , sizeof long int : 8 root @imx8mqevk : ~ # ./hello-armv7a-static Hello World , sizeof long int : 4 ‍‍‍‍ ‍ ‍ ‍ ‍
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Environment:   VMware player 15 + ubuntu 18.04 LTS Reference document: i.MX_Yocto_Project_User's_Guide.pdf 1. Software packages for the compilation # sudo apt-get install flex bison gperf build-essential zlib1g-dev # sudo apt-get install lib32ncurses5-dev x11proto-core-dev # sudo apt-get install libx11-dev lib32z1-dev libgl1-mesa-dev # sudo apt-get install tofrodos python-markdown libxml2-utils xsltproc # sudo apt-get install uuid-dev:i386 liblzo2-dev:i386 gcc-multilib g++-multilib # sudo apt-get install subversion openssh-server openssh-client uuid uuid-dev zlib1g-dev # sudo apt-get install liblz-dev lzop liblzo2-2 liblzo2-dev git-core curl # sudo apt-get install python3 python3-pip python3-pexpect python3-git python3-jinja2 pylint3 # sudo apt-get install u-boot-tools mtd-utils android-tools-fsutils # sudo apt-get install openjdk-8-jdk device-tree-compiler aptitude # sudo apt-get install libcurl4-openssl-dev nss-updatedb # sudo apt-get install chrpath texinfo gawk cpio diffstat # sudo apt-get install libncursesw5-dev libssl-dev libegl1-mesa # sudo apt-get install net-tools python libsdl1.2-dev xterm socat # sudo apt-get install icedtea-netx-common icedtea-netx 2. downloading yocto bsp (L5.4.24_2.1.0) # rm -rf ~/bin # mkdir ~/bin # curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo # chmod a+x ~/bin/repo # export PATH=~/bin:$PATH   # mkdir imx-yocto-bsp-5.4.24-2.1.0 # cd imx-yocto-bsp-5.4.24-2.1.0 # repo init -u https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-zeus -m imx-5.4.24-2.1.0.xml # cd .repo/manifests # gedit imx-5.4.24-2.1.0.xml          Modify git to https like below:   <remote fetch="https://git.yoctoproject.org/git" name="yocto"/>   <remote fetch="https://github.com/Freescale" name="community"/>   <remote fetch="https://github.com/openembedded" name="oe"/>   <remote fetch="https://github.com/OSSystems" name="OSSystems"/>   <remote fetch="https://github.com/meta-qt5"  name="QT5"/>   <remote fetch="https://github.com/TimesysGit"  name="Timesys"/>   <remote fetch="https://github.com/meta-rust"  name="rust"/>   <remote fetch="https://git.openembedded.org"  name="python2"/>   <remote fetch="https://source.codeaurora.org/external/imx" name="CAF"/> Save it and exit. # cd ~/ imx-yocto-bsp-5.4.24-2.1.0 # repo sync          Begin to compile i.MX8MQ BSP: # DISTRO=fsl-imx-wayland MACHINE=imx8mqevk source imx-setup-release.sh -b build-wayland          If users want to use chromium, do it like below, otherwise omit the step.        Add CORE_IMAGE_EXTRA_INSTALL += "chromium-ozone-wayland" to local.conf        And use 8 thread to compile BSP # gedit ./conf/local.conf …… BB_NUMBER_THREADS =”4” PARALLEL_MAKE =”-j 4” CORE_IMAGE_EXTRA_INSTALL += "chromium-ozone-wayland" ……          Save it and exit. [comment]          If your ubuntu has 8GB DDR, BB_NUMBER_THREADS can be set to “2”, PARALLEL_MAKE can be set to “-j 2”. # bitbake chromium-ozone-wayland -c fetch # bitbake imx-image-full Use ulimit -n 4096 to solve the issue. Then continue. # bitbake imx-image-full chromium compilation error:          Compile chromium-ozone-wayland separately. # bitbake chromium-ozone-wayland -c cleansstate # bitbake chromium-ozone-wayland -c compile          Use the command to solve the problem. # gedit ../sources/meta-imx/meta-sdk/dynamic-layers/browser-layer/recipes-browser/chromium/chromium-ozone-wayland_%.bbappend DEPENDS += "\         libxkbcommon \         virtual/egl \         wayland \         wayland-native \          mesa         \ "          Add mesa to DEPENDS          Save and exit.          Continue to compile it. # bitbake chromium-ozone-wayland -c compile          done, continue to compile full image   # bitbake imx-image-full Attachment is document in pdf format, which should be clear. NXP TIC team Weidong Sun 08/21/2020
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UUU is an evolution of MFGTools. The introduction of UUU detail you can see the uuu.pdf file.. Please download uuu.exe and follow the UUU introduction. Here are some running examples. If you are not familiar with uuu, you can refer to them firstly. Under Windows (should be as admin): • For SD card: o Linux: .\uuu -b sd_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard • For EMMC: o Linux: .\uuu -b emmc_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard or .\uuu.exe uuu.auto o Android: .\uuu_imx_android_flash.bat -f imx8mm -u trusty Under Linux: • For EMMC o Linux: sudo .\uuu uuu.auto If you download BSP release from nxp.com, you could find a file uuu.auto in the package. This is a preset script that can be executed directly (default for EMMC). You could change the script based on your requirement. Copy the uuu.exe under the release package, then execute the instructions. For UUU tool the prebuilt image and document are here: • https://github.com/NXPmicro/mfgtools/releases • UUU.pdf is snapshot of wiki Environment PC: Window 10 64bit Board: i.MX8MMLPDDR4 EVK BSP: Q10.0.0_2.0.0 Demo images Screen: MX8-DSI-OLED1 Downloading android images to i.MX 8M Mini EVK LPDDR4 via UUU Tool 1\Hardware Preparations (1) Make the board enter serial download mode. For Rev. B boards, change the first two bits of board's sw1101 to 10 (from 1-2 bit) to enter serial download mode. For Rev. C boards, change the first four bits of board's sw1101 to 1010 (from 1-4 bit) to enter serial download mode. (2) Connecting J901to PC USB by a USB OTG cable. (3) Connecting J301(usb type c) to PC USB. (4) Plugging adapter into Power Jack (J302) (5) Power on i.MX 8M Mini EVK LPDDR4 board via SW101 Switch When first connect the board to PC, windows 10 64bit can’t automatically install FT2232D  driver from official website of manufacture, you need to Install the usb to uart driver manually: https://www.ftdichip.com/Drivers/D2XX.htm Download the setup executable and then install it. When installed success you can see the usb serial port can be used. 2\Downloading UUU Tool For the UUU binary file, download it from github: uuu release page on github . For the Q10.0.0_2.0.0 version use the UUU 1.3.124 version. For Linux OS, download the file named "uuu". For Windows OS, download the file named "uuu.exe". Here I use win10 system, so I download the uuu.exe file. 3\Download the Q10.0.0_2.0.0 Demo images for i.MX8MM   Now all the android os for i.MX products are here: Android OS for i.MX Applications Processors . Decompress release_package/android-10.0.0_2.0.0_image_8mmevk.tar.gz for LPDDR4 board. The package contains the image files and uuu_imx_android_flash tool. Copy uuu.exe to the directory of Q10.0.0_2.0.0 Demo images. 4\ Execute the uuu_imx_android_flash to flash image Power on the board. Open the serial port terminal and setting as following: Open a command line window. For the use and the Options for uuu_imx_android_flash tool details can see the Table 2 in the Android_Quick_Start_Guide. Here I use the OLED screen, to test MIPI panel output, need execute the tool with "-d mipi-panel". So here I use the .\uuu_imx_android_flash.bat -f imx8mm -e -d mipi-panel . When I use the download I meet the follow question: C:\Work\Products\Android BSP\New folder\Q10.0.0_2.0.0 Demo images\android-10.0.0_2.0.0_image_8mmevk>.\uuu_imx_android_flash.bat -f imx8mm -e -d mipi-panel This script is validated with uuu 1.3.124 version, it is recommended to align with this version. dtbo is supported dual slot is supported dynamic partition is supported You do not have sufficient privilege to perform this operation. So here can change to use the Windows PowerShell, it works well and finished download. Power off the board. 5\Boot up the board from emmc Set boot mode For Rev. C boards: Change sw1101 to 0110110010 and change sw1102 to 0001101000 if you want to boot from SD card. Change sw1101 to 0110110001 and change sw1102 to 0001010100 if you want to boot from eMMC. Set the U-Boot environment variables for t he MIPI panel display U-Boot > setenv bootargs console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 init=/init androidboot.console=ttymxc1 androidboot.hardware=freescale cma=800M@0x400M-0xb80M androidboot.primary_display=imx-drm firmware_class.path=/vendor/firmware transparent_hugepage=never androidboot.wificountrycode=CN androidboot.lcd_density=240 U-Boot > saveenv Then use the boot to boot up and then display on OLED screen. Hope this can do help for some users. Best Regards Rita
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345644 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344336 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345680 
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All below changes are done based on imx_android-10.0_5.4.y. mek_8qm enable uSD 8987 wifi            1. hardware rework                no hardware rework required            2. patches The patch is attached as 0001-8qm-usd-8987-wifi.patch mek_8qm enable M.2 8987 wifi            1. hardware rework                no hardware rework required            2. patches The patch is attached as  0001-8qm-m2-8987-wifi.patch evk_8mq enable uSD 8987 wifi            1. hardware rework                no hardware rework required            2. patches diff --git a/imx8m/evk_8mq/BoardConfig.mk b/imx8m/evk_8mq/BoardConfig.mk index db7c4991..4d130cc0 100644 --- a/imx8m/evk_8mq/BoardConfig.mk +++ b/imx8m/evk_8mq/BoardConfig.mk @@ -136,7 +136,8 @@ ifeq ($(TARGET_USE_DYNAMIC_PARTITIONS),true) TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-no-product.dtb else # imx8mq with HDMI display - TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-pcie1-m2.dtb + TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-usd-wifi.dtb + # imx8mq with MIPI-HDMI display TARGET_BOARD_DTS_CONFIG += imx8mq-mipi:imx8mq-evk-lcdif-adv7535.dtb # imx8mq with HDMI and MIPI-HDMI display diff --git a/imx8m/evk_8mq/SharedBoardConfig.mk b/imx8m/evk_8mq/SharedBoardConfig.mk index 330ab1c5..a6654bad 100644 --- a/imx8m/evk_8mq/SharedBoardConfig.mk +++ b/imx8m/evk_8mq/SharedBoardConfig.mk @@ -7,10 +7,10 @@ PRODUCT_IMX_TRUSTY := true #Enable this to disable product partition build. #IMX_NO_PRODUCT_PARTITION := true -#NXP 8997 wifi driver module +# NXP 8987 wifi driver module BOARD_VENDOR_KERNEL_MODULES += \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/mlan.ko \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/pcie8xxx.ko + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/mlan.ko \ + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/moal.ko # mipi-panel touch driver module BOARD_VENDOR_KERNEL_MODULES += \ diff --git a/imx8m/evk_8mq/UbootKernelBoardConfig.mk b/imx8m/evk_8mq/UbootKernelBoardConfig.mk index 5aa1ce35..4c3378f0 100644 --- a/imx8m/evk_8mq/UbootKernelBoardConfig.mk +++ b/imx8m/evk_8mq/UbootKernelBoardConfig.mk @@ -14,7 +14,7 @@ endif TARGET_BOOTLOADER_CONFIG += imx8mq-evk-uuu:imx8mq_evk_android_uuu_defconfig TARGET_KERNEL_DEFCONFIG := imx_v8_android_defconfig -# TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig +TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig diff --git a/imx8m/evk_8mq/android_addition_defconfig b/imx8m/evk_8mq/android_addition_defconfig new file mode 100644 index 00000000..f51bd5ff --- /dev/null +++ b/imx8m/evk_8mq/android_addition_defconfig @@ -0,0 +1,2 @@ +CONFIG_WLAN_VENDOR_NXP=y +CONFIG_MXMWIFIEX=m diff --git a/imx8m/evk_8mq/early.init.cfg b/imx8m/evk_8mq/early.init.cfg index 9262d953..70097a1c 100644 --- a/imx8m/evk_8mq/early.init.cfg +++ b/imx8m/evk_8mq/early.init.cfg @@ -1,3 +1,3 @@ insmod vendor/lib/modules/mlan.ko -insmod vendor/lib/modules/pcie8xxx.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none p2p_enh=1 fw_name=pcieuart8997_combo_v4.bin +insmod vendor/lib/modules/moal.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none fw_name=sdiouart8987_combo_v0.bin insmod vendor/lib/modules/synaptics_dsx_i2c.ko diff --git a/imx8m/evk_8mq/evk_8mq.mk b/imx8m/evk_8mq/evk_8mq.mk index 7db1b212..210f8971 100644 --- a/imx8m/evk_8mq/evk_8mq.mk +++ b/imx8m/evk_8mq/evk_8mq.mk @@ -250,9 +250,9 @@ PRODUCT_PACKAGES += \ PRODUCT_PACKAGES += \ bt_vendor.conf -# NXP 8997 Wifi and Bluetooth Combo Firmware +# NXP 8987 Wifi and Bluetooth Combo Firmware PRODUCT_COPY_FILES += \ - vendor/nxp/imx-firmware/nxp/FwImage_8997/pcieuart8997_combo_v4.bin:vendor/firmware/pcieuart8997_combo_v4.bin + vendor/nxp/imx-firmware/nxp/FwImage_8987/sdiouart8987_combo_v0.bin:vendor/firmware/sdiouart8987_combo_v0.bin # Wifi regulatory PRODUCT_COPY_FILES += \ The patch is attached as 0001-8mq-usd-8987-wifi.patch evk_8mq enable M.2 8987 wifi            1. hardware rework                hardware rework required ( Be aware: after this rework, uSD is not working!)            2. patches diff --git a/imx8m/evk_8mq/BoardConfig.mk b/imx8m/evk_8mq/BoardConfig.mk index db7c4991..0cca9b8e 100644 --- a/imx8m/evk_8mq/BoardConfig.mk +++ b/imx8m/evk_8mq/BoardConfig.mk @@ -136,7 +136,8 @@ ifeq ($(TARGET_USE_DYNAMIC_PARTITIONS),true) TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-no-product.dtb else # imx8mq with HDMI display - TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-pcie1-m2.dtb + TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-usdhc2-m2.dtb + # imx8mq with MIPI-HDMI display TARGET_BOARD_DTS_CONFIG += imx8mq-mipi:imx8mq-evk-lcdif-adv7535.dtb # imx8mq with HDMI and MIPI-HDMI display diff --git a/imx8m/evk_8mq/SharedBoardConfig.mk b/imx8m/evk_8mq/SharedBoardConfig.mk index 330ab1c5..a6654bad 100644 --- a/imx8m/evk_8mq/SharedBoardConfig.mk +++ b/imx8m/evk_8mq/SharedBoardConfig.mk @@ -7,10 +7,10 @@ PRODUCT_IMX_TRUSTY := true #Enable this to disable product partition build. #IMX_NO_PRODUCT_PARTITION := true -#NXP 8997 wifi driver module +# NXP 8987 wifi driver module BOARD_VENDOR_KERNEL_MODULES += \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/mlan.ko \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/pcie8xxx.ko + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/mlan.ko \ + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/moal.ko # mipi-panel touch driver module BOARD_VENDOR_KERNEL_MODULES += \ diff --git a/imx8m/evk_8mq/UbootKernelBoardConfig.mk b/imx8m/evk_8mq/UbootKernelBoardConfig.mk index 5aa1ce35..4c3378f0 100644 --- a/imx8m/evk_8mq/UbootKernelBoardConfig.mk +++ b/imx8m/evk_8mq/UbootKernelBoardConfig.mk @@ -14,7 +14,7 @@ endif TARGET_BOOTLOADER_CONFIG += imx8mq-evk-uuu:imx8mq_evk_android_uuu_defconfig TARGET_KERNEL_DEFCONFIG := imx_v8_android_defconfig -# TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig +TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig # absolute path is used, not the same as relative path used in AOSP make diff --git a/imx8m/evk_8mq/android_addition_defconfig b/imx8m/evk_8mq/android_addition_defconfig new file mode 100644 index 00000000..f51bd5ff --- /dev/null +++ b/imx8m/evk_8mq/android_addition_defconfig @@ -0,0 +1,2 @@ +CONFIG_WLAN_VENDOR_NXP=y +CONFIG_MXMWIFIEX=m diff --git a/imx8m/evk_8mq/early.init.cfg b/imx8m/evk_8mq/early.init.cfg index 9262d953..70097a1c 100644 --- a/imx8m/evk_8mq/early.init.cfg +++ b/imx8m/evk_8mq/early.init.cfg @@ -1,3 +1,3 @@ insmod vendor/lib/modules/mlan.ko -insmod vendor/lib/modules/pcie8xxx.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none p2p_enh=1 fw_name=pcieuart8997_combo_v4.bin +insmod vendor/lib/modules/moal.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none fw_name=sdiouart8987_combo_v0.bin insmod vendor/lib/modules/synaptics_dsx_i2c.ko diff --git a/imx8m/evk_8mq/evk_8mq.mk b/imx8m/evk_8mq/evk_8mq.mk index 7db1b212..210f8971 100644 --- a/imx8m/evk_8mq/evk_8mq.mk +++ b/imx8m/evk_8mq/evk_8mq.mk @@ -250,9 +250,9 @@ PRODUCT_PACKAGES += \ PRODUCT_PACKAGES += \ bt_vendor.conf -# NXP 8997 Wifi and Bluetooth Combo Firmware +# NXP 8987 Wifi and Bluetooth Combo Firmware PRODUCT_COPY_FILES += \ - vendor/nxp/imx-firmware/nxp/FwImage_8997/pcieuart8997_combo_v4.bin:vendor/firmware/pcieuart8997_combo_v4.bin + vendor/nxp/imx-firmware/nxp/FwImage_8987/sdiouart8987_combo_v0.bin:vendor/firmware/sdiouart8987_combo_v0.bin The patch is attached as 0001-8mq-m2-8987-wifi.patch
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This document describes the i.MX 8MM EVK mini-SAS connectors features on Linux and Android use cases, covering the supported daughter cards, the process to change Device Tree (DTS) files or Boot images, and enable these different display options on the board.
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