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In some early LPC products, such as LPC11xx, LPC17xx, LPC18xx, LPC40xx, LPC43xx, LPC8xx, etc, CRP is used to utilize code protection. CRP has three different security levels: Figure 1 shows the security levels of CRP1, CRP2, and CRP3. Figure 1 The LPC55 series (LPC55(S)0x, 1x,2x, and 6x) uses Secure boot and Protected Flash Region (PFR) configuration instead of CRP for security protection. The part number with S (eg. LPC55S) supports Secure boot, for instance, LPC55S28 and LPC55S06. However, non-S series products, such as LPC5506, LPC5528,  can only utilize code protection by configuring FPR related fields. CRP2 is the most commonly used protection level. With CRP2, SWD access is blocked, so users can not read, write, or erase Flash via SWD or ISP. In addition, users cannot erase part of Flash to modify existing code. Once in CRP2 mode, Flash can only be recovered by Mass Erase Flash, which effectively prevents attacker from reading and modifying the Flash code. Unfortunately, the LPC5500 device such as LPC55(S)0x, 1x,2x,6x doesn't have exactly the same functional mechanism as the CRP2, which is questioned by many users. However, if we need to achieve the same functionality as CRP2, we can configure CMPA to disable ISP and SWD debugging port. 1.   Disable ISP Customer Manufacturing/Factory Configuration Area (CMPA) is part of the PFR, Configure BOOT_CFG to select whether the ISP mode is enabled. Table 1 shows the field table starting with 9E40 word address in CMPA. ISP control domains have been marked in red (as shown in Table 1). Table 2 shows the mode selection of ISP domains, 111 is ISP disabled. If the ISP mode is disabled, set BOOT_CFG to 0b1110000. Word Address(HEX) Byte Address Field Description 6 5 4 3 2 1 0 9E40 9E400 BOOT_CFG Default ISP mode 0 0 0 0 9E404 SPI_FLASH_CFG 0 0 0 0 0 0 0 9E408 USB_ID USB Vendor ID 9E40C SDIO_CFG 0 0 0 0 0 0 0 9E41 9E410 CC_SOCU_PIN ISP_CMD_EN MCM33_DBGEN 0 0 0 0 0 9E414 CC_SOCU_DFLT ISP_CMD_EN MCM33_DBGEN TAPEN SPIDEN SPNIDEN DBGEN NIDEN Table 1 Default ISP mode Bit 【6:4】 Auto ISP 000 USB_HID_MSC 001 UART ISP 010 SPI Slave ISP 011 I2C slave ISP 100 Disable ISP 111 Table 2 2.   Disable SWD The DCFG_CC_SOCU is a configuration that specifies debug access restrictions per debug domain. These access restrictions are also referred as constraint attributes in this section. The debug subsystem is sub-divided into multiple debug domains to allow finer access control. Figure 2 shows debug domains and their corresponding control bit position in DCFG_CC_SOCU. Logically, DCFG_CC_SOCU has two components: SOCU_PIN and SOCU_DFLT. The SOCU_PIN and SOCU_DFLT registers are used together to define SWD debug access for the module. Which is logically composed of two components: SOCU_PIN: A bitmask that specifies which debug domains are predetermined by device configuration. SOCU_DFLT: Provides the final access level for those bits that the SOCU_PIN field indicated are predetermined by device configuration. In another words, set the corresponding bit of SOCU_PIN and SOCU_DFLT register to 1 at the same time to enable the module. This module is disabled by setting the corresponding bits of the SOCU_PIN and SOCU_DFLT registers to 0 simultaneously. See Figure 2. Figure 2 Note that the default value of CC_SOCU_PIN and CC_SOCU_DFLT in LPC55 PFR are all zeros. Therefore, in this case, although SOCU_PIN and SOCU_DFLT are both 0, the bit reverse rule is not met (Figure 3 below). Therefore, all debugging permissions are enabled by default when CC_SOCU_PIN and CC_SOCU_DFLT are all 0. Figure 3 Note: the distinction between CC_SOCU_PIN(CC_SOCU_DFLT) and SOCU_PIN(SOCU_DFLT). The former with CC_ includes the reverse bit of the latter. For example, if SOCU_PIN and SOCU_DFLT are set to all zeros and the reverse bit is set to 1, all SWD modules are disabled. Figure 4 3. Implementation The following uses LPC5506 as an example to configure the CMPA field: 3.1  Disable ISP and SWD Figure 5 Keep the default CMPA values except for the two highlighted in red in Figure 5. 1) Set BOOT_CFG to 0x70 to disable ISP. 2) Set all SOCU_PIN and SOCU_DFLT to 0, and set all reverse bits to 1. That is, disable all debug accessing subdomains. 3.2 Enable ISP and SWD Figure 6 Keep the default CMPA values except for the two highlighted in red in Figure 6. 1) Set BOOT_CFG to 0x00 to enable Auto ISP. 2) Restore the default values of DCFG_CC_SOCU, that is, CC_SOCU_PIN and CC_SOCU_DFLT to all zeros. in this case, all debug permissions are restored (turned on) because the rule of bit reversal is not met (see Part 2 of this article). 3.3 Code Implementation Enable or disable the SWD and ISP functions by serial command (1 or 0). Figure 7 The demo code is attached. This routine has been tested on the LPCXpresso55S06 development board. NOTE:     As system security requirements and the attack surface evolves, it is important for customers to understand the types of attacks (especially advanced physical attacks) which NXP does not claim to protect against, or strongly mitigate, so that appropriate mitigation can be taken by the customer at the system level if necessary.  
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The minimum saturation current spec of Inductor is 300mA in the LPC55xx internal DC/DC converter, why is it 300mA, what is the actual current flowing through the inductor? 1)This is internal DC/DC converter block diagram for LPC55xx, on the LX pin, the 4.7uH inductor and 22uF capacitor are required, the FB pin is the detected pin to sense the output voltage, the DC/DC converter provide about 1.1V power for the VDD_PMU power supply pin. Let's discuss the current flowing through the inductor L1 via LX pin   2)compute the actual current flowing the inductor The above circuit is the illustrating block diagram, the control regulation uses PWM signal to control the MOSFET, but the high time of the PWM signal is constant for each PWM cycle, in other words, the on-time of the MOSFET is constant, for the LPC55S69 internal DC/DC converter, the on-time Δt is 0.52us, which means that the interval of MOSFET turning-on time is 0.52us. Assume that the VDC_IN is 3.3V, the output voltage of the DC/DC converter is 1.1V, the constant high time of the PWM signal is 0.52uS. when the MOSFET is on, the capacitor will be charged.   The above figure is the waveform tested on the LX pin of LPC55S68 on the LPC55S69-EVK board, you can measure via scope that the high time of the yellow PWM signal is 0.52uS, during which the MOSFET turns on, the capacitor is charged. The inductor works in DCM mode(discontinuous current mode)   The incremental current flowing the inductor during the MOSFET turns on: ΔI= (VDC_IN-VDC_OUT)* Δt/L=(3.3V-1.1V)*0.52*10**(-6)/4.7*10**(-6)=243mA.   3)The actual flowing current through the inductor is about 250mA for each PWM cycle, so when you select the inductor, the saturation current spec must be greater than actual current, the minimum required saturation current spec for the 4.7uH inductor is 300mA, when you select inductor for the DC/DC converter, you should select the inductor with 300mA or above saturation current .
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The example demos how to use ARM TX Event to trigger ADC based on LPC55S69-EVK board and MCUXPresso IDE and SDK. As the Table 753, the “ARM tx event” is the one of the ADC triggering source, although it is a hardware triggering, but the mechanism is the same as software triggering, after ADC configuration, you execute the instruction asm(“SEV”); the ARM tx event will be generated and trigger ADC to sample. The ADC of LPC55xx support hardware trigger mode, each hardware trigger source corresponds to a trigger register, as the Table 753, the ARM tx event ASC triggering source index is 11, so you have to initialize the ADC trigger control register TCTRL11. In the TCTRL11 register, you can assign the command ID, select the FIFO0 or FIFO1 to save the ADC result, enable hardware triggering.    
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Continuously reducing the power consumption of integrated circuits is a constant topic in the development of integrated circuits. Reduced power consumption helps save power, extend standby time and reduce product heat, etc. Needless to say, low power consumption has become one of the important factors to measure product performance.   We usually recommend customers to refer MCUXpresso SDK power_mode_switch_lpc demo as low power design reference code. With this demo, customers can use serial terminal to control MCU to enter four low power consumption modes:Sleep mode,Deep Sleep mode,Power Down mode and deep power down mode. Meanwhile, user can also choose a variety of wake-up methods to wake up MCU through UART command.   However, when customers take use of power_mode_switch_lpc demo to measure lower power static characteristics, they find discrepancies with data sheet. Take example with LPCXpresso845MAX board. In power down mode, the demo board current reaches to around 100uA in debug mode. But data sheet states the typical current value is 1.5uA, no more than 10uA (see the Table below). Where is the problem? The purpose of the power_mode_switch_lpc demo is to demonstrate several low power modes and multiple wake-up methods to customers. We can’t get similar low power current value with default demo board as spec shows, but let's walk through a step-by-step demonstration and modify the routine to get the data sheet values.   LAB ENVIRONMENT: Demo Board: LPCXpresso845MAX SDK: SDK_2.11.0_LPCXpresso845MAX Demo Code: power_mode_switch_lpc IDE:MCUXpresso IDE v11.5.0   STEP: 1. Download power_mode_switch_lpc to LPC845 development board and run it. The serial port selects low power mode, press (SW2 button) to wake up. The program runs into power down mode, with debugger connected, the measured Idd is 99.5uA To enter low power mode, the following code is used: POWER_EnterPowerDown(DEMO_ACTIVE_IN_DEEPSLEEP); In order to wake up, parameter DEMO_ACTIVE_IN_DEEPSLEEP is configured with PDSLEEPCFG. BOD and watchdog oscillator power domains are turned on. All these setting results in potential current loss, causing power supply current higher than expectation.   2. In this step, we will remove wakeup initialization code // DEMO_InitWkt(); Replace this line of code //POWER_EnterPowerDown(DEMO_ACTIVE_IN_DEEPSLEEP); //enter power down mode with BOD and watchdog osc with POWER_EnterPowerDown(0); //power down BOD and watchdog osc   The modification is to turn off BOD power domain and watchdog clock in power down mode, compile and download the code again and enter the power down mode. At this time, the measured Idd is 57.3uA   In this way, Idd is significantly reduced. However, 57.3uA is still far from the typical value of 1.5uA stated in the data sheet. This is due to MCU debug power domain is turned on by IDE debugger, which leads to extra current consumption.  3. Thus we disconnect debugger and let the development board work in stand-alone mode (power off and re-power on). After power on, LPC is in power down mode. At this time, the measured Idd is 1.4uA. This is quite similar as the current value in datasheet. Consider GPIO configuration: The spec data shown in datasheet are tested under a dedicated test board with almost no external peripheral devices, and unused pins are basically in a floating state. For custom board or  LPCXpresso804 EVK. Some of its IO pins have external pull-up resistors and LEDs. If the GPIO is configured to output low power, the small light will be lit, resulting in additional power consumption. So we configure all pins as pull-up inputs for low power measurement.   Consider package: The test is based on LPCXpresso845MAX equipped LPC845 64pin package. It also applies to LPC845 48pin package. 33 package doesn't have VDDA pin. Due to VDD and VDDA pin design are not exactly the same as other package, for instance, 33pin low power consumption in power down mode is slightly higher than 64/48pin, but no more than 10uA as our spec in DS. Summary: Low power current parameters of the data sheet are measured with all MCU oscillators and analog domains off. Besides, reasonable configuration of GPIO can further reduce MCU power consumption. Before entering the low power consumption mode, it is recommended to set the unused GPIO as a pull-up input according to the actual situation (It can also be set to output low when the pin is floating). In applications with high requirements for low power consumption, users need to carefully optimize the code design to obtain the best low power consumption design.
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Contents     Introduction to OPAMP. ........................................1     Usage of LPC5536-OPAMP. ................................2 2.1 Follower OPAMP. .................................................2 2.2 Non-inverting OPAMP. .........................................3 2.3 Differential OPAMP. ..............................................3     Test Preparation of LPC5536-EVK. ......................4     Test Result ............................................................5 4.1      Follower Test ....................................................6 4.2      Non-inverting Test ............................................7 4.2.1 Error Analysis. ...................................................7 4.2.2 Gain Error and Output Offset Error ...................8 4.2.3 OPAMP Output Error .........................................9 4.4 Differential Test ...................................................10     Conclusion. .........................................................11   The Article shows the OPAMP performance test that the precision of LPC5536-OPAMP matches the description in the product data sheet. The gain error is less than 5%, and the input offset voltage is less than 5mV, which can meet the presicion need to a certain extent. It is worth mentioning that the output error of LPC5536-OPAMP is very small at low magnification. For example, the full-range error is just single-digit mV at the magnifications of 2X and 5X in non-inverting mode. For scenarios requiring higher precision, users can connect the external high-precision resistors to achieve higher output precision.  The article includes detailed test steps and EVK board settings. For detail, see attached article.  
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Because the LPC55S69 has PowerQuad, in SDK example code, the FFT/FIR/IIR and the other DSP function are implemented by the Powerquad module instead of the Cortex-CM33 core.  This is the Powerquad example to implement the DSP function:'   But if customers want to use CMSIS-DSP to implement the DSP function based on Cortex-CM33 instead of Powerquad module, customers can not import SDK example, he has to create a new project, this is the procedures: 1)Create a new project by clicking New->Create a new C/C++ Project   2)select the processor like LPC55S69 3)In the following menu,click CMSIS Driver, and check the CMSIS_DSP_Library and CMSIS_DSP_Library_Source You have to click the Driver which can select your peripherals driver you will use.    3)as the following screenshot, after completion, you can see the CMSIS-DSP source code and library have included in the project    
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For the CM33 of LPC55S6x family, the trust zone module is integrated, the memory space and peripherals are classified as security and non-security space. In order to generate interrupt in non-security mode, the NVIC module including the NVIC_ITNSx register must be initialized in security mode so that interrupt module can generate interrupt in non-security mode. The example demos that MRT0 module generates interrupt in non-security mode, the NVIC module is initialized at security mode, MRT0 is initialized at non-security mode. The project is based on MCUXpresso IDE ver11.1 tools, LPC55S69-EVK board and SDK_2.x_LPCXpresso55S69 SDK package version 2.11.1.
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A vulnerability (CVE-2022-22819) has been identified on select NXP processors by which a malformed SB2 file header sent to the device as part of an update or recovery boot can be used to create a buffer overflow. The buffer overflow can then be used to launch various exploits. Refer to the attached bulletin for more information.   09/26/2022 - Bulletin updated to include fix datecode information. 11/01/2022 - Bulletin updated with clarification that mixed datecodes are RT600 only.    
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As a free and open-source graphics library, LVGL provides great convenience for related series of chips in creating animations, building advanced graphics and building various blocks. LVGL has been integrated into the MCUXpresso SDK package, which can be imported either through the SDK download or directly in the GUI Guider. GUI-Guider is a ready-to-use GUI from NXP. On the basis of being free for NXP equipment, it has a series of advantages such as convenient operation, automatic programming, Chinese and English interface and input. The following takes the LPC54S018 development board as an example, by creating a simple UI interface, to let everyone familiar with its basic operation process and usage. Create new project Select V8 lvgl version, LPC54S018 development board, EmptyUI, set the name and path, click Finish Fig.1 Set the overall background Drag Widget Tab to the GUI Editor, and resize it to full screen size. Fig.2 Add time display and to-do functions. 1) Change the Tab Content1 name to Clock in the red box on the right. Fig.3 2) Drag aclock into editor, adjust its size and position, and set the time according to the red box in Figure 4. Fig.4 3) Drag the dclock clock into the editor, adjust its size and position, and set the time according to the red box in Figure 5. Fig.5 4) Drag the checkbox into editor, adjust its size and position, and edit its content according to Figure 6. Fig.6 In the second Tab content, add a simple counting function and set the progress bar to interact with it. 1) Add a background. Click Import to import the background image, in the widget, drag the image into the editor, set the size and position, select the imported image in the image path and set its transparency, as shown in Figure 7. Fig.7 2) Add count value, progress bar and button. Figures 8, 9 and 10. In Figure 8, when adding a progress bar, set the starting value in the second step. The range value of the progress bar is set by lv_bar_set_range(guider_ui.screen_progress_bar, 0, 100) which can be added to a key event, executing on every click. Therefore, it is recommended to add this code to the subsequent export file costomer.c, and set it once during initialization. Fig.8 Fig.9 Fig.10 3) Add some explanatory text to the progress bar. The operation steps are shown in Figure 11. Fig.11 4) Create an event in the corresponding button, select Customer Code, write the corresponding code, and complete the interaction. Take the ADD button as an example, as shown in Figure 12. Fig.12 In the Tab third content, 3D animation effect is shown. 1) Set the 3D picture. Select 3Dimg, drag it into the editor, set the image in the image path, and then select the rotation center and rotation angle, as shown in Figure 13. Fig.13 2) Set the display switch. Turn on the switch to display the 3D picture, and when the switch is turned off, the picture disappears. Such as Figure 14. Fig.14 In the fourth Tab content, add “help”. 1) Add logo. Add img, import image to set transparency. Fig.15 2) List the first three modules. Drag the list Widget into the editor, create new lines and modify pictures and texts. After completion, generate the code as shown in Figure 16. The results can be directly displayed by simulation or imported into the development board. Figure 17 shows the simulator and selectable target. The simulation results are shown in Figure 18. There are two ways to download the design to the development board. One is to select the available IDE in Figure 17 and download it directly through GUI Guider. The second is to export the source files first, replace them one by one in the relevant SDK demo code, build with application code in IDE and download/debug with IDE debugger. Fig.16 Fig.17 Fig.18 Video Class : https://www.youtube.com/watch?v=QM52Nu16zKQ  
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Note: This document provides a simple description, the details about flashloader can be found at Getting Started with LPC540xx Flashloader User's Guide.pdf which is located in SDK_2.5.0_LPCXpresso54S018\middleware\mcu-boot\doc   Download LPC54S0xx SDK.   Compile the flashloader project to generate flashloader.bin  The project is located in sdk\boards \lpcxpresso54s018\bootloader_examples\flashloader   Use dfu-util.exe or IDE to load flashloader.bin into RAM. dfu-util can be downloaded from http://dfu-util.sourceforge.net/releases/ Configure the ISP pins and then reset the chip to make the chip to enter USB1 DFU boot mode. Boot mode ISP2 PIO0_6 pin ISP1 PIO0_5 pin ISP0 PIO0_4 pin Description USB1 DFU boot LOW LOW HIGH USB DFU class is used to download image over the USB1 high-speed port into SRAM. Connect the LPC54S0xx device USB1 high-speed port and PC with USB. The following is the command line to load the flashloader.bin: $ dfu-util.exe –D flashloader.bin   Use blhost to program/erase LPC540xxM/LPC54S0xxM flash Once the flashloader binary is downloaded and starts its execution on the LPC54S0xx platform and there remains a physical USB connection between the LPC54S0xx platform USB1(High-Speed) and host, the flashloader will be ready to receive the commands. blhost -u 0x1fc9,0x01a2 -- get-property 12 blhost -u 0x1fc9,0x01a2 -- fill-memory 0x2000d000 4 0xc0000004 blhost -u 0x1fc9,0x01a2 -- configure-memory 0xa 0x2000d000 blhost -u 0x1fc9,0x01a2 -- get-property 25 0xa blhost -u 0x1fc9,0x01a2 -t 100000 -- flash-erase-region 0x10000000 0x100000 blhost -u 0x1fc9,0x01a2 -t 100000 -- write-memory 0x10000000 xxx.bin Note: xxx.bin is the target file which needs to be downloaded to the flash.   Author: Hao Liu  Thanks for Hao Liu.
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  This article mainly introduces how to re-enable SWD after disabled. Problem description The ECRP (Enhanced Code Read Protection) of LPC546xx series is used to configure different security levels of the user program. It is configured at the offset 0x20 of the boot image file and used in conjunction with OTP. Users of LPC546xx can disable SWD, ISP by configuring ECRP value. Some users need to restore after disabling SWD, they can use the "unlock LPC546xx" command in J-link commander. For example:   But for some chips, this method still fails to recover SWD. This paper presents a method to restore SWD based on LPC-LINK2. When using the "unlock LPC546xx" command does not work, you can try the method in this article. Theoretical analysis and solutions Customer’s example: LPC54605:Configure ECRP to 0x00015800. After disabling SWD, it needs to be restored. When the ECRP value is 0x00015800, we analyze from high to low through  user manual. In ECRP, 31:18 bits are reserved, and 17:16 bits determine the status of SWD. In this example, 17:16=01 ,this means that SWD is disabled.   15: 14 =01, it is not allowed to enter ISP through IAP call.   13: 12 = 01, it is not allowed to enter ISP through pin.   11: 10 = 10, IAP sector erase / write protection is disabled, so sector protect (5:0) is ignored.   At this point,  SWD (17:16) is DISABLED, ISP Entry from ISP (15:14) is DISABLED, and ISP Entry from Bootloader (13:12) is DISABLED, the IAP Mass Erase can still be used to erase the entire Flash to recover a device. as long as the OTP MASS ERASE is ENABLED. If the OTP has been configured and bit 4 is set to 1, that is, disabled mass erase command, the SWD can never be recovered again. When Mass Erase is enabled, the Debug Mailbox is also enabled and allows a debugger to communicate with the bootloader to execute a Mass Erase.   Therefore, the Debug Mailbox can be used to perform Mass Erase operation and restore ECRP settings. To achieve the purpose of re-enabling SWD. Operation steps IDE: MCUXpressoIDE_11.4.0_6237 or other versions IDE installation path: C:\nxp\MCUXpressoIDE_11.4.0_6237 Tool script: LPC546xxMassErase.scp Tool script path: C:\nxp\MCUXpressoIDE_11.4.0_6237\ide\binaries\Scripts Other versions of MCUXpressoIDE and other installation paths operate the same.   1)Put LPC546xxMassErase.scp script in the path: C:\nxp\MCUXpressoIDE_11.4.0_6237\ide\binaries\Scripts 2) Open a command prompt window. 3) Change the path to C:\nxp\MCUXpressoIDE_11.4.0_6237\ide\binaries.   4) Execute the command of redlinkserv-commandline. 5) After executing the redlinkserv -commandline command, you should see the redlink> prompt.   6) Execute the load command "C:\nxp\MCUXpressoIDE_11.4.0_6237\ide\binaries\Scripts\LPC546xxMassErase.scp". 7) After executing the load command, you should see "LPC546xxMassErase.scp" being loaded.   😎 Execute the run command. 9) After executing the run command, you should see the following message.   At this point, the SWD interface can be used for normal debugging. Query ECRP level In the LPC546xx user manual, we can see  ISP-AP command, one function is query the ECRP  level, that is, to view the ECRP configuration of this chip.   From the log in part 3, we can see the returned ECRP level:   However, there is no explanation in the user manual, so here we show the meanings of each bit. There is a table translation from the ECRP level user defined and the ECRP definition used by the ROM code: /* Feature bit defines */ #define CRP_JTAG_EN_BIT         (1 << 6) #define CRP_MASS_ERASE_DIS_BIT  (1 << 7) #define CRP_IAP_PROT_EN_BIT     (1 << 😎 #define CRP_ISP_PINS_EN_BIT     (1 << 9) #define CRP_ISP_IAP_EN_BIT      (1 << 10) #define CRP_DBG_MBOX_EN_BIT     (1 << 11) #define CRP_COUNT_MASK          0x3F #define CRP_DEFAULT_FEATURES    0xFFFFFFFF #define CRP_MASS_ERASE_ONLY     (CRP_SECT_ERASE_DIS_BIT) For example: In CRP_JTAG_EN_BIT, 1 is JTAG/SWD enabled and 0 is disabled. It’s corresponding to ECRP value bit 17 and 16. In CRP_MASS_ERASE_DIS_BIT, 0 is Mass Erase allowed and 1 is disallowed. It’s corresponding to the combination of ECRP value bit 0~5, bit 10~11, and bit 14~15. In CRP_IAP_PROT_EN_BIT, 1 is IAP protection enabled and 0 is disabled. It’s corresponding to ECRP value bit 14~15. In CRP_ISP_PINS_EN_BIT, 1 is ISP pin enabled and 0 is disabled. It’s corresponding to ECRP value bit 12~13. In CRP_ISP_IAP_EN_BIT, 1 is ISP in IAP mode enabled and 0 is disabled. It’s corresponding to ECRP value bit 14~15. In CRP_DBG_MBOX_EN_BIT, 1 is ISP-AP or debugger mailbox enabled and 0 is disabled. It’s corresponding the combination of some reserved ECRP bits and OTP setting. Of course, all these ECRP value used by the ROM not only look into the user defined ECRP value but also check the OTP setting. When “Query ECRP Level” is called, it returns the value used by the ROM code, but not the ECRP value programmed in the image by the user.   Summary: In  LPC546xx series,  debugger can communicate with  LPC546xx through  Debug mailbox even if SWD is disabled. As long as the OTP does not disable the Mass Erase function, debugger can request LPC546xx to execute mass erase through Debug Mailbox to restore the SWD function. In addition, this article also supplements the specific meaning of  return value using ISP-AP command.  
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After LPC54XXX enter ISP mode, there are two methods to upgrade the application through UART/I2C/SPI/USB. One method is to change the ISP pin state when power on, and the other method is to reinvoke ISP Boot ROM in source code during code running. The first method does not require user to write any code, and the operation is simple, but the disadvantage is that it is not flexible and is not suitable for on-site operation; The second method is more flexible and is widely used in Secondary Bootloader applications developed by yourself, but it requires users to write their own code. In actual development, because the USB port of personal computer is easy to use, the method of using the USB port for application upgrade is becoming more and more popular. Unfortunately, we currently do not have instructions for upgrading the application by the USB port in ISP mode. So we write this article to share the method here.   There are two methods to enter ISP mode: Method 1: Enter ISP mode to upgrade the application during power on On the hardware side, configure the ISP0~2 pins before power-on or reset, and the MCU enters ISP mode to upgrade the application. The pin configuration method is as follows: Figure 1.   Method 2: Activate Reinvoke ISP in source code to upgrade the application In ISP mode, the application is upgraded through UART/I2C/SPI/USB. This article focuses on the USB method. Here for USB, Both USB0 (Full Speed) and USB1 (High Speed) of LPC54XXX can be used for application upgrade. There are two USB upgrade modes: DFU (Device Firmware Updata) and MSC (Mass Storage Device Class), as follows: Figure 2.   Select the application upgrade mode by modifying byte 0 and byte 1 of the ISP parameter array. The key code is as follows Figure 3.   There are 3 key point we need to pay attention in Figure 3: -When isp_mode[0] is configured as 0xAA, it is DFU mode, otherwise it is MSC mode (for example, isp_mode[0] is configured as 0xFF). -When isp_mode[1] is configured as 8, USB FS is used, and when it is configured as 9, USB HS is used. -Enter the ISP mode through the Chip_IAP_ReinvokeISP function. 2.1 Use DFU for application upgrade Tool preperation: To work with DFU, dfu-util tool is needed to use DFU to upgrade the application, you can download the DFU tool on the DFU official website. The link is as follows: http://dfu-util.sourceforge.net/ NXP also includes the dfu-util tool in LPCScrypt. If you have downloaded LPCScrypt, you can use it directly in the bin directory.   DFU update application Steps: Take LPC54628 as an example, ISP is configured as DUF mode, and USB1 is used to upgrade the application. Modify the relevant code in Figure 3, as follows: isp_mode[0] = 0xAA; isp_mode[1] = SL_USBHS; Build and download the application to the MCU, power on again, and connect USB1 to the computer. Here Enter the dfu-util tool directory and copy the .bin file to the current directory. Use the command: ./dfu-util -l   Find the DFU devices. Use the command: ./dfu-util -D .\lpcxpresso54628_gpio_led_output.bin -a 0 Download the lpcxpresso54628_gpio_led_output.bin file to the device with alt number 0. Alt0 is "FLASH", alt1 is "RAM", and the specific operations are as follows:   Figure 4.   After downloading the application successfully, reset the MCU and observe the blinking phenomenon of the LED on the development board.   2.2 Use MSC for application upgrade Take LPC54628 as an example, ISP is configured as MSC mode, and USB1 is used to upgrade the application. Modify the relevant code in Figure 3, as follows: isp_mode[0] = 0xFF; isp_mode[1] = SL_USBHS; Build and download the application to the MCU, power on again, and connect USB1 to the computer. You will found another disk in my computer, as follows: Figure 5.   Then do the following to update firmware: -Remove the original firmware.bin in the CRP DISABLD disk. -Rename the application (for example, lpcxpresso54628_gpio_led_output.bin) to firmware.bin. -Copy the application firmware.bin to the CRP DISABLD disk. -Reset the MCU, if the LED is observed blinking, it proves that the application has been successfully upgraded. Note: The application must be renamed, and the rename cannot be performed in the CRP DISABLD disk.   Demo project:lpcxpresso54628_flashiap.zip Application upgrade file:lpcxpresso54628_gpio_led_output.bin (generated by SDK demo code)
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  需求: 客户需要对Image文件做出完整性检测,利用IDE固有功能添加这类信息简便且可靠,以往有类似的link提到了这些配置,对于LPC55系列,需要做一些更新。 CRC Checksum Generation with MCUXpresso IDE - NXP Community Solution 基于MCUX环境 下载 SRecord http://srecord.sourceforge.net/ srec_cat.exe是下载后我们主要使用的工具,通过为其添加一个系统变量名,将SRecord目录加入系统路径     重启MCUX IDE之后可以在工程配置中看到该变量:       创建一个脚本文件crc_add.txt,放在debug目录下,用于填充app后的flash空余位置为0xFF, 并后续生成CRC32值并放置0x00037FFC位置。最终生成的srec文件为包含所有内容的image。           # srec_cat command file to add the CRC and produce application file to be flashed # Usage: srec_cat @filename #first: create CRC checksum lpcxpresso55s06_hello_world_image_length_MCUX.srec # input file #-fill 0xFF 0x00000000 0x00038000 # fill blank code area with 0xff from 0x00000000 to 0x00038000 (0x00038000是把LPC55S06的末尾地址稍往前提,实际因为0x0003D7FF) -fill 0xFF 0x00000000 0x00037FFC #填充0-0x37FFC区间的未用地址为0xff -crop 0x00000000 0x00037FFC # just keep code area for CRC calculation below , 保留这段区间的内容,排除除此范围内的其他数据 #-CRC16_Big_Endian 0x00037FFE -CCITT # calculate big endian CCITT CRC16 at given address., 为以上空间数据计算CRC16,并放置在0x00037FFE地址,2字节 -CRC32_Little_Endian 0x00037FFC -CCITT #CRC32 -crop 0x00037FFC 0x00038000 # keep the CRC itself #second: add application file lpcxpresso55s06_hello_world_image_length_MCUX.srec # input file -fill 0xFF 0x00000000 0x00037FFC # fill code area with 0xff -crop 0x00000000 0x00037FFC #-crop 0x10000000 0x10000170 0x10000172 0x10010000 #keep all except CRC #finally, produce the output file -Output # produce output lpcxpresso55s06_hello_world_image_length_MCUX_crc.srec      创建一个crc_file_convert.txt文件,也放在debug目录下,用于将上一步生成的最终image的srec文件转换为bin文件,用于生成或者比对 # srec_cat command file to add the CRC and produce application file to be flashed # Usage: srec_cat @filename #third: create bin file lpcxpresso55s06_hello_world_image_length_MCUX_crc.srec -o lpcxpresso55s06_hello_world_image_length_MCUX_crc.bin -binary 在IDE的Post build栏目添加如下命令:     arm-none-eabi-size "${BuildArtifactFileName}"   默认自带的统计image size功能 arm-none-eabi-objcopy -v -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin"    将image转成bin文件,用于后续使用和比对 arm-none-eabi-objcopy -v -O srec "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.srec" & srec_cat.exe @CRC_add.txt 填充image,计算CRC32,整合成新的srec image srec_cat.exe @CRC_file_convert.txt  将上一步得到的srec image转化为bin文件,用于后续使用和比对   《hello_world_image_length_MCUX》例程会自行统计应用程序的CRC32值,并于IDE产生的CRC32值做比对   这里需要注意的是,由于MCUX IDE是借助于外部工具来填充flash和计算CRC32,所以默认IDE调试和下载选择afx文件并不包含这些信息。当校验程序开始运行,会发生: 读写未写入的flash,对于LPC55系列会发生hardfault CRC32值并不存在 所以测试这个程序需要单独下载包含所有的srec文件或者bin文件,而不是默认的afx文件。      
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1    introduction The doc demonstrates how to use MRT(Multi-rate Timer) module to implement the delay function, the delay time is programmable. The MRT has a One-shot stall mode, with the mode, while the MRT channel counter counts down, the core stalls until the MRT channel counter reaches to zero. After the MRT channel counter reaches to zero, the MRT channel becomes idle, the core continues to work.   2 delay function description Sometimes, it is expected that there is a programmable delay between two instructions, for example Instruction 1 Delay Instruction 2 In general, the delay function can be implemented by forcing the core to execute __asm(“NOP”) instructions This code is like: Void delay(uint32_t interval) {        Uint32_t counter;        Counter=ConvertTimeToCounter(interval);        For(uint32_t i=0; i<counter); i++)        {        __asm(“nop”)        } }   The macro convertTimeToCounter is used to convert a time to a number of loop   1.   MRT feature The MRT module of LPC family provides a unique feature called One-shot stall mode, because the test is based on LPC55S69-EVK board, so I referred to the section 27.5.3 One-shot stall mode in UM11126.pdf. The MRT does not have external pad.   One-shot stall mode: Bus stall mode can be used when a short delay is need between two software controlled events, or when a delay is expected before software can continue. Since in this mode there are no bus transactions while the MRT is counting down, the CPU core stalls, consumes a minimum amount of power during that time until the MRT counter reaches to zero. Therefore the One-shot stall mode of MRT can make core stall during the MRT counting down process, the delay function can be implemented.   3 MRT clock source and delay time For the LPC55S69, the clock source of MRT module is the AHB Bus clock, which is the same as the core clock. For the LPC55S69 example, there is the code to set up the core clock void BOARD_InitBootClocks(void) {     BOARD_BootClockPLL150M(); } So the  MRT clock frequency is 150MHz.       The delay time is a time, but the MRT is a counter, so the delay time must be converted to the counter value. The counter value is dependent on the MRT clock frequency. The MRT clock source is AHB bus clock, or the core clock. The LPC55S69 core clock frequency is 150Mhz, so we can define #define MRT_CLOCK_FREQUENCY 150MHz If the required delay time is delay_time variable in second unit, the required MRT counter value is   MRT counter value=delay_time/(MRT clock cycle time)=delay_time* MRT_CLOCK_FREQUENCY.   For example, assume the required delay_time is 1mS or 1*10**(-3)  Second, the corresponding counter value is 1*(10**-3)*150*(10**6)=150 000   The MRT delay time restriction. The MRT counter register is 24 bits, the maximum counter value is 2**24= 16,777,216, the maximum delay time is 16777216/(150*10**6)=0.111848 S or 111 mS.     3 source code description MRT delay function source code is based on SDK package SDK_2_11_1_LPCXpresso55S69.zip, the tools is MCUXpresso IDE v11.5.0. The example is run on LPC55S69-EVK The example uses MRT to delay 100mS(0.1 Second), after the delay, a LED is toggled The MRT counter value is 0.1S*150*(10**6)=15 000 000   For the mrt_init() api function, it initializes the MRT and set the MRT channel0 in OneShotStall mode. Once the core executes the line MRT_StartTimer(MRT0, kMRT_Channel_0, 15000000); the MRT channel0 counter will count down from 15000000, during the counting process the Cortex-M33 will stall. After the counter reach to ZERO, the core finishes the stalling mode and continues to execute the next line, the MRT channel0 counter will be in idle mode.       /**  * @file    LPC55S69_Project_mrt_stall.c  * @brief   Application entry point.  */ #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC55S69_cm33_core0.h" #include "fsl_debug_console.h" #include "fsl_mrt.h" #include "fsl_iocon.h"   /* TODO: insert other include files here. */ #define BOARD_LED_PORT BOARD_LED_BLUE_GPIO_PORT #define BOARD_LED_PIN  BOARD_LED_BLUE_GPIO_PIN /* TODO: insert other definitions and declarations here. */ void mrt_init(void); /*  * @brief   Application entry point.  */ int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals(); #ifndef BOARD_INIT_DEBUG_CONSOLE_PERIPHERAL     /* Init FSL debug console. */     BOARD_InitDebugConsole(); #endif     mrt_init();     PRINTF("Hello World\n");     for(;;)     {     MRT_StartTimer(MRT0, kMRT_Channel_0, 15000000);     GPIO_PortToggle(GPIO, BOARD_LED_PORT, 1u << BOARD_LED_PIN);     __asm("nop");       }     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;         /* 'Dummy' NOP to allow source level single stepping of             tight while() loop */         __asm volatile ("nop");     }     return 0 ; }   uint32_t mrt_clock; mrt_config_t mrtConfig; void mrt_init(void) {           /* mrtConfig.enableMultiTask = false; */         MRT_GetDefaultConfig(&mrtConfig);           /* Init mrt module */         MRT_Init(MRT0, &mrtConfig);           /* Setup Channel 0 to be repeated */         MRT_SetupChannelMode(MRT0, kMRT_Channel_0, kMRT_OneShotStallMode);           //MRT_StartTimer(MRT0, kMRT_Channel_0,  15000000);   }       }                                                                                                              When the above code is running, user can see the blue LED toggles on the LPC55S69-EVK board. Connecting the PIO1_4 pin signal ( the pin 5 of P18 connector) on LPC55S69-EVK, the PIO1_4 signal toggling frequency is 5Hz, the cycle time is 200mS, so the delay is 100mS.      
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For the LPC8xx family, the peripheral module input or output signals are not connected to external pads fixedly as most processor does . With SWM module, the peripheral module input or output signals can be routed to any external GPIO pins via software configuration There is special requirement that one peripheral output signal functions as the input signal of another peripheral, in the case, the peripheral output signal and the peripheral input signal can be routed to the same pad via SWM so that the input and output signals are connected internally without external cable. The LPC802 has ACOMP module, CTimer module and SWM module, per customer requirement, the ACOMP output signal and CTimer0 capture 0 input signal can be routed to the same GPIO pin without external connection so that the ACOMP output signal can trigger CTimer0 capture 0 event internally. In the doc, I give the code to configure the CTimer, ACOMP and the SWM, explain the configuration,introduce the tools, board and result.  
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The document describes how to use DMA triggering mode to transfer data between memory and peripheral. In detail, the CTimer0_match0 is configured to generate matching event with programmable period, the CTimer0 matching event triggers DMA, the DMA transfer data between a variable in memory and GPIO Toggling register(the GPIO is connected to a LED), so user can see the LED toggling. The DMA Ping-Pong modes are used, so user can observe different LED toggles. The Example code is developed on SDK package, run on LPC55S69-EVK, the tools is MCUXpresso ver11.5.  
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The power measurement board includes eight measurement channels which support for eight programmable gain amplifiers(LTC6915) and two ADC converters(AD7175). The measurement board measures the voltage drop across sampling resistor, and send to the ADC after the voltage drop is processed by amplifier and make it available via SPI. Microcontroller LPC55S69 collects the data from the measurement circuit and send it to the host computer via USB VCOM port. The MCU can control the gain value of programmable gain amplifiers by SPI when different power circuit are measured. The host computer connects to the power measurement board through the USB virtual serial port, the MCU initializes and configures the measurement unit by SPI, and starts to measure the inside current and monitor the voltage. MCU adjust the gain parameter and then transmit current and voltage data to MCU by SPI, then MCU transmits the data to the host computer for processing and display through the virtual serial port. The voltage drop of the measured circuit to be measured is firstly amplified by the programmable amplifier LTC6915, and MCU monitor the state which whether the data is abnormal at the same time. R0 is the sampling resistor, LTC6915 is a selectable programmable amplifier, the gain can be set to 14 kinds, PGA gain parameter is adjusted when the current changes. ADC7175 is the 24-bit high-precision ADC, which is more advantageous in the application of small current measurement. When the MCU switches the low power mode to the normal mode, and the LTC6915 will reduce the gain value by SPI. The power measurement board provides easy connection method by two-wires cable. For example, the MIMXRT1180EVK and MIMXRT1020EVK are connected with power measurement board. The USB virtual COM is used for data transfer, and display by PMT(power management tool) or other PC GUI, the measurement power data include current, voltage and power. There are more detailed descriptions in the attachment.
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New update to errata will be published regarding the vendor_usage field in the PFR. In ROM, the 16-bit monotonic counter is implemented in the upper 16 bits of the 32-bit VENDOR_USAGE field and the inverse of the monotonic counter is in the lower 16 bits. Users must take care when using the ROM API to increment the upper end of this field and write the inverse on the lower 16 bits in order for ROM to validate the value correctly. The initial value that shall be written is 0x0000FFFF. Then the updates will be as follows: 0x0001FFFE 0x0002FFFD . . 0x0005FFFA . . 0x1010EFEF . . 0xFFFF0000   Example Code using ROM API: *This example demonstrates the increment of the version in CFPA page as well as the vendor usage, it does not cover all use cases, so please use this as a reference only* case APP_INCREASE_VENDOR_USAGE_ONLY: PRINTF("Disable Flash Protect...\r\n"); /* Initialize flash driver */ FLASH_Init(&flashInstance); if (FFR_Init(&flashInstance) == kStatus_Success) { PRINTF("Flash init successfull!!. Halting...\r\n"); } else { error_trap(); } status = FFR_GetCustomerInfieldData(&flashInstance, (uint8_t *)g_CFPAData, 0x0, FLASH_FFR_MAX_PAGE_SIZE); PRINTF("\r\n"); PRINTF("Header 0x%08x , Version 0x%08x , SecureFW Version 0x%08x , NonSecureFW Version 0x%08x\r\n", g_CFPAData[0], g_CFPAData[1], g_CFPAData[2], g_CFPAData[3]); PRINTF("ImageKey Revoke 0x%08x , Reserved 0x%08x , RothRevoke 0x%08x , Vendor Usage 0x%08x\r\n", g_CFPAData[4], g_CFPAData[5], g_CFPAData[6], g_CFPAData[7]); PRINTF("NS PIN 0x%08x , NS DFLT 0x%08x , Enable FA Mode 0x%08x , Reserved1 0x%08x\r\n", g_CFPAData[8], g_CFPAData[9], g_CFPAData[10], g_CFPAData[11]); PRINTF("\r\n"); /* Clean-up CFPA area */ g_CFPAData[8] = 0; g_CFPAData[9] = 0; /*Increase Monotonic counter*/ p32 = (uint32_t *)(uint32_t)g_CFPAData; version = p32[1]; if (version == 0xFFFFFFFFu) { return kStatus_Fail; } version++; p32[1] = version; PRINTF("Version to write: 0x%08x \r\n", version); /*Increase Vendor Usage*/ uint32_t vendor_usage = p32[7]; if(vendor_usage == 0x0) { vendorUsage_right = 0xFFFF; vendorUsage_left = 0x0000; } else { vendorUsage_right = vendor_usage & 0xFFFF; vendorUsage_left = vendor_usage >> 16; } vendorUsage_left += 0x1; vendorUsage_right -= 0x1; vendor_usage = (vendorUsage_left << 16) | vendorUsage_right; p32[7] = vendor_usage; PRINTF("Vendor_Usage to write: 0x%08x \r\n", vendor_usage); Status = FFR_InfieldPageWrite(&flashInstance, (uint8_t *)g_CFPAData, FLASH_FFR_MAX_PAGE_SIZE); if (kStatus_FLASH_Success == Status) { status = kStatus_Success; PRINTF("CFPA Write Done!\r\n"); } else { status = kStatus_Fail; }
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Contents 1. Principle of energy measurement 2. Energy measurement test   2.1 Use in non-Debug state   2.2 Use in Debug state   During the operation of MCU, real-time measurement of board current and voltage is of great significance to the stability of system power consumption. Especially in scenarios that are sensitive to voltage and current fluctuations, it is particularly important to collect and analyze high-frequency samples. MCUXpresso IDE integrates the power measurement function, which can measure the current and voltage of the development board in real time and calculate the real-time power consumption. Based on MCUXpresso IDE v11.5.0, this article mainly explains power measurement function usage. 1.   Principle of energy measurement Currently the MCUXpresso IDE energy measurement function supports the following development boards: -LPCXpresso546x8/540xx/54S0xx -LPCXpresso54102 -LPCXpresso51U68/54114 -QN9090-DK006/ JN5189-DK006/IOTZKB-DK006 -QN9080DK The power measurement actually uses the LPC-Link2/MCU-Link debugger on the development board to collect the conversion value of the A/D conversion chip, and perform software calculation to obtain the power measurement result. Taking LPCXpresso54628 development board as an example, the following is the circuit diagram of the power measurement part: Fig.1 The MAX9634TEUK+T is a precision current amplifier. And ADC122S021 is a 12-bit A/D converter with dual-channel sampling, its rate can reach 200ksps. ADC122S021 collects LPC54xx_CURR and SHLD_CURR voltages, IDE sets Target resistor (Total Rvsense in the figure) and Shield resistor (resistance value corresponding to SHLD_CURR) in advance. The LPC-Link2 debugger can calculate the voltage, current and power consumption information by collecting AD conversion values. 2.   Energy measurement test Taking LPCXpresso54628 development board as an example. Open the menu bar : Analysis->Energy Measurement. The Energy Measurement interface will appear in the lower right corner of the screen, which is divided into Plot drawing and Config configuration interface. It can be used in Debug state or in non-Debug state during measurement. Test the case of LED small light flickering and observe the changes of voltage, current and energy consumption. Note that the LPC-Link2 debugger version should be CMSIS-DAP probe version 5.147 and above. 2.1 Use in non-Debug state Click the button  in energy measurement interface and select the measured in the config interface. You can select the target voltage, target current and shielding current. The sampling rate can be selected as 50ksps, 62.5ksps or 100ksps. First select the model of the development board to be tested, and then continue to select the target resistance and shielding resistance. The target resistance value is selected according to the jumper cap description in Figure 1. The resistance value of the shielding resistance is the fixed resistance value of development board. As shown in the figure below: Fig.2 Select the target voltage to be measured, and click the button to run the Energy Measurement interface. You can see the slight fluctuation of voltage in the plot interface and view the average voltage through the delimited area of horizontal measurement, as follows: Fig.3 Select the target current to be measured. Before measuring the target current, click Read from target on the config interface to calculate the average value of the target voltage within 0.5s for subsequent power consumption calculation. Click the run button to see that the target current fluctuates slightly with the flashing of the small light in the plot interface. At the same time, check the average current, power consumption and energy consumption through the delimited area of horizontal measurement, as follows: Fig.4 2.2 Use in Debug state When used in the debug state, you can use MCUXpresso IDE or KEIL to enter the debugging state. Click the button on the energy measurement interface to read the power consumption in the debug state. The measurement process is the same as the non-Debug state, as follows: Fig.5 This is a general enablement document of how to use energy measurement feature in debug and non-debug mode. For more, please refer  MCUXpresso_IDE_Energy_Measurement. pdf under MCUXpresso IDE install folder.    
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  Contents 1.Problem description      2.  Reason analysis      3. Solutions    3.1   SRAM power down problem solution    3.2   Alarm timer interrupt enable problem solution   3.3   Downcounter register write problem solution    4. Verification Considerations   1.     Problem description When LPC43xx series runs the LPCOpen low-power demo “misc_pmc_states”, the two modes of power down and deep power down cannot successfully wake up through the Alarm Timer. This paper analyzes the series of problems and provides corresponding solutions. The same problem and solution exists for waking up via RTC. 2.     Reason analysis The reasons for wake-up failure include the following three aspects. - SRAM power down problem: In the power down mode of LPC43xx series, only the 8K SRAM is not powered down, and other SRAMs are powered down. After waking up from power down mode, the program continues to execute backwards, not reset. Therefore, it should be ensured that when entering power down, the data is in the 8K SRAM that does not lose power, so after wake up, it can continue running. - Alarm timer interrupt enable problem: The LPC43xx  Alarm timer interrupt enable need a while to take effect. If it is not successfully enabled before entering low power, it cannot wake up from low power mode. - Downcounter register problem: In LPC43xx series, in order to ensure the wake-up at the specified time, it is necessary to judge that the set value is successfully written into the Downcounter register. The table of reasons for wake-up failures in power down and deep power down modes is summarized as follows:   3.     Solutions For power down wake-up failure, it needs to be solved according to three problems. There is no data loss problem for deep power down wakeup. Because after waking up from deep power down mode, the program is reset and executed again, and the previous data is not needed. So the solution skips the first and only needs 3.2 and 3.3. 3.1  SRAM power down problem solution As shown in the manual, only 8kB local SRAM will not lose power in LPC43xx series Power-down mode. Note: Chips with and without internal flash have different 8K SRAM address ranges.   For LPC4330/LPC4350/LPC4370 series products without internal flash, the 8K SRAM address range is 0x10090000– 0x10092000 (8KB). The address range of chips with internal flash such as LPC4337/LPC4367 is 0x10088000 – 0x1008A000 (8KB).   Placing data in this 8K SRAM area can solve the problem of lost data. Taking LPC4350 as an example, the setting method in MCUXpressoIDE is as follows: Find the following interface according to Project \ Properties \ C\C++ Build\MCU settings path, define this 8K SRAM separately, the address is 0x10090000, and the size is set to 0x2000. At this point, the setting of the power loss problem in the SRAM area is completed. 3.2  Alarm timer interrupt enable problem solution To ensure that the Alarm timer interrupt is enabled, add a while loop poll after it until it is successfully enabled. Enter the function in the src\pmc_states.c path. And add while((LPC_ATIMER->ENABLE& 0x01) != 0x01){} after the Chip_ATIMER_IntEnable(LPC_ATIMER); function statement in the corresponding case mode.   3.3  Downcounter register write problem solution The solution to this problem is similar to 3.2. Still enter the function with the src\pmc_states.c path, and find LPC_ATIMER->DOWNCOUNTER= RTC_ALARM_TIME*1000 in the case of the corresponding mode (consistent with the 3.2 position). Add a while statement after it: while(LPC_ATIMER->DOWNCOUNTER != RTC_ALARM_TIME*1000); As shown below.   4.     Verification Considerations When there is no internal flash development board for testing (eg: LPC4370, LPC4350…), such as the Hitex LPC4350Evaluation board, it is necessary to configure the startup as external flash startup. The reference picture is as follows.   When starting, you need to set the pins P2_9, P2_8, P1_2, P1-1 to the form of low, low and high, and start in the form of SPIFI. Jumper settings are shown in the figure.  
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