Why raising QoS priority for EPDC Eink has been developing higher resolution panel. With higher resolution, TCE underrun problem is observed more easily. Highest QoS priority can provide obvious improvement. What's TCE underrun TCE is Timing Controller Engine which is responsible for TFT scan frame refreshes. The pixel FIFO (PIX_FIFO) is used to load working buffer pixel data for TCE. When FIFO underrun, TCE_UNDERRUN_IRQ interrupt is triggered, and TCE underrun log pops up in kernel log. The pixel data is processed by TCE to generate TFT voltage control pixels for panel. If an underrun occurs, unknown data is used and that can damage the panel. About the patch The patch raises EPDC reading to highest priority (QoS='f'), so the EPDC reading becomes real time channel in MMDC configuration. The patch is based on L4.1.15 kernel. Stress test of unit test can pass with 1920x1440 configuration.

  The VAR-SOM-SOLO small form factor System-on-Module carries an advanced feature-set and broad connectivity options, making it an ideal solution for customers and products in the embedded market.   Staying on-trend with the market’s shift towards a cost-effective highly integrated off-the-shelf solution, the VAR-SOM-SOLO from Variscite levels the playing ground for a broad spectrum of embedded products. Bringing all the benefits of the widely successful VAR-SOM-MX6, the VAR-SOM-SOLO from Variscite carries much smaller dimensions and a slim lined price-point.  Features include Freescale’s i.MX6 1GHz Cortex-A9, SLC NAND, eMMC, dual band Wi-Fi/BT with MIMO, USB, Gigabit Ethernet, A/V interfaces and industrial operating temperatures. The VAR-SOM-SOLO utilizes a standard SO-DIMM 200pins interface to the carrier board, fully pin-to-pin compatible with the VAR-SOM-MX6.   Ohad Yaniv, Variscite’s CEO, explains the strategy behind the new System-on-Module: “In today’s market, we believe the compact VAR-SOM-SOLO presents a true synergy between an impressive feature set and an affordable price-point. We feel the newly introduced SoM reflects a constantly evolving embedded application concept that requires advanced multimedia features, in a compact and cost efficient solution.”   Key features include:   - Freescale i.MX6 1000MHz single Cortex-A9   - Up to 1GB DDR3, 512MB SLC NAND and 64GB eMMC   - Certified Wi-Fi 802.11 a/b/g/n 2.4/5GHz with optional 2x2 MIMO   - Bluetooth 4.0/BLE   - Full 1080p video encode/decode capability   - Vivante GPU 2D/3D graphics accelerator   - Display: 2x LVDS, HDMI1.4, MIPI DSI   - 10/100/1000 Mbps Ethernet   - USB 2.0: Host, OTG   - PCIe   - Audio In/Out   - Camera inputs: MIPI CSI, parallel   - Dual CAN, UART, I2C, SPI   - Industrial temperature -40 to 85°C   - Dimensions: 33mm x 68mm x 4mm   - OS: Linux Yocto & Ubuntu, Android, WEC 7 & 2013   Availability and Pricing: The VAR-SOM-SOLO is available now. Pricing starts at 42USD. Contact sales@variscite.com or +972 9 9562910 for more information.   About Variscite: Variscite is a leading System on Modules (SoM) and Single-Board-Computer (SBC) design and manufacture company. A trusted provider of development and production services for a variety of embedded platforms, Variscite transforms clients’ visions into successful products.   Learn more about Variscite, visit www.variscite.com    

On behalf of Gopise Yuan. This is a debugging patch for adding support for showing interrupt status (same as ‘cat /proc/interrupts’) in Sysrq. Can be triggered by “y”. Might be useful for debugging some hang/stuck issue. Note: Only for debugging purpose. Triggering it in normal case may throttle current cpu and cause IPC/RCU abnormal due to long printing to console.

i.MX8MP and i.MX95 both support USB3.0. In EVK board, USB download pin is USB3.0 with Type-C.  While in other boards, they may delete CC logic design PTN5110, or use USB2.0 signals instead. This document describes how to modify U-Boot to support a design without PTN5110 when using the uuu tool to download.

Hello Community, Freescale’s MFG Tool Updated for Windows Embedded Compact and i.MX6 Platform TES Electronic Solutions (India) Private Limited has updated Freescale MFG tool for Windows Embedded Compact (7/2013) The Tool is tested on TES Electronic solution’s “MAGIK2 Evaluation Board” And Freescale’s “Saber SD” Evaluation Board www.tes-dst.com Thanks, Misbah

System Manager configuration via Config tools for i.MX. Create a new project, modify, view or edit available resources for your specific core. What will you learn How to create a new System Manager project Viewing and managing resources Creating and assigning templates Configuration of System Manager Tip: you can skip to a specific chapter   Introduction   New System Manager project     System Manager views   System Manager templates   Assigning a resource   Creating custom template   Exporting code     Download the tools here: https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX   https://www.nxp.com/products/i.MX95

Overview The purpose of this document is to provide guidance for FlexIO 8080 display capability. Generally, the 8080 bus interface consists of one chip-select line (CS), one writing-latch line (WR), one reading-latch line (RD), one data/command-select line (RS, also called D/C), and 8 or 16 bidirectional data lines (Data Bus). Since The FlexIO instance of i.MX 943 support only 16 pins, the demo can only support 8 bit 8080 mode(two pin should be used as WR and RD signal.   Below are pins used in the 8 bit 8080 display. Panel Setup The panel in the example is X-LCD-PAR-S035. To use 8 bit 8080 mode, need ser IM[2:0] to be 011. Connection and Software i.MX 943 Need pull down SPI8_SEL1 and SPI8_SEL3 of PCA6416 in SW to select Arduino for 8080 pins D[7:4]. Here is the patch for system manager. For quick verification, use flash_m70 when building bootloader. diff --git a/configs/mx94evk.cfg b/configs/mx94evk.cfg index 9d46976..90bf089 100755 --- a/configs/mx94evk.cfg +++ b/configs/mx94evk.cfg @@ -499,6 +499,9 @@ ENC_PLL OWNER ENDAT2_1 OWNER ENDAT2_2 OWNER ENDAT3_1 OWNER +GPIO2 OWNER +GPIO3 OWNER +FLEXIO1 OWNER FLEXIO3 OWNER FLEXIO4 OWNER FLEXPWM1 OWNER @@ -515,6 +518,7 @@ HIPERFACE_SAFE1_2 OWNER HIPERFACE_SAFE2_1 OWNER HIPERFACE_SAFE2_2 OWNER IRQSTEER_M7_0 OWNER +LPI2C6 OWNER LPIT1 OWNER LPTMR1 OWNER LPTMR2 OWNER @@ -557,6 +561,25 @@ XBAR_DSC3 OWNER PIN_GPIO_IO24 OWNER PIN_GPIO_IO25 OWNER +# 8080 +PIN_GPIO_IO00 OWNER +PIN_GPIO_IO01 OWNER +PIN_GPIO_IO02 OWNER +PIN_GPIO_IO03 OWNER +PIN_GPIO_IO08 OWNER +PIN_GPIO_IO09 OWNER +PIN_GPIO_IO10 OWNER +PIN_GPIO_IO11 OWNER +PIN_GPIO_IO12 OWNER +PIN_GPIO_IO13 OWNER +PIN_GPIO_IO14 OWNER +PIN_GPIO_IO15 OWNER +PIN_GPIO_IO38 OWNER + +# I2C6 +PIN_GPIO_IO28 OWNER   Attached imx943_flexio_8080_8bit.zip is patch for m70 demo based on SDK_25_06_00_MCIMX943-EVK.   i.MX 93 Need pull up EXP_SEL(pin4 R4) of ADP5585 in SW to route some pins. Attached imx93_flexio_8080_8bit.zip is patch for m33 demo based on SDK_25_06_00_MCIMX93-EVK. The running status is similar as i.MX943.

We are pleased to announce that Config Tools for i.MX v25.03 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) • Output Paths Overrides for toolchain project is fixed. • "Filter source files" search bar with case-sensitive checkbox is removed. • TEE – Sort for Peripheral Configurations table is added. DDR tool (part of Config tools for i.MX 25.03😞 [MX91] Added 1Gb and 2Gb DRAM configurations in the GUI. [MX9x] Enhanced Diagnostic tests to display DBI lane when DBI is enabled. [MX95][FW2024.09] Optimized PLL settings. [MX95][FW2024.09] Included missing registers in the retention list. [Mscale] Added a temperature derating GUI option for devices with LP4. [8MP] Updated PMIC configuration to correctly set 1.2V for 8M-Plus. [8MN] Improved board bus configuration. Enabled maximum number of available frequencies setpoints for all supported devices. Added EVK default configuration for all supported devices.

On behalf of Gopise Yuan. This is a patch to fix USB plug/unplug event detection failure issue on ChipIdea IP under corner case.

  1) Remove all "network" parameter from .../ltib-dir/rootfs/rc.d/rc.conf 2) Add the path of rootfs in the /etc/exports file: /home/user/ltib"dir/rootfs/rootfs *(rw,sync,no_root_squash)   then execute :- #exportfs -ra 3) Execute NFS server /etc/init.d/nfs restart  

Apply this patch into the LTIB folder.

Hi, I have a custom board with lcd of 18bit rgb color, and 240x320 resolution. OS is Android. DDMS command of Android SDK captured screen, and ddm_screenscapture-2014-07-08.png outputed. The gralloc library supported 240x320 for DDMS ? LCD display is work (20140708.jpg). logcat I/imx5x.gralloc( 2207): id       = DISP3 BG I/imx5x.gralloc( 2207): xres     = 240 px I/imx5x.gralloc( 2207): yres     = 320 px I/imx5x.gralloc( 2207): xres_virtual = 256 px I/imx5x.gralloc( 2207): yres_virtual = 1152 px I/imx5x.gralloc( 2207): bpp      = 16 I/imx5x.gralloc( 2207): r        = 11:5 I/imx5x.gralloc( 2207): g        =  5:6 I/imx5x.gralloc( 2207): b        =  0:5 I/imx5x.gralloc( 2207): width    = 38 mm (160.421051 dpi) I/imx5x.gralloc( 2207): height   = 51 mm (159.372543 dpi) I/imx5x.gralloc( 2207): refresh rate = 59.71 Hz I/FslOverlay( 2207): /dev/graphics/fb0 fb_var: bits_per_pixel 16,xres 240,yres 320,xres_virtual 256,yres_virtual 1152 Best Regards, Masaki Hayakawa.

1) nfs I burn the uboot to board by mfgtool, then starting the kernel by nfs, when the board boot up, I set a) ipaddr and b)serverip, then I set the c)"setenv nfsroot /home/usuario/fsl-release-bsp/buildimx6q/tmp/work/imx6qsabresd-poky-linux-gnueabi/fsl-image-gui/1.0-r0/rootfs", this is sample, you need choose correct folder for yours, this is for imx6q, d) set the mdt file,then run the netboot. 2) program uboot to the qspi, then boot from SD card 3) change the mfgtool to program uboot, kernel to the qspi attched the ucl2.xml setenv bootcmd 'run bootargsset; sf probe; sf read ${loadaddr} 0xA00000 0x600000; sf read ${fdt_addr} 0x800000 0x10000; bootz ${loadaddr} - ${fdt_addr}'

The i.MX27 PDK, with Smart Speed™ technology, is a completely integrated hardware and software solution designed to simplify product development so you can focus on the critical differentiation needed for market success. Reduce development time and design products that have power to spare, even when running multiple applications simultaneously. Receive stellar Ethernet and video performance in a system design that dramatically reduces power consumption. Features i.MX27 Applications Processor - ARM9™ 128 MB DDR SDRAM 256 MB NAND FLASH Power Management (PMIC MC13783) + Power Circuitry Audio HS USB PHY Touch Controller 10/100 Ethernet port Accelerometer MMA7450L (Freescale) User I/O Connectivity (FM, 802.11, Bluetooth, USB OTG, USB HS) Button 2.7" TFT Display 2MP Camera Module SD card, ATA HDD External Connectors (dock, headphones, TV out, GPS) Microphone Speaker Debug Ethernet Port Debug Serial Port JTAG Reset, Interrupt, Boot Switches Debug LEDs CodeTest Interface Power Source Current/Power Monitoring

Make boot SD Card for imx-android-r13.4-20121128 1. Extract imx-android-r13.4-20121128 2. Check mount device  @Disk Util     My case SD Card : /dev/sdb 3. Insert the uSD Card    Use 16GByte SD Card Cat10 4. Android/imx-android-r13.4-20121128$./device/boundary/mksdcard.sh /dev/sdb 5. Wait about 5 minutes. Finish!

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345307 

ATK (Advanced Toolkit) ATK (Advanced Toolkit) is a Windows software for programming the flash memory of i.MX boards. Using ATK This section will describe the procedure to erase the flash memory and program the bootloader. 1 - Connect a serial cable between PC and i.MX board. 2 - Some hardware configurations (switches) must be done to flash the board.   Set SW2 switch as below: Switch SW2 -> 11111 3 - Run ATK going to Start -> Programs -> AdvancedToolKit -> AdvancedToolKit   Set the options:   Device memory -> DDR; Custom Initial File -> (keep it unmarked)   Communication Channel -> Serial Port (Usually COM1) 4 - Click on Flash Tools to erase, program or dump the the flash memory and click GO h4> Flash Programming The next step is to program the bootloader image into the board's Flash following the steps below. 1 - Select the parameters as shown in the figure below and press Program. The bootloader binary image file can be found into your Board Support Package Set Program, NOR Spansion 2 - Add it on Image File field and press Program. 3 - Close ATK, turn off the board and set switch back as shown in the picture below. Set SW2 switch as below: Switch SW2 -> 11010 Installing ATK on Linux Download ATK: Download. Extract ATK: # unzip ATK_1_41_STD_installer.zip Execute the default install process: # wine SETUP.EXE Get mfc42.dll and msvcp60.dll from a Windows Machine (C:\Windows\System32) and copy to wine system32 (/root/.wine/drive_c/windows/system32) Run ATK: # wine ADSToolkit_std.exe

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-344779 

On L4.1.15 BSP, PWM output clock may be not stable, for example, it may switch between 200KHz and 50KHz. PWM clock source is perclk, in running mode, perclk is 24MHz, while in low power idle mode, perclk is reduced to 6MHz, so PWM output clock is reduced to 1/4. To keep PWM output stable clock, we should let perclk stay in 24MHz in low power idle mode. Attached is the patch for 6UL and 6ULL.