As part of the patches attached with this blog, we will relay the pcie write transaction from Endpoint-A to Endpoint-B connected to iMX95FRDM PRO.   Linux-imx used - lf-6.18.2-1.0.0 Attached are the following files:-   imx95-19x19-frdm-pro-pcie0-ep-dtbs - EP A shall use the dtb built with this dtbs imx95-19x19-frdm-pro-pcie1-ep-dtbs - EP B shall use the dtb built with this dtbs rc_pcie_dma_relay.c - driver used on RC to relay pcie write from EP-A to EP-B conf_pcie0.sh - script to be executed on Endpoints A and B to configure the EPF driver //To build the dtb and relay kernel driver 1. git clone  git clone https://github.com/nxp-imx/linux-imx.git git checkout origin/lf-6.18.y 2. Copy the dtbs to arch/arm64/boot/dts/freescale/ Copy rc_pcie_dma_relay.c to drivers/pci/   3. Make the following changes as per this diff   diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index aa3cfdf1aafc..56e3db653208 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@@ -1205,6 +1205,16 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-frdm-8mic-reve.dt    dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-frdm-pro.dtb imx95-19x19-frdm-pro-aud-hat.dtb   + +dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-frdm-pro-pcie0-ep.dtb +dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-frdm-pro-pcie1-ep.dtb + +imx95-19x19-frdm-pro-pcie0-ep-dtbs := imx95-19x19-frdm-pro.dtb \ +                      imx95-19x19-frdm-pro-pcie0-ep.dtbo + +imx95-19x19-frdm-pro-pcie1-ep-dtbs := imx95-19x19-frdm-pro.dtb \ +                      imx95-19x19-frdm-pro-pcie1-ep.dtbo +  imx95-19x19-frdm-pro-os08a20-isp-dtbs := imx95-19x19-frdm-pro.dtb \                                          imx95-19x19-frdm-pro-os08a20.dtbo  dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-frdm-pro-os08a20-isp.dtb     4. Add the following to drivers/pci/Makefile +obj-m      += rc_pcie_dma_relay.o   5. Trigger the kernel build. You will obtain rc_pcie_dma_relay.ko, imx95-19x19-frdm-pro-pcie0-ep.dtb and imx95-19x19-frdm-pro-pcie1-ep.dtb. 6. We are only using pcie0 M.2 Key M slots of Endpoint A and Endpoint B so you only need to upload this dtb to both the endpoint boards - imx95-19x19-frdm-pro-pcie0-ep.dtb and boot linux with it after passing 'iommu.passthrough=1' at uboot mmcargs. This is to disable smmu for our tests. RC will boot with the default dtb - imx95-19x19-frdm-pro.dtb 7. Connect the Endpoint-A to RC's K1 via M.2 Key M to Key M cable. Similarly connect the other Endpoint-B to other RC's K2 M.2 slot via Key M to Key M cable. 8. Execute this script on both the endpoints - ./conf_pcie0.sh 9. Then reboot the RC iMX95 FRDM Pro and ensure that you see both the endpoints:-   0000:01:00.0 and 0001:01:00.0 are the enumerated endpoints. 10. Upload rc_pcie_dma_relay.ko to the RC board and insert it like this:-  insmod rc_pcie_dma_relay.ko src_phys=0x910100000 dst_phys=0xa10100000 relay_len=0x100000 chunk_len=0x10000 you will observe similar logs on dmesg:-   [ 4949.082087] rc_pcie_dma_relay: init src=0x910100000 dst=0xa10100000 len=1048576 chunk=65536 [ 4949.082150] rc_pcie_dma_relay src_before: [0]=0xdeadbeef [1]=0xdeadbeef [2]=0xdeadbeef [3]=0xdeadbeef [ 4949.082171] rc_pcie_dma_relay dst_before: [0]=0x00000000 [1]=0x00000000 [2]=0x00000000 [3]=0x00000000 [ 4949.125779] rc_pcie_dma_relay dst_zeroed: [0]=0x00000000 [1]=0x00000000 [2]=0x00000000 [3]=0x00000000 [ 4949.141380] rc_pcie_dma_relay src_after: [0]=0xdeadbeef [1]=0xdeadbeef [2]=0xdeadbeef [3]=0xdeadbeef [ 4949.141427] rc_pcie_dma_relay dst_after: [0]=0xdeadbeef [1]=0xdeadbeef [2]=0xdeadbeef [3]=0xdeadbeef [ 4954.272981] rc_pcie_dma_relay: verify OK for 1048576 bytes [ 4954.273000] rc_pcie_dma_relay: DMA relay verify PASSED   11. Finally, via devmem5 on RC, you can verify the data of EP-A transferred to EP-B  ./devmem5 r 0xa10100000 w  

ltib 编译的 解码插件包，官网比较难找到的。

Support SSI Master function based on 0001_SSI_ASRC_P2P.patch

Question: What does it means by depending on load? Is there a value? This is  related with i.MX6D Answer: The comment about the "load" means the total system load on the 2.5V rail. We understand that people design systems, not just MX6 devices. The documentation confusion stems from the design team changing from allowing customers to use the LDOs to power system devices back to just using the LDOs to power the MX6. Reasons - thermals, and also concern for uncontrolled system noise injection into the MX6 and causing failures.

i.MX6UL OBDS test image

Poring from MCIMX6Y2CVM05AB to MCIMX6Y1DVM05AB Backgroud: Our customers encounter Kernel stuck at starting kernel issue. Here is detail description as below: (1 )Using customer board, and the main chip is MCIMX6Y1DVM05AB. (2) MCIMX6Y2CVM05AB works fine using the same image. (3)The kernel version is L5.10.52. But the old L4.14.98 works fine. (4)Using imx6ull evk's dtb has the same symptom. (imx6ull-14x14-evk.dtb in L5.10.52 prebuild image from NXP. (5)The  L4.14.98 versionBSP both  MCIMX6Y1DVM05AB and MCIMX6Y2CVM05AB can work well For the L5.10.52 only the MCIMX6Y2CVM05AB can work​. Kernel crash at here:   Generally speaking, most customer need to porting from old chip to new, for this customer need to use porting from the new product to old products they have their reasons.     Two reasons: (1) Their previous project use MCIMX6Y1DVM05AB. And also have MCIMX6Y1DVM05AB stock. (2) And the customer needs 15kpcs for urgent demand. But there is no MCIMX6Y2CVM05AB stock in their city.​ Porting steps: For these two products, they are difference, but most pins to pins in design. 1\Found the difference for this two product: See the datasheet: https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLCEC.pdf https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLIEC.pdf     For the MCIMX6Y1DVM05AB do not have the LCD/CSI, one CAN, one Ethernet,one ADC.   2\Check the customer’s board dts setting and modify Ask customer for their Board dts file and check: The MCIMX6Y1DVM05AB chip has only followed features, so customer should make sure the related drivers are removed from dts. That means in climaxL5.10.52.7z, customer should disable the followed drivers: pxp, lcdif, can2. (csi and fec2 are already disabled) (1) Disable the fec2   (2)CSI disable   (3)Lcdif disable   (4)CAN 2 Remove     Result: After remove these unused functions. The MCIMX6Y1DVM05AB could boot well on customer’s board. If customer use the MCIMX6Y2CVM05AB, all these functions need to add.  

Attached is a chunk of the Filesystem needed to construct the Linux Image https://community.freescale.com/docs/DOC-93887

The purpose of this document is to provide extended guidance for selection of compatible Non-Volatile Memory (NVM) devices that are supported by the Ara240 (aka Ara-2) processors. In all cases, it is strongly recommended to follow the memory layout guidelines outlined in the specific SoC requirement documents.   Manufacturer Memory Part Number Capacity Renesas NOR SPI FLASH AT25SL321-UUE-T 32Mbit (4MB) ISSI NOR SPI FLASH IS25WJ032F-JTLE-TR 32Mbit (4MB) ISSI NOR SPI FLASH IS25WP032D-JBLE 32Mbit (4MB) Winbond NOR SPI FLASH W25Q16JVSNIQ 16Mbit (2MB) Winbond NOR SPI FLASH W25Q32JWUUIQ 32Mbit (4MB) Winbond NOR SPI FLASH W25Q64JWSSIQ 64Mbit (8MB) XMC NOR SPI FLASH XM25LU64CVIQT 64Mbit (8MB)   Note 1: All memory parts are in production unless stated otherwise. Checked June 2026

Some customer need to run Zephyr on i.MX8QXP CM4, but there is no support on Zephyr mainline(v4.3.0) This article will share the porting based on Zephyr v4.3.0. For i.MX8QM CM4, please refer this link: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8QM-CM4-0-support-on-Zephyr-v4-3-0/ta-p/2296962   samples/hello_world/ samples/synchronization Add pd_ignore_unused in bootargs before entering Linux. For the OpenAMP communication, need to refer this Zephyr application. https://github.com/nxp-real-time-edge-sw/heterogeneous-multicore/blob/main/apps/rpmsg_str_echo/zephyr/main.c

Attached is a chunk of the filesystem for the Linux Image https://community.freescale.com/docs/DOC-93887

since we have already released the patch for 3.10, this patch is for kernel 3.14

HI, I want to build an Ubuntu Linux operating system with LTIB, but from the user guide the host system is Ubuntu 9.04, but we can't use 'apt-get install' any package due to there are no source lists. What should we do next? Thank you!

One chunk of the file system for the Linux Image i.MX 6Dual/6Quad Power Consumption Measurement Linux Image

Patch for i.MX6 boards with LPDDR2 using single channel

Fix cdc_ether connection over usb0 stalls and cannot recover after transmitting few MByte data The patch is modified from ENGR00278073.

Attached is a chunk of the Filesystem needed to construct the Linux Image https://community.freescale.com/docs/DOC-93887

Attached is a chunk of the filesystem for the Linux Image https://community.freescale.com/docs/DOC-93887

Attached is a chunk of the Filesystem needed to construct the Linux Image https://community.freescale.com/docs/DOC-93887

Purpose: Introduce how to debug M4 using trace 32 and the difference with regular debug mode for imx6sx. If you are using other jtag debug tools, maybe you need to do the similar configuration. Debug tools: Trace32 – you can refer to http://www.lauterbach.cn/ for more information about this tool.

Background: This article discusses the reboot mechanism on the i.MX8MP and i.MX93 platforms. It aims to help customers understand how the reboot command works. We will discuss two different kernel versions separately.   1. Linux version : LF_6.12.34_2.1.0 The executable file for the reboot command is as follows： When the ”reboot“ command is executed, the system enters the ”do_kernel_restart()“ function and executes the reboot mechanism by determining the priority of the registered functions. Since the ”reboot.c“ file does not print out the registered functions, a print function is added to the file to identify the function that is ultimately executed.   The print output is as follows: As shown in the figure above, in version 5.12, the reboot is performed via a reset executed by psci. Continuing to trace the ”psci_sys_reset()“ function, we can see that the system sends the function ID via the PSCI interface to initiate an SMC call, instructing the underlying firmware (ATF/EL3) to perform a system reboot (typically a cold reset). The value of PSCI_0_2_FN_SYSTEM_RESET is 0x80000009   According to the Arm Power State Coordination Interface Platform Design Document, this ID represents a cold reset of the system.     2. Linux version : LF_6.18.2_1.0.0 Use the same debugging method to examine the reboot mechanism in version 6.18 As shown in the output below, in version 6.18, the system reset is triggered by the `sys_off_notify()` function. The final execution function is pca9450_i2c_restart_handler()   By examining the `pca9450_i2c_restart_handler()` function, we can see that the system writes a `SW_RST_COMMAND` value to the PMIC via I²C, where `SW_RST_COMMAND = 0x14`. According to the PMIC data sheet, 10b = Cold Reset; all voltage regulators are reset except LDO1/LDO2   Summary: Regardless of the kernel version, the `reboot` command triggers a system cold reset. The triggering mechanism has been updated in versions 6.18 and later.