Some customer need to config different I2C bus for their PMIC in DDR test period. There is a simple method can complete this, that is NXP DDR Config Tool. The tool download link is below: https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX I'm going to use the i.MX 93 EVK board here as a demonstration. On i.MX 93 EVK board, the default PMIC I2C Bus is I2C2, I will show you how to change I2C2 to I2C1, the other i2c bus is same.  Step 1 : Rework the board and make sure the PMIC is connected to I2C1. Remove R714 R715, connnect I2C1_SCL(C20) to U701 pin 41  and I2C1_SDA(C21) tp U701 pin 42. Step 2 : Setup I2C1 PinMux: Config Tool UI:   Advance -> IOMUX config   Command:           Address                Size               Value memory   set     0x443c0170            32                   0x10 memory   set     0x443c0174            32                   0x10 memory   set     0x443c0320            32                   0x40000b9e memory   set     0x443c0324            32                   0x40000b9e Step 3 : Set PMIC VDDQ as 1.1 V Config Tool UI:   Advance -> Custom PMIC initialization enabled   #  PMIC commands        Value 0         pmic_cfg             0x0025       /*I2C bus 1,  PMIC address 0x25 */ (0 for I2C1, 1 for I2C2, 2 for I2C3, 3 for I2c4 …) 1         pmic_set             0x0C29       /* BUCKxOUT_DVS0/1, preset_buck1=0.8V, preset_buck2=0.7V, preset_buck3=0.8V PCA9451_BUCK123_DVS, 0x29 */ 2         pmic_set             0x1118      /*  BUCK1OUT_DVS0=0.9V   PCA9451_BUCK1OUT_DVS0, 0x18 */ 3         pmic_set             0x1718      /*  BUCK3OUT_DVS0=0.9V   PCA9451_BUCK3OUT_DVS0, 0x18 */ 4         pmic_set             0x1428      /*  Set VDDQ to 1.1V  PCA9451_BUCK2OUT_DVS0, 0x28  */ PS : About pmic register, The first two bytes are the register address and the next two bytes are the register setting. Step 4 : Run the DDR "Firmware init test" and see the test result. The success log is as follows: DEBUG memtool.comm.serial_channel ==================hardware_init======================= DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel Power up ddr... DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel DDRMIX power on done... DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel DDRPHY coldreset... DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel ********Found PMIC PCA945X********** DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel Set VDDQ to 1.1V for LPDDR4 DEBUG memtool.comm.serial_channel DEBUG memtool.comm.serial_channel ==================hardware_init exit==================    

  For some applications, we need to reduce the CPU Frequency, but if you are not familiar with our BSP or our devices probably you need some help to do some configurations.   In this post, I will share the configuration to set up lower frequencies (100MHz, 200MHz, 400Mhz, 600MHz, 800MHz, and 1000MHz) on iMX8MP, iMX8MN, and iMX8MM.   Note: Works on Kernel 6.1.xx (not tested on oldest BSP)   1- We have to modify the PLL driver to set the proper parameters to lower frequencies. The file to modify is "clk-pll14xx.c" adding the following lines:   https://github.com/nxp-imx/linux-imx/blob/770c5fe2c1d1529fae21b7043911cd50c6cf087e/drivers/clk/imx/clk-pll14xx.c#L57   static const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = { PLL_1416X_RATE(1800000000U, 225, 3, 0), PLL_1416X_RATE(1600000000U, 200, 3, 0), PLL_1416X_RATE(1500000000U, 375, 3, 1), PLL_1416X_RATE(1400000000U, 350, 3, 1), PLL_1416X_RATE(1200000000U, 300, 3, 1), PLL_1416X_RATE(1000000000U, 250, 3, 1), PLL_1416X_RATE(800000000U, 200, 3, 1), PLL_1416X_RATE(750000000U, 250, 2, 2), PLL_1416X_RATE(700000000U, 350, 3, 2), PLL_1416X_RATE(600000000U, 300, 3, 2), + PLL_1416X_RATE(400000000U, 200, 3, 2), + PLL_1416X_RATE(200000000U, 200, 3, 3), + PLL_1416X_RATE(100000000U, 200, 3, 4), };   2- Once the pll driver has been modified, only we have to add the values on the opp-table according to the device that you will use.   2.1- For iMX 8MP:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mp.dtsi         a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.2 For iMX8MM:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm.dtsi     a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.3- For iMX8MN:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mn.dtsi   compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <850000>;   After that, you should note the changes under Linux.   These commands return information about the system and the current settings.   • The kernel is pre-configured to support only certain frequencies. The list of frequencies currently supported can be obtained from: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies   • To get the available scaling governors: cat /sys/devices/system/cpu/*/cpufreq/scaling_available_governors   • To check the current CPU frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_cur_freq   The frequency is displayed depending on the governor set.   • To check the maximum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_max_freq   • To check the minimum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_min_freq   These commands set a constant CPU frequency:   • Use the maximum frequency: echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • Use the current frequency to be the constant frequency: echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • The following two commands set the scaling governor to a specified frequency, if that frequency is supported.   If the frequency is not supported, the closest supported frequency is used:   echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor echo <frequency> > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed    

this is tested with MX93(A1) EVK running 6.1.55_2.2.0 pre-build image.   USB can output test patterns with either one of the setup below: 1. through device node: root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# cat role gadget root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# echo host > role [ 2672.864083] ci_hdrc ci_hdrc.0: EHCI Host Controller [ 2672.868996] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 [ 2672.893320] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00 [ 2672.899314] hub 1-0:1.0: USB hub found [ 2672.909235] hub 1-0:1.0: 1 port detected root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# cat role host root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# echo 4 > port_test root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# echo 3 > port_test root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# echo 2 > port_test root@imx93evk:/sys/kernel/debug/usb/ci_hdrc.0# echo 1 > port_test   2. use memtool to program registers for i in $(find /sys -name control | grep usb);do echo on > $i;echo "echo on > $i";done; echo host > /sys/kernel/debug/usb/ci_hdrc.0/role #Offset:184h USB_OTG1 base address: 4C10_0000h base address USB_OTG2 base address: 4C20_0000h Register address Register address：base address+offset $ /unit_tests/memtool 0x4c100184 1 # Force to output Test Packet for Eye Diagram Test $ /unit_tests/memtool 0x4c100184=0x18041215 #Force to output J_STATE $ /unit_tests/memtool 0x4c100184=0x18011215 #Force to output K_STATE $ /unit_tests/memtool 0x4c100184=0x18021215 #Force to output SE0 (host) / NAK (device) $ /unit_tests/memtool 0x4c100184=0x18031215

Hey everyone !! This piece covers how to configure the iMX93EVK board to wake up Cortex A55[ running Linux] from Cortex M33 core[running a bare metal application].    We will be using UART console on Cortex M33 to signal Cortex A55 via RPMSG to wake-up from deep sleep.   This can be done as follows:-   1. Boot iMX93EVK with RPMSG enabled DTB and load M33 binary via UBOOT   After booting to Uboot terminal, set the fdtfile variable to <rpmsg dtb> that will help us enable rpmsg in the kernel.   u-boot=> setenv fdtfile imx93-11x11-evk-rpmsg.dtb u-boot=> setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot}   then, load the M33 binary from the eMMC partition    u-boot=> fatload mmc 0:1 0x80000000 imx93-11x11-evk_m33_TCM_power_mode_switch.bin 18996 bytes read in 14 ms (1.3 MiB/s)   u-boot=> cp.b 0x80000000 0x201e0000 0x4a34 u-boot=> saveenv Note:-  Do not run the M33 core via bootaux at this point, instead just boot to Linux   u-boot=> boot         2. Starting the Cortex M33 core from Cortex A55[running Linux]   Once linux is up, load the elf of Cortex M33 power mode switch application.   echo ~/power_mode_switch.elf > /sys/devices/platform/imx93-cm33/remoteproc/remoteproc0/firmware   start the M33 core   echo start > /sys/devices/platform/imx93-cm33/remoteproc/remoteproc0/state   On console of Cortex M33 you will see the output as below:-   The log below shows the output of the power mode switch demo in the terminal window: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Start SRTM communication Task 1 is working now #################### Power Mode Switch Task #################### Build Time: Nov 10 2023--15:15:16 Core Clock: 200000000Hz Select the desired operation Press A to enter: Normal RUN mode Press B to enter: WAIT mode Press C to enter: STOP mode Press D to enter: SUSPEND mode Press W to wakeup A55 core Press M for switch M33 Root Clock frequency between OD/ND. Waiting for power mode select.. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   M33 at this point is ready to wake up the A55 core.     3. Put A55 core to deep sleep and trigger a wakeup from M33 console   To put A55 to deep sleep   echo mem > /sys/power/state you will see something like below on linux console:-     At this point, A55 core is in deep sleep power saving mode. So the A55 console will not respond to any of the key presses. Go on, give it a try 🙂   Now to wake up this core, go to M33 serial console and type 'W'  This will wake up A55 core and you will see the logs denoting that the core has woken up:-   That's it! that's how you exercise UART wake-up functionality on imx93evk. Please feel free to drop any follow-up questions or additional thoughts on this.

This article introduces the overall functionality of i.MX8X security. Simulate the process of i.MX8X signature through OpenSSL provides readers with a deeper understanding of this process.   Because lots of limitation for attachments. Have to do following.  1. download                       T4549-i.MX8X security overview and AHAB deep dive.zip.001.zip                      T4549-i.MX8X security overview and AHAB deep dive.zip.002.zip                      T4549-i.MX8X security overview and AHAB deep dive.zip.003.zip 2. decompress                T4549-i.MX8X security overview and AHAB deep dive.zip.001.zip                T4549-i.MX8X security overview and AHAB deep dive.zip.002.zip                T4549-i.MX8X security overview and AHAB deep dive.zip.003.zip 3. Put together and decompress         T4549-i.MX8X security overview and AHAB deep dive.zip.001    T4549-i.MX8X security overview and AHAB deep dive.zip.002    T4549-i.MX8X security overview and AHAB deep dive.zip.003  

  Environment i.MX8MP EVK, SDK2.15   The default rpmsg buffer size in SDK is 512Bytes(16 Bytes header + 496Bytes payload). This knowledge base will try to change the default buffer size in rpmsg framework. Steps:   1.Modify rpmsg payload size in SDK PATH: SDK\evkmimx8mp_rpmsg_lite_str_echo_rtos_imxcm7\rpmsg_config.h     //! RL_BUFFER_PAYLOAD_SIZE //! //! Size of the buffer payload, it must be equal to (240, 496, 1008, ...) //! [2^n - 16]. Ensure the same value is defined on both sides of rpmsg //! communication. The default value is 496U. #define RL_BUFFER_PAYLOAD_SIZE (1008)     2. Modify buffer size in rpmsg linux framework and buffer pool in dts. PATH: drivers/rpmsg/virtio_rpmsg_bus.c            arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts   Test steps:   Modify the send buffer in imx_rpmsg_tty.c     #define MSG "hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world! hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world! hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!"       Modify buffer limitation in SDK PATH: evkmimx8mp_rpmsg_lite_str_echo_rtos_imxcm7\main_remote.c     /* Globals */ static char app_buf[1024]; /* Each RPMSG buffer can carry less than 512 payload */       Terminal output We can see that the MAX buffer size received in SDK is not limited to 512Bytes     Nameservice sent, ready for incoming messages... Get Message From Master Side : "hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world! hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world! hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!hello world!" [len : 674]       If we use a larger buffer like 2022 Bytes, we will see error when driver load.     [ 2673.447384] imx_rpmsg_tty virtio0.rpmsg-virtual-tty-channel-1.-1.30: message is too big (2022) [ 2673.456271] imx_rpmsg_tty virtio0.rpmsg-virtual-tty-channel-1.-1.30: rpmsg_send failed: -90 [ 2673.465556] imx_rpmsg_tty virtio0.rpmsg-virtual-tty-channel-1.-1.30: rpmsg_dev_probe: failed: -90 [ 2673.474496] imx_rpmsg_tty: probe of virtio0.rpmsg-virtual-tty-channel-1.-1.30 failed with error -90          

Hardware i.MX 93 EVK​ TFT LCD 480x272 RGB888 (NV3047E, parallel)​ Condition A55 off​ DDR self-refresh​ OCRAM for framebuffer, TCM for code/data​ LCDIF on with parallel interface​ M33 update panel content each second​ 255KB single frame buffer(RGB565) (fit in OCRAM: 0x20480000 ~ 0x204DFFFF)​ Code Bitbucket：ssh://[email protected]/mpucnse/imx93-cm33-usecase.git​ Branch: imx93_sdk_2.14.1-lcd_on_ocram​ Demo code: imx93-cm33-usecase/boards/mcimx93evk/demo_apps/lcd_on_ocram​ DTS: imx93-cm33-usecase/boards/mcimx93evk/demo_apps/lcd_on_ocram/dts​ Working Flow   ​Test Flow In uboot console,​ setenv mmcargs $mmcargs clk-imx93.mcore_booted​ setenv fdtfile imx93-11x11-evk-lcd_panel.dtb​ fatload mmc 1:1 0x80000000 sdk20-app.bin;cp.b 0x80000000 0x201e0000 0x10000;bootaux 0x1ffe0000 0​ boot​ In kernel console,​ echo mem > /sys/power/state​ start the power test Power Consumption SoC power: 94.4mW​ [email protected]​ CM33@100MHz​ CM33@100MHz​ A55 suspend​ DDR retention​ WAKEUPMIX off​ NICMIX and MEDIAMIX on​  ​  

Usually, device tree source files are not a signal pure dts file. It could include dtsi, dts or C code heads .h files. Need C compiler finish the pre-compile to a pure dts file first. It is integrated inside the like Linux build system(Makefile, etc.). This document shows the original way to compile device tree. This document will show compile device tree under windows.    

Board : i.MX93 EVK BSP: imx L6.1.1-1.0.0 Gui guider: 1.6.1   We have a GUI software tool called GUI Guider. It is a user-friendly graphical user interface development tool from NXP that enables the rapid development of high quality displays with the open-source LVGL graphics library. The GUI demo can run on the i.MX93EVK board. (https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER)   This document will show you an example how the buttons(gpio) on the EVK to interacting with the GUI. Basically, customer could use the same method to use the gpio pins to control everything.   On the i.MX93 EVK board, there are two buttons BTN1 and BTN2. They are connected to GPIO IO23 and GPIO IO24. Below is the schematic.    Buttons on the board.      SW1005 on the board   In the EVK's device tree file, need to change the pinmux for the two buttons like this: pinctrl_spdif: spdifgrp { fsl,pins = < // MX93_PAD_GPIO_IO22__SPDIF_IN 0x31e // MX93_PAD_GPIO_IO23__SPDIF_OUT 0x31e MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e MX93_PAD_GPIO_IO24__GPIO2_IO24 0x31e >; note: all the pins are defined in imx93-pinfunc.h.   For getting the input value of the buttons in user's space, I use the sysfs gpio. Build the imx-image-multimedia image first and then select the GPIO_SYSFS in kernel's menuconfig.   $ DISTRO=fsl-imx-xwayland MACHINE=imx93evk source imx-setup-release.sh -b build-xwayland $ bitbake imx-image-multimedia   After the build completed, go to the kernel's menuconfig to select the GPIO sysfs. $ bitbake linux-imx -c menuconfig [*] General setup-> Configure standard kernel features (expert users) [*] Device Drivers->GPIO Support-> /sys/class/gpio/... (sysfs interface)   Build the whole image again by "$ bitbake imx-image-multimedia".   Using the UUU to program the image to the EMMC on the EVK board. uuu -b emmc_all imx-image-multimedia-imx93evk.rootfs.wic.zst   Connect the LVDS to the board. Use the corresponding dtb to boot the board. In u-boot, set the dtb file. => setenv fdtfile imx93-11x11-evk-boe-wxga-lvds-panel.dtb => saveenv   Then restart the board. After the board boot up, it will look like below.     You need to calibrate the LVDS touch screen before it can normally use. Please use this command: $ weston-touch-calibrator LVDS-1     Now, build the GUI guider example. I use the Air Conditioner example. Download the GUI guider from the gui-guider web page: https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER   Follow the steps from the below web page to build the i.MX BSP and the gui example code. https://docs.nxp.com/bundle/GUIGUIDERUG-1.6.1/page/topics/yocto.html   After the gui-guider build completed, use the 'scp' command to transfer the gui_guider executable file to the board. Execute the command on your host PC like this: $ scp bld-imx93evk/tmp/work/armv8a-poky-linux/gui-guider/1.6.0-r0/image/usr/bin/gui_guider root@<Your Board IP address>:/ Note: You could use a router to connect your board and your host PC. They are on the same network so could use the 'scp' command to transfer the file to your board.   On your board, type the following commands to execute the gui. $ chmod 755 gui_guider $ ./gui_guider &   Then the GUI is running like this:   Now, let me explain how to find out the gpio number. Type the following command to show the mapping addresses of gpio. root@imx93evk:/# cat /sys/kernel/debug/gpio gpiochip3: GPIOs 0-31, parent: platform/47400080.gpio, 47400080.gpio: gpiochip0: GPIOs 32-63, parent: platform/43810080.gpio, 43810080.gpio: gpiochip1: GPIOs 64-95, parent: platform/43820080.gpio, 43820080.gpio: gpio-64 ( |cd ) in hi IRQ ACTIVE LOW gpio-71 ( |regulator-usdhc2 ) out lo gpiochip2: GPIOs 96-127, parent: platform/43830080.gpio, 43830080.gpio: gpiochip6: GPIOs 472-477, parent: i2c/0-001a, wm8962, can sleep: gpiochip5: GPIOs 478-487, parent: platform/adp5585-gpio.1.auto, adp5585-gpio, can sleep: gpio-479 ( |regulator-audio-pwr ) out hi gpio-483 ( |regulator-can2-stby ) out hi ACTIVE LOW gpio-486 ( |enable ) out hi gpiochip4: GPIOs 488-511, parent: i2c/1-0022, 1-0022, can sleep: gpio-492 ( |Headphone detection ) in lo IRQ gpio-501 ( |? ) out hi gpio-502 ( |regulator-vdd-12v ) out hi gpio-505 ( |reset ) out lo gpio-507 ( |? ) out hi gpio-508 ( |reset ) out lo ACTIVE LOW   The gpio pins of two buttons are GPIO2_IO23 and GPIO2_IO24. They are belongs to gpio2. In the imx93.dtsi, the gpio2's address is "gpio2: gpio@43810080". So, base on the information output from "/sys/kernel/debug/gpio", the gpio2 is mapping to "gpiochip0: GPIOs 32-63". So, the GPIO2_IO23 is 32+23=55, and the GPIO2_IO24 is 32+24=56.   To verify the gpio number is correct or not. We could do the following test. root@imx93evk:/# echo 55 > /sys/class/gpio/export root@imx93evk:/# echo in > /sys/class/gpio/gpio55/direction root@imx93evk:/# echo 56 > /sys/class/gpio/export root@imx93evk:/# echo in > /sys/class/gpio/gpio56/direction   Then, run these two commands to check the values. root@imx93evk:/# cat /sys/class/gpio/gpio55/value root@imx93evk:/# cat /sys/class/gpio/gpio55/value   When the button is not pressed, the value is 1. When press the button, the value is 0.  We could add the same in the GUI's custom.c. Open the GUI Guider software and add the code in the custom.c. /********************* * INCLUDES *********************/ #include <stdio.h> #include <stdlib.h> #include <unistd.h> #include <errno.h> #include <fcntl.h> #include "lvgl.h" #include "custom.h" #include "ui_Aircon.h" #include "guider_customer_fonts.h" /********************** * STATIC VARIABLES **********************/ int fdbtn1,fdbtn2,fdgpio; int btn1_pressed; int btn2_pressed; char btn1_value, btn2_value; void custom_func(void) { fdbtn1 = open("/sys/class/gpio/gpio55/value", O_RDWR); fdbtn2 = open("/sys/class/gpio/gpio56/value", O_RDWR); read(fdbtn1, &btn1_value, 1); read(fdbtn2, &btn2_value, 1); if(btn1_value=='0' && btn1_pressed) { btn1_pressed=0; ui_aircon_update_temp(0, kAIRCON_TempUp); } if(btn1_value=='1') btn1_pressed=1; if(btn2_value=='0' && btn2_pressed) { btn2_pressed=0; ui_aircon_update_temp(0, kAIRCON_TempDown); } if(btn2_value=='1') btn2_pressed=1; close(fdbtn1); close(fdbtn2); } void custom_init(lv_ui *ui) { fdbtn1 = open("/sys/class/gpio/gpio55/value", O_WRONLY); if (fdbtn1 == -1) { fdgpio = open("/sys/class/gpio/export", O_WRONLY); write(fdgpio,"55",3); write(fdgpio,"56",3); close(fdgpio); fdgpio = open("/sys/class/gpio/gpio55/direction", O_WRONLY); write(fdgpio,"in",3); close(fdgpio); fdgpio = open("/sys/class/gpio/gpio56/direction", O_WRONLY); write(fdgpio,"in",3); close(fdgpio); } else close(fdbtn1); ... ... ... ...   Add the custom_func() in the custom.h. #ifndef __CUSTOM_H_ #define __CUSTOM_H_ #ifdef __cplusplus extern "C" { #endif #include "gui_guider.h" void custom_init(lv_ui *ui); + void custom_func(void);   Also, need to add the custom function() into the dead loop in main.c.   To modify the code, bld-imx93evk$ vim tmp/work/armv8a-poky-linux/gui-guider/1.6.0-r0/gui-guider-1.6.0/ports/linux/main.c   while(1) { + custom_func(); // <--- Add the custom function here. /* Periodically call the lv_task handler. * It could be done in a timer interrupt or an OS task too.*/ time_till_next = lv_wayland_timer_handler(); #if LV_USE_VIDEO video_play(&guider_ui); #endif /* Run until the last window closes */ if (!lv_wayland_window_is_open(NULL)) { break; }   Re-build the code after modified. bld-imx93evk$ bitbake gui-guider -c compile -f   Build the whole image again. bld-imx93evk$ bitbake gui-guider Then use the 'scp' command to transfer the new gui-guider file to the board.   Finally, you can use the buttons on the EVK board to set the temperature up and down.                          

i.MX93 DDR stress test tool is different with previous i.MX tool. This Chinese article describe how to debug i.MX93 DDR and introduce DDR config tool usage.

test ov5640 with 480p, raw10 via ISP on imx8mp

  Platform & BSP : i.MX8MPlus EVK , L6.12.3， uboot lf_v2024.04   The attachments enable the i.MX8MPlus pci function in uboot. lspci in Linux root@imx8mpevk:~# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. DWC_usb3 / PCIe bridge [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. Device [1b4b:2b42] (rev 11) pci test results in uboot:  u-boot=> pci BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x16c3 0xabcd Bridge device 0x04 01.00.00 0x1b4b 0x2b42 Network controller 0x00 u-boot=> pci bar 00.00.00 ID Base Size Width Type ---------------------------------------------------------- 0 0x0000000018000000 0x0000000000100000 32 MEM u-boot=> pci regions 00 Buses 00-01 # Bus start Phys start Size Flags 0 0x0000000000000000 0x000000001ff80000 0x0000000000010000 io 1 0x0000000018000000 0x0000000018000000 0x0000000007f00000 mem 2 0x0000000040000000 0x0000000040000000 0x0000000016000000 mem sysmem 3 0x0000000058000000 0x0000000058000000 0x00000000a8000000 mem sysmem 4 0x0000000100000000 0x0000000100000000 0x00000000c0000000 mem sysmem u-boot=> pci header 00.00.00 vendor ID = 0x16c3 device ID = 0xabcd command register ID = 0x0007 status register = 0x0010 revision ID = 0x01 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x01 BIST = 0x00 base address 0 = 0x18000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x01 subordinate bus number = 0x01 secondary latency timer = 0x00 IO base = 0x10 IO limit = 0x00 secondary status = 0x0000 memory base = 0x1820 memory limit = 0x1810 prefetch memory base = 0xfff0 prefetch memory limit = 0x0000 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x18100000 interrupt line = 0xff interrupt pin = 0x01 bridge control = 0x0000 u-boot=> pci header 01.00.00 vendor ID = 0x1b4b device ID = 0x2b42 command register ID = 0x0006 status register = 0x0010 revision ID = 0x11 class code = 0x02 (Network controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0x1810000c base address 1 = 0x00000000 base address 2 = 0x1820000c base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0xff interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00

One of the most popular use cases for embedded systems are projects destinated to show information and interact with users. These views are called GUI or Graphic User Interface which are designed to be intuitive, attractive, consistent, and clear. There are many tools that we can use to achieve great GUIs, mostly implemented for platforms such as Web, Android, and iOS. Here, we will need to introduce the concept of framework, basically, it is a set of tools and rules that provides a minimal structure to start with your development. Frameworks usually comes with configuration files, code snippets, files and folders organization helping us to save time and effort. Also, it is important to review the concept of SDK or Software Development Kit which is a set of tools that allows to build software for specific platforms. Usually supplies debugging tools, documentation, libraries, API’s, emulators, and sample code. Flutter is an open-source UI software development kit by Google that help us to create applications with great GUIs on different platforms from a single codebase. Depends on the reference, you can find Flutter defined as a framework or SDK and both are correct, however, an SDK could be a best definition thanks to Flutter supplies a wide and complete package to create an application in which framework is also included. This article is aimed at those that are in a prototyping stage looking for a different tool to develop projects. Also, this article pretends to be a theoretical introduction explaining the most important concepts. However, is a good practice to learn more about reviewing the official documentation from Flutter. (Flutter documentation | Flutter) Here is the structure used throughout this article: What is Flutter? Flutter details Platforms Programming language Official documentation Flutter for embedded systems What is Flutter? Flutter was officially released by Google in December 2018 with a main aim, to give developers a tool to create applications natively compiled for mobile (Android, iOS), web and desktop (Windows, Linux) from a single codebase. It means that as a developer, Flutter will create a structure with minimal code, configuration files, build files for each operating system, manifests, etc. in which we will add our custom code and finally build this code for our preferred OS. For example, we can create an application to review fruit and vegetable information and compile for Android and iOS with the same code. A basic Flutter development process based on my experience looks like the following diagram: Flutter has the following key features: Cross-platform development. Flutter allows the developer to create applications for different platforms using a single codebase. It means that you will not need to recreate the application for each platform you want to support.   Hot-reload. This feature allows the developer to see changes in real time without restarting the whole application, this results in time savings for your project.   High Performance Flutter apps achieve high performance due to the app code is compiled to native ARM code. With this tool no interpreters are involved.   UI Widgets Flutter supplies a set of widgets (UI components such as boxes, inputs text, buttons, etc.) predefined by UI systems guidelines Material on Android and Cupertino for iOS. Source: Material 3 Design Kit | Figma Community Source: Design - Apple Developer   Great community support. This feature could be subjective but, it is useful when we are developing our project find solutions to known issues or report new ones. Because of Flutter is an open source and is widely implemented in the industry this tool owns a big community, with events, forums, and documentation. Flutter Details Supported Platforms With Flutter you can create applications for: Android iOS Linux Debian Linux Ubuntu macOS web Chrome, Firefox, Safari, Edge Windows Supported deployment platforms | Flutter Programming Language Flutter use Dart, a programming language is an open-source language supported by Google optimized to use on the creation of user interfaces. Dart key features: Statically typed. This feature helps catching errors making the code robust ensuring that the variable’s value always match with the declared variable’s type. Null safety. All variables on Dart are non-nullable which means that every variable must have a non-null value avoiding errors at execution time. This feature also, make the code robust and secure. Async/Await. Dart is client-optimized which means that this language was specially created to ensure the best performance as a client application. Async/Await is a feature part of this optimization making easier to manage network requests and other asynchronous operations. Object oriented. Dart is an object-oriented language with classes and mixin. This is especially useful to use on Flutter with the usage of widgets. Compiler support of Just-In-Time (JIT) and Ahead-of-Time (AOT) JIT provides the support that enables the Hot Reload Flutter feature that I mentioned before. It is a complex mechanism, but Dart “detects” changes in your code and execute only these changes avoiding recompiling all the code. AOT compiler produces efficient ARM code improving start up time and performance. Official documentation Flutter has a rich community and documentation that goes from UI guidelines to an Architectural Overview. You can find the official documentation at the following links: Flutter Official Documentation: Flutter documentation | Flutter Flutter Community: Community (flutter.dev) Dart Official Documentation: Dart documentation | Dart Flutter for embedded systems So far, we know all the excellent features and platforms that Flutter can support. But, what about the embedded systems? On the official documentation we can find that Flutter may be used for embedded systems but in fact there is no an official supported platform. This SDK has been supported by their community, specially there is one repository on GitHub supported by Sony that provides documentation and Yocto recipes to support Flutter on embedded Linux. To understand the reason to differentiate between Flutter for Linux Desktop with official support and to create a specific Flutter support for embedded Linux is important to describe the basics of Flutter architecture. Based on the Flutter documentation the system is designed using layers that can be illustrated as follows:   Source: Flutter architectural overview | Flutter We can see as a top level “Framework” which is a high-level layer that includes widgets, tools and libraries that are in contact with developers. Below “Framework,” the layer “Engine” is responsible of drawing the widgets specified in the previous layer and provides the connection between high-level and low-level code. This layer is mostly written in C++ for this reason Flutter can achieve high performance running applications. Specifically for graphics rendering Flutter implements Impeller for iOS and Skia for the rest of platforms. The bottom layer is “Embedder” which is specific for each target and operating system this layer allows Flutter application to run as a native app providing the access to interact with different services managed by the operating systems such as input, rendering surfaces and accessibility. This layer for Linux Desktop uses GTK/GDK and X11 as backend that is highly dependent of unnecessary libraries and expensive for embedded systems which have constrained resources for computation and memory. The work around founded by Sony’s Flutter for Embedded Linux repository is to change this backend using a widely implemented backend for embedded systems Wayland. The following image illustrates the difference between Flutter for Linux Desktop and Flutter for Embedded Linux.   Source: What's the difference between Linux desktop and Embedded Linux · sony/flutter-embedded-linux Wiki · GitHub   Source: What's the difference between Linux desktop and Embedded Linux · sony/flutter-embedded-linux Wiki · GitHub Here is the link to the mentioned repository: GitHub - sony/flutter-elinux: Flutter tools for embedded Linux (eLinux) Finally, I would like to encourage you to read the official Flutter documentation and consider this tool as a great option compared to widely used tools on embedded devices such as Qt or Chromium. Also, please have a look to a great article written by Payam Zahedi delving into the implementation of Flutter for Embedded Linux measuring performance and giving conclusions about the usage of Flutter in embedded systems. (Flutter on Embedded Devices. Learn how to run Flutter on embedded… | by Payam Zahedi | Snapp Embedded | Medium).    

Device: i.MX93 A1. ELE FW version: 0.0.10 Some new test scripts are added to secure enclave library, please refer to attached files. Please note: the scripts attached are for internal test/debug purpose only. The summary is from our test results and understanding, it's preliminary and may have changes later.    1. All current and all GA Sentinel FWs do not use lifecycle for key derivation of HSM keystore. Keystore created in OEM_OPEN lifecycle can be directly used in OEM_CLOSED lifecycle.  A-> Different from previous SECO devices 2. Key has lifecycle attribute. This attribute defines in which device lifecycle the key is usable. This attribute is set at key creation operation (generate key, import key, key exchange …). Before executing a key depending cryptographic or data storage (export option) operation the key lifecycle is compared with the current device lifecycle. Operation is executed only if the key lifecycle includes the current device lifecycle. When mentioned in the API command message description, the key lifecycle could be set to the current device lifecycle if the value is set to 0x0. Lifecycle values are encoded as bitfield. Multiple values could be set. The key could be used in several lifecycles.   Tested cases:   The key lifecycle attribute is verified during the key usage, not when the key is created. If the key operation doesn’t match device lifecycle, it will report 0xe29 - The key is not usable in the current lifecycle.  Please see attached hsm_generate_key.c / hsm_generate_key_signature.c  for reference.   3. SYNC operation and MC increase are separate flag. The previous STRICT operation is used to store persistent key, during which the monotonic counter will increase if the device is closed. For ELE device, two flags are used: SYNC flag and MC flag. The ELE SYNC pushes persistent key(s) in the NVM. Without executing this operation, even if the key attribute is set as persistent at the key creation the key will not be stored in the NVM. This operation is set through a flag in key management operations arguments. SYNC is applicable only for persistent key/permanent key. MC flag is new on ELE device. When used in conjunction with SYNC, the request is completed only when the monotonic counter has been updated. MC flag can be used both in OPEN and CLOSED lifecycle and increase the monotonic counter value. -> different from previous SECO device. Note: MC flag is not defined in 0.0.10 secure enclave library, but user can test it by directly setting the corresponding bit of the flag.   4. If the generated key store is deleted accidently and the monotonic counter is not 0, reprovisioning function is needed.  This is applied to both OPEN and CLOSED device. We cannot directly create a keystore again. Reprovisioning method is not supported yet.   5. One keystore can store 100 key groups at most. 100 groups are available per key store. It must be a value in the range [0; 99]. The key group ID should be 0~99, or it will report 0x429- MU sanity check failed / Invalid parameters. To push persistent keys in the NVM, a flag (SYNC) needs to be set during key management operations (generate, import, manage, …). Pushing a key to the NVM will also push all the key group data. When in use, a key group is loaded from the NVM to the internal secure RAM. The number of key group present is limited (depends on the device). A key group present in internal memory and not used, can be swapped out and replaced by a new key group containing the key to be used when there is no more free space. Note that only key 2 groups per key store can be stored in the internal secure RAM. Note that volatile keys cannot be in the same key group than persistent keys.   One assumption based on tests: It looks that each key group has its own SW counter, which may record update time of this key group. This is the test on i.MX93: If we delete the key group #2 file 0000abcd00020004 only from NVM manually, then we cannot create key of group #2 again, but we can create key of group #1. The process might be: Try to create key in group #2 -> checked the counter value is not 0 -> try to import the chunk from NVM -> fail because the chunk is deleted. Each key group has its own counter, so key group #1 is not affected.   6. Key size in one keystore One key group can store 16 ECC(p256) keys, or 1 RSA 2k key, or 1 RSA 4k key. Size of key group on i.MX93 = 8448 bits (size defined to allow 4k modulus+ 4k private exponent + header). Storage file in NVM will have additional overhead, the 8448 size is purely related to key data storage. For ECC keys, only private keys are stored (public key can be derived from private key), so P256 key only needs 256 bits of key storage + 256 bits header = 512 bits. 16 * 512 = 8192 => fits within 8448.    7. Delete key To delete the key from the NVM, an SYNC operation (in “Flags” field) must be done. To delete a key, user need to provide the key identifier which is generated when creating this key. There is also “MC” flag which should can be used for anti-rollback protection. Deleting key will not decrease the size of key group file directly, but the space in the key group will be covered by new key generated later.  Please see attached hsm_delete_key.c for reference.   8. Generic API Generic API is not supported on i.MX93 A0 due to a lack of RAM, it is supported on i.MX93 A1. In lf-6.1.22_2.0.0 ELE library, the generic feature is set as none supported, need to change the src/plat/ele/sab_msg.def file as below to test it on i.MX93 A1 chip. -MT_SAB_GC_AKEY_GEN := ${NOT_SUPPORTED} -MT_SAB_GC_ACRYPTO := ${NOT_SUPPORTED} +MT_SAB_GC_AKEY_GEN := ${FMW} +MT_SAB_GC_ACRYPTO := ${FMW} Generic cryptographic APIs can be used to perform cryptographic operation without using the FW key store. The key buffer, in plaintext, is an input parameter of the API. No need to open hsm keystore before using generic APIs. Because it will not save the key to key store, so NVM thread is also not necessary. Please see attached hsm_generic_api.c for reference. Asymmetric key generate: Only RSA is supported on S401 for now. It will return the address of output RSA key modulus /output RSA private exponent /input RSA public exponent Asymmetric crypto User can choose different operation mode for Encryption / Decryption / Signature generation / Signature verification.    9. How to get chip MC value? Command “Get device information” can be used to get generic information regarding the user, the chip and the EdgeLock Enclave FW. It can return Chip UUID/lifecycle/monotonic counter etc. User can run this API before and after some MC operation to check if the counter value is increased. Please see the attached hsm_get_info.c for reference.   Best Regards, Tia

SoC: i.MX8MP LDP: Ubuntu22.04 and Ubuntu 20.04 Yocto: 6.1.22 mickledore   This doc includes two parts: 1)How to enable qt5 in LDP 2)How to enable qt5 in Yocto Linux 6.1.22     How to use qt5 in LDP(Linux Distribution Poc): The gcc and glibc is diffrent from Yocto Linux and Linux Distribution Poc. To cross compile the file between Linux and Ubuntu, we need to care about that.   To full enable the GPU usage of QT lib, please use "-gles" libs by apt-get command. Qt source code is not suggested, for it has not been tested. Building Qt5, for example: sudo apt-get update sudo apt-get -y install libqt5gui5-gles sudo apt-get -y install libqt5quick5-gles sudo apt-get -y install qtbase5-gles-dev   opengles test case glmark: sudo apt-get -y install glmark2-es2-wayland How to find the missing lib for apt-get: sudo apt-get install apt-file apt-file search xx   open wifi if needed NXP internal internet has limitation: sudo modprobe moal mod_para=nxp/wifi_mod_para.conf   and add "nameserver 8.8.8.8" in vi /etc/resolv.conf. You can also try:  echo "nameserver 8.8.8.8" | sudo tee /etc/resolv.conf > /dev/null   some times system time is not automatically update, and that cause apt-get update fail User and choose manually configure it by: sudo date -s "2023-08-31 14:00:00"   For Chinese support for ubuntu, please use: sudo apt-get install ttf-wqy-microhei ttf-wqy-zenhei xfonts-wqy   possible env path you need to export: XDG_RUNTIME_DIR="/run/user/1000" export QT_QPA_PLATFORM=wayland   User can choose root login by command like: user@imx8mpevk:~$ sudo passwd New password: Retype new password:   please use qmake to build qt project: 1)qmake -o Makefile HelloWorld.pro 2)make   some other qt libs: sudo apt-get install -y qtwayland5 sudo apt-get install -y qml-module-qtquick-controls sudo apt-get install -y qml-module-qtquick-controls2 sudo apt-get install -y qml-module-qtcharts sudo apt-get install -y libqt5multimedia5 sudo apt-get install -y libqt5serialport5 sudo apt-get install -y libqt5script5 sudo apt-get install -y qml-module-qt-labs-settings sudo apt-get install -y qml-module-qt-labs-platform sudo apt-get install -y qml-module-qtmultimedia sudo apt-get install -y libqt5webengine5 sudo apt-get install -y qml-module-qtwebengine sudo apt-get install -y qml-module-qtquick-dialogs     How to enable qt5 in Yocto 6.1.22: 1.download meta-qt5 git clone https://github.com/meta-qt5/meta-qt5.git git checkout origin/mickledore   copy Yocto version 5.10.72_2.2.0 sources\meta-imx\meta-sdk\dynamic-layers\qt5-layer to the same path of Yocto 6.1.22   2.apply two patches qt5-1.patch: modify the path from qt6 to qt5 qt5-2.patch: modify the qt5 related in meta-imx, including: 1)Yocto grammer update，from "_" to ":";  2)NXP grammer，from mx8 to mx8-nxp-sdk;  3)remove gstreamer1.0-plugins-good-qt, for qt5 has been natively added into gst-plugin-good-1.22(which is not in 1.18)   3.after input command like "DISTRO=fsl-imx-xwayland MACHINE=imx8mp-lpddr4-evk source imx-setup-release.sh -b build-xwayland", comment the "meta-nxp-demo-experience"   # i.MX Yocto Project Release layers BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-bsp" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-sdk" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-ml" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-v2x" #BBLAYERS += "${BSPDIR}/sources/meta-nxp-demo-experience"      

This is a tool for screen capture under DRM (Direct Render Manager). This also a revised version for previous “drmfbcap” (DRM Framebuffer Capture). Unlike the FB based system under which we can capture the frame buffer easily through reading the device node, the DRM is much more complex and secure-protected. No direct way for reading framebuffer data from user space. Under DRM case, we need to open the DRM device, query the resource, get and map the FB object and then read the buffer eventually. With this tool, we can capture the buffer content from a DRM device and output as raw RGB/YUV data. Features: Capture all planes or specific plane, including hidden/covered planes or planes (overlays) managed by applications directly. Both RGB and YUV supported (auto detect). Tile format (VSI Super-Tile) is also supported. Repeat mode which can capture frames continuously. Tool was built as static linked, in this case, it should be working in both Linux and Android.   Important notes: Behavior of DRM subsystem is different between Linux 4.x and 5.x/6.x. For Linux 4.x, you can capture the RGB buffer without any problem. But, there’s no API for YUV (multi-plane) buffer. To capture YUV, please patch kernel with: “kernel_0001-drm-Add-getfb2-ioctl_L4.14.98.patch”. For Linux 5.x, mapping/capturing the internal buffer is not allowed by default due to security reason. To overcome this temporary (for debug only), patch the kernel with: “0001-drm-enable-mapping-of-internal-object-for-debugging_L5.x.patch”. It contains a minor change to remove this guard. Both patches are included in attachment. To get more details about how to use this tool, try “-h” option to print the usage message. Enjoy!

Platform i.MX8MPlus EVK, Android 13 Background Customer find we have enabled all configs about pstore and ramoops, but they can't get ramoops log in /sys/fs/pstore node on Android 13. Solution The default reboot will reset all hardware including the DDR control, so this will result in the loss of the log stored in RAM. We have include such codes in ATF, the default code will use imx_wdog_restart(true) to reset all hardware. void __dead2 imx_system_reset(void) { #ifdef IMX_WDOG_B_RESET imx_wdog_restart(true); #else imx_wdog_restart(false); #endif }   To avoid DDR reset, we should comment  IMX_WDOG_B_RESET in vendor/nxp-opensource/arm-trusted-firmware/plat/imx/imx8m/imx8mp/include/platform_def.h   Result evk_8mp:/sys/fs/pstore # ls console-ramoops-0 dmesg-ramoops-0 pmsg-ramoops-0  

  Solution           

1.Compile full aosp or only kernel Build full aosp: source build/envsetup.sh lunch evk_8mm-userdebug ./imx-make.sh -j8  Only build kernel: ./imx-make.sh kernel -j8 2.Build GKI locally Download GKI outside of android_build. mkdir gki && cd gki (Make sure folder gki is not inside of ${MY_ANDROID}) repo init -u https://android.googlesource.com/kernel/manifest -b commonandroid13-5.15 repo sync Build GKI locally. BUILD_CONFIG=common/build.config.gki.aarch64 build/build.sh 3. Export symbols After building GKI locally, you can copy linux-imx from /vendor/nxp-opensource/kernel_imx into common. cd common rm -r ./* cp ${MY_ANDROID}/vendor/nxp-opensource/kernel_imx/* ./ ln -s ${MY_ANDROID}/vendor/nxp-opensource/verisilicon_sw_isp_vvcam verisilicon_sw_isp_vvcam ln -s ${MY_ANDROID}/vendor/nxp-opensource/nxp-mwifiex nxp-mwifiex  Build GKI about i.MX: BUILD_FOR_GKI=yes BUILD_CONFIG=common/build.config.imx EXT_MODULES_MAKEFILE="verisilicon_sw_isp_vvcam/vvcam/v4l2/Kbuild" EXT_MODULES="nxp-mwifiex/mxm_wifiex/wlan_src" build/build_abi.sh --update-symbol-list -j8 Then the  common/android/abi_gki_aarch64_imx will be generated. cd gki cp common/android/abi_gki_aarch64_imx /tmp/abi_gki_aarch64_imx   Update GKI kernel rm -r common/* # delete imx kernel repo sync # recover aosp kernel cp /tmp/abi_gki_aarch64_imx android/abi_gki_aarch64_imx cd .. BUILD_CONFIG=common/build.config.gki.aarch64 build/build_abi.sh LTO=thin --update -j8  Then, common/android/abi_gki_aarch64.xml is updated.  

  Introduction   Platform: i.MX93 EVK Uboot: origin/lf_v2022.04(lf-6.1.1-1.0.0) The LVDS design and media block control in i.MX93 is very similiar with i.MX8MPlus.This article implements the LVDS driver in uboot. You need apply 0001-Add-fake-adp5585-pwm-driver.patch which implements the adp5585 pwm driver in uboot. This is a fake pwm driver only implement the pwm driver framework. You can't use pwm value to adjust brightness for the moment, but this is enough to enable the backlight. Then please apply 0002-Add-imx93-lvds-and-panel-driver.patch, you will see nxp logo with this panel: https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/dy1212w-4856:DY1212W-4856   Porting suggestions   1. Modify panel timing in drivers/video/simple_panel.c /* define your panel timing here and * copy it in simple_panel_get_display_timing */ static const struct display_timing boe_ev121wxm_n10_1850_timing = { .pixelclock.typ = 71143000, .hactive.typ = 1280, .hfront_porch.typ = 32, .hback_porch.typ = 80, .hsync_len.typ = 48, .vactive.typ = 800, .vfront_porch.typ = 6, .vback_porch.typ = 14, .vsync_len.typ = 3, }; static int simple_panel_get_display_timing(struct udevice *dev, struct display_timing *timings) { memcpy(timings, &boe_ev121wxm_n10_1850_timing, sizeof(*timings)); return 0; }   2.Modify VIDEO_PLL The VIDEO_PLL = pixel clock * 7. For default panel, the pixel clock is 71.143MHz and VIDEO_PLL  is 498MHz. static struct imx_fracpll_rate_table imx9_fracpll_tbl[] = { FRAC_PLL_RATE(1000000000U, 1, 166, 4, 2, 3), /* 1000Mhz */ FRAC_PLL_RATE(933000000U, 1, 155, 4, 1, 2), /* 933Mhz */ FRAC_PLL_RATE(700000000U, 1, 145, 5, 5, 6), /* 700Mhz */ FRAC_PLL_RATE(498000000U, 1, 166, 8, 0, 1),/* rate, rdiv, mfi, odiv, mfn, mfd */ FRAC_PLL_RATE(484000000U, 1, 121, 6, 0, 1), FRAC_PLL_RATE(445333333U, 1, 167, 9, 0, 1), FRAC_PLL_RATE(466000000U, 1, 155, 8, 1, 3), /* 466Mhz */ FRAC_PLL_RATE(400000000U, 1, 200, 12, 0, 1), /* 400Mhz */ FRAC_PLL_RATE(300000000U, 1, 150, 12, 0, 1), }; 3. Modify lcdif node in dts <498000000>, <71142857>, <400000000>, <133333333>; <VIDEO PLL>,<PIX CLK>, <MEDIA_AXI>,<MEDIA_APB> &lcdif { status = "okay"; - assigned-clock-rates = <484000000>, <121000000>, <400000000>, <133333333>; + assigned-clock-rates = <498000000>, <71142857>, <400000000>, <133333333>; };