The attached document describes how to integrate the souphttpsrc plugin and make it work.

       

Hi all, I'm using this patch to get BT656 output on my i.MX6Q: Patch to Support BT656 and BT1120 Output For i.MX6 BSP Now I am looking for a way to clamp the pixel values between 16 to 240. Based on the i.MX6Q Reference Manual (37.4.5.6 IC Task Parameter Memory), this can be done by setting a IC task parameter called SAT_MODE from 0 to 1, but I'm not sure how it should be done. I've inspected the ipu_disp.c code and I guess the right way to do this is calling ipu_dp_write inside __ipu_dp_csc_setup function to set SAT_MODE to 1, but know I don't know which address to give toipu_dp_write since SAT_MODE is not defined in the ipu_regs.h. Looking at other parameters addresses (e.g. DP_CSC_0) and comparing their counterpart in the Reference Manual doesn't get my anywhere either. Bests, Isaac Hi Isaac, the default BSP code doesn't support DP_CSC_YUV_SAT_MODE modification, just used the default value 0. You can reference to the ioctl "MXCFB_SET_GAMMA" to add it into mxcfb_ioctl() of file mxc_ipuv3_fb.c. Bit 11 in IPUx_DP_COM_CONF_SYNC is for DP_CSC_YUV_SAT_MODE. So you can add it in ipu_regs.h: DP_COM_CONF_CSC_DEF_BOTH = 0x00000100, + DP_COM_CONF_CSC_YUV_SAT_MODE = 0x00000800, DP_COM_CONF_GAMMA_EN = 0x00001000, For BT656 display, IC CSC was not used, it used DP CSC. This document was generated from the following discussion: How to change SAT_MODE in BT656 display output for i.MX6

  Some customers are using sgtl5000 in android. So i generate this patch of sgtl5000 in Android11(i.MX8QM)

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343576 

D1 Capture - kernel 2.6.22 diff --exclude CVS -uNr linux-2.6.22/include/asm-arm/arch-mxc/memory.h linux-2.6.22.modified/include/asm-arm/arch-mxc/memory.h --- linux-2.6.22/include/asm-arm/arch-mxc/memory.h     2009-07-16 16:29:45.000000000 -0300 +++ linux-2.6.22.modified/include/asm-arm/arch-mxc/memory.h     2009-07-15 15:38:34.000000000 -0300 @@ -28,6 +28,7 @@     /* Size of contiguous memory for DMA and other h/w blocks */     #define CONSISTENT_DMA_SIZE     SZ_16M    +     /*!      * @defgroup Memory_MX27 Memory Map      * @ingroup MSL_MX27 @@ -48,7 +49,7 @@     #ifdef CONFIG_DMA_ZONE_SIZE     #define MXC_DMA_ZONE_SIZE     ((CONFIG_DMA_ZONE_SIZE * SZ_1M) >> PAGE_SHIFT)     #else    -#define MXC_DMA_ZONE_SIZE     ((12 * SZ_1M) >> PAGE_SHIFT)   +#define MXC_DMA_ZONE_SIZE     ((20 * SZ_1M) >> PAGE_SHIFT)     #endif      static inline void __arch_adjust_zones(int node, unsigned long *zone_size, diff --exclude CVS -uNr linux-2.6.22/drivers/media/video/mxc/capture/mxc_v4l2_capture.c linux-2.6.22.modified/drivers/media/video/mxc/capture/mxc_v4l2_capture.c ---    linux-2.6.22/drivers/media/video/mxc/capture/mxc_v4l2_capture.c     2009-07-16 16:29:43.000000000 -0300 +++ linux-2.6.22.modified/drivers/media/video/mxc/capture/mxc_v4l2_capture.c     2009-07-16 16:08:02.000000000 -0300 @@ -1650,9 +1650,9 @@                  /* setup cropping */                 cam->crop_bounds.left = 0; -             cam->crop_bounds.width = 640; +             cam->crop_bounds.width = 800;                 cam->crop_bounds.top = 0; -             cam->crop_bounds.height = 480; +             cam->crop_bounds.height = 600;                 cam->crop_current = cam->crop_defrect = cam->crop_bounds;                 ipu_csi_set_window_size(cam->crop_current.width,                                                       cam->crop_current.height); @@ -1663,7 +1663,7 @@                 cam->standard.id = V4L2_STD_UNKNOWN;                 cam->standard.frameperiod.denominator = 30;                 cam->standard.frameperiod.numerator = 1; -             cam->standard.framelines = 480; +             cam->standard.framelines = 600;                 cam->streamparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;                 cam->streamparm.parm.capture.timeperframe =                 cam->standard.frameperiod; cam->streamparm.parm.capture.capability = V4L2_CAP_TIMEPERFRAME; diff --exclude CVS -uNr linux-2.6.22/drivers/media/video/mxc/capture/ov2640.c linux-2.6.22.modified/drivers/media/video/mxc/capture/ov2640.c ---    linux-2.6.22/drivers/media/video/mxc/capture/ov2640.c     2009-07-16 16:29:45.000000000 -0300 +++ linux-2.6.22.modified/drivers/media/video/mxc/capture/ov2640.c     2009-07-16 16:07:03.000000000 -0300 @@ -698,12 +698,12 @@     #endif                            g_cam->streamparm.parm.capture.capturemode = 1;                 } else { -          out_width = 640; -          out_height = 480; +          out_width = 800; +          out_height = 600;                 g_cam->crop_bounds.left = 0; -          g_cam->crop_bounds.width = 640; +          g_cam->crop_bounds.width = 800;                 g_cam->crop_bounds.top = 0; -          g_cam->crop_bounds.height = 480; +          g_cam->crop_bounds.height = 600;                 g_cam->crop_current = g_cam->crop_defrect = g_cam->crop_bounds;     #ifdef CONFIG_ARCH_MX3                              ipu_csi_set_window_size(g_cam->crop_current.width ,

Overview The purpose of this document is to provide guidance for FlexIO 8080 display capability. Generally, the 8080 bus interface consists of one chip-select line (CS), one writing-latch line (WR), one reading-latch line (RD), one data/command-select line (RS, also called D/C), and 8 or 16 bidirectional data lines (Data Bus). Since The FlexIO instance of i.MX 943 support only 16 pins, the demo can only support 8 bit 8080 mode(two pin should be used as WR and RD signal. winteri_wang_0-1756800337092.png   Below are pins used in the 8 bit 8080 display. winteri_wang_1-1756282634017.png Panel Setup The panel in the example is X-LCD-PAR-S035. To use 8 bit 8080 mode, need ser IM[2:0] to be 011. Connection and Software i.MX 943 Need pull down SPI8_SEL1 and SPI8_SEL3 of PCA6416 in SW to select Arduino for 8080 pins D[7:4]. imx943_flexio_8080_connection.png Here is the patch for system manager. For quick verification, use flash_m70 when building bootloader. diff --git a/configs/mx94evk.cfg b/configs/mx94evk.cfg index 9d46976..90bf089 100755 --- a/configs/mx94evk.cfg +++ b/configs/mx94evk.cfg @@ -499,6 +499,9 @@ ENC_PLL OWNER ENDAT2_1 OWNER ENDAT2_2 OWNER ENDAT3_1 OWNER +GPIO2 OWNER +GPIO3 OWNER +FLEXIO1 OWNER FLEXIO3 OWNER FLEXIO4 OWNER FLEXPWM1 OWNER @@ -515,6 +518,7 @@ HIPERFACE_SAFE1_2 OWNER HIPERFACE_SAFE2_1 OWNER HIPERFACE_SAFE2_2 OWNER IRQSTEER_M7_0 OWNER +LPI2C6 OWNER LPIT1 OWNER LPTMR1 OWNER LPTMR2 OWNER @@ -557,6 +561,25 @@ XBAR_DSC3 OWNER PIN_GPIO_IO24 OWNER PIN_GPIO_IO25 OWNER +# 8080 +PIN_GPIO_IO00 OWNER +PIN_GPIO_IO01 OWNER +PIN_GPIO_IO02 OWNER +PIN_GPIO_IO03 OWNER +PIN_GPIO_IO08 OWNER +PIN_GPIO_IO09 OWNER +PIN_GPIO_IO10 OWNER +PIN_GPIO_IO11 OWNER +PIN_GPIO_IO12 OWNER +PIN_GPIO_IO13 OWNER +PIN_GPIO_IO14 OWNER +PIN_GPIO_IO15 OWNER +PIN_GPIO_IO38 OWNER + +# I2C6 +PIN_GPIO_IO28 OWNER   Attached imx943_flexio_8080_8bit.zip is patch for m70 demo based on SDK_25_06_00_MCIMX943-EVK.   i.MX 93 Need pull up EXP_SEL(pin4 R4) of ADP5585 in SW to route some pins. imx93_flexio_8080_connection.png Attached imx93_flexio_8080_8bit.zip is patch for m33 demo based on SDK_25_06_00_MCIMX93-EVK. The running status is similar as i.MX943.

Kindly note that application note “AN12812: Using Code-Signing Tool with Hardware Security Module" has been removed from nxp.com. The AN is obsolete, the CST User’s guide describes how to use CST with an HSM using PKCS#11 interface. You can download CST package with its documentation from https://www.nxp.com/webapp/sps/download/license.jsp?colCode=IMX_CST_TOOL_NEW  

    Test envs: BOARD: i.MX 8MN EVK BSP: L6.6.36   The L6.6.y includes the feature about supporting starting Cortex-M33 from non-TCM address for i.MX93, but not for i.MX8M series.    LF-7815 remoteproc: imx_rproc: support starting Cortex-M33 from non-TCM address for i.MX93 https://github.com/nxp-imx/linux-imx/commit/680aa11c7bdaddf6bbffd74bc0a94ef67593b69b#diff-66a34e17e82d281936f559217adc3983b39abeb2e478967f3d5cef2eed5b67fcR693   For older BSP, customer can refer this full patch set https://patchew.org/linux/[email protected]/   If you want to test ELF in DDR on i.MX8M series and i.MX93 platform with L6.6.y, please use below patch set. Zhiming_Liu_0-1732668390264.png  

The IOMUX module on i.MX 8M enables flexible I/O multiplexing, allowing users to configure each IO pad as one of selectable functions. The CSU (Central Security Unit) module on i.MX 8M can be used to configure some devices as secure only accessible to protect the security of these devices. But as the IOMUX is Non-Secure accessilbe and thus the pad function can be configured dynamicaly, there is one risk if hackers reconfigure the IO pad to make the device connected to other controller which is accessible to Non-Secure world. One solution for this issue is configuring the CSU to limit Non-Secure access to IOMUX, all IOMUX registers write operations are routed to Trusty OS. In the Trusty OS, add all sensitive IO resources to one blacklist, the IOMUX driver in Trusty OS should check and deny any write attemption to sensitive registers from Non-Secure world. One example patch set is attached to show how to assign the IOMUX to secure world and how to route the IOMUX write operations to Trusty OS. In this example, the USB Host pinctrl PAD on i.MX8MP EVK was assigned to secure world. The layout of the example codes are:     . ├── atf │ └── 0001-config-iomux-to-secure-write.patch --> ${MY_ANDROID}/vendor/nxp-opensource/arm-trusted-firmware ├── kernel │ └── 0001-Use-Trusty-OS-to-handle-iomux-registers-written-oper.patch --> ${MY_ANDROID}/vendor/nxp-opensource/kernel_imx/ ├── trusty │ └── 0001-Add-iomux-pinctrl-TEE-handler.patch --> ${MY_TRUSTY}/trusty/hardware/nxp └── u-boot └── 0001-Use-Trusty-OS-to-handle-IOMUX-operation.patch --> ${MY_ANDROID}/vendor/nxp-opensource/uboot-imx      

Patch to enable SSI_ASRC_P2P capture function for SebreSD board Modified based on https://community.freescale.com/docs/DOC-95342#comment-9739 You can use 'arecord -Dhw:0,1 -c 2 -f S16_LE -r 44100 | aplay' to test this patch. Currently only supports 16bit output width, for 24bit, the voice of the captured data will be much bigger in one channel than the other for this patch.

Build the Demonstration Platform To make a demonstration platform, the CPU board is directly connected to the Personality board using the 500-pin connector that is keyed to avoid misconnections, so there is only one way to connect the CPU board to the Personality board. The Debug board is not used. Connect platform to PC

Hi all, Cortex-M4 for i.MX6SoloX that is new to i.MX6SX customers. They concerns GPIO ISRs response time are not real time and hugh latency while Android/Linux is running on Cortex-A9 in i.MX6SoloX. I shared my test steps, report and image for your reference. Best regards, Carl

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343007 

How To Convert RealView CP15 Config To OpenOCD? # arm11 mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write> Setting CP15 Control RealView: setreg @CP15_CONTROL=0x00050078 OpenOCD: arm11 mcr 1 15 0 1 0 0 0x00050078 Setting CP15 Peripheral Memory Remap RealView: setreg @CP15_PERIP_MEM_REMAP=0x40000015 OpenOCD: arm11 mcr 1 15 0 15 2 4 0x40000015

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-341566 

This is done with the 11.09 BSP for imx53 specifically. Attached is an amrnb.spec file, I put it in ltib/dist/lfs-5.1/amrnb. Then I extracted opencore-amr-0.1.3.tar.gz and put it in ltib/rpm/BUILD. I built with ltib ( ALl this could be added to the ltib menus as well 😞 ./ltib –m scbuild –p amrnb ./ltib –m scdeploy –p amrnb Then I applied the patch to .ltib for gst-plugins-ugly and built that with ltib. It will play a .3gp file with this pipeline: gst-launch filesrc location=/media/sd/test.3gp ! qtdemux name=demux demux.audio_00 ! queue ! amrnbdec ! alsasink demux.video_00 ! multiqueue ! mfw_vpudecoder ! mfw_isink Regards, Randy Krakora

Debugging with Eclipse and GDB on Linux user space This is a good open-source choice to debug i.MX processors. The integration of popular tools like Eclipse and GDB offers a good and stable connection between host and target. The first step is to install the tools on host. Click here to get instructions of how to install the tools. Let's debug a ready hello world program into the ltib. To extract the hello world package, type on ltib directory: $./ltib -m prep -p helloworld Change the code of hello.c to: #include <stdio.h> int main(int argc, char** argv) {     int i;     for (i = 0; i < 100; ++ i)     {         printf(“Welcome to GDB ! %d /n”, i);     }     return 0; } Change the Makefile to add debug symbols Change the two following lines from: CFLAGS = -Wall CXXFLAGS = -Wall To: CFLAGS = -Wall -g CXXFLAGS = -Wall -g Build and deploy the new source-code: $./ltib –p helloworld –m scbuild $./ltib –p helloworld –m scdeploy Configuring the Target On target, gdbserver needs to be run to perform debug. The gdbserver command has the following structure: gdbserver ip_host:port /full/path/app/app_name If gdbserver is not installed on target, select gdb package on ltib configuration. In this example our host has the 192.168.16.35 IP address and our HelloWorld application is located at /usr/bin/hello on the target board. Execute the gdbserver: gdbserver 192.168.16.35:10000 /usr/bin/hello You can use other port number as long as you use the same number when configuring the Eclipse. Setting a GDB Debug Session on Eclipse Now we will configure Eclipse C/C++ to start a GDB session with our remote i.MX board. We will need to know which is the target board’s IP address. To get your target’s IP address: /sbin/ifconfig In our example the target board has the 192.168.16.36 IP address. Open-up Eclipse and choose the C/C++ perspective. We will import the HelloWorld executable built by LTIB. Go to the menu File -> Import You will see the “Import” screen. Select “C/C++ Executable” option. Hit the “Next” button. Eclipse automaticaly creates a new project when whe use the “Import” option. In the next screen, select the “Search Directory” option and hit the “Browse” button. This session is incomplete and is being edited...

Q: How to setup camera under Android? helping a customer (RTX) debug some issues with camera. They're using i.MX 6Solo and Android 13.4-GA on custom hardware. They added a new camera driver which seems to work when using small console capture program (no gui, no preview), so the route from camera to /dev/video0 seems to work. However, when they try to use camera from Android, entire system freezes. They located the crash to following line in ipu_common.c which basically enables camera CSI0: ipu_cm_write(ipu, reg | IPU_CONF_CSI0_EN, IPU_CONF); While investigating IPU setup, we noticed that CPMEM setup for IDMAC channel 0 is "off": ch 0 word 0 - 00000000 25800000 00000000 E0000000 00077C4F ch 0 word 1 - 01B086B0 00394EC0 0087C000 00009FC0 0000027F As seen from above, EBA0 points to 0x0D843580 and EBA1 to 0x0E53B000, which is in EIM memory space, not DDR memory space, which probably causes issues. We're not sure what could be causing this as camera driver doesn't provide any such address and mostly just handles communication to camera chip. But something gets off in Android framework and we could use any hints about what to look for. A: You can reference to the "i.MXAndroidR13.4GAAdvancedUserGuide.html" "3 Camera&Video Recorder customization" for how to change the camera in Android. Another thing needs be checked is the camera sensor driver, you can reference to "kernel_imx\drivers\media\video\mxc\capture\ov5642.c", "static struct v4l2_int_ioctl_desc ov5642_ioctl_desc", did you implemented the same v4l2_int_ioctl_desc functions? Customer HW is set up so that DDR memory space starts at 0x80000000. This causes problems in myandroid/hardware/imx/mx6/libcamera/CamerHAL.cpp when obtaining buffer addresses where camera should store data. GPU will only return OFFSET into 2GB memory space it can address, so it will return an address below 0x80000000. This needs to be adjusted before passing onto V4L2 when starting capturing.

The i.MX27 Application Development System (MCIMX27ADSE) is a development tool which is designed to run software applications designed for the i.MX27 processor. Features i.MX27 Multimedia Application Processor Two clock-source crystals, 32 KHz and 26 MHz Power management & Audio IC (MC13783) included battery charging, 10bit ADC, buck switchers, boost switcher, regulators, amplifiers, CODEC, SSI audio bus, real time clock, SPI control bus, USB OTG transceiver & touchscreen interface Multi-ICE debug support Two 512Mbit DDR-SDRAM devices, configured as one 128MB, 32-bit device One 256Mbit Burst Flash with 128Mbit Pseudo Static RAM (PSRAM) memory device, configured as one 16MB flash with 8MB PSRAM, 16-bit device An single board system with connections for LCD display panel, Keypad and Image sensor. Complex Programmable Logic Device (CPLD) for reducing glue logic interface Software readable board revisions Configuration and user definable DIP switches Two SD/MMC, MS memory card connectors PCMCIA & ATA Hard Disk Drive (HDD) Two RS-232 transceivers and DB9 connectors (one configured for DCE and one for DTE operation) supporting on-chip UART ports External UART with RS-232 transceiver and DB9 connector Infrared transceiver that conforms to Specification 1.4 of the Infrared Data Association USB Host (HS & FS), USB OTG (HS & HS) interface Separate LCD panel assembly that connects to the main board Separate keypad unit with 36 push button keys Separate CMOS Image Sensor Card A 3.5 mm headset jack, a 3.5 mm line out jack, a 3.5 mm line in jack, a 3.5 mm microphone jack and a 2.5 mm microphone and headset jack Cirrus Logic CS8900A-CQ3Z Ethernet controller (10BASE-T), with RJ-45 connector AMD AM79C874 NetPHY (10BASE-T & 100BASE-X), with RJ-45 connector Two 32 × 3-pin DIN expansion connectors with most i.MX27 I/O signals Variable resistor for emulation of a battery voltage level NAND Flash card (Plugs into Main Board) which is included in the ADS kit LED indicators for power, Ethernet activity, and two LEDs for user defined status indication Universal power supply with 5 volt output @ 5 Amperes USB, RS-232 and RJ45 cables available in kit Kit Contains a main board an LCD display panel a keypad a NAND flash card an image sensor a TV encoder card, etc It supports application software, target-board debugging or optional extra memory.