i.MX Processors Knowledge Base

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i.MX Processors Knowledge Base

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Question: The i.MX6 documentation gives several different values for the maximum frequency of the IPU’s HSP_CLK clock. What are the correct HSP_CLK maximum frequency values for the i.MX6 Dual/Quad and Solo/DualLite? Can HSP_CLK run at 270 MHz on both the DQ and SDL CPUs, but it’s not clear from the documentation if this is permitted. Maximum HSP_CLK frequencies listed in the reference manual (DQ😞 264 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources)) 266 MHz (Table 18-3 (System Clock Frequency Values)) Maximum HSP_CLK frequencies listed in the reference manual (SDL😞 270 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources), Table 18-3 (System Clock Frequency Values)) Answer: Referring to Figure 18-2, IPU1_HSP_CLK_ROOT may be selected to have 1 of 4 sources. These sources are highlighted in yellow on the northwest corner of the page and the previous paragraph states these are max values. Possible sources are 540, 528, 396, and 480 MHz. The 480 MHz is divided by 4 before the selector, so winds up being 120 MHz. Per the diagram, these are all divided by 2 for IPU1_HSP_CLK_ROOT. The result is 270, 264, 198, and 60 MHz choices. Therefore, the max for IPU1_HSP_CLK_ROOT is 270 MHz for DQ. MX6D/Q and MX6S/DL are different with respect to max HSP_CLK frequency. MX6D/Q = 264 MHz max MX6S/DL = 270 MHz max
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We have a ATK tool which can program image, also it can burn fuse for i.MX51. Since fuse is one time program, so please take care the fuse can't be turn back after programmed.
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There developed the controller uses i.MX53 + Linux. Has developed a solution for building distributed information and control systems. Prototmpy been in operation for over a year. Examples: - Control Electromagnetic stirring (mixer) http://ontecom.com/en/catalog/ems / Rusal, Krasnoyarsk. - Moniroring and management of pumping stations. - Monitoring and control of climate control systems. You can create a smart home systems and iot. There is experience with PLC (Power Line Communication) Qualcomm/Atheros. In my spare time I develop a budget solution for PLC (Power Line Communication) control / monitoring components smart home. Based on the standard IEC 61131-3 developed software - distributed information management system. The solution is cross-platform. In a single system may be computers of different architectures and various operating systems. Such signals are synchronized controller ARM / Linux, and x86 server (Win, Linux, VMS, ...) Uses wxWidgets. Articles on this subject is, but in Russian.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-342833 
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The ads7846 driver that is distributed with yocto 1.6 (Daisy, Linux 3.10.17) does not support device tree configuration hooks. Attached is a patch for the ads7846 touchscreen driver to support device tree. Also added to the driver are hooks to ignore the requirement for a voltage regulator configuration.
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Introduction i.MX25 PDK Board Get Started Bootloader i.MX25 PDK Board Flashing NAND i.MX25 PDK Board Flashing SD Card i.MX25 PDK Board Flashing SPI NOR I.MX25 PDK U-boot SDCard I.MX25 PDK U-boot SplashScreen I.MX25 PDK Using FEC
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The attached document describes how to integrate the souphttpsrc plugin and make it work.
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For early i.MX 8QuadXPlus MEK boards with C0 chips, power on the board when the board is connected to the PC with USB Type-C cable may cause the PC to shut down directly. This is a hardware known issue. another type of TCPC PHY chip will be used in later boards to fix this issue. If you have this kind of i.MX 8QuadXPlus MEK boards with c0 chips already, you can take below way to avoid this issue: 1. change the boot switch to "serial download mode", firstly power on the board, then connect the board to PC with Type-C cable. 2. download the attached files, uncompress this two files and put them in the same folder. 3. open the command window, change the working directory to the one contains the files just downloaded, and execute "uuu uuu_change_DRP_to_DFP.auto-imx8qxpc0mek" on command window. After the command being successfuley executed, the board can be powerwed up when the board is connected to PC with type-C cable.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-343007 
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Detailed Features List of i.MX35 PDK board I.MX35 CPU Card Additional Resources I.MX35 PDK Board Flashing SD Card i.MX35 PDK Board Flashing NAND i.MX35 PDK Linux Booting SD Loading Redboot Binary Directly to RAM Fixing Redboot RAM Bug Fixing Redboot RAM bug (CSD1 not activated)
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In the i.MX51 default WINCE6  release, the eCSPI doesn't support multiple bursts mode and set the wait states. Attached was the document and code for how to enable the multiple bursts mode and how to set the wait states between two burst.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-343576 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344473 
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i.MX6 4.0.0 BSP release doesn't support ASRC_P2P function. This patch provides the reference codes to enable ASRC_P2P function for SSI. It can convert input sample rate to 44.1K_16bit/44.1K_24bit and 48K_16bit/48K_24bit. You can modify the configurations in the Board file. By the way, the SSI controler works at slave mode. Known limitations for the patch: -- The SDMA doesn't support SSI Dual FIFO when using ASRC_P2P function. -- From the waveform, the converted 24bit data have some abnormal data(values between 0 and 1) , but can't hear any abnormal sound from headphone. One suggestion is given under https://community.freescale.com/docs/DOC-95340
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Features Additional Information Features The i.MX31 PDK, with Smart Speed™ technology, is a completely integrated hardware and software solution that simplifies product development so you can focus on your critical differentiation needed for market success. Reduce development time, and design products that have power to spare, even when running multiple applications simultaneously. Receive stellar image and graphic performance in a system design that dramatically reduces power consumption. The i.MX31 PDK provides: Modular hardware enabling multiple connectivity technologies Optimized development software for Linux®, Windows® CE 5.0 and Windows Embedded CE 6.0 operating systems Out-of-box experience, complete with demonstration software and performance data Maximum performance and power savings Complete "Design. Debug. Demo." capability as simple as 1,2,3 i.MX31 Applications Processor Module i.MX31 Applications Processor - ARM11™ 128 MB DDR SDRAM 256 MB NAND FLASH Power Management (PMIC MC13783) + Power Circuitry Audio HS USB PHY Touch Controller Connector Debug Module (Software Development) Debug Ethernet Port Debug Serial Port JTAG Reset, Interrupt, Boot Switches Debug LEDs CodeTest Interface Power Source Current/Power Monitoring Personality Module (Demo-ready) Acceleromater MMA7450L (Freescale) User I/O Connectivity (FM, 802.11, Bluetooth, USB OTG, USB HS) Button 2.7"TFT Display 2MP Camera Module SDcard, ATA HDD External Connectors (dock, headphones, TV out, GPS) Microphone Speaker Additional Information i.MX31 PDK Contents If you are new to i.MX31PDK development we suggest checking out:Not authorized to view the specified document 1673 To flash BootLoader: i.MX31 PDK Board Flashing Miscellaneous Tutorials Blink i.MX 31PDK LEDs Using U-Boot i.MX31 Testing RNGA I.MX31 Testing TvOut I.MX31 Using CLKO
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In order to get Redboot running on i.MX35 PDK without a flashing procedure, a little modification in the binary file is needed. After that it can be loaded into RAM memory using the ATK tool. The Redboot Header To execute the binary Redboot file a header of 32 bytes long must be added: ddccbbaa0000000000000000hhggffee00000000000000000000000000000000 Where ddccbbaa is the 4-byte start address and hhggffee is the start address (all in Hexadecinal format) modified by the following procedure: value - 0x20 (or 32 decimal) + 0x08 (or 8 decimal) Note that in this header the values are placed from LSB to MSB bytes, so if the start address for MX35PDK is 0x87F00000 then the header should looks like: Start Address    --> 0x87F00000                                               --> 0000F087 Modified Address --> 0x87F00000 - 0x20 + 0x08 = 0x87EFFFE8 --> E8FFEF87 Header --> 0000F0870000000000000000E8FFEF8700000000000000000000000000000000 Now, this header must be appended to the beginning of the redboot.bin file.
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Attached is the U-boot binary needed to construct the following image: i.MX 6Dual/6Quad Power Consumption Measurement Linux Image
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On behalf of Gopise Yuan. A simple sharing for enabling some kernel options for using “lockdep”. It will be useful for detecting some deadlock (spinlock/mutex/…) issue. Validated on L4.14.x, and, found a lock violation…
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New i.mx6Q core board from OpenEmbed.comNew i.mx6Q core board from OpenEmbed.com
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Creating Deployment System          Configuring Bootloader       Running Linux     
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