Here is a quick summary at booting a Linux system on the i.MX 6 Sabre SD platform, through USB. This assumes you have a "working" Linux development environment at hand (e.g. Debian), and that your are able to build a working Linux system with buildroot already, as explained in this post. You will also need libusb-1.0 development files (headers and libraries), as well as root/sudo permissions to access USB peripherals. Also, we will use the fine imx_usb_loader tool that the nice folks at Boundary Devices have developed for their i.MX 5/6 boards, as it works fine for Sabre sd as well. Get buildroot sources We will use git to fetch buildroot sources: $ git clone git://git.busybox.net/buildroot This should create a buildroot directory with all the latest sources (after a while). Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l '201*', and git checkout <the-desired-tag>. Compile buildroot The beauty of buildroot is that it will take care of everything for you, including preparing a cross compiler. You can configure buildroot for Sabre SD by doing: $ cd buildroot $ make freescale_imx6sabresd_defconfig By default this would generate binaries suitable for booting with an SD card, so we need to tweak a few settings to obtain a ramdisk, which u-boot will like. Summon the configuration menu with the following command: $ make menuconfig Descend into the "Filesystem images" submenu, and select the following buildroot options: cpio the root filesystem (for use as an initial RAM filesystem) Compression method (gzip) Create U-Boot image of the root filesystem Exit, saving your configuration. You might want to verify that you have indeed the the correct options in your .config: $ grep '^BR2_TARGET_ROOTFS_CPIO' .config This should return the following: BR2_TARGET_ROOTFS_CPIO=y BR2_TARGET_ROOTFS_CPIO_GZIP=y BR2_TARGET_ROOTFS_CPIO_UIMAGE=y You may then proceed with the build: $ make This should download and build everything, so it will take a while. Note that, as bryanthomas pointed out, there are no files for the sabre sd in the boards folder. This is because no patches or custom kernel configurations are needed outside of what is defined in the defconfig. So the only place the sabre sd board lives in buildroot is in the configs directory. At the time of writing we still need a small final hack to have Linux boot on /init instead of its default /linuxrc for proper boot on ramdisk, though. Hopefully this should be addressed in a future buildroot version, and a patch is on his way, but for now we change the boot script in our target filesystem with: $ cd output/target $ ln -svf init linuxrc $ cd ../.. $ make All build results will fall under the output/images folder. We are most interested in the following pieces: output/images/ +- imx6q-sabresq.dtb +- rootfs.cpio.uboot +- u-boot.imx `- uImage Get imx_usb_loader sources We will use git to fetch imx_usb_loader sources: $ git clone git://github.com/boundarydevices/imx_usb_loader.git This should create an imx_usb_loader directory with all the latest sources. Compile imx_usb_loader Assuming your Linux development environment has the necessary libusb-1.0 headers and libraries, you can simply build by doing: $ cd imx_usb_loader $ make This should compile an imx_usb tool in the current folder. Prepare your payload and configuration First, copy all the necessary buildroot generated items to the imx_usb_loader directory. You will need: u-boot.imx uImage imx6q-sabresd.dtb rootfs.cpio.uboot Now we need to explain to imx_usb what we want to download to the i.MX romcode through USB. Add the following lines in the end of the mx6_usb_work.conf: ... u-boot.imx:dcd,plug uImage:load 0x12000000 rootfs.cpio.uboot:load 0x12C00000 imx6q-sabresd.dtb:load 0x18000000 u-boot.imx:clear_dcd,jump header The first line with dcd, plug uses u-boot header to configure the DDR3 memory, allowing us to download contents to the Sabre SD memory. This is exactly what the three subsequent lines with load directives do. The last line re-uses u-boot one more time to find out the address where to jump (jump header directive), but not touching the DDR configuration any more thanks to the clear_dcd directive (thanks jeanmariepons-b46892 for the tips) . Look at the comments in mx6_usb_work.conf for (a bit) more details on the various directives available. Also, note that all the absolute addresses mentioned above are what u-boot needed at the time of writing. Hopefully this should be fairly stable. Boot through USB! We are all set for booting now. Connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data. Connect also your PC to the USB OTG port of the Sabre SD, and make sure you have no SD card inserted and power up the platform. The Sabre SD should not boot into an operating system, but rather wait for a payload to download through USB. You might want to verify that it is indeed waiting with the following command: $ lsusb In the resulting output, there should be a line like the following: Bus 001 Device 098: ID 15a2:0054 Freescale Semiconductor, Inc. i.MX 6Dual/6Quad SystemOnChip in RecoveryMode On your PC, start the download of our "payload" to your Sabre SD with: $ sudo ./imx_usb (Note that you need proper permissions to do that.) After download of all the pieces, u-boot should start in its "mfgtools mode", as reflected by the following messages on UART: ... Boot from USB for mfgtools Use default environment for mfgtools Run bootcmd_mfg: run mfgtool_args;bootm ${loadaddr} ${initrd_addr} ${fdt_addr}; ... The Linux kernel should then start, and your buildroot system should reach a prompt: ... Welcome to Buildroot buildroot login: From there you may login as root. Enjoy! See also... This post details the buildroot steps a bit more. This post explains how to build a ramdisk for i.MX6 with busybox directly. AdeneoEmbedded - Whitepaper on USB loader for i.MX6 platforms imx_usb_loader README on github Buildroot: making embedded Linux easy

One of the important features that differentiates Xenomai from other real-time Linux extensions is its ability to offer hard real-time support to user-space applications. Ease of use of the user-space programming model should outweigh any gain one could expect from running the application directly from kernel space. User-space applications are memory protected from other processes, thus cannot crash the kernel should something goes wrong. Xenomai also provides generic building blocks for building different RTOS interfaces called skins, These skins imitates the different RTOS APIs thus allowing easy porting of existing applications to Xenomai. Required software 1. The current BSP version for iMX6 from Freescale is 3.0.35 does not fully work with the latest version Xenomai because the accompanying I-pipe patch does not support SMP. To use the latest I-pipe patch, a newer Linux kernel is need. Grab the latest stable kernel:   $ git clone git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git   $ cd ~/linux-stable   $ git branch -a   $ git checkout remotes/origin/linux-3.8.y -b linux-3.8.y   $ git checkout v3.8.1 -v v3.8.1 2. Configure the kernel. Make sure the kernel is built without any errors before patching it with Xenomai.   $ export ARCH=arm   $ export CROSS-COMPILE=arm-fsl-linux-gnueabi- $ make imx_v6_v7_defconfig $ make -j16 uImage 3. Note that this is a device-tree enabled kernel. You'll also need to generate the flattened device tree that U-Boot will pass to the kernel.   $ make imx6q-sabrelite.dtb 4. This step is not needed if your U-Boot supports device-tree kernel. Grab the latest U-Boot: $ git clone git://git.denx.de/u-boot.git $ cd u-boot/ $ make mx6qsabrelite_config $ make -j16 5. The boot script will need to updated to load the device-tree into memory and pass it to the bootm command.   U-Boot > setenv bootcmd 'fatload mmc 1 0x22000000 uImage; fatload mmc   1 0x11000000       imx6q-sabrelite.dtb; bo otm 0x22000000 – 0x11000000' 6. Grab the latest I-pipe patch from Adeos    $ wget http://download.gna.org/adeos/patches/v3.x/arm/ipipe-core-3.8-   arm-1.patch 7. Grab the latest Xenomai    $ wget http://www.xenomai.org/index.php/Xenomai:News#2013-10-           05_Xenomai_2.6.3   $ tar -xvjf xenomai-2.6.3.tar.bz2 Patching the kernel 1. Prepare the target kernel. This is to assume that the Linux kernel and I-pipe patch are located relatively to Xenomai.   $ cd xenomai-2.6.3   $ ./scripts/prepare-kernel.sh --linux=../linux-stable/ --adeos=../linux-stable/ipipe-core-3.8-arm-1.patch –arch=ARM   $ ./configure CFLAGS="-march=armv7-a -mfpu=vfp3" LDFLAGS="-march=armv7-a -mfpu=vfp3" --host=arm-fsl-linux-gnueabi 2. Build and installation   $ make -j8   $ sudo root   $ export PATH=/opt/freescale/usr/local/gcc-4.6.2-glibc-2.13-linaro-multilib-2011.12/fsl-linaro-toolchain/bin/:$PATH   $ make DESTDIR=~/BSP/ltib/rootfs install    Testing the installation 1. Verifying the kernel. If everything works, the kernel boot logs should messages like:    I-pipe: head domain Xenomai registered.   Xenomai: hal/arm started.   Xenomai: scheduling class idle registered.   Xenomai: scheduling class rt registered.   Xenomai: real-time nucleus v2.6.2.1 (Day At The Beach) loaded.   Xenomai: debug mode enabled.   Xenomai: starting native API services.   Xenomai: starting POSIX services.   Xenomai: starting RTDM services. 2. Comparison of Xenomai and unpatched Linux kernel real-time performance. We ran a couple benchmarks on a Freescale I.MX6q Sabrelite board to do the comparison. The tests used default configurations and fully stressed the system in order to measure scheduling jitter.                               Linux   Kernel     Zero load     100% loaded     Average latency   (us)     Worst-case   latency (us)     Average latency   (us)     Worst-case   latency (us)     Standard     4.625       41.311     5.120     1849.91   Patched with   Xenomai     4.825       15.568     6.654     16.655 The tests measure the jitter relative to expected time on a periodic task running every 1 millisecond. Data show the Xenomai implementations stand out for having by far the smallest difference between light and full load in the worst case. Stock Linux fare much worse as the timers miss a lot wake ups.

Introduction EMV stands for Europay, MasterCard and VISA, and is a global standard for inter-operation of integrated circuit cards (ICC) and ICC reader terminals (like point of sale (POS) terminals, automated teller machines (ATMs)) for authenticating credit and debit payment cards transactions. Any IC card reader must be certified to be EMV compliant. The EMV standard defines the interaction at the physical, electrical, data and application levels between the IC cards and IC card terminal. For the contact smartcards it is based on standard ISO/IEC 7816. Some of the i.MX embeds a Subscriber Identification Module (SIM) which was designed to facilitate the communication to a mobile phone SIM card. It could be used to communicate indirectly with a banking smartcard due to the listed limitations in regards to the EMV requirements. Electrical Limitations The POS terminal must support 1.8V, 3.3V, and 5V smartcards. Depending on the i.MX, 1.8V or 3.3V could be supported but not both, and 5V is definitely out of the range of the I/O supplies. => a level adapter component is required between the i.MX and the smartcard. Protocol Limitations The communication between the IC card and the reader is asynchronous (almost a UART), but based on a common clock for synchronous operation. The ISO7816 standard defines the following: 1 ETU = F / D * 1 / f ETU is Elementary Time Unit, which is somehow the nominal time to transmit a bit (0 or 1). F or Fi is the clock rate conversion integer. D or Di is the baud rate adjustment integer. f is the frequency of the communication clock used between the controller and the smartcard. Below is a partial list of what the controller must support to pass the EMV certification, and the known limitations of the SIM controller: - baud rate at x1 (Fi/Di=372/1) => default speed for all smart cards =>  supported. - baud rate at x2 (Fi/Di=372/2 = 186/1) => a higher speed for some smart cards => not supported. - baud rate at x4 (Fi/Di=372/4 93/1) => a higher speed for some smart cards => not supported. - message length of 12ETU => specified for T=0 type smart card => supported. - error of -0.2ETU on message length of 12ETU => 11.8ETU smart card => not supported. - message length of 11ETU => specified for T=1 type smart card => supported. - error of -0.2ETU on message length of 11ETU => 10.8ETU smart card => not supported. Conclusion For these reasons, the i.MX SIM controller does not allow to pass the EMV certification without the usage of an external controller that must care of all these missing features. The SIM can still be used to communicate with that external controller such Atmel AT83C26, NXP TDA8023, Terridian, or On Semi. Freescale does not have driver neither reference design to support that configuration. This company has the expertise to work with EMV certification for the i.MX258 + a companion smartcard controller: http://www.alcineo.com

This document intends to provide an overview of the i.MX8 Boot process and walk you through the process of creating a bootable image.   Boot process Coming out of a reset state the i.MX8 ROM (firmware that is stored in non-volatile memory of the i.MX8) reads the boot mode pins to determine the boot media/device that will be used. The i.MX8 can boot out of the following boot devices: eMMC/SD card FlexSPI Flash NAND Serial Download Protocol (USB) - This is used in manufacturing mode to bring-up a board by downloading an image to RAM and then flashing the on-board boot device.   The following table indicates the available options on a i.MX8QXP, the i.MX8 reads the boot mode pads and based in the configuration selects the desired boot device.   Once the boot device has been identified, ROM configures the boot media and attempts to read the image from a predefined address in the boot device, the following table shows the addresses where the image is expected to be on different boot devices. ROM loads data from the predefined addresses above (depending on the selected boot device) to the System Controller Unit (SCU) internal memory (tightly coupled memory) and parses it to find the image container. It can also boot by downloading an image through USB.   The image container has all the information needed to load all the images to the system, the first images that get loaded are the System Controller Firmware (SCFW) and Security Controller Firmware (SECO). The SECO FW needs to be loaded to refresh the watchdog timer (kick the dog) in the device, if the SECO FW is not loaded before the watchdog expires the device will reset, this usually happens when the device fails to fetch a valid image from the boot media.   Once the SCFW is loaded, ROM jumps to it and starts executing it. The SCFW then initializes the DDR and starts loading the images for the Cortex-M4 (optional) and the Cortex-A cores (optional). Once the images are loaded to their destination memory the SCFW boots the cores and sets them in their start address.   Creating a bootable image As a recap a bootable image is comprised of as minimum the System Controller Firmware and the Security Controller Firmware, optionally it can contain images for the Cortex M4 cores (if more than one available as in the case of QM devices) and Cortex A cores. It is possible to boot an image that only contains the SCFW and SECO FW, this could be useful in the first stages of porting the SCFW to the target board. It is also possible to boot an image with only the Cortex-M4 image (baremetal, FreeRTOS, AutoSAR...), only the Cortex-A image (U-boot or any bootloader) or both Cortex-M4 and Cortex-A images.   Mkimage tool The tool in charge of merging all these images and creating a bootable image for the i.MX8 is called mkimage, and can be obtained in source form in the following repository: https://github.com/nxp-imx/imx-mkimage mkimage is only supported in Linux So the first step is to clone the mkimage repository into our machine and checkout the latest branch, at the time of writing this document the latest release is 4.14.98_02: git clone https://source.codeaurora.org/external/imx/imx-mkimage cd imx-mkimage git checkout imx_4.14.98_2.0.0_ga‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ You should now be able to see the following folders:   Getting the SCFW Now that you have the mkimage tool you need some actual images to work with, if you are using a custom board you might need to port the SCFW and DDR configuration files for it (depending on how close it follows NXP's reference board).   The following is a compendium of documents on the basics of the SCFW and how to build it from scratch you can go there if you need help getting started with the porting process: https://community.nxp.com/docs/DOC-342654   If you are trying this on one of NXP's reference board you can use a pre-built SCFW binary, this can be obtained through the building process of the Yocto project or by downloading the porting kit and following these steps: Dowload SCFW binaries for release 4.14.98_02 here. chmod a+x imx-sc-firmware-1.2.bin ./imx-sc-firmware-1.2.bin‍‍‍‍‍‍‍‍‍‍ You will prompted to accept a license agreement and after that the binaries will be extracted:   Getting the SECO FW The Security Controller Firmware is only distributed in binary form and can be obtained from the NXP website. Download SECO FW binaries for release 4.14.98_02 here. chmod a+x firmware-imx-8.1.bin ./firmware-imx-8.1.bin‍‍‍‍‍‍‍‍‍‍ You will prompted to accept a license agreement and after that the binaries will be extracted: The SECO FW is under firmware/seco mx8qm-ahab-container.img -----> SECO FW for QM devices mx8qx-ahab-container.img ------> SECO FW for QXP devices   Getting an image for the Cortex-M4 The image for the Cortex-M4 can be generated using the SDK: https://mcuxpresso.nxp.com/en/select Just select the device you are working with and click Build MCUXpresso SDK, then you will prompted to select your IDE and host. Click on Download SDK and a compressed file containing the SDK will be dowloaded to your computer. Now you only need to uncompress the file and follow the steps in the getting started document to generate the image.  The getting started document includes steps to setup the toolchain and build an image for the M4. An M4 binary for the QM and QXP MEKs is also attached in this document, the example outputs a hello world message on the M4 terminal. Getting an image for the Cortex-A  The bootloader for the Cortex-A cores can be obtained through the Yocto BSP: The steps on generating the image for the 4.14.98 release can be found here: https://www.nxp.com/webapp/Download?colCode=imx-yocto-L4.14.98_2.0.0_ga    Some more details on the Yocto BSP can be found here: https://community.nxp.com/docs/DOC-94849   All the required binaries to create a bootable image for the Cortex-A cores on the MEK platforms are attached here.   Building a bootable image Once all the required pieces have been built/obtained, the bootable image can be created. The SCFW, SECO FW and respective Cortex-M4/A images need to be copied to the folder for the target device, i.e. if you are building an image for an i.MX8QX variant copy the binaries for that variant to its folder:   Here is a list of the required files to build a bootable image: scfw_tcm.bin -------------------------------------------- System Controller Firmware binary for the target board mx8qm(qx)-ahab-container.image ---------------- Security Controller Firmware for the QM or QXP variants bl31.bin --------------------------------------------------- ARM Trusted Firmware binary (Required if using u-boot with ATF) Only needed to create Cortex-A image with u-boot u-boot.bin ------------------------------------------------ U-boot binary (optional) m4_image ----------------------------------------------- M4 binary image, the QM variant has 2 Cortex-M4s and in this case to M4 binaries might be required (optional)   Once the required binaries have been copied to the desired variant folder (QXP or QM in this example), you are ready to start building some images.   All the targets for building different images are defined on the soc.mak file contained in each folder, this file contains different examples for creating a lot of the supported bootable images.   Creating a SCFW only image The target used to create a SCFW only image is flash_b0_scfw and it is defined under the soc.mak file of each variant. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0_scfw‍‍‍ To invoke this target for QM from the imx-mkimage directory: make SOC=iMX8QM flash_b0_scfw‍‍‍   The target definition for flash_b0_scfw can be seen below. Definition for QXP: flash_scfw flash_b0_scfw: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin ./$(MKIMG) -soc QX -rev B0 -dcd skip -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -out flash.bin ‍‍‍‍‍‍‍‍ Definition for QM: flash_b0_scfw: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -out flash.bin‍‍‍‍‍‍   Creating a Cortex-A image only The target used to create a Cortex-A image only is called flash_b0. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0 ‍‍‍ To invoke this target for QM from the imx-mkimage directory: make SOC=iMX8QM flash_b0‍ ‍‍‍ The target definition for flash_b0 can be seen below. Definition for QXP:   flash flash_b0: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin u-boot-atf.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -ap u-boot-atf.bin a35 0x80000000 -out flash.bin‍‍‍‍ Definition for QM:   flash_b0: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin u-boot-atf.bin ./$(MKIMG) -soc QM -rev B0 -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -ap u-boot-atf.bin a53 0x80000000 -out flash.bin‍‍‍‍   Creating a Cortex-M4 image only The target used to create a Cortex-m4 image only is called flash_b0_cm4 on QXP and QM has different targets since there are two M4s available in the system. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0_cm4‍‍ To invoke this target for QM from the imx-mkimage directory: // For Cortex-M4_0 only make SOC=iMX8QM flash_b0‍_cm4‍_0 // For Cortex-M4_1 only make SOC=iMX8QM flash_b0‍_cm4‍_1 // For both Cortex-M4_0 and Cortex-M4_1 make SOC=iMX8QM flash_b0‍_m4‍s_tcm ‍‍‍‍‍‍‍‍‍‍‍‍‍   The target definition for flash_b0_cm4 can be seen below. Definition for QXP: flash_cm4 flash_b0_cm4: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin‍‍‍‍ Definitions for QM: flash_b0_cm4_0: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin flash_b0_cm4_1: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 1 0x38FE0000 -out flash.bin flash_b0_m4s_tcm: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m40_tcm.bin m41_tcm.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m40_tcm.bin 0 0x34FE0000 -m4 m41_tcm.bin 1 0x38FE0000 -out flash.bin‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍   The examples above are for M4 images booting from TCM, the M4 is capable of booting and executing from DDR and it is also able to XIP (execute in place) from SPI memory, for examples on this targets please look at the soc.mak for the desired variant. Creating an image with both Cortex-A and Cortex-M4 images The target used to create an image with software for all the cores is called flash_linux_m4. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_linux_m4‍ ‍ To invoke this target for QM from the imx-mkimage directory: make SOC=iMX8QM flash_linux_m4‍ ‍ The target definition for flash_linux_m4 can be seen below. Definition for QXP: flash_linux_m4: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin u-boot-atf.bin m4_image.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -flags 0x00200000 -scfw scfw_tcm.bin -ap u-boot-atf.bin a35 0x80000000 -p3 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin‍‍   Definition for QM: flash_linux_m4: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin u-boot-atf.bin m4_0_image.bin m4_1_image.bin ./$(MKIMG) -soc QM -rev B0 -append mx8qm-ahab-container.img -c -flags 0x00200000 -scfw scfw_tcm.bin -ap u-boot-atf.bin a53 0x80000000 -p3 -m4 m4_0_image.bin 0 0x34FE0000 -p4 -m4 m4_1_image.bin 1 0x38FE0000 -out flash.bin‍‍     Flash image This will create a bootable image named flash.bin, to flash this image to the SD card and boot it on your MEK simply do: sudo dd if=iMX8QX/flash.bin of=/dev/mmcblkX bs=1k seek=32‍‍‍‍‍‍‍ If the desired target is a QM variant change if=iMX8QX... to if=iMX8QM. Then match your SD card device on "of=/dev/mmcblkX" you can see how your SD card enumerates by typing lsblk on your console before and after inserting your SD card. Remember from the information above that the i.MX8 will search for the image at 32k on the SD card, that is why we are flashing it there. For more examples please look at the soc.mak file, it includes examples for different boot media (NAND/QSPI) as well as different configurations and usage.   Additional resources Reference Manual Chapter 5 System Boot SCFW API and Port document imx-mkimage README System Controller Firmware 101 

Working with mainline U-Boot Freescale BSP provides an i.MX51 EVK U-boot port. However, i.MX51 EVK is also supported on I-boot main tree. This quick "how to" teaches how to use it. 0. Get u-boot code from the imx U-Boot Custodian tree: $ git clone git://git.denx.de/u-boot-imx.git 1. Prepare the environment: $ export PATH="$PATH:/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/" $ export CROSS_COMPILE=arm-none-linux-gnueabi- 2. Configure for i.MX 51 EVK $ cd u-boot-imx $ make mx51evk_config 3. Compile $ make u-boot.imx   iMX may SoCs use its internal ROM to execute some instructions at boot time, using "make u-boot.imx" an image containing the instructions 4. Copy the compiled file to a SD card on your host machine, insert the SD card and: $ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2 "/dev/mmcblk0" should replaced according to your host, use "dmesg" after inserting the SD to find out where is the SD on your host. Unmount it before issuing the dd command. seek 2, skips the first 1K bytes (2x512) of the SD where the ROM expects the boot image for SD. 5. Insert the SD on the i.MX51 EVK, and set the switches for SD card boot and power on the board.

Hi, My board is imx6dl_sabreauto and I use android4.4.2 source!The system stop at "Freeing init memory", when the system boot. I found the boot message no have follow message: mmc0: new high speed DDR MMC card at address 0001 mmcblk0: mmc0:0001 SEM08G 7.39 GiB mmcblk0boot0: mmc0:0001 SEM08G partition 1 2.00 MiB mmcblk0boot1: mmc0:0001 SEM08G partition 2 2.00 MiB input: WM8962 Beep Generator as /devices/platform/imx-i2c.0/i2c-0/0-001a/input/input7 mmcblk0: p1 p2 p3 < p5 p6 p7 p8 > p4 mmcblk0: p4 size 13336576 extends beyond EOD, truncated asoc: wm8962 <-> imx-ssi.1 mapping ok input: wm8962-audio DMIC as /devices/platform/soc-audio.5/sound/card0/input8 input: wm8962-audio Headphone Jack as /devices/platform/soc-audio.5/sound/card0/input9 mmcblk0boot1: unknown partition table Please help me! Thank  you!

This document describes the i.MX 8QXP MEK mini-SAS connectors features on Linux and Android use cases, covering the supported daughter cards, the process to change Device Tree (DTS) files or Boot images, and enable these different display options on the board.

The Linux L4.14.98_1.0.0_GA; and SDK2.5 for 8QM/8QXP Post GA, SDK2.5.1 for 7ULP GA3 release are now available. Linux on IMX_SW web page, Overview -> BSP Updates and Releases -> Linux L4.14.98_2.0.0 SDK on https://mcuxpresso.nxp.com Files available: Linux:  # Name Description 1 imx-yocto-L4.14.98_2.0.0_ga.zip L4.14.98_2.0.0 for Linux BSP Documentation. Includes Release Notes, User Guide. 2 L4.14.98_2.0.0_ga_images_MX6QPDLSOLOX.zip i.MX 6QuadPlus, i.MX 6Quad, i.MX 6DualPlus, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo, i.MX 6Solox Linux Binary Demo Files 3 L4.14.98_2.0.0_ga_images_MX6SLLEVK.zip i.MX 6SLL EVK Linux Binary Demo Files 4 L4.14.98_2.0.0_ga_images_MX6UL7D.zip i.MX 6UltraLite EVK, 7Dual SABRESD, 6ULL EVK Linux Binary Demo Files 5 L4.14.98_2.0.0_ga_images_MX7DSABRESD.zip i.MX 7Dual SABRESD Linux Binary Demo Files  6 L4.14.98_2.0.0_ga_images_MX7ULPEVK.zip i.MX 7ULP EVK Linux Binary Demo Files  7 L4.14.98_2.0.0_ga_images_MX8MMEVK.zip i.MX 8MMini EVK Linux Binary Demo Files  8 L4.14.98_2.0.0_ga_images_MX8MQEVK.zip i.MX 8MQuad EVK Linux Binary Demo files 9 L4.14.98_2.0.0_ga_images_MX8QMMEK.zip i.MX 8QMax MEK Linux Binary Demo files 10 L4.14.98_2.0.0_ga_images_MX8QXPMEK.zip i.MX 8QXPlus MEK Linux Binary Demo files 11 imx-scfw-porting-kit-1.2.tar.gz System Controller Firmware (SCFW) porting kit of L4.14.98_2.0.0 12 imx-aacpcodec-4.4.5.tar.gz Linux AAC Plus Codec v4.4.5 13 VivanteVTK-v6.2.4.p4.1.7.8.tgz Vivante Tool Kit v6.2.4.p4.1.7.8   SDK: On https://mcuxpresso.nxp.com/, click the Select Development Board, EVK-MCIMX7ULP//MEK-MIMX8QM/MEK-MIMX-8QX to customize the SDK based on your configuration then download the SDK package.  Target board: MX 8 Series MX 8QuadXPlus MEK Board MX 8QuadMax MEK Board MX 8M Quad EVK Board MX 8M Mini EVK Board MX 7 Series MX 7Dual SABRE-SD Board MX 7ULP EVK Board MX 6 Series MX 6QuadPlus SABRE-SD and SABRE-AI Boards MX 6Quad SABRE-SD and SABRE-AI Boards MX 6DualLite SDP SABRE-SD and SABRE-AI Boards MX 6SoloX SABRE-SD and SABRE-AI Boards MX 6UltraLite EVK Board MX 6ULL EVK Board MX 6ULZ EVK Board MX 6SLL EVK Board What’s New/Features: Please consult the Release Notes.   Known issues For known issues and more details please consult the Release Notes.   More information on changes of Yocto, see: README: https://source.codeaurora.org/external/imx/imx-manifest/tree/README?h=imx-linux-sumo ChangeLog: https://source.codeaurora.org/external/imx/imx-manifest/tree/ChangeLog?h=imx-linux-sumo#

The attached patches slow-down the DDR's clock (from 528000000Hz to 396000000Hz) on i.MX6Q Sabre SDB-P boards. These were tested on Android JB4.2.2_1.0.0 and Linux L3.0.35_4.1.0. To verify patches were correctly applied, one the serial console one should see the following TWO bold lines Board: i.MX6Q-SABRESD: unknown-board Board: 0x63012 [POR ] Boot Device: MMC I2C:   ready DRAM:   1 GB MMC:   FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2,FSL_USDHC: 3 *** Warning - bad CRC or MMC, using default environment mx6q pll1: 792MHz mx6q pll2: 528MHz mx6q pll3: 480MHz mx6q pll8: 50MHz ipg clock     : 49500000Hz ipg per clock : 49500000Hz uart clock    : 80000000Hz cspi clock    : 60000000Hz ahb clock     : 99000000Hz axi clock   : 198000000Hz emi_slow clock: 99000000Hz ddr clock     : 396000000Hz usdhc1 clock  : 198000000Hz usdhc2 clock  : 198000000Hz usdhc3 clock  : 198000000Hz usdhc4 clock  : 198000000Hz nfc clock     : 24000000Hz In:    serial Out:   serial Err:   serial Found PFUZE100! deviceid=10,revid=10 Net:   got MAC address from IIM: 00:04:9f:02:67:46 FEC0 [PRIME] Hit any key to stop autoboot:  0 kernel   @ 10808000 (4709060) ramdisk  @ 11800000 (183100) kernel cmdline:     use boot.img command line:     console=ttymxc0,115200 init=/init video=mxcfb0:dev=ldb,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=10M fb0base=0x27b00000 vmalloc=400M androidboot.console=ttymxc0 androidboot.hardware=freescale Starting kernel ... Uncompressing Linux... done, booting the kernel. . . . sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655ms Set periph_clk's parent to pll2_pfd_400! arm_max_freq=1.2GHz . . .

i.MX27 and i.MX31 Issues When Interfacing Micron's 78nm mDDRs Micron is discontinuing some "-75" mDDR parts (133MHz) popular on i.MX27 and i.MX31 designs, newer "-6" are being used to replace the EOL devices. However, loss of data issues may be experienced when i.MX mDDR controller is used to interface with newer Micron's mDDR. On some cases, the bootloader works, memory tests on RedBoot pass. However, Linux hangs when booting. Here are the DDR Controller configuration changes that may be used to avoid the issue: (This configuration is not proven to work on every design, but has been validated on at least 3 different boards.) ESDRAMC Configuration Registers Set ESDCFG0/1 to 0x0079D72F 0xD800_1004 = 0x79D72F Drive Strength Control Registers Use "Normal". i.MX27 Default. Enhanced MDDR Delay Line Configuration Debug Register Set the ESDCDLYx to 0x002C0000 0xD800_1020 = 0x2C0000 0xD800_1024 = 0x2C0000 0xD800_1028 = 0x2C0000 0xD800_102C = 0x2C0000

The purpose of this document is to provide extended guidance for selection of compatible Non-Volatile Memory (NVM) devices that are supported by the Ara240 (aka Ara-2) processors. In all cases, it is strongly recommended to follow the memory layout guidelines outlined in the specific SoC requirement documents.   Manufacturer Memory Part Number Capacity Renesas NOR SPI FLASH AT25SL321-UUE-T 32Mbit (4MB) ISSI NOR SPI FLASH IS25WJ032F-JTLE-TR 32Mbit (4MB) ISSI NOR SPI FLASH IS25WP032D-JBLE 32Mbit (4MB) Winbond NOR SPI FLASH W25Q16JVSNIQ 16Mbit (2MB) Winbond NOR SPI FLASH W25Q32JWUUIQ 32Mbit (4MB) Winbond NOR SPI FLASH W25Q64JWSSIQ 64Mbit (8MB) XMC NOR SPI FLASH XM25LU64CVIQT 64Mbit (8MB)   Note 1: All memory parts are in production unless stated otherwise. Checked June 2026

The purpose of this document is to provide extended guidance for selection of compatible LPDDR4 memory devices that are supported by the Ara240 (aka Ara-2) processors. In all cases, it is strongly recommended to follow the DRAM layout guidelines outlined in the specific SoC requirement documents. LPDDR4 - maximum supported densities SoC Max Data bus width Maximum density Number of Interfaces Assumed memory organization Notes Ara240 64-bit 128Gb/16GB 2 Dual rank, Dual channel device with 17-row addresses 1   LPDDR4 - list of validated memories The validation process is an ongoing effort - regular updates of the table are expected. SoC Density Memory Vendor Validated Memory Part# Notes Ara240 64Gb/(8GB) Total 128Gb/(16GB) (2 x 64Gb/8GB) Micron   MT53E2G32D4DE-046 AUT:C  MT53E2G32D4DE-046 WT:C - 64Gb/(8GB) Total 128Gb/(16GB) (2 x 64Gb/8GB)   FORESEE FLXC4008G-30  2 16Gb/(2GB) Total: 32Gb/(4GB) (2 x 16Gb/2GB) Micron MT53E512M32D1ZW-046BAUT:B     - 32Gb/(4GB) Total 64Gb/8GB (2 x 32Gb/4GB)   Micron MT53E1G32D2NP-046 WT:B - 16Gb/(2GB) Total: 32Gb/(4GB) (2 x 16Gb/2GB) SK Hynix H54G46CYRQX053N - 32Gb/(4GB) Total 64Gb/8GB (2 x 32Gb/4GB) SK Hynix H54G56CYRB-X247 421Y H54G56CYRB-X247 316A - 4Gb/(512MB) Total 8Gb/1GB (2 x 4Gb/1GB) SK Hynix H54G26AYRBX256 - 16Gb/(2GB) Total: 32Gb/(4GB) (2 x 16Gb/2GB) Samsung K4F6E3S4HB-KHCL      - 32Gb/(4GB) Total 64Gb/8GB (2 x 32Gb/4GB) ISSI IS43LQ32K01B 2 32Gb/(4GB) Total 64Gb/8GB (2 x 32Gb/4GB) Samsung K4UBE3D4AB-MGCL - 8Gb/(1GB) Total 16Gb/2GB (2 x 8Gb/1GB)   Winbond W66DP2RQQAHJ 2   Note: This device supports operation with LPDDR4 memories only. LPDDR4x operation is not supported. Dual‑mode memories that support both LPDDR4 and LPDDR4x are allowed as long as the device can operate in LPDDR4 mode, including using LPDDR4 I/O voltage levels and initialization sequences.   Note 1: The numbers are based purely on the IP documentation for the DDR Controller and the DDR PHY, on the settings of the implementation parameters chosen for their integration into the SoC, SoC reference manual and on the JEDEC standards JESD209-4C (LPDDR4). Therefore, they are not backed by validation, unless said otherwise and there is no guarantee that an SoC with the specific density and/or desired internal organization is offered by the memory vendors. Should the customers choose to use the maximum density and assume it in the intended use case, they do it at their own risk. Note 2: The memory part number did not undergo full JEDEC verification however, it passed all functional testing items. Note 3: Memory devices with binary densities (e.g., 1 GB, 2 GB, 4 GB) are preferred because they simplify memory management by aligning with system addressing schemes and reducing software complexity. Note 4: All memory parts are in production unless stated otherwise. Checked June 2026 Note 5: The processor does not support BYTE Mode (x8) memories.       

GUI Guider version:  1.9.x LVGL version: v8.x.x , v9.x.x Host software requirements: Ubuntu 20.04, Ubuntu 22.04 or Debian 12 Hardware requirements: FRDM i.MX 93 Development Board i.MX 93 Evaluation Kit   Steps: 1. Export your project from the folder GUI-Guider-Projects to your Linux PC.            2. Build an image for iMX93 using The Yocto Project.    a. Based on iMX Yocto Porject Users Guide set directories and download the repo $ mkdir imx-bsp-6.6 $ cd imx-bsp-6.6 $: repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.52-2.2.0.xml $ repo sync Use distro fsl-imx-xwayland and select machine imx93evk and use this commnad with a build folder name: $ MACHINE=imx93evk DISTRO=fsl-imx-xwayland source ./imx-setup-release.sh - b bld-imx93evk b. Use bitbake command to start the build process. Also, add the -c populate_sdk to get the toolchain. $ bitbake imx-image-full -c populate_sdk  c. Install the Yocto toolchain located on <build-folder>/tmp/deploy/sdk/.  $ sudo sh ./fsl-imx-xwayland-glibc-x86_64-imx-image-full-armv8a-imx93evk-toolchain-6.6-scarthgap.sh d. Install ninja utility on the build host $ sudo apt update $ sudo apt upgrade -y $ sudo apt install ninja-build e. Unzip the gui guider and lvgl sources $ cd meta-gui-guider/recipes-graphics/gui-guider/gui-guider/ $ unzip gui-guider.zip $ cd ../../lvgl/lvgl/ $ unzip lvgl.zip $ cd ../../gui-guider/gui-guider/ $ mv ../../lvgl/lvgl/ . $ cd ports/linux/ f. Change the interpreter on build.sh from #!/bin/sh to #!/bin/bash. $ nano build.sh -- #!/bin/sh ++ #!/bin/bash g. use the following commands to make build.sh executable $ dos2unix build.sh $ chmod +x build.sh h. Execute the build.sh $ ./build.sh i. Copy the binary to the iMX93 using a USB or SCP.    RESULTS:     I hope this article will be helpful

This article describe i.MX8MP normal HAB security boot, and server/client mode. For server/client mode, it is based on customer requirement, because private is stored in server can't be accessed.

Overview The purpose of this document is to provide a guide on how to enable Dual Ethernet with the GKI Development. Reference: How to enable dual ethernet on Android 11 For a better reference how to build Android i.MX image please look at the next chapter 3 Building the Android Platform for i.MX in the Android User's Guide 1. Build the Android Image with the next modifications The 2nd ethernet port is DWMAC from synopsys and phy used is realtek RTL8211F. To add them into the SharedBoardConfig.mk and remove the camera drivers. diff --git a/imx8m/evk_8mp/SharedBoardConfig.mk b/imx8m/evk_8mp/SharedBoardConfig.mk index f68eb49e..3e95708e 100644 --- a/imx8m/evk_8mp/SharedBoardConfig.mk +++ b/imx8m/evk_8mp/SharedBoardConfig.mk @@ -82,7 +82,12 @@ BOARD_VENDOR_KERNEL_MODULES += \ $(KERNEL_OUT)/drivers/rtc/rtc-snvs.ko \ $(KERNEL_OUT)/drivers/pci/controller/dwc/pci-imx6.ko \ $(KERNEL_OUT)/drivers/net/phy/realtek.ko \ - $(KERNEL_OUT)/drivers/net/ethernet/freescale/fec.ko + $(KERNEL_OUT)/drivers/net/ethernet/freescale/fec.ko \ + $(KERNEL_OUT)/drivers/net/phy/micrel.ko \ + $(KERNEL_OUT)/drivers/net/pcs/pcs_xpcs.ko \ + $(KERNEL_OUT)/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.ko \ + $(KERNEL_OUT)/drivers/net/ethernet/stmicro/stmmac/stmmac.ko \ + $(KERNEL_OUT)/drivers/net/ethernet/stmicro/stmmac/stmmac-platform.ko ifeq ($(POWERSAVE),true) BOARD_VENDOR_KERNEL_MODULES += \ $(KERNEL_OUT)/drivers/soc/imx/lpa_ctrl.ko \ @@ -219,15 +224,12 @@ BOARD_VENDOR_RAMDISK_KERNEL_MODULES += \ $(KERNEL_OUT)/drivers/perf/fsl_imx8_ddr_perf.ko \ $(KERNEL_OUT)/drivers/cpufreq/cpufreq-dt.ko \ $(KERNEL_OUT)/drivers/cpufreq/imx-cpufreq-dt.ko \ - $(KERNEL_OUT)/drivers/media/i2c/ov5640.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-capture.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-isi-capture.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-isi-hw.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-isi-mem2mem.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-mipi-csi2-sam.ko \ $(KERNEL_OUT)/drivers/dma/imx-sdma.ko \ - $(TARGET_OUT_INTERMEDIATES)/VVCAM_OBJ/basler-camera-driver-vvcam.ko \ - $(TARGET_OUT_INTERMEDIATES)/VVCAM_OBJ/os08a20.ko \ $(KERNEL_OUT)/drivers/staging/media/imx/imx8-media-dev.ko \ $(TARGET_OUT_INTERMEDIATES)/VVCAM_OBJ/vvcam-dwe.ko \ $(TARGET_OUT_INTERMEDIATES)/VVCAM_OBJ/vvcam-isp.ko \​ To let the Android framework's EthernetTracker and EthernetNetworkFactory know which interfaces to manage, the framework level configure config_ethernet_iface_regex config_ethernet_interfaces must be overlay in device/nxp/imx8m/evk_8mp/overlay/frameworks/base/core/res/res/values/config.xml: diff --git a/imx8m/evk_8mp/overlay/frameworks/base/core/res/res/values/config.xml b/imx8m/evk_8mp/overlay/frameworks/base/core/res/res/values/config.xml index 298d50cc..63f6787e 100644 --- a/imx8m/evk_8mp/overlay/frameworks/base/core/res/res/values/config.xml +++ b/imx8m/evk_8mp/overlay/frameworks/base/core/res/res/values/config.xml @@ -22,7 +22,12 @@ <resources> <!--For Android we support eth0 now --> - <string translatable="false" name="config_ethernet_iface_regex">eth0</string> + <string translatable="false" name="config_ethernet_iface_regex">eth\\d</string> + + <string-array translatable="false" name="config_ethernet_interfaces"> + <item>eth0;12,13,14,15,16,18,19</item> + <item>eth1;12,13,14,15,16,18,19</item> + </string-array> <!-- List of regexpressions describing the interface (if any) that represent tetherable USB interfaces. If the device doesn't want to support tething over USB this should -- Apply the patch 0001-PATCH-Add-defines-for-ETH-support-drivers.patch Build the Android Image # Change to the MY_ANDROID Directory $ source build/envsetup.sh $ lunch evk_8mp-userdebug $ ./imx-make.sh -j4 2>&1 | tee build-log.txt​   GKI Development Follow and apply the next community post: Export new symbols of GKI development Android 14 Set the GKI repo $ repo init -u https://android.googlesource.com/kernel/manifest -b common-android14-6.1 $ repo sync $ git remote add device https://github.com/nxp-imx/linux-imx.git $ git remote update $ git fetch device --tags $ git checkout android-14.0.0_1.2.0 $ cd .. #Be sure that symbolic links are created correctly $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/verisilicon_sw_isp_vvcam verisilicon_sw_isp_vvcam $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/nxp-mwifiex nxp-mwifiex $ BUILD_FOR_GKI=yes $ BUILD_CONFIG=common/build.config.imx $ tools/bazel run //common:imx_abi_update_symbol_list Apply the following changes in the GKI Kernel tree: gki/common: Patch: 0001-PATCH-GKI-Kernel-tree-Drivers-for-the-ETH1-Interface.patch Build the GKI Image tools/bazel run //common:kernel_aarch64_dist​ Follow the build android boot.img and system_dlkm.img $ cp out/kernel_aarch64/dist/boot.img ${MY_ANDROID}/vendor/nxp/fsl-proprietary/ gki/boot.img $ cd ${MY_ANDROID} $ TARGET_IMX_KERNEL=true make bootimage # Change directory to the gki folder $ cp out/kernel_aarch64/dist/system_dlkm_staging_archive.tar.gz ${MY_ANDROID}/vendor/nxp/fsl-proprietary/gki/system_dlkm_staging_archive.tar.gz $ cd ${MY_ANDROID}/vendor/nxp/fsl-proprietary/gki $ tar -xzf system_dlkm_staging_archive.tar.gz -C system_dlkm_staging $ cd ${MY_ANDROID} $ make system_dlkmimag​e Create the tar.gz file for flash the android image (*.img, *.bat, *.sh, *.bin, *.imx) Boot the image and type lsmod to ensure the drivers are installed. Regards, Mario    

The purpose of this document is to provide a guide on how to export new symbols using the Bazel Android server instead of the build_abi.sh script. For a better reference how to build Android i.MX image please look at the next chapter 3 Building the Android Platform for i.MX in the Android User's Guide 1. Compile full AOSP or only kernel Build full AOSP: $ source build/envsetup.sh $ lunch evk_8mp-eng $ ./imx-make.sh -j8  Only build the kernel: $ ./imx-make.sh kernel -j8 2. Generic Kernel Image GKI Development Download GKI outside of android_build (MY_ANDROID). # Make sure MY_ANDROID is set to the android_build folder. $ export MY_ANDROID=`pwd` # mkdir gki && cd gki (Make sure folder gki is not inside of ${MY_ANDROID}) $ repo init -u https://android.googlesource.com/kernel/manifest -b common-android14-6.1 $ repo sync $ cd common 3. Export New Symbols Switch the kernel in this common folder from AOSP to its device, and apply the patches required for your project. In this case Android $ cd common $ git remote add device https://github.com/nxp-imx/linux-imx.git $ git remote update $ git fetch device --tags $ git checkout android-14.0.0_1.2.0 $ cd .. $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/verisilicon_sw_isp_vvcam verisilicon_sw_isp_vvcam $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/nxp-mwifiex nxp-mwifiex $ BUILD_FOR_GKI=yes BUILD_CONFIG=common/build.config.imx $ EXT_MODULES_MAKEFILE="verisilicon_sw_isp_vvcam/vvcam/v4l2/Kbuild" $ EXT_MODULES="nxp-mwifiex/mxm_wifiex/wlan_src" Note: Be sure that your Symbolic Link is pointing to the correct folder Open the Makefile in the following path ../gki/nxp-mwifiex/mxm_wifiex/wlan_src/ and erase some ifreq lines that will generate a No such file or directory error. #Automatically determine Android version from build information to streamline diff --git a/mxm_wifiex/wlan_src/Makefile b/mxm_wifiex/wlan_src/Makefile index 3ec5308..7b6ca47 100644 --- a/mxm_wifiex/wlan_src/Makefile +++ b/mxm_wifiex/wlan_src/Makefile @@ -139,20 +139,7 @@ CONFIG_ANDROID_KERNEL=y ifeq ($(ANDROID_PRODUCT_OUT),1) ccflags-y += -DANDROID_SDK_VERSION=$(ANDROID_SDK_VERSION) else -include $(ANDROID_BUILD_TOP)/build/make/core/build_id.mk -ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),R) - ccflags-y += -DANDROID_SDK_VERSION=30 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),S) - ccflags-y += -DANDROID_SDK_VERSION=31 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),T) - ccflags-y += -DANDROID_SDK_VERSION=33 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),U) - ccflags-y += -DANDROID_SDK_VERSION=34 -else - # Default optimization or actions - ANDROID_SDK_VERSION := 0 - ccflags-y += -DANDROID_SDK_VERSION -endif +ccflags-y += -DANDROID_SDK_VERSION=34 endif endif endif -- Then you could update the symbol list by typing the following command. $ tools/bazel run //common:imx_abi_update_symbol_list After the build process is successful, you should get an output like the image below. Build GKI locally. $ tools/bazel run //common:kernel_aarch64_dist  You could follow the next chapters to update the GKI image to your boot image.

  For some applications, we need to reduce the CPU Frequency, but if you are not familiar with our BSP or our devices probably you need some help to do some configurations.   In this post, I will share the configuration to set up lower frequencies (100MHz, 200MHz, 400Mhz, 600MHz, 800MHz, and 1000MHz) on iMX8MP, iMX8MN, and iMX8MM.   Note: Works on Kernel 6.1.xx (not tested on oldest BSP)   1- We have to modify the PLL driver to set the proper parameters to lower frequencies. The file to modify is "clk-pll14xx.c" adding the following lines:   https://github.com/nxp-imx/linux-imx/blob/770c5fe2c1d1529fae21b7043911cd50c6cf087e/drivers/clk/imx/clk-pll14xx.c#L57   static const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = { PLL_1416X_RATE(1800000000U, 225, 3, 0), PLL_1416X_RATE(1600000000U, 200, 3, 0), PLL_1416X_RATE(1500000000U, 375, 3, 1), PLL_1416X_RATE(1400000000U, 350, 3, 1), PLL_1416X_RATE(1200000000U, 300, 3, 1), PLL_1416X_RATE(1000000000U, 250, 3, 1), PLL_1416X_RATE(800000000U, 200, 3, 1), PLL_1416X_RATE(750000000U, 250, 2, 2), PLL_1416X_RATE(700000000U, 350, 3, 2), PLL_1416X_RATE(600000000U, 300, 3, 2), + PLL_1416X_RATE(400000000U, 200, 3, 2), + PLL_1416X_RATE(200000000U, 200, 3, 3), + PLL_1416X_RATE(100000000U, 200, 3, 4), };   2- Once the pll driver has been modified, only we have to add the values on the opp-table according to the device that you will use.   2.1- For iMX 8MP:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mp.dtsi         a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.2 For iMX8MM:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm.dtsi     a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.3- For iMX8MN:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mn.dtsi   compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <850000>;   After that, you should note the changes under Linux.   These commands return information about the system and the current settings.   • The kernel is pre-configured to support only certain frequencies. The list of frequencies currently supported can be obtained from: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies   • To get the available scaling governors: cat /sys/devices/system/cpu/*/cpufreq/scaling_available_governors   • To check the current CPU frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_cur_freq   The frequency is displayed depending on the governor set.   • To check the maximum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_max_freq   • To check the minimum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_min_freq   These commands set a constant CPU frequency:   • Use the maximum frequency: echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • Use the current frequency to be the constant frequency: echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • The following two commands set the scaling governor to a specified frequency, if that frequency is supported.   If the frequency is not supported, the closest supported frequency is used:   echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor echo <frequency> > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed