Ara240 - LPDDR4 Memory Compatibility Guide

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Ara240 - LPDDR4 Memory Compatibility Guide

Ara240 - LPDDR4 Memory Compatibility Guide

The purpose of this document is to provide extended guidance for selection of compatible LPDDR4 memory devices that are supported by the Ara240 (aka Ara-2) processors. In all cases, it is strongly recommended to follow the DRAM layout guidelines outlined in the specific SoC requirement documents.

Note: This device supports operation with LPDDR4 memories only. LPDDR4x operation is not supported. 
Dual‑mode memories that support both LPDDR4 and LPDDR4x are allowed as long as the device can operate in LPDDR4 mode,
including using LPDDR4 I/O voltage levels and initialization sequences.

LPDDR4 - maximum supported densities

SoC Max Data bus width Maximum density Number of Interfaces Assumed memory organization Notes
Ara240 64-bit 128Gb/16GB 2 dual rank, dual channel device with 17-row addresses 1

 

LPDDR4 - list of validated memories

The validation process is an ongoing effort - regular updates of the table are expected.

SoC Density Memory Vendor Validated Memory Part# Notes
Ara240

64Gb/8GB

Total 128Gb/16GB

(2 x 64Gb/8GB)

Micron  

MT53E2G32D4DE-046 AUT:C 

MT53E2G32D4DE-046 WT:C

-

64Gb/8GB

Total 128Gb/16GB

(2 x 64Gb/8GB)

 

FORESEE

 

FLXC4008G-30  2

16Gb/2GB

Total

32Gb/4GB

(2 x 16Gb/2GB)

Micron

MT53E512M32D1ZW-046BAUT:B

    -

16Gb/2GB

Total

32Gb/4GB

(2 x 16Gb/2GB)

SK Hynix

H54G46CYRQX053N

-

32Gb/4GB

Total

64Gb/8GB

(2 x 32Gb/4GB)

SK Hynix

H54G56CYRB-X247 421Y

-

16Gb/2GB

Total

32Gb/4GB

(2 x 16Gb/2GB)

Samsung

K4F6E3S4HB-KHCL

     -

32Gb/4GB

Total

64Gb/8GB

(2 x 32Gb/4GB)

ISSI

IS43LQ32K01B

2

32Gb/4GB

Total

64Gb/8GB

(2 x 32Gb/4GB)

Samsung

K4UBE3D4AB-MGCL

-

 

 

Note 1:

The numbers are based purely on the IP documentation for the DDR Controller and the DDR PHY, on the settings of the implementation parameters chosen for their integration into the SoC, SoC reference manual and on the JEDEC standards JESD209-4C (LPDDR4). Therefore, they are not backed by validation, unless said otherwise and there is no guarantee that an SoC with the specific density and/or desired internal organization is offered by the memory vendors. Should the customers choose to use the maximum density and assume it in the intended use case, they do it at their own risk.

Note 2:

The memory part number did not undergo full JEDEC verification however, it passed all functional testing items.

Note 3:

Memory devices with binary densities (e.g., 1 GB, 2 GB, 4 GB) are preferred because they simplify memory management by aligning with system addressing schemes and reducing software complexity.

Note 4:

All memory parts are in production unless stated otherwise. Checked May 2026

Note 5:

The processor does not support BYTE Mode (x8) memories. 

 

 

 

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