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Based on example code provided in AN4466 I've written a simple memory calibration script for ARM DS-5 that runs same steps and prints out results for DQS, read and write calibration. This script can be run on new boards in order to find optimum calibration settings for the memory controller. Prior to running this script it is necessary to run standard memory initialization script! When bringing up new board: obtain default memory initialization script for memory type you're using (for example from DDR stress tester package) and modify the memory controller settings according to memory device you are going to use. run DDR stress tester with the given configuration on target frequency you're going to use to make memory works with given settings (default values for calibration are  fine in most cases unless there's issues with PCB and/or routing). run memory init script and then the attached script to obtain calibrated values. Re-test Vladan
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When you do long test (days or weeks) test on i.MX board and your test fails, you often wants to know what has happen with a JTAG probe. The problem is when you have 50 boards running in parallel, you don't have the budget to have 50 JTAG debug probe. If you do a "hot plug" of your JTAG probe, you have roughly one chance out 2 to reset your board... so you'll have to wait another couple of hour to resee the problem. Anyway to have a reliable JTAG plug with no reset, it is really simple... cut the RESET line on your cable! then you'll still be able to "attach" to your i.MX. On the MEK board, with a 10-pin JTAG connector, you have the cut the cable line 10 of the ribbon cable: On the cable, cut the reset line like this: With my Lauterbach JTAG  probe, when I do a "hot plug" I never have a reset of my i.MX. BR Vincent
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1.- Set SW602 Boot mode pin settings to Serial Downloader mode 2.-Connect JTAG debug probe and turn on the board 3.-Run script to bring-up DRAM In Lauterbach this script is called 'mcimx6ul_sieve_dram.cmm' under the mcimx6ul folder, the scripts can be found here and are also attached (download the imx6ultralite package). If you are not using Lauterbach please ask your probe vendor for a similar script. NOTE: this u-boot image has been built to run off DRAM if your bootloader runs from OCRAM you might not need a script. While running the script you might be prompted with and error telling you there is a syntax error in the script system.cpu IMX6ULL simply edit the script and change the CPU name to IMX6ULTRALITE 4.- Load u-boot.srec to DRAM and start executing it The srec is being used in this case because it contains the addresses where the binary needs to be loaded and the entry point for the application is automatically recognised and set by Lauterbach. To load it simply issue 'data.load.S3record u-boot.srec' and then click on go to let it run. You should now be able to see the output from u-boot on the console hit any key on the console to stop the boot process. 5.- Load QuadSPI configuration to DRAM and flash it to the memory The Boot ROM on the i.MX6UL requires the configuration data for the QuadSPI memory to be stored at address 0x400 of the QuadSPI memory, the length of this configuration data is 512 bytes. Attached is a configuration binary that can be used for the NOR flash memory used in the i.MX6UL EVK. For more details on the configuration parameters please refer to chapter '8.6.3 QuadSPI Configuration Parameters' of the i.MX6UL Reference Manual. Stop the execution on T32 (Lauterbach's environment) and load the configuration to DRAM by issuing 'data.load.binary QSPI_cfg2.bin 0x90000000' and resume execution. On u-boot execute the 'sf probe' command (sf stands for Serial Flash) to detect the memory. You should see an output like the following: => sf probe SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB Now issue the sf erase command to erase the first sector (remember our erase size is of 4KiB): => sf erase 0x0 0x1000 SF: 4096 bytes @ 0x0 Erased: OK Now we are ready to write our configuration to address 0x400 => sf write 0x90000000 0x400 0x200 SF: 512 bytes @ 0x400 Written: OK 6.- Load u-boot.imx to DRAM and download it to memory. We will follow the same procedure to download the u-boot image to the memory. Stop execution on Lauterbach and load u-boot.imx to DRAM using 'data.load.binary u-boot_SPI.imx 0x90000000' and resume execution (u-boot.imx contains the IVT header which basically stores all the information the device needs to boot u-boot.bin and u-boot.imx). The boot ROM expects to find the IVT header at address 0x1000 of the SPI NOR Flash memory. We will load u-boot.imx to this address by issuing 'sf update 0x90000000 0x1000 0x57830'(the size of u-boot.imx is 358448 bytes) this will erase and write the memory. => sf update 0x90000000 0x1000 0x57830 358448 bytes written, 0 bytes skipped in 23.741s, speed 15458 B/s If you want to verify that the image was flashed correctly you can read from QuadSPI to DRAM by issuing 'sf read 0x90000000 0x1000 0x57830 ' and verify the data. 7.- Now we can end our debug session and turn off our board Set SW602 to Internal boot mode (ON/OFF) and SW601 to select boot from QuadSPI (all OFF) Turn on the board again and you should be able to see u-boot's output on your terminal. This procedure can be used with other boards/i.MX6 derivatives, I am just posting the setup in which I tested it.
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Enter inside ~/ltibdir/rpm/BUILD and create a directory 'alpha': $ cd ltib/rpm/BUILD $ mkdir alpha Enter in 'alpha' dir and create setalpha.c file: $ cd alpha #include <stdio.h> #include <stdlib.h> #include <sys/types.h> #include <sys/stat.h> #include <fcntl.h> #include <sys/ioctl.h> #include <unistd.h> #include <asm/arch/mxcfb.h>  int main(int argc, char **argv) {              int fb_fd;              struct mxcfb_gbl_alpha gbl_alpha;               if(argc != 2){                       printf("Usage: %s alpha_val[0-255]\n",argv[0]);                       return -1;              }               fb_fd = open("/dev/fb0",O_RDWR,0);              gbl_alpha.enable = 1;              gbl_alpha.alpha = atoi(argv[1]);              ioctl(fb_fd, MXCFB_SET_GBL_ALPHA, &gbl_alpha);              close(fb_fd);              return 0; } Compile it using this command: ./ltib -m shell LTIB> cd rpm/BUILD/alpha LTIB> gcc -I../linux/include setalpha.c -o setalpha In your board execute it: root@freescale /home$ /unit_tests/mxc_v4l2_output.out -iw 320 -ih 240 -ow 480 -oh 640 -d 3 -r 4 -fr 5 qvga.yuv & While it is playing execute: root@freescale /home$ setalpha 128 root@freescale /home$ cat screen.raw > /dev/fb0 We used frame rate at 5 fps to have more time to execute next two commands.
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i.MX6UL CSI (CMOS Sensor Interface) host port support BT.656(CCIR656) Interlace mode by hardware.  It can received  PAL(720pix X 576pix) and NTSC(720pix X 480 pix) format data from camera. This document introduce how to add this feature to Linux L3.14.38-ga and receive ADV7180 output. Software: yocto L3.14.38-ga. Hareware:  i.mx6ul-evk + ADV7180. ADV7180: PAL 720pix X576pix  ,  YUV4:2:2(UYVY) interlace output. LCD Display screen resolution:  800 X 480,  RGB565. 1) Note : For BT.656 mode,   parallel data port is  CSI_DATA[9:2], not CSI_DATA[13:6].    So,  "pinctrl_csi1" is the same as "ov5640" in "imx6ul-14x14-evk.dts": pinctrl_csi1: csi1grp {    fsl,pins = <     MX6UL_PAD_CSI_MCLK__CSI_MCLK  0x1b088     MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088     MX6UL_PAD_CSI_VSYNC__CSI_VSYNC  0x1b088     MX6UL_PAD_CSI_HSYNC__CSI_HSYNC  0x1b088     MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088     MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088     MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088     MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088     MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088     MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088     MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088     MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088     MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059            /* configue csi_reset in this case */     MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x17059            /* configure csi_en in this case*/    > 2) Applay the video driver patches as attatched.   $git am 0001-Enable-CSI-support-BT656-interlace-and-add-adv7180.patch 3) Build the kernel.    make imx_v7_defconfig    make -j4 4) Use  unit_tests "mx6s_v4l2_capture_uyvy.out" to test it,  source code is attached "mx6s_v4l2_capture.c": Copy "mx6s_v4l2_capture_uyvy.out" to target device FS  "/unit_tests" folder, and run it like this: ./mx6s_v4l2_capture_uyvy.out -m 0 -t 50 -d /dev/video0 5) In this "mx6s_v4l2_capture.c" demo test code,   it can utilize software algorithm to implement CSC(Color Space Conversion) from YUV4:2:2 to RGB. PXP module can realize hardware CSC and image resize. 6) How to use CSI + PXP to preview camera, refer to  unit_tests "imx-test" package "pxp_v4l2_test" - "pxp_v4l2_test.c"  . Run following command in Target device FS:   /unit_tests /*Record raw camera UYVY data(720x576) to save in test1.yuv */ ./mx6s_v4l2_capture_uyvy.out -m 0 -t 10 -of test1.yuv -d /dev/video0 /*Play this test1.yuv file(UYVY) by PXP engine and resize to full screan(800x480) */ ./pxp_v4l2_test.out -sx 800 -sy 480 -res 720:576 -dst 0:0:800:480 -a 100 -f 5 test1.yuv BLANK 7) The "pxp_v4l2_preview_test.c" demo attached  is  a TV-in demo for i.MX6ul which support ADV7180 camera preview by PXP in time. This demo implements scaling image frame to full screen, Alpha blending and Composite two image together function by PXP hardware.
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Hello everyone, this document will explain on how to use the UUU (Universal Update Utility) tool to flash Linux to an i.MX device (i.MX 8MM).   Requirements:   MX 8M Mini EVK UUU tool documentation, available here Linux Binary Demo Files - i.MX 8MMini EVK UUU 1.2.135 binary Serial console emulator (tera term or putty)   UUU auto script For this example is used the L4.14.98_2.0.0_ga demo image for the i.MX 8MM, inside the demo image we will find the auto script, which by default flash the eMMC of the board, the structure of the script is as following   /***********************************************************************************/ uuu_version 1.2.39   # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f imx-boot-imx8mmevk-sd.bin-flash_evk   # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM SDPS: boot -f imx-boot-imx8mmevk-sd.bin-flash_evk   # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f imx-boot-imx8mmevk-sd.bin-flash_evk -offset 0x57c00 SDPU: jump # }   # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f imx-boot-imx8mmevk-sd.bin-flash_evk -skipspl SDPV: jump # }   FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: ucmd mmc dev ${emmc_dev} FB: flash -raw2sparse all fsl-image-validation-imx-imx8mmevk.sdcard FB: flash bootloader imx-boot-imx8mmevk-sd.bin-flash_evk FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: done /***********************************************************************************/    In short, when the board goes into serial downloader mode UUU downloads the bootloader to internal RAM, once done and uboot is running, through fastboot utility it will flash .sdcard file and uboot to the eMMC on the board.   More information about the protocol UUU use please refer to the UUU documentation (UUU.pdf) section 5 Supported protocol.   Running the tool In order to run the tool the binary of uuu needs to be downloaded, the binary files can be downloaded from the link above, uuu.exe is for Windows and uuu is for Linux. Once downloaded it can be placed inside the same file as the demo image, this so it is easy to run and cleaner on the shell commands.   Windows In windows OS the tool should be run using the Windows PowerShell in administrator mode, once open we will run the next commands: > .\uuu.exe uuu.auto   Linux >$ sudo ./uuu uuu.auto   The tool will start running and should be waiting for any i.MX device to be detected by host pc   Preparing the board For the board to be flashed it is needed to be in download mode, the switch configuration (i.MX 8MM EVK) is as following: SW1101  -  1010XXXXXX SW1102  -  XXXXXXXXX0   Connect a USB cable from the host pc which will run the tool to the USB OTG/TYPE C port, usually specified as download, on the board.   Connect a USB cable from the host to the OTG-to-UART for console output, usually specified as debug, on the board.   Open terminal emulator program with the following settings: Bits per second - 115200 Data bits - 8 Parity - None Stop bits - 1 Flow control - None   Power on the board, the download will start and the serial prompt will show the progress in uboot, wait until the tool show success.   Finally power off the board and change the switch configuration to boot from the eMMC, power on the board again and it should boot successfully!   Built in scripts One can use the built in scripts using the -b option to burn the bootloader  and the rootfs to the target flash, just type the command accordingly to the target flash device.    SD Write bootloader only: Windows: > .\uuu.exe -b sd <bootloader> Linux: $ sudo ./uuu -b sd <bootloader>   Replace <bootloader> for your .imx/.bin file, example using the i.MX 8MM for Windows and Linux respectively below. > .\uur.exe -b sd imx-boot-imx8mmevk-sd.bin-flash_evk $ sudo ./uuu -b sd imx-boot-imx8mmevk-sd.bin-flash_evk    Write whole Linux image Windows: > .\uuu.exe -b sd_all <bootloader> <rootfs>.sdcard Linux: $ sudo ./uuu -b sd_all <bootloader> <rootfs>.sdcard   Replace <bootloader> and <rootfs> for the name of your .imx/.bin and .sdcard files respectively, example using the i.MX 8MM below. > .\uuu.exe -b sd_all  imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard $ sudo ./uuu -b sd_all  imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard   eMMC Write bootloader only Windows: > .\uuu.exe -b emmc <bootloader> Linux: $ sudo ./uuu -b emmc <bootloader>   Example using i.MX 8MM > .\uuu.exe -b emmc imx-boot-imx8mmevk-sd.bin-flash_evk $ sudo ./uuu -b emmc imx-boot-imx8mmevk-sd.bin-flash_evk   Write whole Linux image Windows: > .\uuu.exe -b emmc_all <bootloader> <rootfs>.sdcard Linux: $ sudo ./uuu -b emmc_all <bootloader> <rootfs>.sdcard   Example using i.MX 8MM > .\uuu.exe -b emmc_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard $ sudo ./uuu -b emmc_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard   Hope this will helpful for everyone who is starting to use this flashing tool.
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Instrumenting A Board To instrument a board, the connection between the power supply and the target device needs to be broken, usually via a series resistor that's placed on the board. Sometimes the inductor needs to be lifted if no series resistor was included on the rail by the board's designer. In the ideal case, through-hole connections were also provided on the board for the connection of these off-board sensors. Here are three close-up photos that show several boards that have been instrumented: In all three cases, the sensors stand in place via the two outer current carrying wires. The middle and right used insulated wires where as the one on the left used bare wires. In all three cases, the sensor's + connection needs to go towards the power supply and the - connection goes to the target device. The outer wires here are 24-26 gauge. (The relatively heavy gauge wire is used to keep the series resistance of inserting a smart sensor to a minimum.) The ground connection is the middle hole of the smart sensor. In the left and middle photos, a 30 gauge wire connects to the middle hole ground connection on the  board. In the right photo, the ground wire was more conveniently added to a big cap just below the bottom of edge of the photo. Here are wider angle view photos of two of the boards above: The sensors on the left are free-standing since the current carrying wires are stiff enough to hold them upright. Care must be taken since too much flexing will cause a wire to break. Too much bending can also cause a short to the board (and that's why insulated wires were used on these boards). The board on the right has the sensors laying parallel to the board. They are not affixed to the board, but a wire is wrapped around the bundle of ribbon cables out of view past the right edge of the photo. For boards without the through hole connections, the smart sensors need to be immobilized to keep from pulling the SMT pads off the board. If there is room on the board or sides of connectors or large components, the sensors may be attached down with foam double-sticky tape (see photo below, sensor affixed on top i.MX7ULP): For boards where there are no convenient unpopulated areas or there are too many sensors, some other means needs to be devised to immoblize the smart sensors. In the left photo below, two inductors per sensor have been flipped and the two sensors inserted to instrument the two rails. The solder pads on the inductors would easily be broken off by any movement of the smart sensors, so a cage with clamps to hold the ribbon cables was 3D printed. On the back side, there is room for the aggregator to be zip tied to the bottom plate, so the instrumented board can be moved as a single unit with minimal flexing of the ribbon cables.
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When a board is brought up and  the ddr test by link of "https://community.nxp.com/docs/DOC-96412' hashttps://community.nxp.com/docs/DOC-96412' hashttps://community.freescale.com/docs/DOC-96412' hashttps://community.nxp.com/docs/DOC-96412' has been verified, some of boards will have pfd issue(ERR006282). It is suggested that below method could be used to check the issue.The detail steps are: As boards may have no jtag port, the internal usdhc4 root clock out needs to be remapped. When “CUP not initialized” issue has been seen and in download mode, DDR test tools can be used with the script to remap clock output. Please check the attached for test script and the empty the binary. Put the two files to DDR stress test tool folder “DDR_Stress_Tester\binary\”. The attached ddr-stress-test-mx6dq.bin is an empty file. Please backup the original file first. After eMMC boot failed and in download mode, run command “DDR_Stress_Tester.exe -t mx6x -df test.inc” on PC side. There is no clock output on GPIO19. For normal test, please erase the eMMC chip and boot the board. It will also fail to boot and run into download mode. After run “DDR_Stress_Tester.exe -t mx6x -df test.inc” , clock can be measured from GPIO19 if no PDF issue happens. Below is  the details: The script file. wait = on A: Config GPIO19(ENET_ RST_ PHY_B) as CLKO1 setmem /32 0x020E0254 = 0x3    // Config GPIO19(ENET_ RST_ PHY_B) as CLKO1      On your board, it is R112 for the test point. B: enabled, CKO1 output drives cko2 clock, divide by 5, usdhc4_clk_root setmem /32 0x020C4060 = 0x01820101  // CKO2 enabled, CKO1 output drives cko2 clock, divide by 5, usdhc4_clk_root Hex 0 1 8 2 0 1 0 1 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Binary 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 And for the normal boot, erase the emmc, and reboot to enter the download mode. There will be no signal output but high voltage on R112. After the script runs, 40Mhz clock will be seen. For the boot fail case, there will be no signal output but high voltage on R112 and 40Mhz clock will be pulled to low. 1: CKO2 enabled 2: divide by 5 3 usdhc4_clk_root 4: CKO1 output drives cko2 clock 5
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目录 1 创建 i.MX8QXP Linux 5.4.24 板级开发包编译环境 ..... 3 1.1 下载板级开发包 ....................................................... 3 1.2 创建yocto编译环境: ................................................. 4 1.3 独立编译 ................................................................. 9 2 Device Tree .............................................................. 16 2.1 恩智浦的device Tree结构 ..................................... 16 2.2 device Tree的由来(no updates) ............................ 19 2.3 device Tree的基础与语法(no updates) ................. 22 2.4 device Tree的代码分析(no updates) ..................... 44 3 恩智浦i.MX8XBSP 包文件目录结构 .......................... 77 4 恩智浦i.MX8XBSP的编译(no updates) ..................... 79 4.1 需要编译哪些文件 ................................................. 79 4.2 如何编译这些文件 ................................................. 80 4.3 如何链接为目标文件及链接顺序 ............................ 81 4.4 kernel Kconfig ....................................................... 83 5 恩智浦BSP的内核初始化过程(no updates) .............. 83 5.1 初始化的汇编代码 ................................................. 85 5.2 初始化的C代码 ...................................................... 89 5.3 init_machine........................................................ 102 6 恩智浦BSP的内核定制 ........................................... 105 6.1 DDR修改 ............................................................. 106 6.2 IO管脚配置与Pinctrl驱动 ..................................... 107 6.3 新板bringup......................................................... 123 6.4 更改调试串口 ...................................................... 132 6.5 uSDHC设备定制(eMMC flash,SDcard, SDIOcard)137 6.6 LVDS LCD 驱动定制 ........................................... 147 6.7 LVDS LDB SerDas驱动支持 ............................... 150 6.8 MiPi DSI SerDas驱动支持 .................................. 156 6.9 V4L2框架汽车级高清摄像头/桥驱动:数字/模拟 . 160 6.10 GPIO_Key 驱动定制 .......................................... 177 6.11 GPIO_LED 驱动定制 ......................................... 181 6.12 Fuse nvram驱动 .................................................. 184 6.13 SPI与SPI Slave驱动 ........................................... 185 6.14 USB 3.0 TypeC 改成 USB 3.0 TypeA(未验证) .... 193 6.15 汽车级以太网驱动定制 ........................................ 193 6.16 i.MX8DX MEK支持 .............................................. 212 6.17 i.MX8DXP MEK支持 ........................................... 212 6.18 NAND Flash支持与烧录 ...................................... 213
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Requirements: Host machine with Ubuntu 14.04 UDOO Quad/Dual Board uSD card with at least 8 GB Download documentation and install latest Official Udoobuntu OS (at the moment of writing: UDOObuntu 2.1.2), https://www.udoo.org/downloads/   Overview: This document describes how to install and test Keras (Open source neural network library) and Theano (numerical computation library for python ) for deep learning library usage on i.MX6QD UDOO board.  Installation: $ sudo apt-get update && sudo apt-get upgrade update your date system: e.g. $ sudo date -s “07/08/2017 12:00” First satisfy the run-time and build time dependencies: $ sudo apt-get install python-software-properties software-properties-common make unzip zlib1g-dev git pkg-config autoconf automake libtool curl  python-pip python-numpy libblas-dev liblapack-dev python-dev libatlas-base-dev gfortran libhdf5-serial-dev libhdf5-dev python-setuptools libyaml-dev libpython2.7-dev $ sudo easy_install scipy The last step is installing scipy through pip, and can take several hours. Theano First, we have a few more dependencies to get: $sudo pip install scikit-learn $sudo pip install pillow $sudo pip install h5py With these dependencies met, we can install a stable Theano release from the git source: $ git clone https://github.com/Theano/Theano $ cd Theano Numpy 1.9 cause conflicts with armv7, so we need to change the setup.py configuration: $ sudo nano setup.py Remove line    #       install_requires=['numpy>=1.9.1', 'scipy>=0.14', 'six>=1.9.0'], And add setup_requires=["numpy"], install_requires=["numpy"], Then install it: $ sudo python setup.py install Keras The installation can occur with the command: (this could take a lot of time!!!) $ cd .. $ git clone https://github.com/fchollet/keras.git $ cd keras $ sudo python setup.py install $ LC_ALL=C $sudo pip install --upgrade keras After Keras is installed, you will want to edit the Keras configuration file ~/.keras/keras.json to use Theano instead of the default TensorFlow backend. If it isn't there, you can create it. This requires changing two lines. The first change is: "image_dim_ordering": "tf"  --> "image_dim_ordering": "th" and the second: "backend": "tensorflow" --> "backend": "theano" (The final file should look like the example below) sudo nano ~/.keras/keras.json {     "image_dim_ordering": "th",     "epsilon": 1e-07,     "floatx": "float32",     "image_data_format": "channels_last",     "backend": "theano" } You can also define the environment variable KERAS_BACKEND and this will override what is defined in your config file : $ KERAS_BACKEND=theano python -c "from keras import backend" Testing Quick test: udooer@udoo:~$ python Python 2.7.6 (default, Oct 26 2016, 20:46:32) [GCC 4.8.4] on linux2 Type "help", "copyright", "credits" or "license" for more information. >>> import keras Using Theano backend. >>>  Test 2: Be aware this test take some time (~1hr on udoo dual): $ curl -sSL -k https://github.com/fchollet/keras/raw/master/examples/mnist_mlp.py | python Output: For demonstration, deep-learning-models repository provided by pyimagesearch and from fchollet git, and also have three Keras models (VGG16, VGG19, and ResNet50) online — these networks are pre-trained on the ImageNet dataset, meaning that they can recognize 1,000 common object classes out-of-the-box. $ cd keras $ git clone https://github.com/fchollet/deep-learning-models $ Cd deep-learning-models $ ls -l Notice how we have four Python files. The resnet50.py , vgg16.py , and vgg19.py  files correspond to their respective network architecture definitions. The imagenet_utils  file, as the name suggests, contains a couple helper functions that allow us to prepare images for classification as well as obtain the final class label predictions from the network Classify ImageNet classes with ResNet50 ResNet50 model, with weights pre-trained on ImageNet. This model is available for both the Theano and TensorFlow backend, and can be built both with "channels_first" data format (channels, height, width) or "channels_last" data format (height, width, channels). The default input size for this model is 224x224. We are now ready to write some Python code to classify image contents utilizing  convolutional Neural Networks (CNNs) pre-trained on the ImageNet dataset. For udoo Quad/Dual use ResNet50 due to avoid space conflict. Also we are going to use ImageNet (http://image-net.org/) that is an image database organized according to the WordNet hierarchy, in which each node of the hierarchy is depicted by hundreds and thousands of images. from keras.applications.resnet50 import ResNet50 from keras.preprocessing import image from keras.applications.resnet50 import preprocess_input, decode_predictions import numpy as np   model = ResNet50(weights='imagenet')   #for this sample I download the image from: http://i.imgur.com/wpxMwsR.jpg  img_path = 'elephant.jpg' img = image.load_img(img_path, target_size=(224, 224)) x = image.img_to_array(img) x = np.expand_dims(x, axis=0) x = preprocess_input(x)   preds = model.predict(x) # decode the results into a list of tuples (class, description, probability) # (one such list for each sample in the batch) print('Predicted:', decode_predictions(preds, top=3)[0]) Save the file an run it. Results for elephant image: Top prediction was 0.8890 for African Elephant Testing with this image: http://i.imgur.com/4FIOwAN.jpg Results: Top prediction was: 0.7799 for golden_retriever. Now your Udoo is ready to use Keras and Theano as Deep Learning libraries, next time we are going to show some usage example for image classification models with OpenCV. References: GitHub - fchollet/keras: Deep Learning library for Python. Runs on TensorFlow, Theano, or CNTK.  GitHub - Theano/Theano: Theano is a Python library that allows you to define, optimize, and evaluate mathematical expres…  GitHub - fchollet/deep-learning-models: Keras code and weights files for popular deep learning models.  Installing Keras for deep learning - PyImageSearch 
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There are two optionsou 1. Remove all source code after building: You can indicate bitbake to remove all source code after a build adding this line INHERIT += "rm_work" our to your conf/local.conf file. Of course, when baking another image, ALL source code has to be fetched again and it can take a lot of time, specially on machines with low connections to the Internet. The smallest image you can build is core-image-minimal, containing the minimal set of packages to board a particular machine. The largest is fsl-image-gui (in fact, there is one bigger 'fsl-image-gui-sdk' used for developing purposes inside the target). Between these two, there are a lot of images you can choose. You can even create your own image using hob. In case you do not want to build anything, there are some pre-built images on this site, just download the sdcard file and flash it to an SD card. 2. Select only those  IMAGE_FSTYPES you need. There is a variable named IMAGE_FSTYPES  which indicates the output formats you want for the resulting root file system images, by default is has this value: IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard" and it is located on /sources/meta-fsl-arm/conf/machine/include/imx-base.inc machine's header file. If you want to change it, place this variable on the build/conf/local.conf file. In case you have NFS mounting, remove the 'sdcard' (and either 'ext3' or 'tar.bz2') string, resulting in IMAGE_FSTYPES = "tar.bz2"
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Fast GPU Image Processing in the i.MX 6x by Guillermo Hernandez, Freescale Introduction Color tracking is useful as a base for complex image processing use cases, like determining what parts of an image belong to skin is very important for face detection or hand gesture applications. In this example we will present a method that is robust enough to take some noise and blur, and different lighting conditions thanks to the use of OpenGL ES 2.0 shaders running in the i.MX 6X  multimedia processor. Prerequisites This how-to assumes that the reader is an experienced i.mx developer and is familiar with the tools and techniques around this technology, also this paper assumes the reader has intermediate graphics knowledge and experience such as the RGBA structure of pictures and video frames and programming OpenGL based applications, as we will not dig in the details of the basic setup. Scope Within this paper, we will see how to implement a very fast color tracking application that uses the GPU instead of the CPU using OpenGL ES 2.0 shaders. Step 1: Gather all the components For this example we will use: 1.      i.MX6q ARD platform 2.      Linux ER5 3.      Oneric rootfs with ER5 release packages 4.      Open CV 2.0.0 source Step 2: building everything you need Refer to ER5 User´s Guide and Release notes on how to build and boot the board with the Ubuntu Oneric rootfs. After you are done, you will need to build the Open CV 2.0.0 source in the board, or you could add it to the ltib and have it built for you. NOTE: We will be using open CV only for convenience purposes, we will not use any if its advanced math or image processing  features (because everything happens on the CPU and that is what we are trying to avoid), but rather to have an easy way of grabbing and managing  frames from the USB camera. Step 3: Application setup Make sure that at this point you have a basic OpenGL Es 2.0 application running, a simple plane with a texture mapped to it should be enough to start. (Please refer to Freescale GPU examples). Step 4: OpenCV auxiliary code The basic idea of the workflow is as follows: a)      Get the live feed from the USB camera using openCV function cvCapture() and store into IplImage structure. b)      Create an OpenGL  texture that reads the IplImage buffer every frame and map it to a plane in OpenGL ES 2.0. c)      Use the Fragment Shader to perform fast image processing calculations, in this example we will examine the Sobel Filter and Binary Images that are the foundations for many complex Image Processing algorithms. d)      If necessary, perform multi-pass rendering to chain several image processing shaders  and get an end result. First we must import our openCV relevant headers: #include "opencv/cv.h" #include "opencv/cxcore.h" #include "opencv/cvaux.h" #include "opencv/highgui.h" Then we should define a texture size, for this example we will be using 320x240, but this can be easily changed to 640 x 480 #define TEXTURE_W 320 #define TEXTURE_H 240 We need to create an OpenCV capture device to enable its V4L camera and get the live feed: CvCapture *capture; capture = cvCreateCameraCapture (0); cvSetCaptureProperty (capture, CV_CAP_PROP_FRAME_WIDTH,  TEXTURE_W); cvSetCaptureProperty (capture, CV_CAP_PROP_FRAME_HEIGHT, TEXTURE_H); Note: when we are done, remember to close the camera stream: cvReleaseCapture (&capture); OpenCV has a very convenient structure used for storing pixel arrays (a.k.a. images) called IplImage IplImage *bgr_img1; IplImage *frame1; bgr_img1 = cvCreateImage (cvSize (TEXTURE_W, TEXTURE_H), 8, 4); OpenCV has a very convenient function for capturing a frame from the camera and storing it into a IplImage frame2 = cvQueryFrame(capture2); Then we will want to separate the camera capture process from the pos-processing filters and final rendering; hence, we should create a thread to exclusively handle the camera: #include <pthread.h> pthread_t camera_thread1; pthread_create (&camera_thread1, NULL, UpdateTextureFromCamera1,(void *)&thread_id); Your UpdateTextureFromCamera() function should be something like this: void *UpdateTextureFromCamera2 (void *ptr) {       while(1)       {             frame2 = cvQueryFrame(capture);             //cvFlip (frame2, frame2, 1);  // mirrored image             cvCvtColor(frame2, bgr_img2, CV_BGR2BGRA);       }       return NULL;    } Finally, the rendering loop should be something like this: while (! window->Kbhit ())       {                         tt = (double)cvGetTickCount();             Render ();             tt = (double)cvGetTickCount() - tt;             value = tt/(cvGetTickFrequency()*1000.);             printf( "\ntime = %gms --- %.2lf FPS", value, 1000.0 / value);             //key = cvWaitKey (30);       }       Step 5: Map the camera image to a GL Texture As you can see, you need a Render function call every frame, this white paper will not cover in detail the basic OpenGL  or EGL setup of the application, but we would rather focus on the ES 2.0 shaders. GLuint _texture; GLeglImageOES g_imgHandle; IplImage *_texture_data; The function to map the texture from our stored pixels in IplImage is quite simple: we just need to get the image data, that is basically a pixel array void GLCVPlane::PlaneSetTex (IplImage *texture_data) {       cvCvtColor (texture_data, _texture_data, CV_BGR2RGB);       glBindTexture(GL_TEXTURE_2D, _texture);       glTexImage2D (GL_TEXTURE_2D, 0, GL_RGB, _texture_w, _texture_h, 0, GL_RGB, GL_UNSIGNED_BYTE, _texture_data->imageData); } This function should be called inside our render loop: void Render (void) {   glClearColor (0.0f, 0.0f, 0.0f, 0.0f);   glClear (GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);   PlaneSetTex(bgr_img1); } At this point the OpenGL texture is ready to be used as a sampler in our Fragment Shader  mapped to a 3D plane Lastly,  when you are ready to draw your plane with the texture in it: // Set the shader program glUseProgram (_shader_program); … // Binds this texture handle so we can load the data into it /* Select Our Texture */ glActiveTexture(GL_TEXTURE0); //Select eglImage glEGLImageTargetTexture2DOES(GL_TEXTURE_2D, g_imgHandle); glDrawArrays (GL_TRIANGLES, 0, 6); Step 6: Use the GPU to do Image Processing First we need to make sure we have the correct Vertex Shader and Fragment shader, we will  focus only in the Fragment Shader, this is where we will process our image from the camera. Below you will find the most simple fragment shader, this one only colors pixels from the sample texture const char *planefrag_shader_src =       "#ifdef GL_FRAGMENT_PRECISION_HIGH                    \n"       "  precision highp float;                            \n"       "#else                                          \n"       "  precision mediump float;                    \n"       "#endif                                        \n"       "                                              \n"       "uniform sampler2D s_texture;                  \n"       "varying  vec3      g_vVSColor;                      \n"       "varying  vec2 g_vVSTexCoord;                        \n"       "                                              \n"       "void main()                                    \n"       "{                                              \n"       "    gl_FragColor = texture2D(s_texture,g_vVSTexCoord);    \n"       "}                                              \n"; Binary Image The most Simple Image Filter is the Binary Image, this one converts a source image to a black/white output, to decide if a color should be black or white we need a threshold,  everything below that threshold will be black, and any color above should be white.               The shader code is as follows: const char* g_strRGBtoBlackWhiteShader =     #ifdef GL_FRAGMENT_PRECISION_HIGH                            precision highp float;                            #else                                            precision mediump float;                          #endif                                            varying  vec2 g_vVSTexCoord;                  uniform sampler2D s_texture;                    uniform float threshold;                                                                        void main() {                                    vec3 current_Color = texture2D(s_texture,g_vVSTexCoord).xyz;         float luminance = dot (vec3(0.299,0.587,0.114),current_Color);         if(luminance>threshold)                      \n"             gl_FragColor = vec4(1.0);                \n"           else                                  \n"                          gl_FragColor = vec4(0.0);                \n"       }                                        \n"; You can notice that the main operation is to get a luminance value of the pixel, in order to achieve that we have to multiply a known vector (obtained empirically) by the current pixel, then we simply compare that luminance value with a threshold. Anything below that threshold will be black, and anything above that threshold will be considered a white pixel. SOBEL Operator Sobel is a very common filter, since it is used as a foundation for many complex Image Processing processes, particularly in edge detection algorithms. The sobel operator is based in convolutions, the convolution is made of a particular mask, often called a kernel (on common therms, usually a 3x3 matrix). The sobel operator calculates the gradient of the image at each pixel, so it tells us how it changes from the pixels surrounding the current pixel , meaning how it increases or decreases (darker to brighter values).           The shader is a bit long, since several operations must be performed, we shall discuss each of its parts below: First we need to get the texture coordinates from the Vertex Shader: const char* plane_sobel_filter_shader_src = #ifdef GL_FRAGMENT_PRECISION_HIGH                    precision highp float;                          #else                                    precision mediump float;                        #endif                                          varying  vec2 g_vVSTexCoord;                  uniform sampler2D s_texture;                    Then we should define our kernel, as stated before, a 3x3 matrix should be enough, and the following values have been tested with good results: mat3 kernel1 = mat3 (-1.0, -2.0, -1.0,                                          0.0, 0.0, 0.0,                                              1.0, 2.0, 1.0);    We also need a convenient way to convert to grayscale, since we only need grayscale information for the Sobel operator, remember that to convert to grayscale you only need an average of the three colors: float toGrayscale(vec3 source) {                    float average = (source.x+source.y+source.z)/3.0;        return average;              } Now we go to the important part, to actually perform the convolutions. Remember that by the OpenGL ES 2.0 spec, nor recursion nor dynamic indexing is supported, so we need to do our operations the hard way: by defining vectors and multiplying them. See the following code:   float doConvolution(mat3 kernel) {                              float sum = 0.0;                                    float current_pixelColor = toGrayscale(texture2D(s_texture,g_vVSTexCoord).xyz); float xOffset = float(1)/1024.0;                    float yOffset = float(1)/768.0; float new_pixel00 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-  xOffset,g_vVSTexCoord.y-yOffset)).xyz); float new_pixel01 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y-yOffset)).xyz); float new_pixel02 = toGrayscale(texture2D(s_texture,  vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y-yOffset)).xyz); vec3 pixelRow0 = vec3(new_pixel00,new_pixel01,new_pixel02); float new_pixel10 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-xOffset,g_vVSTexCoord.y)).xyz);\n" float new_pixel11 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y)).xyz); float new_pixel12 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y)).xyz); vec3 pixelRow1 = vec3(new_pixel10,new_pixel11,new_pixel12); float new_pixel20 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-xOffset,g_vVSTexCoord.y+yOffset)).xyz); float new_pixel21 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y+yOffset)).xyz); float new_pixel22 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y+yOffset)).xyz); vec3 pixelRow2 = vec3(new_pixel20,new_pixel21,new_pixel22); vec3 mult1 = (kernel[0]*pixelRow0);                  vec3 mult2 = (kernel[1]*pixelRow1);                  vec3 mult3 = (kernel[2]*pixelRow2);                  sum= mult1.x+mult1.y+mult1.z+mult2.x+mult2.y+mult2.z+mult3.x+     mult3.y+mult3.z;\n"     return sum;                                      } If you see the last part of our function, you can notice that we are adding the multiplication values to a sum, with this sum we will see the variation of each pixel regarding its neighbors. The last part of the shader is where we will use all our previous functions, it is worth to notice that the convolution needs to be applied horizontally and vertically for this technique to be complete: void main() {                                    float horizontalSum = 0.0;                            float verticalSum = 0.0;                        float averageSum = 0.0;                        horizontalSum = doConvolution(kernel1);        verticalSum = doConvolution(kernel2);            if( (verticalSum > 0.2)|| (horizontalSum >0.2)||(verticalSum < -0.2)|| (horizontalSum <-0.2))                        averageSum = 0.0;                      else                                                    averageSum = 1.0;                    gl_FragColor = vec4(averageSum,averageSum,averageSum,1.0);                }    Conclusions and future work At this point, if you have your application up and running, you can notice that Image Processing can be done quite fast, even with images larger than 640 480. This approach can be expanded to a variety of techniques like Tracking, Feature detection and Face detection. However, these techniques are out of scope for now, because this algorithms need multiple rendering passes (like face detection), where we need to perform an operation, then write the result to an offscreen buffer and use that buffer as an input for the next shader and so on.  But Freescale is planning to release an Application Note in Q4 2012 that will expand this white paper and cover these techniques in detail.
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This is a copy of the currently posted i.MX25 reference manual to be used to enter community comments.  Please feel free to add inline comments in this reference manual. You can point out where more information is needed or where existing information is incorrect.  You can also enter information in your comment that expands on existing information in the document, based on your experience with the device.  If you are pointing out that more information is needed in a paragraph or a section, please be very specific, not “needs more information”.  Your comments in this manual may help other members and will drive improvements in this and future documentation. Note: The doc viewer does not support going directly to a specified page.  Instead of manually paging through one page at a time, you can do a search on a string on a page such as "types of resets", or you can go to chapter links listed in the inline comments.  To do this, page down to the comments below the doc view, select "Inline Comments", sort the comments by "page", and then select the chapter you want to view.
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Dear IMX community, We usingiMX6 Quad processor and run Android 13.4, After below log file and android handup, We also run DDR stress test without problems found, Can anyone give a suggestions on this issue Best Regards, Jim ================================ U-Boot 2009.08-00008-g5f5b708-dirty (Mar 18 2013 - 17:23:58) CPU: Freescale i.MX6 family TO1.2 at 792 MHz Temperature:   52 C, calibration data 0x5b051d69 mx6q pll1: 792MHz mx6q pll2: 528MHz mx6q pll3: 480MHz mx6q pll8: 50MHz ipg clock     : 66000000Hz ipg per clock : 66000000Hz uart clock    : 80000000Hz cspi clock    : 60000000Hz ahb clock     : 132000000Hz axi clock   : 264000000Hz emi_slow clock: 29333333Hz ddr clock     : 528000000Hz usdhc1 clock  : 198000000Hz usdhc2 clock  : 198000000Hz usdhc3 clock  : 198000000Hz usdhc4 clock  : 198000000Hz nfc clock     : 24000000Hz Board: MX6Q-SABRELITE:[ POR] Boot Device: I2C I2C:   ready DRAM:   1 GB MMC:   FSL_USDHC: 0,FSL_USDHC: 1 JEDEC ID: 0x20:0x20:0x16 *** Warning - bad CRC, using default environment In:    serial Out:   serial Err:   serial Net:   got MAC address from IIM: 00:00:00:00:00:00 FEC0 [PRIME] Hit any key to stop autoboot:  0 mmc0(part 0) is current device reading /6q_bootscript 353 bytes read ## Executing script at 10008000 reading uimage 4016476 bytes read reading uramdisk.img 212592 bytes read ## Booting kernel from Legacy Image at 10800000 ...    Image Name:   Linux-3.0.35    Image Type:   ARM Linux Kernel Image (uncompressed)    Data Size:    4016412 Bytes =  3.8 MB    Load Address: 10008000    Entry Point:  10008000    Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 12800000 ...    Image Name:   Android Root Filesystem    Image Type:   ARM Linux RAMDisk Image (uncompressed)    Data Size:    212528 Bytes = 207.5 kB    Load Address: 12800000    Entry Point:  12800000    Verifying Checksum ... OK    Loading Kernel Image ... OK OK Starting kernel ... Initializing cgroup subsys cpuset Initializing cgroup subsys cpu Linux version 3.0.35 (leo@pluto) (gcc version 4.6.2 20120613 (release) [ARM/embedded-4_6-bra                                 nch revision 188521] (GNU Tools for ARM Embedded Processors) ) #10 SMP PREEMPT Tue Mar 19 11                                 :34:02 CST 2013 CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine: Freescale i.MX 6Quad Sabre-Lite Board Memory policy: ECC disabled, Data cache writealloc CPU identified as i.MX6Q, silicon rev 1.2 PERCPU: Embedded 7 pages/cpu @c1119000 s5760 r8192 d14720 u32768 Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 210944 Kernel command line: arm_freq=1000 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24 video=mxcfb1                                 :off console=ttymxc0,115200 init=/init rw no_console_suspend androidboot.console=ttymxc0 vma                                 lloc=400M PID hash table entries: 2048 (order: 1, 8192 bytes) Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) Memory: 576MB 256MB = 832MB total Memory: 833728k/833728k available, 214848k reserved, 442368K highmem Virtual kernel memory layout:     vector  : 0xffff0000 - 0xffff1000   (   4 kB)     fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)     DMA     : 0xfbe00000 - 0xffe00000   (  64 MB)     vmalloc : 0xd9800000 - 0xf2000000   ( 392 MB)     lowmem  : 0xc0000000 - 0xd9000000   ( 400 MB)     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)     modules : 0xbf000000 - 0xbfe00000   (  14 MB)       .init : 0xc0008000 - 0xc0041000   ( 228 kB)       .text : 0xc0041000 - 0xc0770fb0   (7360 kB)       .data : 0xc0772000 - 0xc07e0da0   ( 444 kB)        .bss : 0xc07e0dc4 - 0xc090f7d0   (1211 kB) Preemptible hierarchical RCU implementation. NR_IRQS:496 MXC GPIO hardware sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655ms MXC_Early serial console at MMIO 0x2020000 (options '115200') bootconsole [ttymxc0] enabled Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 Initializing cgroup subsys cpuacct CPU: Testing write buffer coherency: ok hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available CPU1: Booted secondary processor CPU2: Booted secondary processor CPU3: Booted secondary processor Brought up 4 CPUs SMP: Total of 4 processors activated (6324.22 BogoMIPS). print_constraints: dummy: NET: Registered protocol family 16 print_constraints: vddpu: 725 <--> 1300 mV at 1150 mV fast normal print_constraints: vddcore: 725 <--> 1300 mV at 1150 mV fast normal print_constraints: vddsoc: 725 <--> 1300 mV at 1200 mV fast normal print_constraints: vdd2p5: 2000 <--> 2775 mV at 2400 mV fast normal print_constraints: vdd1p1: 800 <--> 1400 mV at 1100 mV fast normal print_constraints: vdd3p0: 2800 <--> 3150 mV at 3000 mV fast normal ------------ Board type Sabre Lite Flexcan NXP tja1040 hw-breakpoint: found 6 breakpoint and 1 watchpoint registers. hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step. hw-breakpoint: maximum watchpoint size is 4 bytes. L310 cache controller enabled l2x0: 16 ways, CACHE_ID 0x410000c7, AUX_CTRL 0x02070000, Cache size: 1048576 B IMX usb wakeup probe bio: create slab <bio-0> at 0 print_constraints: VDDA: 2500 mV print_constraints: VDDIO: 3300 mV machine_constraints_voltage: VDDD: unsupportable voltage constraints reg-fixed-voltage reg-fixed-voltage.2: Failed to register regulator: -22 reg-fixed-voltage: probe of reg-fixed-voltage.2 failed with error -22 print_constraints: vmmc: 3300 mV SCSI subsystem initialized spi_imx imx6q-ecspi.0: probed usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb Freescale USB OTG Driver loaded, $Revision: 1.55 $ add wake up source irq 75 i2c i2c-0: Invalid 7-bit I2C address 0x00 i2c i2c-0: Can't create device at 0x00 imx-ipuv3 imx-ipuv3.0: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7) imx-ipuv3 imx-ipuv3.1: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7) mxc_mipi_csi2 mxc_mipi_csi2: i.MX MIPI CSI2 driver probed mxc_mipi_csi2 mxc_mipi_csi2: i.MX MIPI CSI2 dphy version is 0x3130302a MIPI CSI2 driver module loaded Advanced Linux Sound Architecture Driver Version 1.0.24. Bluetooth: Core ver 2.16 NET: Registered protocol family 31 Bluetooth: HCI device and connection manager initialized Bluetooth: HCI socket layer initialized Bluetooth: L2CAP socket layer initialized Bluetooth: SCO socket layer initialized i2c-core: driver [max17135] using legacy suspend method i2c-core: driver [max17135] using legacy resume method Switching to clocksource mxc_timer1 NET: Registered protocol family 2 IP route cache hash table entries: 16384 (order: 4, 65536 bytes) TCP established hash table entries: 65536 (order: 7, 524288 bytes) TCP bind hash table entries: 65536 (order: 7, 786432 bytes) TCP: Hash tables configured (established 65536 bind 65536) TCP reno registered UDP hash table entries: 256 (order: 1, 8192 bytes) UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. Unpacking initramfs... Freeing initrd memory: 204K Static Power Management for Freescale i.MX6 wait mode is enabled for i.MX6 cpaddr = d9880000 suspend_iram_base=d98fc000 PM driver module loaded IMX usb wakeup probe i.MXC CPU frequency driver highmem bounce pool size: 64 pages ashmem: initialized JFFS2 version 2.2. (NAND) ? 2001-2006 Red Hat, Inc. msgmni has been set to 764 io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) MIPI DSI driver module loaded mxc_sdc_fb mxc_sdc_fb.0: register mxc display driver hdmi mxc_hdmi mxc_hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1 fbcvt: 1920x1080@60: CVT Name - 2.073M9 imx-ipuv3 imx-ipuv3.0: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7) mxc_sdc_fb mxc_sdc_fb.1: Can't get fb option for mxcfb1! mxc_sdc_fb mxc_sdc_fb.2: register mxc display driver ldb _regulator_get: get() with no identifier mxc_sdc_fb mxc_sdc_fb.3: register mxc display driver ldb mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 0(VIC 16): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 1(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 2(VIC 1): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 3(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 4(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 5(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 6(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 7(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 8(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 9(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 10(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 11(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 12(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 13(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 14(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 15(VIC 0): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 16(VIC 16): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 18(VIC 1): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 19(VIC 2): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 20(VIC 3): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 21(VIC 4): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 22(VIC 31): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 23(VIC 19): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 24(VIC 17): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 25(VIC 18): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 29(VIC 16): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 30(VIC 3): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 31(VIC 4): mxc_hdmi mxc_hdmi: mxc_hdmi_edid_rebuild_modelist: Added mode 32(VIC 18): fbcvt: 1920x1080@60: CVT Name - 2.073M9 imx-sdma imx-sdma: loaded firmware 1.1 imx-sdma imx-sdma: initialized Serial: IMX driver imx-uart.0: ttymxc0 at MMIO 0x2020000 (irq = 58) is a IMX console [ttymxc0] enabled, bootconsole disabled console [ttymxc0] enabled, bootconsole disabled imx-uart.1: ttymxc1 at MMIO 0x21e8000 (irq = 59) is a IMX imx-uart.2: ttymxc2 at MMIO 0x21ec000 (irq = 60) is a IMX loop: module loaded m25p80 spi0.0: m25p32 (4096 Kbytes) Creating 3 MTD partitions on "m25p80": 0x000000000000-0x0000000c0000 : "bootloader" 0x0000000c0000-0x0000000c2000 : "ubparams" mtd: partition "ubparams" doesn't end on an erase block -- force read-only 0x0000000c2000-0x000000400000 : "unused" mtd: partition "unused" doesn't start on an erase block boundary -- force read-only vcan: Virtual CAN interface driver CAN device driver interface flexcan netdevice driver flexcan imx6q-flexcan.0: device registered (reg_base=d9970000, irq=142) FEC Ethernet Driver fec_enet_mii_bus: probed PPP generic driver version 2.4.2 PPP Deflate Compression module registered PPP BSD Compression module registered PPP MPPE Compression module registered NET: Registered protocol family 24 PPTP driver version 0.8.5 tun: Universal TUN/TAP device driver, 1.6 tun: (C) 1999-2004 Max Krasnyansky <[email protected]> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver fsl-ehci fsl-ehci.0: Freescale On-Chip EHCI Host Controller fsl-ehci fsl-ehci.0: new USB bus registered, assigned bus number 1 fsl-ehci fsl-ehci.0: irq 75, io base 0x02184000 fsl-ehci fsl-ehci.0: USB 2.0 started, EHCI 1.00 hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected add wake up source irq 72 fsl-ehci fsl-ehci.1: Freescale On-Chip EHCI Host Controller fsl-ehci fsl-ehci.1: new USB bus registered, assigned bus number 2 fsl-ehci fsl-ehci.1: irq 72, io base 0x02184200 fsl-ehci fsl-ehci.1: USB 2.0 started, EHCI 1.00 hub 2-0:1.0: USB hub found hub 2-0:1.0: 1 port detected usbcore: registered new interface driver cdc_acm cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters Initializing USB Mass Storage driver... usbcore: registered new interface driver usb-storage USB Mass Storage support registered. usbcore: registered new interface driver usbserial usbserial: USB Serial Driver core USB Serial support registered for GSM modem (1-port) usbcore: registered new interface driver option option: v0.7.2:USB Driver for GSM modems USB Serial support registered for Qualcomm USB modem usbcore: registered new interface driver qcserial ARC USBOTG Device Controller driver (1 August 2005) android_usb gadget: Mass Storage Function, version: 2009/09/11 android_usb gadget: Number of LUNs=1 lun0: LUN: removable file: (no medium) Gadget Android: controller 'fsl-usb2-udc' not recognized android_usb gadget: android_usb ready Suspend udc for OTG auto detect fsl-usb2-udc: bind to driver android_usb mousedev: PS/2 mouse device common for all mice input: gpio-keys as /devices/platform/gpio-keys/input/input0 egalax_ts 2-0004: egalax_ts: failed to read firmware version egalax_ts: probe of 2-0004 failed with error -5 input: ak4183ts as /devices/platform/imx-i2c.1/i2c-1/1-0048/input/input1 i2c-core: driver [isl29023] using legacy suspend method i2c-core: driver [isl29023] using legacy resume method using rtc device, snvs_rtc, for alarms snvs_rtc snvs_rtc.0: rtc core: registered snvs_rtc as rtc0 i2c /dev entries driver Linux video capture interface: v2.00 ov5640_read_reg:write reg error:reg=300a ov5640_probe:cannot find camera mxc_v4l2_output mxc_v4l2_output.0: V4L2 device registered as video16 mxc_v4l2_output mxc_v4l2_output.0: V4L2 device registered as video17 mxc_v4l2_output mxc_v4l2_output.0: V4L2 device registered as video18 mxc_v4l2_output mxc_v4l2_output.0: V4L2 device registered as video19 mxc_v4l2_output mxc_v4l2_output.0: V4L2 device registered as video20 usbcore: registered new interface driver uvcvideo USB Video Class driver (v1.1.0) i2c-core: driver [mag3110] using legacy suspend method i2c-core: driver [mag3110] using legacy resume method usb 2-1: new high speed USB device number 2 using fsl-ehci imx2-wdt imx2-wdt.0: IMX2+ Watchdog Timer enabled. timeout=60s (nowayout=1) device-mapper: uevent: version 1.0.3 device-mapper: ioctl: 4.20.0-ioctl (2011-02-02) initialised: [email protected] Bluetooth: Virtual HCI driver ver 1.3 Bluetooth: HCI UART driver ver 2.2 Bluetooth: HCIATH3K protocol initialized Bluetooth: Generic Bluetooth USB driver ver 0.6 usbcore: registered new interface driver btusb sdhci: Secure Digital Host Controller Interface driver sdhci: Copyright(c) Pierre Ossman mmc0: SDHCI controller on platform [sdhci-esdhc-imx.2] using DMA sdhci sdhci-esdhc-imx.3: no write-protect pin available! mmc1: SDHCI controller on platform [sdhci-esdhc-imx.3] using DMA mxc_vdoa mxc_vdoa: i.MX Video Data Order Adapter(VDOA) driver probed VPU initialized mxc_asrc registered revserved_memory_account:viv_gpu registerd Thermal calibration data is 0x5b051d69 anatop_thermal_counting_ratio: raw25c=1456 raw_hot=1309 hot_temp=105 Anatop Thermal registered as thermal_zone0 anatop_thermal_probe: default cooling device is cpufreq! usbcore: registered new interface driver usbhid usbhid: USB HID core driver logger: created 256K log 'log_main' logger: created 256K log 'log_events' hub 2-1:1.0: USB hub found logger: created 256K log 'log_radio' logger: created 256K log 'log_system' usbcore: registered new interface driver snd-usb-audio mxc_hdmi_soc mxc_hdmi_soc.0: MXC HDMI Audio Cirrus Logic CS42888 ALSA SoC Codec Driver i2c-core: driver [cs42888] using legacy suspend method i2c-core: driver [cs42888] using legacy resume method hub 2-1:1.0: 4 ports detected mmc0: new high speed MMC card at address 0001 mmcblk0: mmc0:0001 eMMC   3.71 GiB mmcblk0boot0: mmc0:0001 eMMC   partition 1 2.00 MiB mmcblk0boot1: mmc0:0001 eMMC   partition 2 2.00 MiB mmcblk0: p1 p2 p3 < p5 p6 p7 p8 p9 > p4 mmcblk0boot1: unknown partition table mmcblk0boot0: unknown partition table asoc: sgtl5000 <-> imx-ssi.1 mapping ok imx_3stack asoc driver asoc: mxc-hdmi-soc <-> imx-hdmi-soc-dai.0 mapping ok ALSA device list:   #0: sgtl5000-audio   #1: imx-hdmi-soc Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (13030 buckets, 52120 max) ctnetlink v0.93: registering with nfnetlink. NF_TPROXY: Transparent proxy support initialized, version 4.1.0 NF_TPROXY: Copyright (c) 2006-2007 BalaBit IT Ltd. xt_time: kernel timezone is -0000 IPv4 over IPv4 tunneling driver GRE over IPv4 demultiplexor driver ip_tables: (C) 2000-2006 Netfilter Core Team arp_tables: (C) 2002 David S. Miller TCP cubic registered NET: Registered protocol family 10 ip6_tables: (C) 2000-2006 Netfilter Core Team IPv6 over IPv4 tunneling driver NET: Registered protocol family 17 NET: Registered protocol family 15 can: controller area network core (rev 20090105 abi 😎 NET: Registered protocol family 29 can: raw protocol (rev 20090105) can: broadcast manager protocol (rev 20090105 t) Bluetooth: RFCOMM TTY layer initialized Bluetooth: RFCOMM socket layer initialized Bluetooth: RFCOMM ver 1.11 Bluetooth: BNEP (Ethernet Emulation) ver 1.3 Bluetooth: BNEP filters: protocol multicast Bluetooth: HIDP (Human Interface Emulation) ver 1.2 L2TP core driver, V2.0 PPPoL2TP kernel driver, V2.0 L2TP IP encapsulation support (L2TPv3) L2TP netlink interface L2TP ethernet pseudowire support (L2TPv3) lib80211: common routines for IEEE802.11 drivers VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 Bus freq driver module loaded Bus freq driver Enabled mxc_dvfs_core_probe DVFS driver module loaded regulator_init_complete: VDDIO: incomplete constraints, leaving on regulator_init_complete: VDDA: incomplete constraints, leaving on regulator_init_complete: vddpu: incomplete constraints, leaving on snvs_rtc snvs_rtc.0: setting system clock to 1970-01-02 00:04:27 UTC (86667) Freeing init memory: 228K usb 2-1.4: new low speed USB device number 3 using fsl-ehci init (1): /proc/1/oom_adj is deprecated, please use /proc/1/oom_score_adj instead. input: HID 04d9:0499 as /devices/platform/fsl-ehci.1/usb2/2-1/2-1.4/2-1.4:1.0/input/input2 generic-usb 0003:04D9:0499.0001: input,hidraw0: USB HID v1.10 Mouse [HID 04d9:0499] on usb-f                                 sl-ehci.1-1.4/input0 EXT4-fs (mmcblk0p5): recovery complete EXT4-fs (mmcblk0p5): mounted filesystem with ordered data mode. Opts: (null) EXT4-fs (mmcblk0p7): recovery complete EXT4-fs (mmcblk0p7): mounted filesystem with ordered data mode. Opts: noauto_da_alloc,errors                                 =panic EXT4-fs (mmcblk0p6): warning: mounting unchecked fs, running e2fsck is recommended EXT4-fs (mmcblk0p6): mounted filesystem without journal. Opts: (null) init: cannot find '/system/bin/gpu_init.sh', disabling 'gpu_init' init: cannot find '/system/etc/install-recovery.sh', disabling 'flash_recovery' android_usb: already disabled adb_open mtp_bind_config adb_bind_config warning: `rild' uses 32-bit capabilities (legacy support in use) root@android:/ # ERROR: v4l2 capture: slave not found! ERROR: v4l2 capture: slave not found! request_suspend_state: wakeup (3->0) at 20324699670 (1970-01-02 00:04:45.205101336 UTC) eth0: Freescale FEC PHY driver [Micrel KSZ9021 Gigabit PHY] (mii_bus:phy_addr=1:07, irq=284) ADDRCONF(NETDEV_UP): eth0: link is not ready acc_open acc_release PHY: 1:07 - Link is Up - 100/Full ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready CPU3: shutdown CPU2: shutdown Unable to handle kernel paging request at virtual address f40c4010 pgd = d3e04000 [f40c4010] *pgd=02011452(bad) Internal error: Oops: 2d [#1] PREEMPT SMP Modules linked in: CPU: 0    Not tainted  (3.0.35 #10) PC is at _clk_arm_get_rate+0xc/0x28 LR is at clk_get_rate+0x40/0x50 pc : [<c005ac7c>]    lr : [<c006650c>]    psr: a0000193 sp : d3e51db0  ip : c004c6b0  fp : d3ceae00 r10: 00100100  r9 : c111a588  r8 : 00200200 r7 : 010da000  r6 : 00000001  r5 : d6f15e8c  r4 : c07e1040 r3 : f40c4000  r2 : d3e51dd8  r1 : 00000000  r0 : c0790430 Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment user Control: 10c53c7d  Table: 23e0404a  DAC: 00000015 PC: 0xc005abfc: abfc  1affffdc eaffffee c078f07c c07e1654 c078f0d0 e92d4010 e59f304c e5900028 ac1c  e1500003 0a000007 e59f3040 e1500003 13a04001 0a000003 eb002e24 e1a01004 ac3c  eb076b36 e8bd8010 e3a03901 e34f340c e5934014 eb002e1d e7e24dd4 e2844001 ac5c  e1a01004 eb076b2d e8bd8010 c078f124 c078e260 e3a03901 e34f240c e92d4010 ac7c  e5934010 e5900028 eb002e10 e2041007 e2811001 eb076b21 e8bd8010 e92d4038 ac9c  e1a05001 e5900028 eb002e08 e1a01005 e1a04000 eb076b19 e2501000 03a01001 acbc  0a000001 e3510040 23a01040 e1a00004 eb076b12 e8bd8038 e92d40f8 e1a05001 acdc  e5900028 eb002df9 e1a01005 e1a07000 eb076b0a e2504000 01a06004 03a04001 LR: 0xc006648c: 648c  c07e1684 c0574908 c06a6f80 e59f3010 e3500000 e593000c 1a000000 ea000167 64ac  ea000189 c07e15fc e3500000 012fff1e e3700a01 91d003d0 83a00000 e12fff1e 64cc  e3500000 e92d4008 08bd8008 e3700a01 83a00000 9a000005 e8bd8008 e5900028 64ec  e3500000 0a000006 e3700a01 8a000005 e590303c e3530000 0afffff7 e12fff33 650c  e8bd8008 e8bd8008 e3a00000 e8bd8008 e92d4008 e2503000 01a00003 08bd8008 652c  e3730a01 83a00000 88bd8008 e5933044 e3530000 0a000001 e12fff33 e8bd8008 654c  e1a00003 e8bd8008 e3500000 012fff1e e3700a01 95900028 83a00000 e12fff1e 656c  e3500000 e92d4010 e1a04001 1a000003 ea00000d e5900028 e3500000 0a00000a SP: 0xd3e51d30: 1d30  c111a040 c1119040 00000006 00000003 00000006 c1119040 00000000 393f7476 1d50  00000006 0000040f 0000000d 00000001 010da000 c00469d0 c0790430 00000000 1d70  d3e51dd8 f40c4000 c07e1040 d6f15e8c 00000001 010da000 00200200 c111a588 1d90  00100100 d3ceae00 c004c6b0 d3e51db0 c006650c c005ac7c a0000193 ffffffff 1db0  c07e1040 c006650c c0059e84 c0059e90 c0059e84 c006650c c004c6d8 c004c6ec 1dd0  d3e51dd8 c00a799c d3e51dd8 d3e51dd8 c0783cd0 d3e50000 c003fc18 00000000 1df0  00000000 d3e51e20 d6085a00 c00412c0 ffffffff f2a00100 00000405 00000001 1e10  00000000 d3e50000 d6085a00 c0046a4c 00000000 010da000 00000000 d3e50000 IP: 0xc004c630: c630  e59f3018 e1a0000c e5933004 e12fff33 e28dd014 e8bd8000 c078b1c8 c004c16c c650  c0783a2c e3510003 e1a0c00d e3cc2d7f 93a03000 83a03001 e3510001 03833001 c670  e3c2203f e3530000 e5922014 1a000009 e3520003 ca000007 e2822008 e7d0c002 c690  e20cc0fc e18c1001 e6ef1071 e7c01002 e1a00003 e12fff1e e3e03015 eafffffb c6b0  e3013040 e34c307e e1a01000 e3a00000 e5933000 e5932008 e5831004 e3822001 c6d0  e5832008 e12fff1e e92d4010 e3014040 e34c407e e5940004 eb006777 e1a0300d c6f0  e3c3cd7f e3032cd0 e3ccc03f e34c2078 e594300c e59cc014 e792210c e1a01000 c710  e5840008 e7930002 e8bd4010 ea015288 e59f304c e593000c e3500000 012fff1e FP: 0xd3cead80: ad80  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ada0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 adc0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ade0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ae00  c10d5580 00000001 00000000 00000000 00000000 00000000 c10d5580 00000001 ae20  00000000 00000000 00000000 00000000 c10d5580 00000001 00000000 00000000 ae40  00000000 00000000 c10d5580 00000001 00000000 00000000 00000000 00000000 ae60  c10d5580 00000001 00000000 00000000 00000000 00000000 c10d5580 00000001 R0: 0xc07903b0: 03b0  c06a7998 c078f9ac c07903cc c07903a4 c06a79a4 c06a9e14 c0791738 c07903e0 03d0  c07903b8 c06a79b4 c06a9e14 c079178c c07903f4 c07903cc c06a79c4 c06a9e14 03f0  c07917e0 c0790408 c07903e0 00000000 c06a79d4 c07906d0 c079041c c07903f4 0410  00000000 c06a79e0 c078f568 c07cd698 c0790408 00000000 c06a79ec c078f5bc 0430  5f757063 006b6c63 00000000 00000000 00000000 00000000 00000000 00000000 0450  d40a0228 00000000 c078f4c0 00000000 00000001 00000000 00000000 c005ac70 0470  c005bc28 00000000 00000000 00000000 00000000 61746173 6b6c635f 00000000 0490  00000000 00000000 00000000 00000000 00000000 d4044aa8 00000000 c078f370 R2: 0xd3e51d58: 1d58  0000000d 00000001 010da000 c00469d0 c0790430 00000000 d3e51dd8 f40c4000 1d78  c07e1040 d6f15e8c 00000001 010da000 00200200 c111a588 00100100 d3ceae00 1d98  c004c6b0 d3e51db0 c006650c c005ac7c a0000193 ffffffff c07e1040 c006650c 1db8  c0059e84 c0059e90 c0059e84 c006650c c004c6d8 c004c6ec d3e51dd8 c00a799c 1dd8  d3e51dd8 d3e51dd8 c0783cd0 d3e50000 c003fc18 00000000 00000000 d3e51e20 1df8  d6085a00 c00412c0 ffffffff f2a00100 00000405 00000001 00000000 d3e50000 1e18  d6085a00 c0046a4c 00000000 010da000 00000000 d3e50000 d67c9c60 0000002a 1e38  00000001 00000001 c10d5580 00000000 d6085a00 d3ceae00 00000000 d3e51e68 R3: 0xf40c3f80: 3f80  ******** ******** ******** ******** ******** ******** ******** ******** 3fa0  ******** ******** ******** ******** ******** ******** ******** ******** 3fc0  ******** ******** ******** ******** ******** ******** ******** ******** 3fe0  ******** ******** ******** ******** ******** ******** ******** ******** 4000  ******** ******** ******** ******** ******** ******** ******** ******** 4020  ******** ******** ******** ******** ******** ******** ******** ******** 4040  ******** ******** ******** ******** ******** ******** ******** ******** 4060  ******** ******** ******** ******** ******** ******** ******** ******** R4: 0xc07e0fc0: 0fc0  412fc09a 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0fe0  c07a0b20 c07ccc64 00000000 00000000 00000000 c0798518 00000001 00000000 1000  00000001 00000000 00000000 d8fff000 00000000 c0067230 c00542e0 00000000 1020  10004000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1040  d9800600 c0790874 0bcd3d80 c0043028 00000000 00000000 00030000 00000005 1060  00000001 00000001 00000004 00000000 00000000 c078c518 00000000 00000000 1080  00000000 00000000 00000000 d60e8000 d60e9000 d60ea000 d60eb000 d60ec000 10a0  d60ed000 d60ee000 d60ef000 d60f0000 d60f1000 d60f2000 d60f3000 d60f4000 R5: 0xd6f15e0c: 5e0c  00000002 00000001 c0046a4c c0574e78 00000005 f2a01000 00000001 d6f15e8c 5e2c  c111a580 00000000 c111a580 010da000 c111a588 00000001 c0574f04 00000000 5e4c  d6f15e60 c004bbac c00a708c 20000113 ffffffff d6f14000 00000000 c004c6d8 5e6c  00000001 c0574f00 c0783cd0 d6f15f3c c00a71c0 c0041eb0 d6134600 80002001 5e8c  00100100 00200200 c004c6d8 00000000 00000001 00018d00 ffffffff c07ccdcc 5eac  00000000 d6f15f3c 00000001 d6f15f3c c004c850 c004c808 c0098c2c c07ff7fc 5ecc  c07ff7e4 00000000 00000001 ffffffff c0098d80 00000000 001312d0 00000000 5eec  d6f15f3c d63128e0 00000000 c0783ac4 00000004 c0783b00 c0098db4 00000000 R9: 0xc111a508: a508  00008288 00000000 2b85e900 00000006 00000000 00000000 0008f4da 00000000 a528  ffff968e ffffffe5 d6f93800 00000000 00000000 00000000 00000000 00000000 a548  00000000 00000000 00000000 00000000 00000000 00000000 c07740e0 00200200 a568  c00972ac 00000000 00000000 00000000 00000000 00000000 c111a580 c111a580 a588  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 a5a8  00000000 00000000 00000000 00000000 00000000 00000000 00000000 c111a5c0 a5c8  c111a5c8 c111a5c8 00000000 c111a5d4 c111a5d4 00000000 00000000 00000000 a5e8  00000084 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Process WindowManagerPo (pid: 2301, stack limit = 0xd3e502f0) Stack: (0xd3e51db0 to 0xd3e52000) 1da0:                                     c07e1040 c006650c c0059e84 c0059e90 1dc0: c0059e84 c006650c c004c6d8 c004c6ec d3e51dd8 c00a799c d3e51dd8 d3e51dd8 1de0: c0783cd0 d3e50000 c003fc18 00000000 00000000 d3e51e20 d6085a00 c00412c0 1e00: ffffffff f2a00100 00000405 00000001 00000000 d3e50000 d6085a00 c0046a4c 1e20: 00000000 010da000 00000000 d3e50000 d67c9c60 0000002a 00000001 00000001 1e40: c10d5580 00000000 d6085a00 d3ceae00 00000000 d3e51e68 c0103478 c0114ba8 1e60: 60000013 ffffffff c0103478 c0114b38 60000013 c0103478 00000000 00000001 1e80: d3e51f40 00000001 00000001 0000000e d3e50000 d4288e7c ffffffff fffffdee 1ea0: d6085a00 00000000 00000000 d3e51f80 d3e50000 00000000 5c66e6f4 c00fb338 1ec0: 00000000 00000000 d61e0f8c 00000000 00000000 00000001 ffffffff d6085a00 1ee0: 00000000 00000000 00000000 00000000 d6f93be0 c0047184 00000000 00000000 1f00: 00000000 00000000 d3e51f08 d3e51f08 00000001 d3e50000 00000001 d624ea48 1f20: d6ee11a0 00000001 00000001 00000000 00000000 00000000 5eacafff d624ea48 1f40: 4007a0e4 00000000 d6085a00 00000001 4007a0e3 d3e51f80 00000001 c00fba3c 1f60: 00000000 c00fd050 d6085a00 4007a0e3 00000000 00000000 00000001 c00fbcac 1f80: 00000000 00000000 006ae0fc 00000001 4007a0e3 006ae0e8 00000000 00000004 1fa0: c0047184 c0047000 4007a0e3 006ae0e8 0000005d 4007a0e3 00000001 5bc63d90 1fc0: 4007a0e3 006ae0e8 00000000 00000004 5c66e6e0 5bc63d38 00000000 5c66e6f4 1fe0: 4007d058 5c66e6b8 40075d1b 400c5474 20000010 0000005d 00000000 00000000 [<c005ac7c>] (_clk_arm_get_rate+0xc/0x28) from [<c006650c>] (clk_get_rate+0x40/0x50) [<c006650c>] (clk_get_rate+0x40/0x50) from [<c0059e90>] (_clk_twd_get_rate+0xc/0x14) [<c0059e90>] (_clk_twd_get_rate+0xc/0x14) from [<c006650c>] (clk_get_rate+0x40/0x50) [<c006650c>] (clk_get_rate+0x40/0x50) from [<c004c6ec>] (twd_update_frequency+0x14/0x48) [<c004c6ec>] (twd_update_frequency+0x14/0x48) from [<c00a799c>] (generic_smp_call_function_s                                 ingle_interrupt+0xd0/0x130) [<c00a799c>] (generic_smp_call_function_single_interrupt+0xd0/0x130) from [<c00412c0>] (do_I                                 PI+0xec/0x208) [<c00412c0>] (do_IPI+0xec/0x208) from [<c0046a4c>] (__irq_svc+0x4c/0xe8) Exception stack(0xd3e51e20 to 0xd3e51e68) 1e20: 00000000 010da000 00000000 d3e50000 d67c9c60 0000002a 00000001 00000001 1e40: c10d5580 00000000 d6085a00 d3ceae00 00000000 d3e51e68 c0103478 c0114ba8 1e60: 60000013 ffffffff [<c0046a4c>] (__irq_svc+0x4c/0xe8) from [<c0114ba8>] (mnt_drop_write+0x70/0xa4) [<c0114ba8>] (mnt_drop_write+0x70/0xa4) from [<c0103478>] (pipe_write+0x26c/0x510) [<c0103478>] (pipe_write+0x26c/0x510) from [<c00fb338>] (do_sync_write+0xa4/0xe4) [<c00fb338>] (do_sync_write+0xa4/0xe4) from [<c00fba3c>] (vfs_write+0xa8/0x138) [<c00fba3c>] (vfs_write+0xa8/0x138) from [<c00fbcac>] (sys_write+0x40/0x6c) [<c00fbcac>] (sys_write+0x40/0x6c) from [<c0047000>] (ret_fast_syscall+0x0/0x30) Code: c078e260 e3a03901 e34f240c e92d4010 (e5934010) ---[ end trace dcbcbc34e4f8c36f ]--- Kernel panic - not syncing: Fatal exception in interrupt [<c004cdb0>] (unwind_backtrace+0x0/0xf8) from [<c056c398>] (panic+0x74/0x18c) [<c056c398>] (panic+0x74/0x18c) from [<c004aad4>] (die+0x220/0x284) [<c004aad4>] (die+0x220/0x284) from [<c056c1a8>] (__do_kernel_fault.part.3+0x54/0x74) [<c056c1a8>] (__do_kernel_fault.part.3+0x54/0x74) from [<c0050ae0>] (do_translation_fault+0x                                 0/0xa0) [<c0050ae0>] (do_translation_fault+0x0/0xa0) from [<f40c4010>] (0xf40c4010) CPU1: stopping [<c004cdb0>] (unwind_backtrace+0x0/0xf8) from [<c00413a8>] (do_IPI+0x1d4/0x208) [<c00413a8>] (do_IPI+0x1d4/0x208) from [<c0046a4c>] (__irq_svc+0x4c/0xe8) Exception stack(0xd6f15e18 to 0xd6f15e60) 5e00:                                                       c0574e78 00000005 5e20: f2a01000 00000001 d6f15e8c c111a580 00000000 c111a580 010da000 c111a588 5e40: 00000001 c0574f04 00000000 d6f15e60 c004bbac c00a7088 20000113 ffffffff [<c0046a4c>] (__irq_svc+0x4c/0xe8) from [<c00a7088>] (generic_exec_single+0x70/0x90) [<c00a7088>] (generic_exec_single+0x70/0x90) from [<c00a71c0>] (smp_call_function_single+0x1                                 18/0x1d0) [<c00a71c0>] (smp_call_function_single+0x118/0x1d0) from [<c004c850>] (twd_cpufreq_transitio                                 n+0x48/0x58) [<c004c850>] (twd_cpufreq_transition+0x48/0x58) from [<c0098c2c>] (notifier_call_chain+0x44/                                 0x84) [<c0098c2c>] (notifier_call_chain+0x44/0x84) from [<c0098d80>] (__srcu_notifier_call_chain+0                                 x44/0x60) [<c0098d80>] (__srcu_notifier_call_chain+0x44/0x60) from [<c0098db4>] (srcu_notifier_call_ch                                 ain+0x18/0x20) [<c0098db4>] (srcu_notifier_call_chain+0x18/0x20) from [<c037e508>] (cpufreq_notify_transiti                                 on+0xa0/0xe0) [<c037e508>] (cpufreq_notify_transition+0xa0/0xe0) from [<c006959c>] (mxc_set_target+0x194/0                                 x220) [<c006959c>] (mxc_set_target+0x194/0x220) from [<c037dcc4>] (__cpufreq_driver_target+0x50/0x                                 64) [<c037dcc4>] (__cpufreq_driver_target+0x50/0x64) from [<c0382aa8>] (cpufreq_interactive_up_t                                 ask+0x168/0x1b4) [<c0382aa8>] (cpufreq_interactive_up_task+0x168/0x1b4) from [<c00939b0>] (kthread+0x80/0x88) [<c00939b0>] (kthread+0x80/0x88) from [<c0047ae4>] (kernel_thread_exit+0x0/0x8)
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1. INTRODUCTION:      This document explains the general and basic steps to customize U-Boot for your own board. The board used in this document it is a working and stable board, the UDOO board (http://udoo.org). 2. REQUIREMENTS:     Install Yocto Project. See the Freescale Yocto Project User's Guide.     Generate and install the meta-toolchain. Follow this great training to do so  Yocto Training - HOME     Generate core-image-minimal of L3.14.28 of FSL BSP obtained from https://www.freescale.com/webapp/Download?colCode=L3.14.28_1.0.0_iMX6QDLS_BUNDLE&appType=license&location=null&Parent_no…   3. ADDING i.MX6 CUSTOM BOARD SUPPORT FOR U-BOOT.     This section follows the steps found in Chapter 1 of the i.MX6 BSP Porting Guide of the Yocto documentation (L3.14.28) https://www.freescale.com/webapp/Download?colCode=L3.14.28_1.0.0_LINUX_DOCS&location=null&fpsp=1&WT_TYPE=Supporting%20In… . Obtain U-Boot Source Code. After having installed Yocto project and generate a valid imx6 image, the U-Boot code should be located at <build directory>/tmp/work/<machine>-poky-linuxgnueabi/u-boot-imx/<version>/git. Prepare the Code. Choose a board as reference, this board should be as similar as possible to your custom board. Copy the board directory :                $ cp -R board/freescale/mx6sabresd/ board/freescale/mx6_udoo Copy the existing mx6sabresd.h configuration file as mx6_udoo.h                $ cp include/configs/mx6sabresd.h include/configs/mx6_udoo.h Create one entry in boards.cfg. Add a configuration entry in the boards.cfg file. Active  arm  armv7  mx6  freescale  mx6_udoo mx6_udoo mx6_udoo:IMX_CONFIG=board/freescale/mx6_udoo/mx6dl_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-udoo.dtb",DDR_MB=1024 Rename <board>.c file. Rename board/freescale/mx6sabresd/mx6sabresd.c   to   board/freescale/mx6_udoo/mx6_udoo.c Modify Makefile. Change the line of COBJS to your custom board at  board/freescale/mx6_udoo/:      obj-y  := mx6sabresd.o Create a Shell script. Create a script to compile your new configuration. The script for this example is shown below and its name is build_u-boot.sh: #!/bin/bash export ARCH=arm export CROSS_COMPILE=/opt/poky/1.7/sysroots/x86_64-pokysdk-linux/usr/bin/arm-poky-linux-gnueabi/arm-poky-linux-gnueabi- make distclean; make mx6_udoo_config make Run the script to verify if the new configuration is correct.      $./build_u-boot.sh 4. CUSTOMIZING BOARD CODE      The fist part to customize is the DCD table. The DCD table contains configuration data for the DDR controller and memory. The DCD is read by the BootROM code in the iMX family and executed before copying the Uboot image to DDR. The DCD is built in the .cfg file pointed in the new entry we just added in the boards.cfg file (mx6dl_4x_mt41j128.cfg). Below you can find an example of the data that can be found in this file: /* * Device Configuration Data (DCD) * * Each entry must have the format: * Addr-type           Address        Value * * where: *      Addr-type register length (1,2 or 4 bytes) *      Address   absolute address of the register *      value     value to be stored in the register */ DATA 4, 0x020e0774, 0x000C0000 DATA 4, 0x020e0754, 0x00000000 DATA 4, 0x020e04ac, 0x00000030 DATA 4, 0x020e04b0, 0x00000030 DATA 4, 0x020e0464, 0x00000030 DATA 4, 0x020e0490, 0x00000030 DATA 4, 0x020e074c, 0x00000030 DATA 4, 0x020e0494, 0x00000030 DATA 4, 0x020e04a0, 0x00000000 The .cfg files used in this example were taken from an old U-Boot version (2009) non dtb capable. The used files are found in the attached .zip file. The specific initialization code for each board is found in mx6<customer board>.c in board/freescale/mx6<customer board>.c  in this case board/freescale/mx6_udoo/mx6_udoo.c file. Below it is explained the needed changes to route the serial console to the correct UART module, disable an external watchdog, configure and initialize the Ethernet PHY, change the lvds clock and configure the correct USDHC module.        U-Boot calls already defined functions from a function pointer array that takes care of the board initialization at different stages. For example the board_early_init_f() is called at an        early phase where we can disable the wdog and initialize the uart pins; board_init() and board_late_init() are called after board_early_init_f(). The UDOO board features an external watchdog that needs to be disabled with a GPIO, otherwise U-Boot resets after a few seconds:          The WDOG pins need to be configured and in the mx6_udoo.c file a global struct configuration for those pins is declared, as well as macros for each pin #define WDT_EN  IMX_GPIO_NR(5, 4) #define WDT_TRG IMX_GPIO_NR(3, 19) iomux_v3_cfg_t const wdog_pads[] = {         MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),         MX6_PAD_EIM_D19__GPIO3_IO19, }; static void setup_iomux_wdog(void) {         imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));         gpio_direction_output(WDT_TRG, 0);         gpio_direction_output(WDT_EN, 1);         gpio_direction_input(WDT_TRG); } This configuration needs to be called at some point of the board_early_init_f() int board_early_init_f(void) {         setup_iomux_wdog();         This way the board_early_init_f() calls the iomux for the external wdog and disables it. The UART console is routed to UART2, EIM_D26/UART2_TXD and EIM_D27/UART2_RXD. A different structure is defined with the pin configuration for the UART2.      iomux_v3_cfg_t const uart2_pads[] = {         MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),         MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; This configuration should be called at early stage too. static void setup_iomux_uart(void) {         imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); } int board_early_init_f(void) {         setup_iomux_wdog();         setup_iomux_uart(); Also the UART BASE register has to be defined as well as the console device. This is defined in the include/configs/mx6_udoo.h file. #define CONFIG_MXC_UART_BASE   UART2_BASE #define CONFIG_CONSOLE_DEV      "ttymxc1" The UDOO board features only one micro SD slot to boot and U-Boot environment storage. It uses only 4 bits and it has to be configured too. In the include/configs/mx6_udoo.h file the USDHC module has to be defined and the MMC environment device. #define CONFIG_SYS_FSL_USDHC_NUM   3 #define CONFIG_SYS_MMC_ENV_DEV       0     /* SDHC3 */          The USDHC3 pin configuration has to be defined:      iomux_v3_cfg_t const usdhc3_pads[] = {         MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_NANDF_D0__GPIO2_IO00    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; struct fsl_esdhc_cfg usdhc_cfg[1] = {         {USDHC3_BASE_ADDR, 0, 4}, }; This must be called and configured from the board_mmc_init() function: int board_mmc_init(bd_t *bis) {         s32 status = 0;         imx_iomux_v3_setup_multiple_pads(         usdhc3_pads, ARRAY_SIZE(usdhc3_pads));         usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);                 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[0]);         return status; } The Ethernet PHY is configured in the board_eth_init() function. This function should initialize the pins for the external ethernet phy, mdio and phy configuration.  Just a piece of code is shown below: iomux_v3_cfg_t const enet_pads1[] = {         MX6_PAD_ENET_MDIO__ENET_MDIO            | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_ENET_MDC__ENET_MDC              | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TXC__RGMII_TXC       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD0__RGMII_TD0       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD1__RGMII_TD1       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD2__RGMII_TD2       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD3__RGMII_TD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_ENET_REF_CLK__ENET_TX_CLK       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RXC__RGMII_RXC       | MUX_PAD_CTRL(ENET_PAD_CTRL),         /* RGMII reset */         MX6_PAD_EIM_D23__GPIO3_IO23              | MUX_PAD_CTRL(NO_PAD_CTRL),         /* alimentazione ethernet*/         MX6_PAD_EIM_EB3__GPIO2_IO31              | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 32 - 1 - (MODE0) all */         MX6_PAD_RGMII_RD0__GPIO6_IO25            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 31 - 1 - (MODE1) all */         MX6_PAD_RGMII_RD1__GPIO6_IO27            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 28 - 1 - (MODE2) all */         MX6_PAD_RGMII_RD2__GPIO6_IO28            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 27 - 1 - (MODE3) all */         MX6_PAD_RGMII_RD3__GPIO6_IO29            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */         MX6_PAD_RGMII_RX_CTL__GPIO6_IO24         | MUX_PAD_CTRL(NO_PAD_CTRL), }; static iomux_v3_cfg_t const enet_pads2[] = {         MX6_PAD_RGMII_RD0__RGMII_RD0       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD1__RGMII_RD1       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD2__RGMII_RD2       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD3__RGMII_RD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL), }; static void setup_iomux_enet(void) {         imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1));         udelay(20);         gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power on enet */         gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */         gpio_direction_output(IMX_GPIO_NR(6, 24), 1);         gpio_direction_output(IMX_GPIO_NR(6, 25), 1);         gpio_direction_output(IMX_GPIO_NR(6, 27), 1);         gpio_direction_output(IMX_GPIO_NR(6, 28), 1);         gpio_direction_output(IMX_GPIO_NR(6, 29), 1);         udelay(1000);         gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* deassert PHY rst */         /* Need delay 100ms to exit from reset. */         udelay(1000 * 100);         gpio_free(IMX_GPIO_NR(6, 24));         gpio_free(IMX_GPIO_NR(6, 25));         gpio_free(IMX_GPIO_NR(6, 27));         gpio_free(IMX_GPIO_NR(6, 28));         gpio_free(IMX_GPIO_NR(6, 29));         imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); }           Let's notice that the external PHY is not the same as the SABRESD AR8031. The UDOO features the MICREL KSZ9031 PHY. The latter needs to be defined and the former undefined in the include/configs/mx6_udoo.h file. #undef  CONFIG_PHY_ATHEROS #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9031 Besides the PHY address has to be changed. #define CONFIG_FEC_MXC_PHYADDR  6 At this point, the serial console, SD card saving arguments and ethernet should be working. The last point is to configure the LVDS display. The LVDS display of the UDOO board is connected in the same port as the SABRE-SD board, but the operation frequency is different and it has to be modified to work at ~ 33.26MHz for the 7 inches LVDS display.      The mx6_udoo.c file contains a setup_display function that configures the LDB module. This functions is called in the board_early_init_f(). With the current clock configuration is not possible to get  the 33.2MHz for the LVDS and a different clock source for the LDB module must be chosen. The backlight and lvds power signals must be on.           The current configuration uses the mmdc_ch1 clock and to get closer to 33.26MHz the PLL2_PFD0 is chosen.        gpio_direction_output(IMX_GPIO_NR(1, 2), 1); /* LVDS power On */         gpio_direction_output(IMX_GPIO_NR(1, 4), 1); /* LVDS backlight On */         imx_iomux_v3_setup_multiple_pads(di0_pads, ARRAY_SIZE(di0_pads));         enable_ipu_clock();         imx_setup_hdmi();         /* Turn on4LDB0, LDB1, IPU,IPU DI0 clocks */         reg = readl(&mxc_ccm->CCGR3);         reg |=  MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK;         writel(reg, &mxc_ccm->CCGR3);         /* set LDB0, LDB1 clk select to 011/011 */         reg = readl(&mxc_ccm->cs2cdr);         reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK                  | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);         reg |= (1 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)               | (1 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);         writel(reg, &mxc_ccm->cs2cdr); With this changes you can compile the new U-Boot image with ./build_u-boot.sh and then just copy the uboot.imx file to your sd: # sudo cp if=uboot.imx of=/dev/sdX bs=512 seek= 2 && sync 5. TESTING YOUR CHANGES Inser the sd with the U-Boot image to micro sd slot and power up the board. You should get the U-Boot serial console like shown below. In the console you can test the ethernet and phy configuration with the PING command: I hope you find these basic steps useful for different boards.
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With Qt5  you will find the addition of new technologies that will make your development much easier. Qtquick2 SceneGraph Qml Qt5 is backwards compatible,  that means you can run your Qt 4.8 applications, But that doesn't mean they will have the best performance, sometimes it is better to do a porting to use the newest features. Qt5, has two options to paint components into the screen. Painting in Qt 5 is primarily done either with: The imperative QPainter API Qt’s declarative UI language, QML, and its scene graph back-end. QPainter As this document mentions  Qt5GraphicsOverview | Qt Wiki | Qt Project  The Qpainter engine uses software to paint, and is used when drawing Qimages or Qwidgets. Its  advantage over OpenGL is the high quality when antialiasing is enabled, and a complete feature set. The Qpainter can use an OpenGL engine, but as the document mentions it is more suceptible to state changes. And has to be used carefully. QML & Scene Graph. All visual QML items are rendered using the scene graph, a low-level, high-performance rendering stack, closely tied to OpenGL. Qt Quick 2 makes use of a dedicated scene graph based on OpenGL ES 2.0 or OpenGL 2.0 for its rendering. Using a scene graph for graphics rather than the traditional imperative painting systems (QPainter and similar), means the scene to be rendered can be retained between frames and the complete set of primitives to render is known before rendering starts. This opens up for a number of optimizations, such as batch rendering to minimize state changes and discarding obscured primitives. The QML scene graph is a new back-end for QML in Qt 5, and is based on OpenGL. It generally improves the performance of QML significantly over the QPainter-based back-end used in Qt 4. It achieves better performance in a number of ways: The scene graph uses OpenGL directly instead of going though a QPainter which could be using either the raster or OpenGL paint engine. This means that all the resources, like geometry, textures and shaders can be stored in a format suitable for OpenGL rather than using classes such as QPainterPath, QPixmap, QBrush, or QPen, which the QPainter would need to translate into OpenGL primitives and possibly cache. QML, being a declarative language, defines how the end result should look like, but it doesn’t define how and in which order each individual element is drawn. The drawing can therefore be reordered to reduce the number of state changes, or merged to reduce the number of draw calls. The scene graph uses a separate render thread, and synchronizes the animations with the vertical retrace on platforms where this can be supported. The render thread allows the preparation of the next frame to be done at the same time the current frame is being rendered. This has a positive effect also on single-core systems, since the render thread might block on OpenGL commands. The synchronization with the vertical retrace improves the perceived smoothness of the animations. We have tested on i.MX6 Both options, having the best results using QML Qtquick2 elements. When we tried using QtPainter via Widgets we face the problem that if not using a windowing system like X11 or Wayland the painter wont work well and will only show the QtGLWidget. With QML scene graph we are able to have an OpenGL element and a Qt element on the same environment, and there is an easy way to communicate one with the other and share variables.  Please look at the example results here: I.MX6 scene graph Qt5 - YouTube And the great advantage, the sceneGraph is all accelerated via OpenGL.
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For default Android JB4.3 GA1.1.0 BSP, iMX6SL EVK board doesn't support BlueTooth, attached is the patch for the BSP to support AR3002 bluetooth.   The hardware information can be found at: https://community.freescale.com/docs/DOC-95016   iMX6SL_EVK_BlueTooth_Patch_for_JB4.3_1.1.0.tar.gz: these are the patch files. iMX6SL_EVK_BlueTooth_Support_for_JB4.3_1.1.0.tar.gz: these are the patched source code files. Please select one of above to use.
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Question: How to enable HAB on the MX28, following the recommendations of AN4555 to get the "get_hab_status()" function working, but has run into an issue. Question #1 They believe they have all the HAB components worked out that are inputs to the efltosb tool as they are able to successfully run U-boot to the interactive prompt.  However, at the point where they:     - call the rvt_report_status() function, their board says "### ERROR ### Please RESET the board ###".      - call the rvt_entry(), their board prints some garbage characters on the screen and then hangs. This suggests that there is something wrong with the clock that in turn affects the baudrate on the serial console causing the above behavior. Question #2 Is there a concept of a "Bound Signature" in HABv4 as there is in HABv3? Any chance the addresses for the rvt_ calls are incorrect? Can you provide the u-boot source? Either Bound signature verification or UID is never mentioned in the HABv4 Application Note. So I suppose it is not supported. We have made assumptions about the RVT function pointer offsets.  The HAB 4 API does not explicitly say the offsets but uses a rvt_base::function_name notation.  We have assumed that function pointers are placed in order, at every word offset beyond the RVT header.  We have confirmed the RVT header exists at the latest address in the reference manual based on a memory dump but we cannot be certain the function offsets we have setup are correct. As far as source code, we modeled our changes for our mx28 board off of the hab.c and hab.h files available from the mainline u-boot for the mx6 architecture. This is basically the same code get_hab_status code that is written in the AN4555 document.  We did HAB API function pointer addresses to match the updated RVT base address and assumed offsets. Answer: Here are the first 3 instructions from report_status(), could your customer check the instructions from the address which they called is correct? <report_status>: :   b087b570        addlt   fp, r7, r0, ror r5 :   1c0e1c05        stcne   12, cr1, [lr], {5} :   22182433        andscs  r2, r8, #855638016      ; 0x33000000
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Video decoding gst-launch filesrc location=sample.mp4 ! qtdemux ! ffdec_h264 ! mfw_v4lsink Notes: On LTIB BSP 3.0.35_4.0.0, prep the package and apply the attached patch on top, then build. On Yocto, the easy way to add the gst-ffmpeg package is by adding these two lines on the conf/local.conf file: IMAGE_INSTALL_append = " gst-ffmpeg" LICENSE_FLAGS_WHITELIST = 'commercial'
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by b47504 Overview This document is intended to introduce debug tips about i.MX power management based on i.MX Android software. The following topics are involved in this document: How to debug suspend/resume issues How to do power optimization How to debug suspend/resume issues General method: Capture more PM  debug message Enable PM debug system to get more info about PM in kernel and debug interface Power management options  ---> [*] Power Management Debug Support                                     [*]   Extra PM attributes in sysfs for low-level debugging/testing Enable wakelock debug_mask to capture more message about wakelock root@android:/ # echo 15 > /sys/module/wakelock/parameters/debug_mask root@android:/ # echo 15 > /sys/module/userwakelock/parameters/debug_mask Enable earlysuspend debug_mask to capture more message about early suspend and late resume. root@sabresd_6dq:/ # echo 15 > /sys/module/earlysuspend/parameters/debug_mask Add no_console_suspend=1 to the boot option for kernel This makes the system print more useful info before entry in suspend Eg: --- a/sabresd_6dq/BoardConfig.mk +++ b/sabresd_6dq/BoardConfig.mk -BOARD_KERNEL_CMDLINE := console=ttymxc0,115200 init=/init video=mxcfb0:dev=ldb,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=10M fb0base=0x27b00000 vmalloc=400M androidboot.console=ttymxc0 androidboot.hardware=freescale +BOARD_KERNEL_CMDLINE := console=ttymxc0,115200 init=/init video=mxcfb0:dev=ldb,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=10M fb0base=0x27b00000 vmalloc=400M androidboot.console=ttymxc0 androidboot.hardware=freescale no_console_suspend=1 System cannot enter suspend mode Check below setting items have been disabled: §  Whether the usb cable has been removed(usb gadget will hold a wake lock) §  Setting->Display->Sleep, check whether the inactivity timeout period setting is longer than your expected time. §  Setting->System->Developer options->stay awake(stay awake not be set), check whether the option is disabled Check if all wake locks have been released(You can see which wake lock is held, and then debug into the specific module): root@sabresd_6dq:/ # cat /sys/power/wake_lock System could not resume from suspend/System crash when resume or suspend Check the PMIC_STBY_REQ signal. System use PMIC_STBY_REQ signal to notify power management IC to change voltage from standby voltage to functional voltage and vice versa. In general, pmic_stby_req pin is connected to pmic standby pin. So measure the pin to check whether the  de-assert signal is triggered. If the signal is not triggered, we may consider whether wake-up sources are correctly setup. If the signal is triggered, we may double-check whether the pmic supply power normally. And not limited to the two points, we should also double-check everything we doubt according to the system log and hardware measured waves.  Using Trace32 or ICE to locate the problem. Please view trace32 website to get more details. Track from mx6_suspend_enter in arch/arm/mach-mx6 .                Track "state" value and try to map to different the low power mode via function mxc_cpu_lp_set.                Check "mx6_suspend.S" which conduct the detailed operations in suspend: "MEM" is mapped to "dormant" mode. So goto "dormant" symbol and try to dump different operations to narrow down suspend/resume failure If this failure maybe related to DDR operation, try to dummy DDR IO relative low power operation. Using ram console to dump kernel log after reboot. Ram console will keep one kernel log copy into one certain memory space. You can use the following command to check last time kernel log, if memory power was not cut off during the reboot process. Eg(if it is the first time boot, you cannot find the /proc/last_kmsg file): root@sabresd_6dq:/ # cat /proc/last_kmsg Kernel resume back from suspend but android not This is usually introduced by the wrong key layout file Use getevent/sendevent tool to get power key scan code #getevent  Correct the Keylayout file    system/usr/keylayout/****.kl Correct the scandcode with your power key report value to Match the POWE key Suspend/Resume consume too much time: We can print the specific module name and time consume details, if the module's suspend/resume time consume more than the threshold parameter by read/write /sys/power/device_suspend_time_threshold file. By default, the parameter is setup to 0, via disabled the function. We can enable it by the following command: Eg: root@android:/ # echo 10  > /sys/power/device_suspend_time_threshold This command means that if the module's suspend/resume time consume more than 10 us, the system will print the module's detail out. If you want to know the more details how to implement it on kernel, please check kernel/power/main.c Notes: Can use the shell command to enter different system level low power modes for debug (For more details: you can check Linux_6DQ_RM.pdf): #echo mem > /sys/power/state #echo standby > /sys/power/state How to do power optimization Runtime Mode Check whether CPUFreq and  Bus_freq scale are enabled root@android:/ # cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor root@android:/ # cat /sys/devices/platform/imx_busfreq.0/enable More details about this, please refer to "Documentation/cpu-freq/ governors.txt” . Check whether the system bus is working on your expected frequency. For MX6Q: root@android:/ #  cat /sys/kernel/debug/clock/osc_clk/pll2_528_bus_main_clk/periph_clk/mmdc_ch0_axi_clk/rate Check CPU Loading and Interrupt(cat /proc/interrupts)                root@android:/ #  cat /proc/interrupts                Through this command you can check whether some module will trigger interrupt frequently.  And consider that whether we have some chances to reduce the interrupt count. Check clock tree carefully to see which clocks are not gated off  but no any modules need them. root@android:/ # powerdebug -d -c Reduce GPU frequency.GPU also offered interface to modify the frequency. According to your own product, you can reduce the gpu frequency. Default gpu3DMaxClock is set to 64 in init.rc file, we can tuning a suitable value by ourselves. diff --git a/imx6/etc/init.rc b/imx6/etc/init.rc index 8c420b5..eb11ffe 100755 --- a/imx6/etc/init.rc +++ b/imx6/etc/init.rc @@ -397,6 +397,9 @@ on boot #  Set GPU 3D minimum clock to 3/64     write /sys/module/galcore/parameters/gpu3DMinClock 3 +#  Set GPU 3D maximum clock to 64/64 +   write /sys/module/galcore/parameters/gpu3DMaxClock 64 + Suspend Mode Check whether all devices enter suspend mode or low power mode: Add debug message into devices drivers to check whether all devices driver suspend interface are called Use oscilloscope to measure the related signal (depend on specific device datasheet and custom hw design) to check whether every device enter low power mode Remove devices from the board(or rmmod the device driver) , and do hardware rework to exclude some hardware module if needed. Then we can figure out which module introduced the high consumption, and debug into the specific module. Add debug message in device drivers which may lead high power consumption, catch the waveform from these modules which may impact the high power consumption Check whether DDR enter in self-refresh mode(Please check the DDR datasheet to figure out which pin indicate self-refresh state, and check it with oscilloscope) Config GPIO PADs as output zero or input mode (depending to HW design) Cut off LDOs/DCDCs which no modules need (depending to HW design) Check all PLLs will cut off, just 32KHZ sleep clock living
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