i.MX处理器知识库

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It is often not easy to use company network to flash application, due to network security (proxy, etc...). We will see in this tutorial, how to flash a Linux application in a SD card with ONLY a SD card reader and simple standard Linux commands. SD card Memory Map A Linux application is divided in 3 parts: the bootloader the Linux Kernel the Linux Rootfs We will flash sequentially these 3 parts Flashing U-boot With the SD card Reader, we will flash the yellow part. In the [...]/ltib/rootfs/boot/ folder $ sudo dd if=u-boot.bin of=/dev/sdb bs=512 skip=2 seek=2 && sudo sync Flashing Linux Kernel With the SD card reader, we will flash the green part. Keep in mind that 1MB=1048576B -> Kernel Offset. $ sudo dd if=uImage of=/dev/sdb bs=1048576 seek=1 && sudo sync Configure U-boot variables To launch the Kernel, you need to configure U-boot. Plug the serial cable on the EVK: 115kbps, 8 bits, 1 stop and no parity EVK switches must be configured as below: DS1 DS2 DS3 DS4 DS5 DS5 DS7 DS8 DS9 DS10 Boot from SD/MMC Card 0 0 0 0 0 0 1 1 0 0 Put the SD card in the EVK (bottom slot) and launch the app. In the hyperterminal type: BBG U-Boot > printenv To print environnement variables Modify the bootcmd: BBG U-Boot > setenv bootcmd_mmc 'run bootargs_base bootargs_mmc;mmc read 0 ${loadaddr} 0x800 0x1800;bootm' "0x1800" is the size of the kernel. Must be bigger than uImage Kernel file (0x1800x512Byte=3MB) If you want to use the WVGA as display screen (kernel need to be configured with CLAA support), for LTIB1007 and after (before it was 'wvga' option): Script for LTIB1007's u-boot on i.MX51 EVK (copy/paste in the hyperterminal): setenv bootcmd_mmc 'run bootargs_base bootargs_mmc; mmc read 0 ${loadaddr} 800 1800 ; bootm' setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw init=/init' setenv bootargs_base' setenv bootargs console=ttymxc0,115200 di1_primary console=tty1' setenv bootcmd 'run bootcmd_mmc' saveenv Script for LTIB1007's u-boot on i.MX53 EVK (copy/paste in the hyperterminal): setenv bootcmd_mmc 'run bootargs_base bootargs_mmc; mmc read 0 ${loadaddr} 800 1800 ; bootm' setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw init=/init' setenv bootargs_base 'setenv bootargs console=ttymxc0,115200 di0_primary console=tty1' setenv bootcmd 'run bootcmd_mmc' saveenv You must have the following printenv: BBG U-Boot > printenv bootdelay=3 baudrate=115200 loadaddr=0x90800000 netdev=eth0 ethprime=FEC0 uboot_addr=0xa0000000 uboot=u-boot.bin kernel=uImage bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp nfsroot=${serveri p}:${nfsroot},v3,tcp bootcmd_net=run bootargs_base bootargs_nfs; tftpboot ${loadaddr} ${kernel}; boot m load_uboot=tftpboot ${loadaddr} ${uboot} ethact=FEC0 bootargs=console=ttymxc0,115200 di1_primary root=/dev/mmcblk0p1 rootwait rw init =/init bootcmd_mmc=run bootargs_base bootargs_mmc; mmc read 0 ${loadaddr} 800 1800 ; bo otm bootargs_mmc=setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw init=/i nit bootargs_base=setenv bootargs console=ttymxc0,115200 di1_primary bootcmd=run bootcmd_mmc stdin=serial stdout=serial stderr=serial</br> Environment size: 748/131068 bytes BBG U-Boot > Create ext3 partition With the SD card reader, create an ext3 partition. You can use gparted, a graphical partition manager tool. Launch gparted: $ sudo gparted Create a new ext3 partition, with 20MB of offset: Copying Linux To copy rootfs folder generated by LTIB, type in the shell: $ sudo cp -r /[…]/ltib/rootfs/* /media/FreescaleSD/ && sudo sync Test application Put the SD in the slot slot and launch the application. Password is root.

U-Boot 2009.08 (Sep 24 2011 - 22:18:53) CPU: Freescale i.MX53 family 2.1V at 800 MHz mx53 pll1: 800MHz mx53 pll2: 400MHz mx53 pll3: 432MHz mx53 pll4: 455MHz ipg clock : 66666666Hz ipg per clock : 33333333Hz uart clock : 66666666Hz cspi clock : 108000000Hz ahb clock : 133333333Hz axi_a clock : 400000000Hz axi_b clock : 200000000Hz emi_slow clock: 133333333Hz ddr clock : 400000000Hz esdhc1 clock : 80000000Hz esdhc2 clock : 80000000Hz esdhc3 clock : 80000000Hz esdhc4 clock : 80000000Hz nfc clock : 26666666Hz Board: MX53-LOCO 1.0 Rev. A Boot Reason: [POR] Boot Device: SD I2C: ready DRAM: 1 GB MMC: FSL_ESDHC: 0,FSL_ESDHC: 1 In: serial Out: serial Err: serial da9052_i2c_is_connected - i2c write success.... Serial reinitilized! Net: got MAC address from IIM: 00:04:9f:01:dc:48 FEC0 [PRIME] Hit any key to stop autoboot: 2 1 0 Unknown command 'mem=64M' - try 'help' FEC: enable RMII gasket PHY indentify @ 0x0 = 0x0007c0f1 Using FEC0 device TFTP from server 192.168.0.50; our IP address is 192.168.0.150 Filename 'uImage'. Load address: 0x70800000 Loading: * FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 FEC: Link is down 7809 ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ######################### done Bytes transferred = 3121348 (2fa0c4 hex) ## Booting kernel from Legacy Image at 70800000 ... Image Name: Linux-2.6.35.3-g4b94fa6-dirty Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3121284 Bytes = 3 MB Load Address: 70008000 Entry Point: 70008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Éñ)Áä)Éùñ&æ'ÑÎÞÔÑ,ÂÅÄæ—X;Ù!É!ÉÑ/6ç)1)å/6ç)1)éäé×Þöæùé$ä4ÉE,ØØ ì)ÉùñÆäÌ/à&öÄ6Ex ä))á) )ÉEÐ,1'ù))É4é×/ÜØ1æÉô–ÉÉ É!)&ö ÖÑŽ0ÑEÑdÎvÀE¥¡…e%¥@9E—»@¥\ á¡QfÎ=à±&ôQ YÔ–À™$ÔÁ))Ï )/' ù)ù6 'ä1ÔÔ fÞ1ìÉÉùñÖE $éÅ—'Ø6Üá4—'ÌØ'.w”)öæ)–”Àyùñ á É Éñ9Æ—XzÁ4—XØèÉá‘)& ! f××XîÑ Éñ9×Üöä)!Éùñ4—XØèÉéˆp'ÁÁÉñ)Ñ™(Ü1É á )Ö—çÄÔÔÐÈAß !éˆ0'ÉéùÉùáÉÉÑQ(ÐÐ ÈÉ á)!á(0è 4—XØèÉôÉ!) ÙéˆpÐ9Ñá!‘_×.wÑ! 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ARC USBOTG Device Controller driver (1 August 2005) mice: PS/2 mouse device common for all mice input: gpio-keys as /devices/platform/gpio-keys/input/input0 MXC keypad loaded egalax_ts 2-0004: request gpio failed:-16 egalax_ts 2-0004: egalax_ts: failed to read firmware version egalax_ts: probe of 2-0004 failed with error -5 p1003_fwv33 2-0041: couldn't read panel infomation. p1003_fwv33: probe of 2-0041 failed with error -5 DA9052 TSI Device Driver, v1.0 da9052_tsi da9052_tsi: da9052_tsi_init_drv: error getting regulator VDD_A input: da9052_tsi as /devices/virtual/input/input1 TSI Drv Successfully Inserted da9052_tsi, 4-wire input: da9052-onkey as /devices/platform/imx-i2c.0/i2c-0/0-0048/da9052-onkey/inp ut/input2 mxc_rtc mxc_rtc.0: rtc core: registered mxc_rtc as rtc0 i2c /dev entries driver IR NEC protocol handler initialized IR RC5(x) protocol handler initialized IR RC6 protocol handler initialized IR JVC protocol handler initialized IR Sony protocol handler initialized Linux video capture interface: v2.00 OVIYA init_camera_struct 2597 OV5640***: ioctl_s_power on=1 Setting mclk to 24 MHz ov5640_init_mode:write frame_rate=1, frame_rate=0 ov5640_init_mode:write frame rate=1, modee=0 OV5640***: ov5640_init_mode OV5640****: write reg=3103 val=11 ov5640_write_reg:write reg error:reg=3103,val=11 OV5640****: read reg=3103 val=11 OV5640****: write reg=3008 val=82 ov5640_write_reg:write reg error:reg=3008,val=82 OV5640****: read reg=3008 val=2 OV5640****: write reg=3008 val=42 ov5640_write_reg:write reg error:reg=3008,val=42 OV5640****: read reg=3008 val=42 OV5640****: write reg=3103 val=3 ov5640_write_reg:write reg error:reg=3103,val=3 OV5640****: read reg=3103 val=3 OV5640****: write reg=3017 val=7f ov5640_write_reg:write reg error:reg=3017,val=7f OV5640****: read reg=3017 val=7f OV5640****: write reg=3018 val=fc ov5640_write_reg:write reg error:reg=3018,val=fc OV5640****: read reg=3018 val=fc OV5640****: write reg=503d val=0 ov5640_write_reg:write reg error:reg=503d,val=0 OV5640****: read reg=503d val=0 OV5640****: write reg=3034 val=18 ov5640_write_reg:write reg error:reg=3034,val=18 OV5640****: read reg=3034 val=18 OV5640****: write reg=3035 val=11 ov5640_write_reg:write reg error:reg=3035,val=11 OV5640****: read reg=3035 val=11 OV5640****: write reg=3036 val=48 ov5640_write_reg:write reg error:reg=3036,val=48 OV5640****: read reg=3036 val=48 OV5640****: write reg=3037 val=13 ov5640_write_reg:write reg error:reg=3037,val=13 OV5640****: read reg=3037 val=13 OV5640****: write reg=303d val=32 ov5640_write_reg:write reg error:reg=303d,val=32 OV5640****: read reg=303d val=32 OV5640****: write reg=3108 val=1 ov5640_write_reg:write reg error:reg=3108,val=1 OV5640****: read reg=3108 val=1 OV5640****: write reg=3630 val=2e ov5640_write_reg:write reg error:reg=3630,val=2e OV5640****: read reg=3630 val=2e OV5640****: write reg=3632 val=e2 ov5640_write_reg:write reg error:reg=3632,val=e2 OV5640****: read reg=3632 val=e2 OV5640****: write reg=3633 val=23 ov5640_write_reg:write reg error:reg=3633,val=23 OV5640****: read reg=3633 val=23 OV5640****: write reg=3621 val=e0 ov5640_write_reg:write reg error:reg=3621,val=e0 OV5640****: read reg=3621 val=e0 OV5640****: write reg=3704 val=a0 ov5640_write_reg:write reg error:reg=3704,val=a0 OV5640****: read reg=3704 val=a0 OV5640****: write reg=3703 val=5a ov5640_write_reg:write reg error:reg=3703,val=5a OV5640****: read reg=3703 val=5a OV5640****: write reg=3715 val=78 ov5640_write_reg:write reg error:reg=3715,val=78 OV5640****: read reg=3715 val=78 OV5640****: write reg=3717 val=1 ov5640_write_reg:write reg error:reg=3717,val=1 OV5640****: read reg=3717 val=1 OV5640****: write reg=370b val=60 ov5640_write_reg:write reg error:reg=370b,val=60 OV5640****: read reg=370b val=60 OV5640****: write reg=3705 val=1a ov5640_write_reg:write reg error:reg=3705,val=1a OV5640****: read reg=3705 val=1a OV5640****: write reg=3905 val=2 ov5640_write_reg:write reg error:reg=3905,val=2 OV5640****: read reg=3905 val=2 OV5640****: write reg=3906 val=10 ov5640_write_reg:write reg error:reg=3906,val=10 OV5640****: read reg=3906 val=10 OV5640****: write reg=3901 val=a ov5640_write_reg:write reg error:reg=3901,val=a OV5640****: read reg=3901 val=a OV5640****: write reg=3731 val=12 ov5640_write_reg:write reg error:reg=3731,val=12 OV5640****: read reg=3731 val=12 OV5640****: write reg=3600 val=8 ov5640_write_reg:write reg error:reg=3600,val=8 OV5640****: read reg=3600 val=8 OV5640****: write reg=3601 val=33 ov5640_write_reg:write reg error:reg=3601,val=33 OV5640****: read reg=3601 val=33 OV5640****: write reg=302d val=60 ov5640_write_reg:write reg error:reg=302d,val=60 OV5640****: read reg=302d val=60 OV5640****: write reg=3620 val=52 ov5640_write_reg:write reg error:reg=3620,val=52 OV5640****: read reg=3620 val=52 OV5640****: write reg=371b val=20 ov5640_write_reg:write reg error:reg=371b,val=20 OV5640****: read reg=371b val=20 OV5640****: write reg=471c val=50 ov5640_write_reg:write reg error:reg=471c,val=50 OV5640****: read reg=471c val=50 OV5640****: write reg=3a18 val=0 ov5640_write_reg:write reg error:reg=3a18,val=0 OV5640****: read reg=3a18 val=0 OV5640****: write reg=3a19 val=f8 ov5640_write_reg:write reg error:reg=3a19,val=f8 OV5640****: read reg=3a19 val=f8 OV5640****: write reg=3635 val=1c ov5640_write_reg:write reg error:reg=3635,val=1c OV5640****: read reg=3635 val=1c OV5640****: write reg=3634 val=40 ov5640_write_reg:write reg error:reg=3634,val=40 OV5640****: read reg=3634 val=40 OV5640****: write reg=3622 val=1 ov5640_write_reg:write reg error:reg=3622,val=1 OV5640****: read reg=3622 val=1 OV5640****: write reg=3c01 val=34 ov5640_write_reg:write reg error:reg=3c01,val=34 OV5640****: read reg=3c01 val=34 OV5640****: write reg=3c04 val=28 ov5640_write_reg:write reg error:reg=3c04,val=28 OV5640****: read reg=3c04 val=28 OV5640****: write reg=3c05 val=98 ov5640_write_reg:write reg error:reg=3c05,val=98 OV5640****: read reg=3c05 val=98 OV5640****: write reg=3c06 val=0 ov5640_write_reg:write reg error:reg=3c06,val=0 OV5640****: read reg=3c06 val=0 OV5640****: write reg=3c07 val=8 ov5640_write_reg:write reg error:reg=3c07,val=8 OV5640****: read reg=3c07 val=8 OV5640****: write reg=3c08 val=0 ov5640_write_reg:write reg error:reg=3c08,val=0 OV5640****: read reg=3c08 val=0 OV5640****: write reg=3c09 val=1c ov5640_write_reg:write reg error:reg=3c09,val=1c OV5640****: read reg=3c09 val=1c OV5640****: write reg=3c0a val=9c ov5640_write_reg:write reg error:reg=3c0a,val=9c OV5640****: read reg=3c0a val=9c OV5640****: write reg=3c0b val=40 ov5640_write_reg:write reg error:reg=3c0b,val=40 OV5640****: read reg=3c0b val=40 OV5640****: write reg=3820 val=41 ov5640_write_reg:write reg error:reg=3820,val=41 OV5640****: read reg=3820 val=41 OV5640****: write reg=3821 val=7 ov5640_write_reg:write reg error:reg=3821,val=7 OV5640****: read reg=3821 val=7 OV5640****: write reg=3814 val=31 ov5640_write_reg:write reg error:reg=3814,val=31 OV5640****: read reg=3814 val=31 OV5640****: write reg=3815 val=31 ov5640_write_reg:write reg error:reg=3815,val=31 OV5640****: read reg=3815 val=31 OV5640****: write reg=3800 val=0 ov5640_write_reg:write reg error:reg=3800,val=0 OV5640****: read reg=3800 val=0 OV5640****: write reg=3801 val=0 ov5640_write_reg:write reg error:reg=3801,val=0 OV5640****: read reg=3801 val=0 OV5640****: write reg=3802 val=0 ov5640_write_reg:write reg error:reg=3802,val=0 OV5640****: read reg=3802 val=0 OV5640****: write reg=3803 val=4 ov5640_write_reg:write reg error:reg=3803,val=4 OV5640****: read reg=3803 val=4 OV5640****: write reg=3804 val=a ov5640_write_reg:write reg error:reg=3804,val=a OV5640****: read reg=3804 val=a OV5640****: write reg=3805 val=3f ov5640_write_reg:write reg error:reg=3805,val=3f OV5640****: read reg=3805 val=3f OV5640****: write reg=3806 val=7 ov5640_write_reg:write reg error:reg=3806,val=7 OV5640****: read reg=3806 val=7 OV5640****: write reg=3807 val=9f ov5640_write_reg:write reg error:reg=3807,val=9f OV5640****: read reg=3807 val=9f OV5640****: write reg=3808 val=2 ov5640_write_reg:write reg error:reg=3808,val=2 OV5640****: read reg=3808 val=2 OV5640****: write reg=3809 val=80 ov5640_write_reg:write reg error:reg=3809,val=80 OV5640****: read reg=3809 val=80 OV5640****: write reg=380a val=1 ov5640_write_reg:write reg error:reg=380a,val=1 OV5640****: read reg=380a val=1 OV5640****: write reg=380b val=e0 ov5640_write_reg:write reg error:reg=380b,val=e0 OV5640****: read reg=380b val=e0 OV5640****: write reg=380c val=b ov5640_write_reg:write reg error:reg=380c,val=b OV5640****: read reg=380c val=b OV5640****: write reg=380d val=1c ov5640_write_reg:write reg error:reg=380d,val=1c OV5640****: read reg=380d val=1c OV5640****: write reg=380e val=7 ov5640_write_reg:write reg error:reg=380e,val=7 OV5640****: read reg=380e val=7 OV5640****: write reg=380f val=b0 ov5640_write_reg:write reg error:reg=380f,val=b0 OV5640****: read reg=380f val=b0 OV5640****: write reg=3810 val=0 ov5640_write_reg:write reg error:reg=3810,val=0 OV5640****: read reg=3810 val=0 OV5640****: write reg=3811 val=10 ov5640_write_reg:write reg error:reg=3811,val=10 OV5640****: read reg=3811 val=10 OV5640****: write reg=3812 val=0 ov5640_write_reg:write reg error:reg=3812,val=0 OV5640****: read reg=3812 val=0 OV5640****: write reg=3813 val=6 ov5640_write_reg:write reg error:reg=3813,val=6 OV5640****: read reg=3813 val=6 OV5640****: write reg=3811 val=10 ov5640_write_reg:write reg error:reg=3811,val=10 OV5640****: read reg=3811 val=10 OV5640****: write reg=3812 val=0 ov5640_write_reg:write reg error:reg=3812,val=0 OV5640****: read reg=3812 val=0 OV5640****: write reg=3813 val=6 ov5640_write_reg:write reg error:reg=3813,val=6 OV5640****: read reg=3813 val=6 OV5640****: write reg=3814 val=11 ov5640_write_reg:write reg error:reg=3814,val=11 OV5640****: read reg=3814 val=11 OV5640****: write reg=3815 val=11 ov5640_write_reg:write reg error:reg=3815,val=11 OV5640****: read reg=3815 val=11 OV5640****: write reg=3618 val=0 ov5640_write_reg:write reg error:reg=3618,val=0 OV5640****: read reg=3618 val=0 OV5640****: write reg=3612 val=29 ov5640_write_reg:write reg error:reg=3612,val=29 OV5640****: read reg=3612 val=29 OV5640****: write reg=3708 val=62 ov5640_write_reg:write reg error:reg=3708,val=62 OV5640****: read reg=3708 val=62 OV5640****: write reg=3709 val=52 ov5640_write_reg:write reg error:reg=3709,val=52 OV5640****: read reg=3709 val=52 OV5640****: write reg=370c val=3 ov5640_write_reg:write reg error:reg=370c,val=3 OV5640****: read reg=370c val=3 OV5640****: write reg=3a02 val=3 ov5640_write_reg:write reg error:reg=3a02,val=3 OV5640****: read reg=3a02 val=3 OV5640****: write reg=3a03 val=d8 ov5640_write_reg:write reg error:reg=3a03,val=d8 OV5640****: read reg=3a03 val=d8 OV5640****: write reg=3a08 val=1 ov5640_write_reg:write reg error:reg=3a08,val=1 OV5640****: read reg=3a08 val=1 OV5640****: write reg=3a09 val=27 ov5640_write_reg:write reg error:reg=3a09,val=27 OV5640****: read reg=3a09 val=27 OV5640****: write reg=3a0a val=0 ov5640_write_reg:write reg error:reg=3a0a,val=0 OV5640****: read reg=3a0a val=0 OV5640****: write reg=3a0b val=f6 ov5640_write_reg:write reg error:reg=3a0b,val=f6 OV5640****: read reg=3a0b val=f6 OV5640****: write reg=3a0e val=3 ov5640_write_reg:write reg error:reg=3a0e,val=3 OV5640****: read reg=3a0e val=3 OV5640****: write reg=3a0d val=4 ov5640_write_reg:write reg error:reg=3a0d,val=4 OV5640****: read reg=3a0d val=4 OV5640****: write reg=3a14 val=3 ov5640_write_reg:write reg error:reg=3a14,val=3 OV5640****: read reg=3a14 val=3 OV5640****: write reg=3a15 val=d8 ov5640_write_reg:write reg error:reg=3a15,val=d8 OV5640****: read reg=3a15 val=d8 OV5640****: write reg=4000 val=1 ov5640_write_reg:write reg error:reg=4000,val=1 OV5640****: read reg=4000 val=1 OV5640****: write reg=4001 val=2 ov5640_write_reg:write reg error:reg=4001,val=2 OV5640****: read reg=4001 val=2 OV5640****: write reg=4004 val=2 ov5640_write_reg:write reg error:reg=4004,val=2 OV5640****: read reg=4004 val=2 OV5640****: write reg=3000 val=0 ov5640_write_reg:write reg error:reg=3000,val=0 OV5640****: read reg=3000 val=0 OV5640****: write reg=3002 val=1c ov5640_write_reg:write reg error:reg=3002,val=1c OV5640****: read reg=3002 val=1c OV5640****: write reg=3004 val=ff ov5640_write_reg:write reg error:reg=3004,val=ff OV5640****: read reg=3004 val=ff OV5640****: write reg=3006 val=c3 ov5640_write_reg:write reg error:reg=3006,val=c3 OV5640****: read reg=3006 val=c3 OV5640****: write reg=300e val=58 ov5640_write_reg:write reg error:reg=300e,val=58 OV5640****: read reg=300e val=58 OV5640****: write reg=302e val=0 ov5640_write_reg:write reg error:reg=302e,val=0 OV5640****: read reg=302e val=0 OV5640****: write reg=4300 val=30 ov5640_write_reg:write reg error:reg=4300,val=30 OV5640****: read reg=4300 val=30 OV5640****: write reg=501f val=0 ov5640_write_reg:write reg error:reg=501f,val=0 OV5640****: read reg=501f val=0 OV5640****: write reg=5027 val=1 ov5640_write_reg:write reg error:reg=5027,val=1 OV5640****: read reg=5027 val=1 OV5640****: write reg=5028 val=4 ov5640_write_reg:write reg error:reg=5028,val=4 OV5640****: read reg=5028 val=4 OV5640****: write reg=5029 val=90 ov5640_write_reg:write reg error:reg=5029,val=90 OV5640****: read reg=5029 val=90 OV5640****: write reg=502a val=5 ov5640_write_reg:write reg error:reg=502a,val=5 OV5640****: read reg=502a val=5 OV5640****: write reg=502b val=90 ov5640_write_reg:write reg error:reg=502b,val=90 OV5640****: read reg=502b val=90 OV5640****: write reg=502c val=3 ov5640_write_reg:write reg error:reg=502c,val=3 OV5640****: read reg=502c val=3 OV5640****: write reg=4713 val=3 ov5640_write_reg:write reg error:reg=4713,val=3 OV5640****: read reg=4713 val=3 OV5640****: write reg=4407 val=4 ov5640_write_reg:write reg error:reg=4407,val=4 OV5640****: read reg=4407 val=4 OV5640****: write reg=502d val=6c ov5640_write_reg:write reg error:reg=502d,val=6c OV5640****: read reg=502d val=6c OV5640****: write reg=502e val=4 ov5640_write_reg:write reg error:reg=502e,val=4 OV5640****: read reg=502e val=4 OV5640****: write reg=502f val=2c ov5640_write_reg:write reg error:reg=502f,val=2c OV5640****: read reg=502f val=2c OV5640****: write reg=5034 val=80 ov5640_write_reg:write reg error:reg=5034,val=80 OV5640****: read reg=5034 val=80 OV5640****: write reg=5035 val=2a ov5640_write_reg:write reg error:reg=5035,val=2a OV5640****: read reg=5035 val=2a OV5640****: write reg=5036 val=14 ov5640_write_reg:write reg error:reg=5036,val=14 OV5640****: read reg=5036 val=14 OV5640****: write reg=460b val=35 ov5640_write_reg:write reg error:reg=460b,val=35 OV5640****: read reg=460b val=35 OV5640****: write reg=460c val=22 ov5640_write_reg:write reg error:reg=460c,val=22 OV5640****: read reg=460c val=22 OV5640****: write reg=3824 val=2 ov5640_write_reg:write reg error:reg=3824,val=2 OV5640****: read reg=3824 val=2 OV5640****: write reg=5000 val=a7 ov5640_write_reg:write reg error:reg=5000,val=a7 OV5640****: read reg=5000 val=a7 OV5640****: write reg=5001 val=23 ov5640_write_reg:write reg error:reg=5001,val=23 OV5640****: read reg=5001 val=23 OV5640****: write reg=5005 val=36 ov5640_write_reg:write reg error:reg=5005,val=36 OV5640****: read reg=5005 val=36 OV5640****: write reg=5180 val=ff ov5640_write_reg:write reg error:reg=5180,val=ff OV5640****: read reg=5180 val=ff OV5640****: write reg=5181 val=f2 ov5640_write_reg:write reg error:reg=5181,val=f2 OV5640****: read reg=5181 val=f2 OV5640****: write reg=5182 val=0 ov5640_write_reg:write reg error:reg=5182,val=0 OV5640****: read reg=5182 val=0 OV5640****: write reg=5183 val=90 ov5640_write_reg:write reg error:reg=5183,val=90 OV5640****: read reg=5183 val=90 OV5640****: write reg=5184 val=25 ov5640_write_reg:write reg error:reg=5184,val=25 OV5640****: read reg=5184 val=25 OV5640****: write reg=5185 val=24 ov5640_write_reg:write reg error:reg=5185,val=24 OV5640****: read reg=5185 val=24 OV5640****: write reg=5186 val=9 ov5640_write_reg:write reg error:reg=5186,val=9 OV5640****: read reg=5186 val=9 OV5640****: write reg=5187 val=9 ov5640_write_reg:write reg error:reg=5187,val=9 OV5640****: read reg=5187 val=9 OV5640****: write reg=5188 val=9 ov5640_write_reg:write reg error:reg=5188,val=9 OV5640****: read reg=5188 val=9 OV5640****: write reg=5189 val=75 ov5640_write_reg:write reg error:reg=5189,val=75 OV5640****: read reg=5189 val=75 OV5640****: write reg=518a val=54 ov5640_write_reg:write reg error:reg=518a,val=54 OV5640****: read reg=518a val=54 OV5640****: write reg=518b val=e0 ov5640_write_reg:write reg error:reg=518b,val=e0 OV5640****: read reg=518b val=e0 OV5640****: write reg=518c val=b2 ov5640_write_reg:write reg error:reg=518c,val=b2 OV5640****: read reg=518c val=b2 OV5640****: write reg=518d val=42 ov5640_write_reg:write reg error:reg=518d,val=42 OV5640****: read reg=518d val=42 OV5640****: write reg=518e val=3d ov5640_write_reg:write reg error:reg=518e,val=3d OV5640****: read reg=518e val=3d OV5640****: write reg=518f val=56 ov5640_write_reg:write reg error:reg=518f,val=56 OV5640****: read reg=518f val=56 OV5640****: write reg=5190 val=46 ov5640_write_reg:write reg error:reg=5190,val=46 OV5640****: read reg=5190 val=46 OV5640****: write reg=5191 val=f8 ov5640_write_reg:write reg error:reg=5191,val=f8 OV5640****: read reg=5191 val=f8 OV5640****: write reg=5192 val=4 ov5640_write_reg:write reg error:reg=5192,val=4 OV5640****: read reg=5192 val=4 OV5640****: write reg=5381 val=1c ov5640_write_reg:write reg error:reg=5381,val=1c OV5640****: read reg=5381 val=1c OV5640****: write reg=5382 val=5a ov5640_write_reg:write reg error:reg=5382,val=5a OV5640****: read reg=5382 val=5a OV5640****: write reg=5383 val=6 ov5640_write_reg:write reg error:reg=5383,val=6 OV5640****: read reg=5383 val=6 OV5640****: write reg=5384 val=a ov5640_write_reg:write reg error:reg=5384,val=a OV5640****: read reg=5384 val=a OV5640****: write reg=5385 val=7e ov5640_write_reg:write reg error:reg=5385,val=7e OV5640****: read reg=5385 val=7e OV5640****: write reg=5386 val=88 ov5640_write_reg:write reg error:reg=5386,val=88 OV5640****: read reg=5386 val=88 OV5640****: write reg=5387 val=7c ov5640_write_reg:write reg error:reg=5387,val=7c OV5640****: read reg=5387 val=7c OV5640****: write reg=5388 val=6c ov5640_write_reg:write reg error:reg=5388,val=6c OV5640****: read reg=5388 val=6c OV5640****: write reg=5389 val=10 ov5640_write_reg:write reg error:reg=5389,val=10 OV5640****: read reg=5389 val=10 OV5640****: write reg=538a val=1 ov5640_write_reg:write reg error:reg=538a,val=1 OV5640****: read reg=538a val=1 OV5640****: write reg=538b val=98 ov5640_write_reg:write reg error:reg=538b,val=98 OV5640****: read reg=538b val=98 OV5640****: write reg=5300 val=8 ov5640_write_reg:write reg error:reg=5300,val=8 OV5640****: read reg=5300 val=8 OV5640****: write reg=5301 val=30 ov5640_write_reg:write reg error:reg=5301,val=30 OV5640****: read reg=5301 val=30 OV5640****: write reg=5302 val=10 ov5640_write_reg:write reg error:reg=5302,val=10 OV5640****: read reg=5302 val=10 OV5640****: write reg=5303 val=0 ov5640_write_reg:write reg error:reg=5303,val=0 OV5640****: read reg=5303 val=0 OV5640****: write reg=5304 val=8 ov5640_write_reg:write reg error:reg=5304,val=8 OV5640****: read reg=5304 val=8 OV5640****: write reg=5305 val=30 ov5640_write_reg:write reg error:reg=5305,val=30 OV5640****: read reg=5305 val=30 OV5640****: write reg=5306 val=8 ov5640_write_reg:write reg error:reg=5306,val=8 OV5640****: read reg=5306 val=8 OV5640****: write reg=5307 val=16 ov5640_write_reg:write reg error:reg=5307,val=16 OV5640****: read reg=5307 val=16 OV5640****: write reg=5309 val=8 ov5640_write_reg:write reg error:reg=5309,val=8 OV5640****: read reg=5309 val=8 OV5640****: write reg=530a val=30 ov5640_write_reg:write reg error:reg=530a,val=30 OV5640****: read reg=530a val=30 OV5640****: write reg=530b val=4 ov5640_write_reg:write reg error:reg=530b,val=4 OV5640****: read reg=530b val=4 OV5640****: write reg=530c val=6 ov5640_write_reg:write reg error:reg=530c,val=6 OV5640****: read reg=530c val=6 OV5640****: write reg=5480 val=1 ov5640_write_reg:write reg error:reg=5480,val=1 OV5640****: read reg=5480 val=1 OV5640****: write reg=5481 val=8 ov5640_write_reg:write reg error:reg=5481,val=8 OV5640****: read reg=5481 val=8 OV5640****: write reg=5482 val=14 ov5640_write_reg:write reg error:reg=5482,val=14 OV5640****: read reg=5482 val=14 OV5640****: write reg=5483 val=28 ov5640_write_reg:write reg error:reg=5483,val=28 OV5640****: read reg=5483 val=28 OV5640****: write reg=5484 val=51 ov5640_write_reg:write reg error:reg=5484,val=51 OV5640****: read reg=5484 val=51 OV5640****: write reg=5485 val=65 ov5640_write_reg:write reg error:reg=5485,val=65 OV5640****: read reg=5485 val=65 OV5640****: write reg=5486 val=71 ov5640_write_reg:write reg error:reg=5486,val=71 OV5640****: read reg=5486 val=71 OV5640****: write reg=5487 val=7d ov5640_write_reg:write reg error:reg=5487,val=7d OV5640****: read reg=5487 val=7d OV5640****: write reg=5488 val=87 ov5640_write_reg:write reg error:reg=5488,val=87 OV5640****: read reg=5488 val=87 OV5640****: write reg=5489 val=91 ov5640_write_reg:write reg error:reg=5489,val=91 OV5640****: read reg=5489 val=91 OV5640****: write reg=548a val=9a ov5640_write_reg:write reg error:reg=548a,val=9a OV5640****: read reg=548a val=9a OV5640****: write reg=548b val=aa ov5640_write_reg:write reg error:reg=548b,val=aa OV5640****: read reg=548b val=aa OV5640****: write reg=548c val=b8 ov5640_write_reg:write reg error:reg=548c,val=b8 OV5640****: read reg=548c val=b8 OV5640****: write reg=548d val=cd ov5640_write_reg:write reg error:reg=548d,val=cd OV5640****: read reg=548d val=cd OV5640****: write reg=548e val=dd ov5640_write_reg:write reg error:reg=548e,val=dd OV5640****: read reg=548e val=dd OV5640****: write reg=548f val=ea ov5640_write_reg:write reg error:reg=548f,val=ea OV5640****: read reg=548f val=ea OV5640****: write reg=5490 val=1d ov5640_write_reg:write reg error:reg=5490,val=1d OV5640****: read reg=5490 val=1d OV5640****: write reg=5580 val=2 ov5640_write_reg:write reg error:reg=5580,val=2 OV5640****: read reg=5580 val=2 OV5640****: write reg=5583 val=40 ov5640_write_reg:write reg error:reg=5583,val=40 OV5640****: read reg=5583 val=40 OV5640****: write reg=5584 val=10 ov5640_write_reg:write reg error:reg=5584,val=10 OV5640****: read reg=5584 val=10 OV5640****: write reg=5589 val=10 ov5640_write_reg:write reg error:reg=5589,val=10 OV5640****: read reg=5589 val=10 OV5640****: write reg=558a val=0 ov5640_write_reg:write reg error:reg=558a,val=0 OV5640****: read reg=558a val=0 OV5640****: write reg=558b val=f8 ov5640_write_reg:write reg error:reg=558b,val=f8 OV5640****: read reg=558b val=f8 OV5640****: write reg=5800 val=23 ov5640_write_reg:write reg error:reg=5800,val=23 OV5640****: read reg=5800 val=23 OV5640****: write reg=5801 val=15 ov5640_write_reg:write reg error:reg=5801,val=15 OV5640****: read reg=5801 val=15 OV5640****: write reg=5802 val=10 ov5640_write_reg:write reg error:reg=5802,val=10 OV5640****: read reg=5802 val=10 OV5640****: write reg=5803 val=10 ov5640_write_reg:write reg error:reg=5803,val=10 OV5640****: read reg=5803 val=10 OV5640****: write reg=5804 val=15 ov5640_write_reg:write reg error:reg=5804,val=15 OV5640****: read reg=5804 val=15 OV5640****: write reg=5805 val=23 ov5640_write_reg:write reg error:reg=5805,val=23 OV5640****: read reg=5805 val=23 OV5640****: write reg=5806 val=c ov5640_write_reg:write reg error:reg=5806,val=c OV5640****: read reg=5806 val=c OV5640****: write reg=5807 val=8 ov5640_write_reg:write reg error:reg=5807,val=8 OV5640****: read reg=5807 val=8 OV5640****: write reg=5808 val=5 ov5640_write_reg:write reg error:reg=5808,val=5 OV5640****: read reg=5808 val=5 OV5640****: write reg=5809 val=5 ov5640_write_reg:write reg error:reg=5809,val=5 OV5640****: read reg=5809 val=5 OV5640****: write reg=580a val=8 ov5640_write_reg:write reg error:reg=580a,val=8 OV5640****: read reg=580a val=8 OV5640****: write reg=580b val=c ov5640_write_reg:write reg error:reg=580b,val=c OV5640****: read reg=580b val=c OV5640****: write reg=580c val=7 ov5640_write_reg:write reg error:reg=580c,val=7 OV5640****: read reg=580c val=7 OV5640****: write reg=580d val=3 ov5640_write_reg:write reg error:reg=580d,val=3 OV5640****: read reg=580d val=3 OV5640****: write reg=580e val=0 ov5640_write_reg:write reg error:reg=580e,val=0 OV5640****: read reg=580e val=0 OV5640****: write reg=580f val=0 ov5640_write_reg:write reg error:reg=580f,val=0 OV5640****: read reg=580f val=0 OV5640****: write reg=5810 val=3 ov5640_write_reg:write reg error:reg=5810,val=3 OV5640****: read reg=5810 val=3 OV5640****: write reg=5811 val=7 ov5640_write_reg:write reg error:reg=5811,val=7 OV5640****: read reg=5811 val=7 OV5640****: write reg=5812 val=7 ov5640_write_reg:write reg error:reg=5812,val=7 OV5640****: read reg=5812 val=7 OV5640****: write reg=5813 val=3 ov5640_write_reg:write reg error:reg=5813,val=3 OV5640****: read reg=5813 val=3 OV5640****: write reg=5814 val=0 ov5640_write_reg:write reg error:reg=5814,val=0 OV5640****: read reg=5814 val=0 OV5640****: write reg=5815 val=0 ov5640_write_reg:write reg error:reg=5815,val=0 OV5640****: read reg=5815 val=0 OV5640****: write reg=5816 val=3 ov5640_write_reg:write reg error:reg=5816,val=3 OV5640****: read reg=5816 val=3 OV5640****: write reg=5817 val=7 ov5640_write_reg:write reg error:reg=5817,val=7 OV5640****: read reg=5817 val=7 OV5640****: write reg=5818 val=b ov5640_write_reg:write reg error:reg=5818,val=b OV5640****: read reg=5818 val=b OV5640****: write reg=5819 val=8 ov5640_write_reg:write reg error:reg=5819,val=8 OV5640****: read reg=5819 val=8 OV5640****: write reg=581a val=5 ov5640_write_reg:write reg error:reg=581a,val=5 OV5640****: read reg=581a val=5 OV5640****: write reg=581b val=5 ov5640_write_reg:write reg error:reg=581b,val=5 OV5640****: read reg=581b val=5 OV5640****: write reg=581c val=7 ov5640_write_reg:write reg error:reg=581c,val=7 OV5640****: read reg=581c val=7 OV5640****: write reg=581d val=b ov5640_write_reg:write reg error:reg=581d,val=b OV5640****: read reg=581d val=b OV5640****: write reg=581e val=2a ov5640_write_reg:write reg error:reg=581e,val=2a OV5640****: read reg=581e val=2a OV5640****: write reg=581f val=16 ov5640_write_reg:write reg error:reg=581f,val=16 OV5640****: read reg=581f val=16 OV5640****: write reg=5820 val=11 ov5640_write_reg:write reg error:reg=5820,val=11 OV5640****: read reg=5820 val=11 OV5640****: write reg=5821 val=11 ov5640_write_reg:write reg error:reg=5821,val=11 OV5640****: read reg=5821 val=11 OV5640****: write reg=5822 val=15 ov5640_write_reg:write reg error:reg=5822,val=15 OV5640****: read reg=5822 val=15 OV5640****: write reg=5823 val=29 ov5640_write_reg:write reg error:reg=5823,val=29 OV5640****: read reg=5823 val=29 OV5640****: write reg=5824 val=bf ov5640_write_reg:write reg error:reg=5824,val=bf OV5640****: read reg=5824 val=bf OV5640****: write reg=5825 val=af ov5640_write_reg:write reg error:reg=5825,val=af OV5640****: read reg=5825 val=af OV5640****: write reg=5826 val=9f ov5640_write_reg:write reg error:reg=5826,val=9f OV5640****: read reg=5826 val=9f OV5640****: write reg=5827 val=af ov5640_write_reg:write reg error:reg=5827,val=af OV5640****: read reg=5827 val=af OV5640****: write reg=5828 val=df ov5640_write_reg:write reg error:reg=5828,val=df OV5640****: read reg=5828 val=df OV5640****: write reg=5829 val=6f ov5640_write_reg:write reg error:reg=5829,val=6f OV5640****: read reg=5829 val=6f OV5640****: write reg=582a val=8e ov5640_write_reg:write reg error:reg=582a,val=8e OV5640****: read reg=582a val=8e OV5640****: write reg=582b val=ab ov5640_write_reg:write reg error:reg=582b,val=ab OV5640****: read reg=582b val=ab OV5640****: write reg=582c val=9e ov5640_write_reg:write reg error:reg=582c,val=9e OV5640****: read reg=582c val=9e OV5640****: write reg=582d val=7f ov5640_write_reg:write reg error:reg=582d,val=7f OV5640****: read reg=582d val=7f OV5640****: write reg=582e val=4f ov5640_write_reg:write reg error:reg=582e,val=4f OV5640****: read reg=582e val=4f OV5640****: write reg=582f val=89 ov5640_write_reg:write reg error:reg=582f,val=89 OV5640****: read reg=582f val=89 OV5640****: write reg=5830 val=86 ov5640_write_reg:write reg error:reg=5830,val=86 OV5640****: read reg=5830 val=86 OV5640****: write reg=5831 val=98 ov5640_write_reg:write reg error:reg=5831,val=98 OV5640****: read reg=5831 val=98 OV5640****: write reg=5832 val=6f ov5640_write_reg:write reg error:reg=5832,val=6f OV5640****: read reg=5832 val=6f OV5640****: write reg=5833 val=4f ov5640_write_reg:write reg error:reg=5833,val=4f OV5640****: read reg=5833 val=4f OV5640****: write reg=5834 val=6e ov5640_write_reg:write reg error:reg=5834,val=6e OV5640****: read reg=5834 val=6e OV5640****: write reg=5835 val=7b ov5640_write_reg:write reg error:reg=5835,val=7b OV5640****: read reg=5835 val=7b OV5640****: write reg=5836 val=7e ov5640_write_reg:write reg error:reg=5836,val=7e OV5640****: read reg=5836 val=7e OV5640****: write reg=5837 val=6f ov5640_write_reg:write reg error:reg=5837,val=6f OV5640****: read reg=5837 val=6f OV5640****: write reg=5838 val=de ov5640_write_reg:write reg error:reg=5838,val=de OV5640****: read reg=5838 val=de OV5640****: write reg=5839 val=bf ov5640_write_reg:write reg error:reg=5839,val=bf OV5640****: read reg=5839 val=bf OV5640****: write reg=583a val=9f ov5640_write_reg:write reg error:reg=583a,val=9f OV5640****: read reg=583a val=9f OV5640****: write reg=583b val=bf ov5640_write_reg:write reg error:reg=583b,val=bf OV5640****: read reg=583b val=bf OV5640****: write reg=583c val=ec ov5640_write_reg:write reg error:reg=583c,val=ec OV5640****: read reg=583c val=ec OV5640****: write reg=5025 val=0 ov5640_write_reg:write reg error:reg=5025,val=0 OV5640****: read reg=5025 val=0 OV5640****: write reg=3a0f val=30 ov5640_write_reg:write reg error:reg=3a0f,val=30 OV5640****: read reg=3a0f val=30 OV5640****: write reg=3a10 val=28 ov5640_write_reg:write reg error:reg=3a10,val=28 OV5640****: read reg=3a10 val=28 OV5640****: write reg=3a1b val=30 ov5640_write_reg:write reg error:reg=3a1b,val=30 OV5640****: read reg=3a1b val=30 OV5640****: write reg=3a1e val=26 ov5640_write_reg:write reg error:reg=3a1e,val=26 OV5640****: read reg=3a1e val=26 OV5640****: write reg=3a11 val=60 ov5640_write_reg:write reg error:reg=3a11,val=60 OV5640****: read reg=3a11 val=60 OV5640****: write reg=3a1f val=14 ov5640_write_reg:write reg error:reg=3a1f,val=14 OV5640****: read reg=3a1f val=14 OV5640****: write reg=3008 val=2 ov5640_write_reg:write reg error:reg=3008,val=2 OV5640****: read reg=3008 val=2 OV5640****: write reg=3035 val=21 ov5640_write_reg:write reg error:reg=3035,val=21 OV5640****: read reg=3035 val=21 OV5640****: write reg=4741 val=1 ov5640_write_reg:write reg error:reg=4741,val=1 OV5640****: read reg=4741 val=1 OV5640****: read reg=3000 val=0 OV5640****: read reg=3001 val=8 OV5640****: read reg=3002 val=1c OV5640****: read reg=3003 val=0 OV5640****: read reg=3004 val=ff OV5640****: read reg=3005 val=f7 OV5640****: read reg=3006 val=c3 OV5640****: read reg=3007 val=ff OV5640****: read reg=3008 val=2 OV5640****: read reg=3009 val=1 OV5640****: read reg=300a val=56 OV5640****: read reg=300b val=40 OV5640****: read reg=300c val=22 OV5640****: read reg=300d val=0 OV5640****: read reg=300e val=58 OV5640****: read reg=300f val=0 OV5640****: read reg=3010 val=0 OV5640****: read reg=3011 val=0 OV5640****: read reg=3012 val=0 OV5640****: read reg=3013 val=0 OV5640****: read reg=3014 val=0 OV5640****: read reg=3015 val=7 OV5640****: read reg=3016 val=0 OV5640****: read reg=3017 val=7f OV5640****: read reg=3018 val=fc OV5640****: read reg=3019 val=f0 OV5640****: read reg=301a val=0 OV5640****: read reg=301b val=0 OV5640****: read reg=301c val=0 OV5640****: read reg=301d val=0 OV5640****: read reg=301e val=0 OV5640****: read reg=301f val=0 OV5640****: read reg=3020 val=0 OV5640****: read reg=3021 val=0 OV5640****: read reg=3022 val=0 OV5640****: read reg=3023 val=0 OV5640****: read reg=3024 val=0 OV5640****: read reg=3025 val=0 OV5640****: read reg=3026 val=0 OV5640****: read reg=3027 val=0 OV5640****: read reg=3028 val=0 OV5640****: read reg=3029 val=0 OV5640****: read reg=302a val=b0 OV5640****: read reg=302b val=0 OV5640****: read reg=302c val=2 OV5640****: read reg=302d val=60 OV5640****: read reg=302e val=0 OV5640****: read reg=302f val=2 OV5640****: read reg=3030 val=b OV5640****: read reg=3031 val=0 OV5640****: read reg=3032 val=0 OV5640****: read reg=3033 val=3 OV5640****: read reg=3034 val=18 OV5640****: read reg=3035 val=21 OV5640****: read reg=3036 val=48 OV5640****: read reg=3037 val=13 OV5640****: read reg=3038 val=0 OV5640****: read reg=3039 val=0 OV5640****: read reg=303a val=0 OV5640****: read reg=303b val=19 OV5640****: read reg=303c val=11 OV5640****: read reg=303d val=32 OV5640****: read reg=303e val=0 OV5640****: read reg=303f val=0 OV5640****: read reg=3040 val=10 OV5640****: read reg=3041 val=ff OV5640****: read reg=3042 val=0 OV5640****: read reg=3043 val=ff OV5640****: read reg=3044 val=9 OV5640****: read reg=3045 val=0 OV5640****: read reg=3046 val=0 OV5640****: read reg=3047 val=0 OV5640****: read reg=3048 val=0 OV5640****: read reg=3049 val=0 OV5640****: read reg=304a val=0 OV5640****: read reg=304b val=0 OV5640****: read reg=304c val=0 OV5640****: read reg=304d val=0 OV5640****: read reg=304e val=0 OV5640****: read reg=304f val=0 OV5640****: read reg=3050 val=7 OV5640****: read reg=3051 val=1 OV5640****: read reg=3052 val=b2 mxc_v4l2_output mxc_v4l2_output.0: Registered device video1 usbcore: registered new interface driver uvcvideo USB Video Class driver (v0.1.0) APM Battery Driver oviya check mma8450 chip ID ovi MMA8450 ACCELEROMETER and RESUL:0xf 0xc6 mma8450 0-001c: build time Sep 6 2012 13:18:44 input: mma8450 as /devices/virtual/input/input3 add mma8450 i2c driver OVIYA MMA8452 INIT OK 0x0 MXC WatchDog Driver 2.0 MXC Watchdog # 0 Timer: initial timeout 60 sec Bluetooth: Virtual HCI driver ver 1.3 Bluetooth: HCI UART driver ver 2.2 Bluetooth: HCIATH3K protocol initialized Bluetooth: Generic Bluetooth USB driver ver 0.6 usbcore: registered new interface driver btusb VPU initialized mxc_asrc registered gpu mmu disabled mxsdhci: MXC Secure Digital Host Controller Interface driver mxsdhci: MXC SDHCI Controller Driver. mmc0: SDHCI detect irq 0 irq 1 INTERNAL DMA mxsdhci: MXC SDHCI Controller Driver. mmc1: SDHCI detect irq 203 irq 3 INTERNAL DMA usbcore: registered new interface driver usbhid usbhid: USB HID core driver Cirrus Logic CS42888 ALSA SoC Codec Driver mxc_spdif mxc_spdif.0: MXC SPDIF Audio Transmitter No device for codec mxc spdif No device for DAI mxc spdif No device for DAI imx-ssi-1-0 No device for DAI imx-ssi-1-1 No device for DAI imx-ssi-2-0 No device for DAI imx-ssi-2-1 No device for DAI imx-spdif-dai DMA Sound Buffer Allocated: Playback UseIram=1 ext_ram=1 buf->addr=73268000 buf- >area=fabfa000 size=24576 asoc: mxc spdif <-> imx-spdif-dai mapping ok ALSA device list: #0: imx-3stack-spdif (mxc spdif) TCP cubic registered NET: Registered protocol family 17 can: controller area network core (rev 20090105 abi 😎 NET: Registered protocol family 29 can: raw protocol (rev 20090105) can: broadcast manager protocol (rev 20090105 t) Bluetooth: L2CAP ver 2.14 Bluetooth: L2CAP socket layer initialized Bluetooth: SCO (Voice Link) ver 0.6 Bluetooth: SCO socket layer initialized Bluetooth: RFCOMM TTY layer initialized Bluetooth: RFCOMM socket layer initialized Bluetooth: RFCOMM ver 1.11 Bluetooth: BNEP (Ethernet Emulation) ver 1.3 Bluetooth: BNEP filters: protocol multicast Bluetooth: HIDP (Human Interface Emulation) ver 1.2 VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 2 regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_PERI on regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_MEM on regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_PRO on regulator_init_complete: incomplete constraints, leaving DA9052_BUCK_CORE on regulator_init_complete: incomplete constraints, leaving DA9052_LDO10 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO9 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO8 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO6 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO5 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO3 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO2 on regulator_init_complete: incomplete constraints, leaving DA9052_LDO1 on mxc_rtc mxc_rtc.0: setting system clock to 1970-01-01 00:00:04 UTC (4) mmc0: new SDHC card at address e624 mmcblk0: mmc0:e624 SU16G 14.8 GiB mmcblk0: p1 eth0: Freescale FEC PHY driver [Generic PHY] (mii_bus:phy_addr=0:00, irq=-1) IP-Config: Complete: device=eth0, addr=192.168.0.150, mask=255.255.255.0, gw=192.168.0.1, host=192.168.0.150, domain=, nis-domain=(none), bootserver=192.168.0.50, rootserver=192.168.0.50, rootpath= Looking up port of RPC 100003/2 on 192.168.0.50 PHY: 0:00 - Link is Up - 100/Full Looking up port of RPC 100005/1 on 192.168.0.50 VFS: Mounted root (nfs filesystem) on device 0:11. Freeing init memory: 172K starting pid 1188, tty '': '/etc/rc.d/rcS' Mounting /proc and /sys Starting the hotplug events dispatcher udevd Synthesizing initial hotplug events Setting the hostname to freescale Mounting filesystems mount: mounting usbfs on /proc/bus/usb failed: No such file or directory Starting the dropbear ssh server: Failed to start message bus: Failed to close "/usr/var/run/dbus/pid": No space l eft on device D-Bus per-session daemon address is: unix:abstract=/tmp/dbus-lOokyNGFL0,guid=fd2 236101ed5855d5d79f7b20000000c gtk: creating gdk-pixbuf.loaders pango: creating module list chown: /home/user/.rhosts: Operation not permitted chown: /home/user: Operation not permitted chown: /home/user: Operation not permitted starting pid 2227, tty '': '/sbin/getty -L ttymxc0 115200 vt100' _XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6 _XSERVTransOpen: transport open failed for inet6/freescale:0 _XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6 _XSERVTransmkdir: Owner of /tmp/.X11-unix should be set to root (EE) XKB: Couldn't open rules file /usr/share/X11/xkb/rules/base (EE) XKB: No components provided for device Virtual core keyboard arm-none-linux-gnueabi-gcc (4.4.4_09.06.2010) 4.4.4 root filesystem built on Thu, 29 Sep 2011 15:54:39 +0800 Freescale Semiconductor, Inc. freescale login: root login[2227]: root login on 'ttymxc0' BusyBox v1.18.5 () built-in shell (ash) Enter 'help' for a list of built-in commands. root@freescale ~$ root@freescale ~$ root@freescale ~$ matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <Alt>n=next matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <Alt>p=prev matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <Alt>c=close matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <Alt>d=desktop matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <Alt>m=!matchbox-remote -mbmenu matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <ctrl><alt>x=!xterm matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <ctrl><alt>r=!rxvt matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <ctrl><alt>e=!!gpe-calender matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <alt>Tab=next matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <alt><shift>Tab=prev matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <alt>space=taskmenu matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <alt>escape=!matchbox-remote -mbmenu matchbox: keyboard does not appear to have a <alt> key. matchbox: ignoring key shortcut <alt>f4=close matchbox: Cant find a keycode for keysym 65480 matchbox: ignoring key shortcut f11=fullscreen matchbox-desktop: loading /usr/lib/matchbox/desktop/tasks.so with args ( None ) matchbox-desktop: loading /usr/lib/matchbox/desktop/dotdesktop.so with args ( No ne ) user_overides is (nil) mb-desktop-dotdesktop: failed to open /usr/local/share/applications mb-desktop-dotdesktop: failed to open //.applications root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ root@freescale ~$ gst-launch rtspsrc location=rtsp://192.168.0.50:1935/media/vid eo0 ! decodebin ! mfw_mpeg4aspdecoder ! filesink location=file MPEG4_ASP_D_01.02.01 build on Apr 19 2011 19:13:51. MFW_GST_MPEG4ASP_DECODER_PLUGIN 2.0.3 build on Sep 29 2011 15:41:19. Setting pipeline to PAUSED ... ERROR: Pipeline doesn't want to pause. ERROR: from element /GstPipeline:pipeline0/GstRTSPSrc:rtspsrc0: Resource not fou nd. Additional debug info: gstrtspsrc.c(3832): gst_rtspsrc_send (): /GstPipeline:pipeline0/GstRTSPSrc:rtsps rc0: Not Found Setting pipeline to NULL ... (gst-launch-0.10:2233): GStreamer-CRITICAL **: gst_mini_object_unref: assertion `mini_object != NULL' failed Freeing pipeline ... root@freescale ~$ root@freescale ~$

The Linux L4.1.15_2.1.0 for i.MX 6SLL Release is now available on www.nxp.com. Files available: # Name Description 1 fsl-yocto-L4.1.15_2.1.0-ga.tar.gz Linux BSP Documentation for L4.1.15_2.1.0. Includes Release Notes, User Guide. 2 L4.1.15_2.1.0-ga_images_MX6SLL.tar.gz i.MX 6SLL EVK Linux Binary Demo Files 3 L4.1.15_2.1.0-ga_mfg-tools.tar.gz i.MX Manufacturing Toolkit for Linux L4.1.15_2.1.0 BSP 4 imx-aacpcodec-4.2.0.tar.gz Linux AAC Plus Codec for L4.1.15_2.1.0 Target boards: i.MX 6SLL EVK Board Features: See detail features in Release Notes Known Issues: For known issues and more details please consult the Release Notes. Information of release, see: README: http://git.freescale.com/git/cgit.cgi/imx/fsl-arm-yocto-bsp.git/tree/README?h=imx-4.1-krogoth ChangeLog: http://git.freescale.com/git/cgit.cgi/imx/fsl-arm-yocto-bsp.git/tree/ChangeLog?h=imx-4.1-krogoth

Q: Q&A: Where to find IBIS Models on the web? A: In the first figure (FSL driving 100 ohm), the processor is DC coupled to a transmission line and terminated at the far end with a 100-ohm resistor. The results look pretty normal for this. In the other figure, the processor is dc coupled to a transmission line, then ac coupled to another transmission line segment (0.1u) with 50-ohm resistors to ground, and then drives the inputs of an HCSL clock buffer. The results are pretty un remarkable. The top red signal in the trace is one of the IMX6 clock outputs, the first green signal is the other clock output, and the last green signal (from top to bottom that is) is the differential signal seen by the clock buffer. The customer is concerned about the asymmetrical drive of the processor. It looks like LVDS clock outputs do not like to be AC coupled. This simulation resembles the way the clock is handled in the Smart Device schematics where the clock is AC coupled to the reference clock inputs on the PCIE connector. The ibis files were downloaded from the web (21x21_imx6q, consumer variant). So a few updates: I had the customer download the latest duallite IBIS models. Previously they were apparently using the quad/dual models. They are going to update HyperLynx and are going to run a simulation and let me know if they still see the same issue. He said he's using "linesim". Meanwhile he noticed a different problem with the duallite/solo IBIS models. Although the datasheet says LVDDR3 (1.35V) is supported, there is no model for DDR3_L either as input or output. The same model existed in the quad/dual models. Do you know why this option is not in the duallite IBIS models? Thanks! A ctm of mine would like to get the IBIS model with LVDDR3 support on the i.MX6 DL. For mx6-duallite IBIS models for DDR3L memory (1.35V). It'd be great if the models matched the quad version. Please find the new updated IBIS file in website. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6DL&nodeId=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab

Description by Google: Wi-Fi scan-only mode is a new platform optimization that lets users keep Wi-Fi scan on without connecting to a Wi-Fi network, to improve location accuracy while conserving battery. Apps that depend on Wi-Fi for location services can now ask users to enable scan-only mode from Wi-Fi advanced settings. Wi-Fi scan-only mode is not dependent on device hardware and is available as part of the Android 4.3 platform. Comments by Freescale: In order to enable wifi scan mode, we should make sure wifi driver shouldn't be removed while switching off wifi from Setting. Additionally, android4.3 has introduced one CTS test to force us to change all loadable modules into kernel built in. The reason is loadable modules are often used by rootkits and other exploits. so there will be big risk in security. OK, now let's try to keep up with the pace of AOSP. For AR6003, we are using compat-wireless driver which accommodates all linux kernel since 2.6.We are now using olca-3.4 wifi driver but our kernel version is 3.0.35. It is not a simple change to be directly compiled into kernel since it is lack of the basic file structure for ath6kl driver. This has been double confirmed by support guy from Atheros. More terribly, Atheros has no plan to publish new version for AR6003 but just maintain it. Yeah, my pitiful baby. Say goodbye to scan mode. This is why this document come into being. AR6003 is our default wifi module bounded to our imx6 serial board. So formal release will lose this important feature for this limitation. Here I will give out patches to enable this feature using another wifi module-----Realtek 8723as. Ok, now let's welcome this new star. Patches description: Patch for kernel--------Change loadable driver modules to compiled into kernel, this will let wlan0 and p2p0 interfaces still can be operated although you have switched off wifi in Setting UI. Patch for device/fsl--------Firstly, I delete one rfkill operation in init.rc which is obsolete for BT setting. If still keep it here, it will soft block wifi interface through mac80211 rfkill. Then I clean up some setting for wifi driver module. Patch for hardware/libhardware_legacy-------Since wifi driver is already directly built in kernel, HAL will have no need to load driver now. Refactor it and optimize it. Test it manually: If you have one sdio rtl8723as wifi module in hand, you can test it like the following to see wifi scan mode works: Firstly, disable wifi in Setting UI. then you can check netcfg result, you will see wlan0 and p2p0 are still there, only down state: Go "advanced" menu in wifi setting,Turning on the checkbox of "Scanning always available". Check netcfg result again, Oh Oh, wlan0 and p2p0 are up: Manually "scan" through "wpa_cli" tool, you will see it works:

MAX resolution 1024 x 768 Factory Details: Long name: Freescale: Hardware (VPU) Encoder Class: Codec/Encoder/Video Description: Encodes raw YUV 4:2:0 data to MPEG4 SP, H.264 BP or H.263 (Annex J, K (RS=0 and ASO=0) and T) elementary data;Enco des raw YUV 4:2:0, 4:2:2 horizontal, 4:2:2 vertical or 4:0:0 data into MJPEG elementary data; Author(s): Multimedia Team <[email protected]> Rank: primary (256) Plugin Details: Name: mfw_vpuencoder Description: Encodes Raw YUV Data to MPEG4 SP, H.264 BP or H.263 data. For H.263 P0, the source frame rate must be 3000 0/1001 fps Filename: /usr/lib/gstreamer-0.10/libmfw_gst_vpu_enc.so Version: 2.0.2 License: unknown Source module: gst-fsl-plugin Binary package: Gstreamer Multimedia Plugins (Freescale) Origin URL: http://www.freescale.com GObject +----GstObject +----GstElement +----MfwGstVPU_Enc Pad Templates: SINK template: 'sink' Availability: Always Capabilities: video/x-raw-yuv format: I420 width: [ 48, 8192 ] height: [ 32, 8192 ] video/x-raw-yuv format: YV12 width: [ 48, 8192 ] height: [ 32, 8192 ] video/x-raw-yuv format: NV12 width: [ 48, 8192 ] height: [ 32, 8192 ] video/x-raw-yuv format: Y42B width: [ 48, 8192 ] height: [ 32, 8192 ] video/x-raw-yuv format: Y444 width: [ 48, 8192 ] height: [ 32, 8192 ] SRC template: 'src' Availability: Always Capabilities: video/mpeg width: [ 48, 1280 ] height: [ 32, 720 ] mpegversion: 4 systemstream: false video/x-h263 width: [ 48, 1280 ] height: [ 32, 720 ] video/x-h264 width: [ 48, 1280 ] height: [ 32, 720 ] image/jpeg width: [ 48, 8192 ] height: [ 32, 8192 ] Element Flags: no flags set Element Implementation: Has change_state() function: 0x2b01c98c Has custom save_thyself() function: gst_element_save_thyself Has custom restore_thyself() function: gst_element_restore_thyself Element has no clocking capabilities. Element has no indexing capabilities. Element has no URI handling capabilities. Pads: SRC: 'src' Implementation: Pad Template: 'src' SINK: 'sink' Implementation: Has chainfunc(): 0x2b01de28 Has custom eventfunc(): mfw_gst_vpuenc_sink_event Has bufferallocfunc(): mfw_gst_vpuenc_buffer_alloc Pad Template: 'sink' Element Properties: name : The name of the object flags: readable, writable String. Default: null Current: "mfwgstvpu_enc0" codec-type : selects the codec type for encoding flags: readable, writable Enum "MfwGstVpuEncCodecs" Default: 2, "std_avc" Current: 2, "std_avc" (0): std_mpeg4 - STD_MPEG4 (1): std_h263 - STD_H263 (2): std_avc - STD_AVC (7): std_mjpg - STD_MJPG profile : enable time profile of the vpu encoder plug-in flags: readable, writable Boolean. Default: false Current: false width : width of the frame to be encoded flags: readable, writable Unsigned Integer. Range: 48 - 8192 Default: 48 Current: 0 height : height of the frame to be encoded flags: readable, writable Unsigned Integer. Range: 32 - 8192 Default: 32 Current: 0 bitrate : target bitrate (in kbps) at which stream is to be encoded - 0 for VBR and others for CBR flags: readable, writable Unsigned Integer. Range: 0 - 32767 Default: 0 Current: 32768 gopsize : gets the GOP size at which stream is to be encoded flags: readable, writable Unsigned Integer. Range: 0 - 32767 Default: 30 Current: 30 qp : gets the quantization parameter - range is 0-51 - will be ignored for CBR (bitrate!=0) flags: readable, writable Unsigned Integer. Range: 0 - 51 Default: 15 Current: 4294967295 max-qp : Maximum quantization parameter for CBR - range is 0-51 for H264 and 1-31 for MPEG4 - lower value brings be tter video quality but higher frame sizes flags: readable, writable Unsigned Integer. Range: 0 - 51 Default: 51 Current: 4294967295 min-qp : Minimum quantization parameter for CBR - range is 0-51 for H264 and 1-31 for MPEG4 - lower value brings be tter video quality but higher frame sizes flags: readable, writable Unsigned Integer. Range: 0 - 51 Default: 0 Current: 4294967295 gamma : gamma value for CBR - tells VPU the speed on changing qp - lower will cause better video quality flags: readable, writable Unsigned Integer. Range: 0 - 32768 Default: 24576 Current: 24576 intrarefresh : 0 - Intra MB refresh is not used. Otherwise - At least N MB's in every P-frame will be encoded as intra MB 's. flags: readable, writable Unsigned Integer. Range: 0 - 3600 Default: 0 Current: 0 h263profile0 : enable encoding of H.263 profile 0 when codec-type is set to std_h263 flags: readable, writable Boolean. Default: false Current: false loopback : disables parallelization for performance - turn off if pipeline with decoder flags: readable, writable Boolean. Default: true Current: true intra-qp : Quantization parameter for I frame. When this value is -1, the quantization parameter for I frames is auto matically determined by the VPU. In MPEG4/H.263 mode, the range is 1.C31; in H.264 mode, the range is from 0.C51. This is ignored for STD_MJPG flags: readable, writable Unsigned Integer. Range: 0 - 51 Default: 15 Current: 4294967295 crop-left : The left crop value of input frame to be encoded flags: readable, writable Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0 crop-top : The top crop value of input frame to be encoded flags: readable, writable Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0 crop-right : The right crop value of input frame to be encoded flags: readable, writable Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0 crop-bottom : The bottom crop value of input frame to be encoded flags: readable, writable Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0 rotation-angle : Pre-rotation angle - should be 0, 90, 180 or 270 flags: readable, writable Unsigned Integer. Range: 0 - 270 Default: 0 Current: 0 mirror-direction : mirror direction from source image to encoded image flags: readable, writable Enum "MfwGstVpuEncMirDir" Default: 0, "none " Current: 0, "none " (0): none - MIRDIR_NONE (1): vertical mirroring - MIRDIR_VER (2): horizontal mirroring - MIRDIR_HOR (3): both directions - MIRDIR_HOR_VER h264-byte-stream : Generate H.264 byte stream format of NALU. Take effect for H.264 stream only. flags: readable, writable Boolean. Default: true Current: true

The Android P9.0.0_2.0.0 GA (4.14.98 kernel) is now available on IMX software landing page. Overview -> i.MX BSP Updates and Releases -> Android -> Android P9.0.0_2.0.0 (4.14.98 kernel) Files available: # Name Description 1 android_p9.0.0_2.0.0-ga_docs.zip Android P9.0.0_2.0.0 Documentation 2 imx-p9.0.0_2.0.0-ga.tar.gz i.MX Android proprietary surce code for Android P9.0.0_2.0.0 3 android_p9.0.0_2.0.0-ga_image_8mmevk.tar.gz Prebuilt images with NXP extended features for the i.MX 8M Mini EVK 4 android_p9.0.0_2.0.0-ga_image_8mqevk.tar.gz Prebuilt images with NXP extended features for the i.MX 8M Quad EVK 5 android_p9.0.0_2.0.0-ga_image_8qmek.tar.gz Prebuilt images with NXP extended features for the i.MX8QMax and 8QXPlus MEK 6 fsl_aacp_dec_p9.0.0_2.0.0-ga.tar.gz AAC Plus Codec for P9.0.0_2.0.0_GA Supported boards: i.MX 8MMini MEK Board i.MX 8MQuad EVK Board i.MX 8QuadMax MEK i.MX 8QuadXPlus MEK Features and Known issues For features and known issues, please consult the Release Notes in detail. ======================================================================================= The Android P9.0.0_2.1.0_AUTO GA (4.14.98 kernel) is now available on IMX software landing page. Overview -> i.MX BSP Updates and Releases -> Android AUTO-> Android P9.0.0_2.1.0_AUTO Files available: # Name Description 1 android_p9.0.0_2.1.0-auto-ga_docs.zip Android P9.0.0_2.1.0_AUTO Documentation 2 imx-p9.0.0_2.1.0-auto-ga.tar.gz i.MX Android Automotive proprietary source code for Android P9.0.0_2.1.0_AUTO 3 android_p9.0.0_2.1.0-auto-ga_image_8qmek.tar.gz Prebuilt images with NXP extended features with the EVS function enabled in the Cortex-M4 CPU core for the i.MX 8QuadMax/8QuadXPlus MEK 4 android_p9.0.0_2.1.0-auto-ga_image_8qmek2.tar.gz Prebuilt images with NXP extended features for the i.MX8QMax and 8QXPlus MEK, without the EVS in M4 Core. Supported boards: i.MX 8QuadMax MEK i.MX 8QuadXPlus MEK Features and Known issues For features and known issues, please consult the Release Notes in detail.

Flashing Kernel and Root File System using RedBoot Creating an image A kernel image and a root file system can be created using All Boards LTIB or compiling the kernel and setting the correct set of files. Create a root file system image from a set of files converting the files to a jffs2 file system. For this, install the package mtd-tools. In Ubuntu type apt-get install mtd-tools For making an root file system for flash, use the jffs2 file system like: mkfs.jffs2 -r rootfs -e 0x20000 -s 0x800 –n -o rootfs.jffs2 Where rootfs/ is the original set of file for the file system and rootfs.jffs2 is the output image file. Flashing Some connections errors can be avoided by Configuring RedBoot. The process below uses TFTP to copy the files between host and target. See All Boards TFTP for detail in configurations. Copy the kernel image and the root file system image to the TFTP dir. For example, in LTIB dir, type sudo cp ./rootfs/boot/zImage /tftpboot sudo cp rootfs.jffs2 /tftpboot/ Where /tftpboot is the dir configured for TFTP The next steps are performed in a Minicom session, and happens on the board. Formatting the flash: Format the flash redboot> fis init -f Make a Bad Block Table redboot> nand scan Flashing kernel Load kernel image (zImage) using the command below. Remember to modify the host IP address: redboot> load -r -b 0x100000 /tftpboot/zImage -h 10.29.244.99 The address 0x100000 is used as a temporary location Create the kernel at the right address (0x100000, for IMX27PDK) redboot> fis create -f 0x100000 kernel Flashing root file system Load root file system image (rootfs.jffs2) to the temporary address. Remember to modify the host IP address: redboot> load -r -b 0x100000 /tftpboot/rootfs.jffs2 -h 10.29.244.99 Create the root file system in the right address (0x600000, for IMX27PDK) redboot> fis create -f 0x600000 root Testing This step can be omitted! You can now load your kernel in the flash by typing: fis load kernel To know if the root file system written in the flash was correctly saved, execute the NFS file system and mount the flash. For load the the root file system by NFS, type: exec -c "noinitrd console=ttymxc0,115200 root=nfs nfsroot=<server_ip>:<root_path_on_server> ip=dhcp" Wait the system go up, then mount the flash at /mnt. Reminde that the flash has a jffs2 file system. mount -t jffs2 /dev/mtdblock4 /mnt ls /mnt List the /mnt contents. The output must be the right file system. For testing root file system on NAND, type exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock4 rw rootfstype=jffs2 ip=dhcp" Modifying the initial script Reset the board and press CTRL-C. Type fc to modify the configurations and insert the initialization script. RedBoot> fc Run script at boot: true Boot script: Enter script, terminate with empty line >> fis load kernel >> exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock4 rw rootfstype=jffs2 ip=dhcp" >> Boot script timeout (1000ms resolution): 1 Use BOOTP for network configuration: false Gateway IP address: 10.29.241.254 Local IP address: 10.29.241.6 Local IP address mask: 255.255.254.0 Default server IP address: 10.29.244.99 Board specifics: 0 Console baud rate: 115200 Set eth0 network hardware address [MAC]: false GDB connection port: 9000 Force console for special debug messages: false Network debug at boot time: false Update RedBoot non-volatile configuration - continue (y/n)? y ... Read from 0x07ee0000-0x07eff000 at 0x00080000: . ... Erase from 0x00080000-0x000a0000: . ... Program from 0x07ee0000-0x07f00000 at 0x00080000: . RedBoot> Remember to save the configuration in the flash by typing y Reset the system. To certify that the board is loading the system from flash, remove the ethernet cable.

Qt Creator can be a very good IDE in order to develop great QT applications. This IDE does not only helps with syntax highlighting, access to examples and tutorials, but also helps you to configure different toolchains Qt binary versions and target options. First download the binary installer from: For 32 bits: $ wget http://releases.qt-project.org/qtcreator/2.6.2/qt-creator-linux-x86-opensource-2.6.2.bin For 64 bits: $ wget http://releases.qt-project.org/qtcreator/2.6.2/qt-creator-linux-x86_64-opensource-2.6.2.bin execute the binary $ ./qt-creator-linux-x86_64-opensource-2.6.2.bin Follow the Installer GUI and choose a location. Default options should be OK. in my case the installation was done here: $ /home/b35153/qtcreator-2.6.2/bin Open Qt Creator (in my case from command line, use "&" to regain control of the terminal) $./qtcreator & Open Tools -> Options Choose Build & Run on the menu of the left. and Select the Compilers Tab Here you can add the toolchain GCC compiler of your convenience. It will appear in the "Manual" section. Now click on Qt Version Tab. Here you can add the Qmake that you had created with your Qt installation; for example, the Qt5 installation described here: Building QT for i.MX6 It will appear in the Manual section. In my case I have Qmake for PC and Qmake for i.MX6. Now click on Kits Tab Here you can create combinations of Compilers and Qmake, and also specify where do you want the executables to go. In my case here I combined the i.MX6 toolchain and the Qmake for I.MX6 i had created. I did not set up device configuration since the sysroot is already shared to my device via NFS, but you can configure it so the files are sent via ssh to your device. And that's It! Next time you load a project you can choose which Kit you want to work on, and it will be compiled just as you need.

ccache is a C compiler cache. ccache can save a large amount of compilation time on recurring builds and builds restarted from a clean repository after make clean or git clean. It is well suited for e.g. u-boot and Linux compilation. Caching the host compiler Caching "native" builds is easily done by adding in the beginning of your $PATH a special directory, which contains links to ccache to override the usual compiler. On e.g. Debian this directory is readily available as /usr/lib/ccache, So you can do: $ export PATH="/usr/lib/ccache:$PATH" Typical links found in this folder are: c++ -> ../../bin/ccache cc -> ../../bin/ccache g++ -> ../../bin/ccache gcc -> ../../bin/ccache etc... Caching the cross compiler Caching cross-compiled builds can be done in the same way as native builds, provided you create links of the form e.g. arm-linux-gnueabihf-gcc pointing to ccache. But there is an even more convenient way for those projects, which rely on a $CROSS_COMPILE environment variable (as is the case for e.g. u-boot and Linux). You can prefix the cross compiler with ccache there in e.g. the following way: $ export CROSS_COMPILE="ccache arm-linux-gnueabihf-" Monitoring efficiency Now that your builds are cached, you might want to see how much is "spared" with this technique. ccache -s will tell you all sorts of statistics, such as: cache directory /home/vstehle/.ccache cache hit (direct) 10852 cache hit (preprocessed) 3225 cache miss 19000 called for link 33267 called for preprocessing 9463 compile failed 3 preprocessor error 1 couldn't find the compiler 117 unsupported source language 921 unsupported compiler option 2167 no input file 31681 files in cache 51694 cache size 1.3 Gbytes max cache size 4.0 Gbytes Here you see a somewhat typical 50%/50% hit/miss ratio. Enjoy! See Also ccache is usually supported natively by build systems, such as Buildroot or Yocto.

Q: how to do PCIe compliance measurement on the Sabre SDB? Phase Jitter on the PCIe reference clock had been see problem. Pin C7 "CLK1_N" and Pin D7 "CLK1_P" were used like on the Sabre SD. During Compliance meassurments margin of -80% and more.... was seen. Is there a known issue? Has someone done a similar compliance measurement on the Sabre SDB? A: The PCIe TX compliance tests on i.MX6 SD boards in TK's Open Lab. Based on the internal PLL clock, i.MX6 SD boards pass the PCIe TX compliance tests. 1, please check the capacitor on NVCC_PLL_OUT, it should no less than 10uF, 22uF is better. 2, please check if the 24MHz input crystal is good enough. 50ppm is required. 3, please check the test step: 1.1 TX Test Configuration and Procedures Overview of Test Steps 1. Integrate the patch for PCIE test to mainline, recompile the Kernel , and replace the old image of the board under test. · Make sure the following configuration has been set, when re-compiling the kernel image. # MX6 Options: # CONFIG_IMX_PCIE=y 2. Correctly set up the test environment: · Connect the compliance load board (CLB x1/x16) revision 2.0 into the slot of DUT, and change the switch and jumpers to select x1 . · Connect the lane under test to oscilloscope via differential probe and matched coaxial , do remember that cable calibration should be done before test. · Connect the clock signal to the oscilloscope. The clock must have SSC enabled or disabled to be consistent with settings for the system during normal operation. · Power on the system. 3. After I.MX6x enters Polling.Compliance , press the Toggle Button on CLB to select the output , make sure the data waveform is compliance pattern, 5.0GT/s for GEN2, 2.5GT/s for GEN1. 4. Follow the Oscilloscope operation instruction, set it to the right mode. 5. Capture and save at least 1 million * 200 ps of data and clock simultaneously at the sample rate of 50GS/s for GEN2, or 250,000 UI * 400 ps of data at the sample rate of 25GS/s for GEN1. 6. Run free software Sigtest to analyze the PCIE TX signal. 7. Customer could adjust the parameters of the PCIE_PHY by changing IOMUXC_GPR8 register settings to get the test past. a. The default of this Register is configured as: imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8); b. write the Register, Address: 20E_0000h base + 20h offset = 20E_0020h; command: /unit_tests/memtool -32 0x020e0020= FFFD4000 This document was generated from the following discussion: i.Mx6 PCIe compliance

ATK (Advanced Toolkit) ATK (Advanced Toolkit) is a Windows software for programming the flash memory of i.MX boards. It can be downloaded here. Using ATK This section will describe the procedure to erase the flash memory and program the bootloader. 1 - Connect a serial cable between PC and i.MX board. 2 - Some hardware configurations (switches) must be done to flash the board. Set red and cream switches as below: Switch SW5 -> 000000 Switch SW4 -> 1000000 {{Note|On SW5 and SW4, "1" means the keys selected towards the edge of the board.} 3 - Run ATK (1.6 or above) going to Start -> Programs -> AdvancedToolKit -> AdvancedToolKit Set the options: i.MX CPU -> i.MX35_TO2 Device memory -> DDR2; Custom Initial File -> (keep it unmarked) Communication Channel -> Serial Port (Usually COM1) If you are using TO1, Device Memory -> MDDR 4 - Click on Flash Tools to erase, program or dump the the flash memory and click GO NAND Flash Erasing 1- Configure the Dip Switch of Personality Board: Switch 1 2 3 4 5 6 7 8 SW1 OFF OFF OFF OFF N/A N/A N/A N/A SW2 ON OFF OFF ON ON OFF OFF OFF 2- Choose NAND model K9LAG08U8M 3- Continue the steps Remember to select the checkbutton BBT (Back Block Table)

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