本文旨在说明基于i.MX8X如何设计硬件平 台，包括相关设计资源的收集与学习，硬件原 理图设计，layout，启动(bring up)，量产准备， 及正式量产后的失效分析与失效控制。主要是 帮助厘清硬件开发相关从头到尾的问题。 请注意本文为培训和辅助文档，部分内容源 自PMIC/i.MX8X硬件开发指南，并作中文翻 译，强调重点，和查缺补漏，本文不是官方文 档的替代，请一切以官方文档为准。 目录： i.MX8X硬件参考平台 ................................................. 3 2 i.MX8X硬件设计资源 ................................................. 5 i.MX8X芯片相关设计资源 ............................................... 5 i.MX8QXP MEK板外设相关设计资源 ........................... 10 i.MX8QXP 硬件接口规范 .............................................. 11 3 i.MX8X原理图设计检查点 ........................................ 13 PMIC+i.MX8X供电能力和上电时序 .............................. 13 PMIC电源输出端设计 ................................................... 17 I.MX8X电源输入端及去耦设计 ..................................... 22 LPDDR4内存设计 ........................................................ 23 DDR3L内存设计 ........................................................... 25 I2C总线设计 ................................................................. 26 Reset，Wdog reset和On/Off设计建议 ......................... 27 PCIe设计 ...................................................................... 29 USB设计 ...................................................................... 30 晶体时钟设计 ............................................................... 32 JTAG信号端接设计 ...................................................... 34 未使用接口管脚的端接处理 .......................................... 35 GPIO管脚的设计策略 ................................................... 37 调试接口建议 ............................................................... 37 4 i.MX8X 布线设计检查点 ........................................... 40 PMIC电源输出端布线建议 ............................................ 40 i.MX8X端去耦电容摆放 ................................................ 41 电源布线建议 ............................................................... 41 PCB叠层建议 ............................................................... 43 内存布线通用建议 ........................................................ 43 LPDDR4内存布线建议 ................................................. 44 DDR3L内存布线建议.................................................... 45 内存信号完整性仿真建议 ............................................. 47 内存JEDEC信号兼容性测试 ......................................... 48 高速电路板布线建议..................................................... 49 时钟建议 ...................................................................... 50 信号线阻抗建议 ............................................................ 53 USB布线建议 ............................................................... 54 5 i.MX8X硬件散热设计 ............................................... 54 6 i.MX8X硬件启动bring up .......................................... 56 Bring up需要参考的文档与使用工具............................. 56 i.MX8X Bring up需要准备的文档与使用工具 ............................. 60 Bring up检查列表 .......................................................... 65 7 试产与量产前检查点 ................................................. 67 内存稳定性 ................................................................... 67 ESD与EMI考虑 ............................................................. 68 产线设计 ....................................................................... 69 8 i.MX8X失效分析流程 ................................................ 70 NXP失效分析服务 ........................................................ 70 NXP FA失效分析流程 ................................................... 70 筛查是否是芯片原生问题 .............................................. 72 9 量产厂线的EOS/ESD控制 ........................................ 73 什么是EOS/ESD ........................................................... 73 设计中的EOS/ESD风险检查点 ..................................... 75 生产产线中的EOS/ESD风险与防护 .............................. 78

When working with IPU applications, sometimes image format converter is needed to check images generated by IPU that are not readable by PC (e.g. RGB565, common i.MX framebuffer format -> png or jpg) or generate a RGB picture from an encoded file to be read by IPU (e.g. png -> RGB565 framebuffer). There are some useful tools on Linux and some also available on Windows that can perform these conversions. I listed 5 tools with some usage examples below. IMAGEMAGICK // Display a 800x600 rgb image display -size 800x600 -depth 8 rgb:output.rgb // Show information of output.rgb identify -size 1296x972 -depth 8 output.rgb // Convert a 640x480 grayscale raw rgb file to png convert -size 640x480 -depth 8 imagefile.rgb image.png // To list all available color formats identify -list format For more information about Imagemagick and its format support. access: http://www.imagemagick.org/script/formats.php FFMPEG // List available formats for ffmpeg ffmpeg -pix_fmts // Convert raw rgb565 image to png ffmpeg -vcodec rawvideo -f rawvideo -pix_fmt rgb565 -s 1024x768 -i freescale_1024x768.raw -f image2 -vcodec png screen.png // Convert png to raw rgb565 ffmpeg -vcodec png -i image.png -vcodec rawvideo -f rawvideo -pix_fmt rgb565 image.raw // Convert a 720x480 NV12 (YUV 420 semi-planar) image to png ffmpeg -s 720x480 -pix_fmt nv12 -i image-nv12.yuv -f image2 -pix_fmt rgb24 image-png.png // Convert a 640x480 uyvy422 image to png ffmpeg -s 640x480 -pix_fmt uyvy422 -i image-uyvy422.yuv -f image2 -pix_fmt rgb24 image-uyvy422.png MENCODER http://www.mplayerhq.hu/DOCS/HTML/en/encoding-guide.html TRANSCODING http://www.transcoding.org/cgi-bin/transcode?Examples GRAPHICSMAGICK http://www.graphicsmagick.org/

Working with mainline U-Boot Freescale BSP provides an i.MX51 EVK U-boot port. However, i.MX51 EVK is also supported on I-boot main tree. This quick "how to" teaches how to use it. 0. Get u-boot code from the imx U-Boot Custodian tree: $ git clone git://git.denx.de/u-boot-imx.git 1. Prepare the environment: $ export PATH="$PATH:/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/" $ export CROSS_COMPILE=arm-none-linux-gnueabi- 2. Configure for i.MX 51 EVK $ cd u-boot-imx $ make mx51evk_config 3. Compile $ make u-boot.imx   iMX may SoCs use its internal ROM to execute some instructions at boot time, using "make u-boot.imx" an image containing the instructions 4. Copy the compiled file to a SD card on your host machine, insert the SD card and: $ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2 "/dev/mmcblk0" should replaced according to your host, use "dmesg" after inserting the SD to find out where is the SD on your host. Unmount it before issuing the dd command. seek 2, skips the first 1K bytes (2x512) of the SD where the ROM expects the boot image for SD. 5. Insert the SD on the i.MX51 EVK, and set the switches for SD card boot and power on the board.

Inside IPU there are two block where color space conversion can be made: IC (Image Converter) and DP (Display processor). On Linux, the CSC parameters are located at IPU (IC and DP) drivers, linux/drivers/mxc/ipu3 folder. All negative coefficients are represented using two's complement. Linux Image Converter driver: The parameters are set on function _init_csc: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_ic.c?h=imx_3.14.28_1.0.0_ga static void _init_csc(struct ipu_soc *ipu, uint8_t ic_task, ipu_color_space_t in_format, ipu_color_space_t out_format, int csc_index) { /* * Y = 0.257 * R + 0.504 * G + 0.098 * B + 16; * U = -0.148 * R - 0.291 * G + 0.439 * B + 128; * V = 0.439 * R - 0.368 * G - 0.071 * B + 128; */ static const uint32_t rgb2ycbcr_coeff[4][3] = { {0x0042, 0x0081, 0x0019}, {0x01DA, 0x01B6, 0x0070}, {0x0070, 0x01A2, 0x01EE}, {0x0040, 0x0200, 0x0200}, /* A0, A1, A2 */ }; /* transparent RGB->RGB matrix for combining */ static const uint32_t rgb2rgb_coeff[4][3] = { {0x0080, 0x0000, 0x0000}, {0x0000, 0x0080, 0x0000}, {0x0000, 0x0000, 0x0080}, {0x0000, 0x0000, 0x0000}, /* A0, A1, A2 */ }; /* R = (1.164 * (Y - 16)) + (1.596 * (Cr - 128));   G = (1.164 * (Y - 16)) - (0.392 * (Cb - 128)) - (0.813 * (Cr - 128));   B = (1.164 * (Y - 16)) + (2.017 * (Cb - 128); */ static const uint32_t ycbcr2rgb_coeff[4][3] = { {149, 0, 204}, {149, 462, 408}, {149, 255, 0}, {8192 - 446, 266, 8192 - 554}, /* A0, A1, A2 */ }; ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Linux Display Processor driver: The parameters are set on constants (rgb2ycbcr_coeff and ycbcr2rgb_coeff): http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_disp.c?h=imx_3.14.28_1.0.0_ga /* Y = R * 1.200 + G * 2.343 + B * .453 + 0.250;   U = R * -.672 + G * -1.328 + B * 2.000 + 512.250.;   V = R * 2.000 + G * -1.672 + B * -.328 + 512.250.;*/ static const int rgb2ycbcr_coeff[5][3] = { {0x4D, 0x96, 0x1D}, {-0x2B, -0x55, 0x80}, {0x80, -0x6B, -0x15}, {0x0000, 0x0200, 0x0200}, /* B0, B1, B2 */ {0x2, 0x2, 0x2}, /* S0, S1, S2 */ }; /* R = (1.164 * (Y - 16)) + (1.596 * (Cr - 128));   G = (1.164 * (Y - 16)) - (0.392 * (Cb - 128)) - (0.813 * (Cr - 128));   B = (1.164 * (Y - 16)) + (2.017 * (Cb - 128); */ static const int ycbcr2rgb_coeff[5][3] = { {0x095, 0x000, 0x0CC}, {0x095, 0x3CE, 0x398}, {0x095, 0x0FF, 0x000}, {0x3E42, 0x010A, 0x3DD6}, /*B0,B1,B2 */ {0x1, 0x1, 0x1}, /*S0,S1,S2 */ };‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

The Linux L4.9.51 and SDKv2.3 for i.MX 8MQuad(mScale850D) RFP(GA) release files are now available. Linux on IMX_SW web page, Overview -> BSP Updates and Releases ->Linux L4.9.51 for i.MX 8MQuad GA. SDK on https://mcuxpresso.nxp.com/ web page.   Files available: Linux: # Name Description 1 fsl-yocto-L4.9.51_mx8mq-ga.tar.gz L4.9.51 i.MX 8MQuad GA Linux BSP Documentation. Includes Release Notes, User Guide. 2 L4.9.51-ga_images_mx8mq.tar.gz Linux Binary Demo files for i.MX 8MQuad EVK 3 L4.9.51_8mq-ga_mfg-tools.tar.gz Manufacturing Toolkit for Linux L4.9.51 i.MX8MQuad GA 4 L4.9.51_8mq-ga_gpu-tools.tar.gz VivanteVTK file for L4.9.51 i.MX8MQuad GA 5 imx-aacpcodec-4.3.4.tar.gz AAC Plus Codec for L4.9.51 of iMX 8MQuad GA   SDK:   On https://mcuxpresso.nxp.com/, click the Select Development Board to customize the SDK based on your configuration then download the SDK package. CMSIS pack is also supported.   Target board: i.MX 8MQuad EVK   What’s New/Features: Please consult the Release Notes.   Known issues For known issues and more details please consult the Release Notes.   More information on changes of Yocto, see: README: https://source.codeaurora.org/external/imx/imx-manifest/tree/README?h=imx-linux-morty ChangeLog: https://source.codeaurora.org/external/imx/imx-manifest/tree/ChangeLog?h=imx-linux-morty  

OpenCV is a computer vision library originally developed by Intel. It is free for commercial and research use under the open source BSD license. The library is cross-platform. It focuses mainly on real-time image processing; as such, if it finds Intel's Integrated Performance Primitives on the system, it will use these commercial optimized routines to accelerate itself. Application OpenCV's application areas include: * 2D and 3D feature toolkits * Egomotion estimation * Face Recognition * Gesture Recognition * Human-Computer Interface (HCI) * Mobile robotics * Motion Understanding * Object Identification * Segmentation and Recognition * Stereopsis Stereo vision: depth perception from 2 cameras * Structure from motion (SFM) * Motion Tracking To support some of the above areas, OpenCV includes a statistical machine learning library that contains: * Boosting * Decision Trees * Expectation Maximization * k-nearest neighbor algorithm * Naive Bayes classifier * Artificial neural networks * Random forest * Support Vector Machine Installing OpenCV on i.MX 51 EVK Board running Ubuntu Linux Assuming that you already have the Ubuntu Linux running on your board, you can use this wiki page to guide you to get your USB camera running on your system in order to use real time image processing features of this library. In a brand new installation of Ubuntu some libraries is not installed by default, so you need to install them by your own hands (use synaptic to do that), here is the list of these libraries: libgtk2.0-dev libjpeg62-dev zlib1g-dev libpng12-dev libtiff4-dev libjasper-dev libgst-dev libgstreamer0.10-dev If you already have some of those libraries installed, make sure that is the DEV version. After installing those libraries you can download the stable OpenCV version here. Install it following the procedure below: 1 - untar the opencv package tar -xvzf opencv-1.1pre1.tar.gz  2 - change to OpenCV folder cd opencv-1.1.0  3 - configure the installation enabling gstreamer and letting to compile demo apps later ./configure --with-gstreamer --disable-apps You will get the following results: General configuration ================================================       Compiler:                         g++       CXXFLAGS:       DEF_CXXFLAGS:             -Wall -fno-rtti -pipe -O3 -fomit-frame-pointer       PY_CXXFLAGS:               -Wall -pipe -O3 -fomit-frame-pointer       OCT_CXXFLAGS:             -fno-strict-aliasing -Wall -Wno-uninitialized -pipe -O3 -fomit-frame-pointer        Install path:                      /usr/local  HighGUI configuration ================================================       Windowing system --------------       Use Carbon / Mac OS X:        no       Use gtk+ 2.x:                        yes       Use gthread:                         yes       Image I/O ---------------------       Use ImageIO / Mac OS X:       no       Use libjpeg:                            yes       Use zlib:                                yes       Use libpng:                             yes       Use libtiff:                               yes       Use libjasper:                          yes       Use libIlmImf:                          no             Video I/O ---------------------       Use QuickTime / Mac OS X:     no       Use xine:                                no       Use gstreamer:                        yes       Use ffmpeg:                             no       Use dc1394 & raw1394:     no       Use v4l:                                   yes       Use v4l2:                                 yes       Use unicap:                             no     Wrappers for other languages =========================================       SWIG Python                          no       Octave                                    no       Additional build settings ============================================       Build demo apps                      no Now run make ... 4 - Build OpenCV ./make 5 - Install OpenCV ./sudo make install if all steps above were executed properly, now you can compile the sample applications: 1 - change to samples/c directory cd samples/c 2 - change the build_all script mode to +x chmod +x build_all.sh 3 - run the script ./build_all.sh Now you can test. The results below were taken from the Laplacian filter sample processing in real-time images grabbed from an USB camera: Laplacian filter with USB Camera capture device Also, you can see how is it performance on a 3 windowed application performing color conversion and canny edge detection at the same time: http://www.youtube.com/watch?v=w9yQgdABT7c EOF !

The default BSP release supports sii902x hdmi card via LCDIF in i.MX6 Solo, but doesn't support it via IPU display interface in i.MX6 Dual/Quad/Plus. The patch provides support for the Sii902x HDMI video driver for i.MX6 Dual/Quad/Plus. Useful documents: MCIMXHDMICARD: Schematic for sii902x hdmi card MCIMX6Q-SMART DEVICE PLATFORM: Schematic for i.MX6 Quad Sabre SDP Software version: Linux 3.14.52_1.1.0-ga Verified platform: imx6q-sabresd imx6qp-sabresd Patch: 0001-video-mxc-sii902x-add-sii902x-hdmi-card-driver.patch 0002-arch-arm-boot-dts-add-sii902x-hdmi-card-devicetree-n.patch Features: Support video mode setup via uboot command; Support video mode setup via device tree; Supprt HDMI hot-plug; Support many video modes and a dynamic switching between them; Notes: The default settings( don't add "video=" to bootcmd) are as follows: ---------------------------------------------------------------------------------------- ------------ /sys/class/graphics/fb0 DISP4 BG - DI1 U:1024x768p-60 ldb 2-layer-fb-bg ------------ /sys/class/graphics/fb1 DISP4 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb2 DISP3 BG - DI1 U:1920x1080p-60 hdmi 2-layer-fb-bg ------------ /sys/class/graphics/fb3 DISP3 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb4 DISP3 BG sii902x_hdmi 1-layer-fb ------------ /sys/class/graphics/fb5 DISP4 BG --------------------------------------------------------------------------------------- If you want sii902x_hdmi to be fb0, you can add following arguments to bootcmd: video=mxcfb0:dev=sii902x_hdmi,1920x1080M@60,if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb2:off consoleblank=0 Risks: Sometimes the sii902x will fail to read hdmi edid information, and the modelist of this framebuffer will be NULL. At this time, the driver will setup a default video mode which has been tuned  on imx6q-sabresd and imx6qp-sabresd. The default video mode is as follows: /* 1080p @ 56 Hz */ 60, 1920, 1080, 7692, 100, 40, 30, 3, 10, 2, 0, FB_VMODE_NONINTERLACED, 0 The user can modify this default setting for their case. Specially, there are some risks to use 1080p@60 video mode for imx6qp-sabresd. The hdmi device will has no valid hdmi signal output in this case. For example, /* 1080p @ 60 Hz */ 60, 1920, 1080, 6734, 148, 88, 36, 4, 44, 4, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 The user sholud set these values according to hareware parameters.

ESAI module in i.MX6D/I.MX6D/I.MX6DL/I.MX6S supports several RESET funtions: Reset ESAI Core, Reset both Transmitter and Receiver, Reset Transmitter individually, Reset Receiver individually, Reset Transmitter FIFO and Reset Receiver FIFO. Below is a simple diagram for these RESET functions, which shows reset object and related register configurations. 1.Reset ESAI Core After setting ESAI_ECT ERST bit to be 1, ESAI core and configuration registers will be reset, but Transmitter and Recevier FIFOs can't be reset by the operation. 2. Reset both Transmitter and Receiver After setting ESAI_PCRC & ESAI_PRRC to be 0x000, Transmitter and Receiver can both be reset, The RESET is also called "Personal Reset" in it's reference manual. About PCRC & PRRC bits functionality, we can see the table: From the table, ESAI_PCRC=0x000 and ESAI_PRRC=0x000 will make ESAI disconnet external ESAI pins, and ESAI's Tranmitter and Receiver can't communicate with external audio codec.  See ESAI_PCRC and ESAI_PRRC register below: ---ESAI_PCRC register ---ESAI_PRRC register There are 12 bits in each register to contorl "DISCONNECTION" OR "CONNECTION" with ESAI pins. So for normal operations of ESAI, these 2 registers can't be changed. 3.Reset Transmitter & Receiver individually By setting ESAI_TCR[TPR]=1, Transmitter can be reset individually, and not affect Receiver. By setting ESAI_RCR[RPR]=1, Receiver can be reset individually, and not affect Transmitter . In reference manual, the reset is called "personal reset / individual reset", actually they means the same thing: --Reset Transmitter individually. --Reset Receiver individually. 4.Reset Transmitter FIFO and Reset Receiver FIFO ---By setting ESAI_TFCR[TFR]=1, Tranmitter FIFIO can be reset. ---By setting ESAI_RFCR[RFR]=1, Receiver FIFO can be reset. The Reset requires ESAI is operational, which means at least one pin is defined as an ESAI pin. NXP TIC team Weidong Sun

The article has just been published by EDN website, under “Design Center” and “BBS” channels. Here is the coverage: 如何灵活使用飞思卡尔i.MX应用处理器的GPIO http://bbs.ednchina.com/FORUM_POST_30_529551_0.HTM http://www.ednchina.com/ART_8800518371_15_20034_AN_20f46fd3.HTM Title translation: How to easily use the GPIO of Freescale i.MX processors. If you are interested in the post and would like to have reply in English, please contact the owner of this post.

Created by prathamrahate  For loading u-boot using JTAG, follow the below steps-- 1. Download DDR stress test tool v.2.52 from NXP website. 2. Boot your board into serial mode, by turning all boot switches off 3. Now connect USB cable from USB OTG port to desktop/Laptop on which you will be running DDR stress test tool. 4. For information on using DDR stress test tool refer to documentation. 5. Once board is detected in DDR stress test tool, use appropriate inc script in the tool and click on download. After successful downloading of script , DDR will be initialised. 6. Now connect JTAG cable , and load u-boot.bin image using load_image command from JTAG to appropriate address, for imx6q sabresd board it is 0x17800000. 7. Once image is downloaded successfully, you can resume from same address using resume command like resume 0x178000000 For custom boards, you can use xls provided by NXP to generate inc file for custom board which can be used for loading into DDR stress test tool to initalise DDR. I am using Arm olimex JTAG debugger for debugging. This document was generated from the following discussion: Loading u-boot.bin unsing JTAG on imx6q-sabresd board

Currently, we meet an issue that some jpeg pictures can't be displayed on  imx53 platform by command "gst-launch filesrc location=JPEGFILE ! jpegdec ! freeze ! mfw_isink", the system will meet application crash. So we did investigation on this, found imx6 aslo has such issue.   We found that the issue happen on specific jpeg pictures, the width & height is not 8 pixels alignment.   After track the code ,  found that the jpeg decoder send the width and height to isink plugin, also it send a outsize calculate by the width and height with algorithm that will do 2 pixels,4 pixles,8pixles alignment(I420_SIZE (width, height)). The isink use a different algorithm to calculate the decoder buffer, this size is always smaller than the size pass down by the jpeg decoder , in later memory copy, the code copy a large memory to smaller memory, it's out of boundery, corrupt the memoryand cause the application fail.   So we make a little change, to malloc the larger size to avoid the out of boundry. Original Attachment has been moved to: fix-8pixels-unalignment-jpeg-display-crash.patch.zip

For early i.MX 8QuadXPlus MEK boards with C0 chips, power on the board when the board is connected to the PC with USB Type-C cable may cause the PC to shut down directly. This is a hardware known issue. another type of TCPC PHY chip will be used in later boards to fix this issue. If you have this kind of i.MX 8QuadXPlus MEK boards with c0 chips already, you can take below way to avoid this issue: 1. change the boot switch to "serial download mode", firstly power on the board, then connect the board to PC with Type-C cable. 2. download the attached files, uncompress this two files and put them in the same folder. 3. open the command window, change the working directory to the one contains the files just downloaded, and execute "uuu uuu_change_DRP_to_DFP.auto-imx8qxpc0mek" on command window. After the command being successfuley executed, the board can be powerwed up when the board is connected to PC with type-C cable.

The document is a master page for learning i.MX6Q SABRE. It contains several parts as following. The pdf files listed below(item 0, 1, 2) are contained in the NXP official website and others are in the community links. 0. i.MX6 SMART DEVICE SYSTEM(Schematics): SPF-27516_C5.pdf(in the iMX6Q_SABRE_SDB_DESIGNFILES) i.MX 6Quad SABRE Development Board|NXP  1. How to build an image for an i.MX NXP board by using a Yocto Project build environment: Freescale_Yocto_Project_User's_Guide.pdf(in the L4.1.15_1.1.0_LINUX_DOCS) i.MX 6Quad SABRE Development Board|NXP  2. How to build and install the NXP Linux OS BSP: i.MX_Linux_User's_Guide.pdf (in the L4.1.15_1.1.0_LINUX_DOCS) i.MX 6Quad SABRE Development Board|NXP  3. How to Use Trace32 to Run U-boot in the i.MX6Q SABRE Platform: How to Use Trace32 to Run U-boot in the i.MX6Q SABRE Platform  4. Bootloader Boot Procedure for linux OS in i.MX6Q: Bootloader Boot Procedure for linux OS in i.MX6Q  5. Kernel Loading Procedure for Linux OS in i.MX6Q: Kernel Loading Procedure for Linux OS in i.MX6Q 

NOTE: Always de-power the target board and the aggregator when plugging or unplugging smart sensors from the aggregator. The aggregator portion of the i.MX Power Profiling System sits between the "smart" current sensor boards and the host computer. It provides power and signal connections to each connected sensor board. The communication is done over I2C, where three I2C bus extenders (PCA9518) effectively provide a dedicated bus to each I2C device, to better allow for cabling.  More information will follow... A photo, layout images and schematic attached below.   MBED source for the FRDM-KL25Z is available here: 30848-KL25Z-AGGREGATOR    Smart Sensor Connections At each smart sensor header JP0-JP13, these are the connections provided: 5V: powers the 3.3V regulator on each sensor board 12V: all the gates of all the switching FETs are pulled pulled up to 12V GND: ground connection SCL/TX0: I2C clock line  SDA/RX0: I2C data line  SWD_CLK:  global line for triggering smart sensors to make measurements RESET_B:  global line for resetting all smart sensor boards SWD_IO_n: individual select line for each smart sensor I2C Bus Connection Three I2C bus extenders (PCA9518) provide buffered connections between the FRDM board and all the connected smart sensors. The bus extenders were added to allow for longer cables between the aggregator and the smart sensor boards. Each bus extender has five ports and along with connections that allow extending the bus to more bus extenders. Gate Supply The aggregator contains a boost regulator that boost the 5V input from the FRDM board to 12V. The boosted voltage is fed to each of the smart sensor headers. It's used by the smart sensor board to pull up the gates of the switching FETs above any of the rails under test by at least 4.5V in order to benefit from a lower Rds(on). Caution must be exercised with some older FRDM boards since the 5V from the USB connection passes through diodes with a maximum current of 200mA.  The boost regulator and the load presented by the smart sensor boards may exceed the diode's limit and damage it. (Yes, it's happened... two older FRDM-KL25Z boards were used during development. One of them failed with the diode shorted (~0.05 Ohms), so everything kept working. The other failed with a  short of ~45 Ohms, so it kind of worked but not really...) Application Code for Aggregator  To date, application code has only been developed for the FRDM-KL25Z board. The latest application code resides at: https://os.mbed.com/users/r14793/code/30848-KL25Z-AGGREGATOR/, with the latest binary attached below. SWD Programming of Smart Sensors  Connectors J5 and JP15 are provided as an adapter for programming the smart sensor boards via SWD. JP15 provides power to the smart sensor board, since they have no direct 3.3V input for the KL05Z. An SWD programmer (or suitably modified FRDM-KL05Z board) connects to J5. Both connections use 10-pin 0.05"-spaced ribbon cables. Additionally, when a smart sensor is connected to JP15, J6 provides access to the UART pins of the smart sensor (the I2C pins on the smart sensor also mux out the UART of the KL05Z). No hardware changes are necessary at all; changing the code running on the smart sensor is all that's required. In fact, during the initial prototyping of the smart sensors, the serial UART connection was used instead of I2C. Modify Aggregator To Use SWD Dongle To Program Smart Sensor:  Add a wire as shown on the bottom side of the aggregator board as shown below. This ties 3.3V on the aggregator to the debug header, enabling the voltage level translators on the dongle to communicate with the KL05Z on the smart sensor board.  

The attached patches slow-down the DDR's clock (from 528000000Hz to 396000000Hz) on i.MX6Q Sabre SDB-P boards. These were tested on Android JB4.2.2_1.0.0 and Linux L3.0.35_4.1.0. To verify patches were correctly applied, one the serial console one should see the following TWO bold lines Board: i.MX6Q-SABRESD: unknown-board Board: 0x63012 [POR ] Boot Device: MMC I2C:   ready DRAM:   1 GB MMC:   FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2,FSL_USDHC: 3 *** Warning - bad CRC or MMC, using default environment mx6q pll1: 792MHz mx6q pll2: 528MHz mx6q pll3: 480MHz mx6q pll8: 50MHz ipg clock     : 49500000Hz ipg per clock : 49500000Hz uart clock    : 80000000Hz cspi clock    : 60000000Hz ahb clock     : 99000000Hz axi clock   : 198000000Hz emi_slow clock: 99000000Hz ddr clock     : 396000000Hz usdhc1 clock  : 198000000Hz usdhc2 clock  : 198000000Hz usdhc3 clock  : 198000000Hz usdhc4 clock  : 198000000Hz nfc clock     : 24000000Hz In:    serial Out:   serial Err:   serial Found PFUZE100! deviceid=10,revid=10 Net:   got MAC address from IIM: 00:04:9f:02:67:46 FEC0 [PRIME] Hit any key to stop autoboot:  0 kernel   @ 10808000 (4709060) ramdisk  @ 11800000 (183100) kernel cmdline:     use boot.img command line:     console=ttymxc0,115200 init=/init video=mxcfb0:dev=ldb,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=10M fb0base=0x27b00000 vmalloc=400M androidboot.console=ttymxc0 androidboot.hardware=freescale Starting kernel ... Uncompressing Linux... done, booting the kernel. . . . sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655ms Set periph_clk's parent to pll2_pfd_400! arm_max_freq=1.2GHz . . .

Voltage overshoot (>1.8V) is found on VDD_ARM_SSOC_IN when the EVK board is powered down by POWER BUTTON long pressed after the Linux kernal loaded. It would not happen if only U-boot is run. It happens also when the system recovers from idle. The overshoot is out of i.MX6UL maximum rating.

The document includes the following contents: (1)document how to port ov5646 to android jb4.2.2 (2) ov5645 driver for Linux 3.0.35 (3) ov5645 schematic based on i.MX6Q/DL (4)ov5645 for android camera HAL   [Note:]      P5V29A-0JG is a camera module based on OV5645, and PAO532-0JG is based on OV5640, both manufactured by NINGBO SUNNY OPOTECH CO.LTD (China), If customer wants to use them on i.MX6 platform, can send me email to ask for datasheets of P5V29A & PAO532 , or discuss corresponding questions on porting.   Email: [email protected]

ERR005723           PCIe: PCIe does not support L2 Power Down   Description: When PCIe works as Root Complex, it can exit L2 mode only through reset. Since PCIe doesn't have a dedicated reset control bit, it cannot exit L2 mode.   Projected Impact: PCIe does not support L2 Power Down   Workarounds: The PCIe can be put in PDDQ mode to save on PCIe PHY power and wakeup only by the OOB (Out of Band) wakeup signal (since wakeup by a beacon from link partner is not supported) driven from the link partner (End Point). This signal could be used as a GPIO interrupt to exit this mode. The limitation of this workaround is that the link partner cannot be put into L2.   Proposed Solution:                 No fix scheduled   Linux BSP Status:                 No software workaround available   SW workaround used to fix ERR005723 in Linux BSP Why the original workarounds can’t be implemented in Linux BSP * PCIe controller doesn’t have the reset mechanism that can be used when re-insmod the PCIe driver without power down/up PCIe module. * During the PCie driver rmmod/insmod operations, the PCIe CLKs would be turned off/on. IC can’t guarantee that the PCIe PHY can work well and re-establish the PCIe link properly. One SIMPLE SW workaround for this errata imx: pcie: toggle bit18 of grp1 fix pcie can't exit L2 issue.   Set bit18 of gpr1 before enter into supend, and clean it after resume, can fix the following errata. Errata ERR005723_PCIe PCIe does not support L2 Power Down. About the details, please refer to the attached patch. "0001-imx-pcie-toggle-bit18-of-grp1-fix-pcie-can-t-exit-L2.patch"   The conception of the other SW workaround (System warm-reset) The procedures of the original suspend/resume. Suspend User suspend command echo mem > /sys/power/state All driver call suspend function SRPG,  ARM save all state to memory Enter Stop mode and Power down ARM Resume: GPC receive IRQ Wake up system Power on ARM domain. ROM code running Jump to SRPG point Recovery ARM status from memory Call all devices resume function. Because PCIe only reset by system reset, we need change above follow. Resume: GPC receive IRQ Wake up system Power on ARM domain. ROM code running Jump to SRPG point Warm Reset system, memory context will be kept. But all peripheral status lost. ROM code running Jump to SRPG point again. Recovery ARM status from memory Call all devices resume function. Resume function call init to initialize it.  And recover to the status saved before. Impact: Can’t support usb remote wake up, which required 4ms responsive Longer latency, warm reset need some ms.  The recovery of the device status needs some more ms. Risk: Current BSP have not tested above follow Device driver have not supported this follow yet. Need additional work to enable \debug\test it. Modules enabled in this workaround now: * UART* ENET* PCIe Tests procedure. HW: one i.MX6Q SD boards, and one INTEL pciex1 1000M CT network card. SW(The images used by me are attached): * Apply the attached patches(kernel and uboot) to the kernel/uboot source codes, re-build, get the images. Kernel is based on imx_3.0.35_4.0 release, uboot , is based on imx_v2009.08 # build out SD/MMC and USB driver to make DRAM hibernate work # build pcie in. *procedure of the suspend/resume tests;     # unload ep's driver --> suspend/resume --> reload ep's driver. NOTE: Please make sure that the command line contains “no_console_suspend”The command used to enable the console input wake up after login the consol:echo enabled > /sys/devices/platform/imx-uart.0/tty/ttymxc0/power/wakeup Log when the INTEL CT 1G network card is used: -------------------------------log--------------------------------------------PM: Syncing filesystems ... done.                                             start suspendFreezing user space processes ... (elapsed 0.01 seconds) done.Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.add wake up source irq 101add wake up source irq 99add wake up source irq 103add wake up source irq 51add wake up source irq 58PM: suspend of devices complete after 15.482 msecsPM: late suspend of devices complete after 0.823 msecsDisabling non-boot CPUs ...CPU1: shutdownCPU2: shutdownCPU3: shutdownIMX PCIe imx_pcie_pltfm_suspend entering.IMX PCIe imx_pcie_pltfm_suspend exit.          suspendedU-Boot 2009.08-00679-g6ec6783 (May 20 2013 - 14:50:20)     resumeCPU: Freescale i.MX6 family TO1.2 at 792 MHzsrc 0x92eac8resume 0x92eac8jump to resumeIMX PCIe imx_pcie_pltfm_resume entering.IMX PCIe imx_pcie_pltfm_resume pcie start re-link.IMX PCIe port imx_pcie_pltfm_resume: re-link up.Enabling non-boot CPUs ...CPU1: Booted secondary processorCalibrating delay loop (skipped) already calibrated this CPU i.MXC CPU frequency driver CPU1 is upCPU2: Booted secondary processorCalibrating delay loop (skipped) already calibrated this CPU i.MXC CPU frequency driver CPU2 is upCPU3: Booted secondary processorCalibrating delay loop (skipped) already calibrated this CPU i.MXC CPU frequency driver CPU3 is up PM: early resume of devices complete after 0.974 msecs remove wake up source irq 58 imx-ipuv3 imx-ipuv3.0: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7) imx-ipuv3 imx-ipuv3.1: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7) remove wake up source irq 51 remove wake up source irq 103 remove wake up source irq 101 remove wake up source irq 99 PM: resume of devices complete after 54.174 msecs Restarting tasks ... done. PHY: 1:01 - Link is Up - 100/Full                            resume is ok, reload ep’s driver num is 61 e1000e: Intel(R) PRO/1000 Network Driver - 1.3.10-k2 e1000e: Copyright(c) 1999 - 2011 Intel Corporation. e1000e 0000:01:00.0: Disabling ASPM L0s e1000e 0000:01:00.0: (unregistered net_device): Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts. e1000e 0000:01:00.0: (unregistered net_device): Failed to initialize MSI interrupts.  Falling back to legacy interrupts. e1000e 0000:01:00.0: eth1: (PCI Express:2.5GT/s:Width x1) 00:1b:21:3a:18:8b e1000e 0000:01:00.0: eth1: Intel(R) PRO/1000 Network Connection e1000e 0000:01:00.0: eth1: MAC: 3, PHY: 8, PBA No: E42641-005 e1000e: eth1 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx PING 192.168.0.1 (192.168.0.1): 56 data bytes 64 bytes from 192.168.0.1: seq=0 ttl=64 time=3.126 ms 64 bytes from 192.168.0.1: seq=1 ttl=64 time=0.244 ms 64 bytes from 192.168.0.1: seq=2 ttl=64 time=0.232 ms 64 bytes from 192.168.0.1: seq=3 ttl=64 time=0.206 ms 64 bytes from 192.168.0.1: seq=4 ttl=64 time=0.222 ms 64 bytes from 192.168.0.1: seq=5 ttl=64 time=0.207 ms 64 bytes from 192.168.0.1: seq=6 ttl=64 time=0.250 ms 64 bytes from 192.168.0.1: seq=7 ttl=64 time=0.209 ms 64 bytes from 192.168.0.1: seq=8 ttl=64 time=0.154 ms 64 bytes from 192.168.0.1: seq=9 ttl=64 time=0.211 ms   --- 192.168.0.1 ping statistics --- 10 packets transmitted, 10 packets received, 0% packet loss round-trip min/avg/max = 0.154/0.506/3.126 ms PM: Syncing filesystems ... done.                                   ep’s functions are ok, re-do the suspend/resume tests Freezing user space processes ... (elapsed 0.01 seconds) done. -------------------------------end-------------------------------------------- Original Attachment has been moved to: uboot_patch_image.zip Original Attachment has been moved to: 0001-imx-pcie-toggle-bit18-of-grp1-fix-pcie-can-t-exit-L2.patch.zip Original Attachment has been moved to: kernel_patch_image.zip