The KTV Demo is a common user case for KTV OEM. In this charpter, we will see what it is and how to use it. HW Platform imx6qp-sabresd SW Platform 3.14.52_1.0.0-ga, fb backend Display Connection LVDS0 XGA 1024*768 RGB666                          - IPU1 DI0 HDMI Display1920*1080@60                              - IPU0 DI1 HDMI Display1920*1080@56 via sii902x            - IPU0 DI0 LVDS1 XGA 1024*768 RGB666                          - IPU1 DI1 User case The demo has following output: Display # UI Video Stream Output Resolution DISP0-LVDS0 3D Cube@60fps 1920x1080@24fps (overlay) XGA(1024x768,RGB666) DISP1-HDMI 3D Cube@60fps 720p@20fps (overlay) 1080P@60(1920x1080,RGB24) DISP2-SII902X 3D Cube@60fps N/A 1080P@56(1920x1080,RGB24) DISP3-LVDS1 N/A 720p@20fps XGA(1024x768,RGB666) The DISP0 and DISP1 has overlay framebufffer, so output UI to bottom framebuffer and output video stream to overlay framebuffer. Run Demo The customer can refer to following script: #!/bin/sh echo "KTV demo start!" # Set environment variables export FB_FRAMEBUFFER_0=/dev/fb0 export FB_FRAMEBUFFER_1=/dev/fb2 export FB_FRAMEBUFFER_2=/dev/fb4 export FB_FRAMEBUFFER_3=/dev/fb5 # Run cube on DISP0,DISP1, DISP3 echo 0 > /sys/class/graphics/fb0/blank ./cube display=0 & sleep 1 echo 0 > /sys/class/graphics/fb2/blank ./cube display=1 & sleep 1 echo 0 > /sys/class/graphics/fb4/blank ./cube display=2 & echo "Open DISP0(LVDS0)" gst-launch-1.0 playbin \   uri=file:///home/root/ktv_demo/1080p_24fps.mp4 \   video-sink="imxv4l2sink device=/dev/video17" & sleep 3 echo "Open DISP1(HDMI)" gst-launch-1.0 playbin \   uri=file:///home/root/ktv_demo/720p_20fps.mp4 \   video-sink="imxv4l2sink device=/dev/video19" & #sleep 3 echo "Open DISP3(LVDS1)" gst-launch-1.0 playbin \   uri=file:///home/root/ktv_demo/720p_20fps.mp4 \   video-sink="imxv4l2sink device=/dev/video21" & sleep 3 The demo image can be downloaded at: \\10.193.102.186\public_share\ZhengTao\KTV Demo​ VPU frequency The vpu can run at 352MHz or  266MHz. We run it at 352MHz in this demo. The customer can configure the VPU frequcency from Linux kernel Kconfig options. Performance Utilization: 33% Overall Bus Load: 71% For 1080p@24fps, the real fps can only up to 13.319fps. The GPU may influence VPU performance.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345629 

Hi, this is a smart server called Duckbill in a thumb-drive format based on the i.MX283. It's a really low cost solution usable with or without casing. It is intended to be set up as a small home-server for automation purposes. It comes with Debian Linux as operation system but without any specific user programs.  The stick can be operated either at a USB power adaptor or at a USB port of your router.  Since Duckbill runs Linux you are totally free in software development. The internal connectors can be used as UART, SPI, I2C, ADC or GPIO. So it's up to everyone to develop his own expansion board. 1. Duckbill without casing (top) 2. Duckbill without casing (bottom) 3. Duckbill with casing 4. Duckbill for development purposes 5. Duckbill with integrated EnOcean module If you want to know more about this product: http://www.i2se.com/homeautomation.html

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-344485 

Dear,   We want to start application program from bootloader, we have below questions: We we use I.MX6UL bootrom start BootLoader， we need use mkimage.sh, compile and generator bin file, then we convert to executable file. If we need use Bootloader run application program,whether application image also need convert by mkimage.sh?  The file which convert by mkimage.sh is compressed file. we do not know its format, how about its start address, how to realize the the address jump, do you have example? Thanks.  

Here are two patchs: Patch 1: 0001-I.MX6-SSI_ASRC_P2P_Capture-for-SabreSD-board-Kernel-.patch Patch 2: 0001-I.MX6-SSI_ASRC_P2P-Capture-for-SebreSD-board.patch Patch 1 is based on patch 2.     memory <-- ASRC_Output FIFO | ASRC_Input FIFO <-- SSI_RX FIFO <-- Audio Codec                                              |           |     ASRC Out clk ASRCK1 <---|           |--->   ASRC In clk None                                              |           |     ASRC OutPut width            |           |       ASRC InPut width and data format     is set by arecord            <---|           |--->   is set by ASRC P2P parameter     parameter                          |           |                                             |           |     support 44100/48000          |           |       support 44100/48000     and S24_LE/S16_LE     <---|           |--->   and S24_LE/S16_LE    You can use:     arecord -Dhw:0,1 -c 2 -f S16_LE/S24_LE -r 44100/48000 XXX.wav     aplay XXX.wav     to test this patch.

When I use QMediaPlayer (Qt5.1.1) to play a FHD video, the CPU (imx6dl) usage turns very high and the output is not fluid and also has some frame drop. I found a patch that claims to solve this problem (links below are taking about the same thing) : adding zero-copy-QSGVideoNode for imx6 - Qt by Digia https://www.mail-archive.com/meta-freescale@yoctoproject.org/msg08580.html After patch appliance and recompilation of Qt Library and program rebuild, the performance issue remains the same. Does anybody know how to enable this property correctly? Have I missed some points or mandatory steps? Any comment will be appreciated, thanks!

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345751 

Summary of the Issue: We have had customers reporting failure to run MC and SC production parts at 1GHz or higher frequencies. The signature of the fail is that the system will hang once it tries to ramp from the boot frequency of 800MHz to 1GHz or higher. The root cause was tracked to the setting of the LDO_VOLT_CHANGE_EN fuse in production parts. The LDO_VOLT_CHANGE_EN fuse sets the LDO boot voltage to either 1.15V (indicated by a fuse setting of “1”) or 1.1V  (indicated by a fuse setting of “0”). In production parts the fuse is set to “1”, i.e. 1.15V, since this is the optimal setting based on characterization data. On pre-production units the LDO voltage was set to the lower setting of 1.1V (i.e. fuse set to “0”). The reason this is a problem with MC/SC parts is because the fuse is read by the ROM during boot and overwrites the LDO ramp rate bits in the PMU_MISC2 register based on the setting of the fuse. When the LDO_VOLT_CHANG_EN fuse is set to “1” then the LDO ramp up time to spec voltage is set (in PMU_MISC2) to 500uS instead of the 50uS assumed by the CPUFreq driver. This will cause the system to hang when transitioning from the boot frequency to a higher frequency/voltage point since the required voltage to support the higher frequency is not yet present. In real terms, customers who have production i.MX 6Quad/6Dual/6DualLite and 6 Solo parts have seen failures to ramp their products to 1GHz or higher frequencies. This is completely fixed by a software patch that corrects the LDO ramp setting in the PMU_MISC_2 register by setting it back to the fastest ramp time. Note that the LDO_VOLT_CHANGE_EN fuse is not in the reference manual since it is not a customer visible fuse. It is programmed and locked at final test. This is a mandatory fix for all customers. Affected Parts: i.MX 6Quad – all SC and MC parts, consumer and automotive. Industrial MC parts not yet shipping. i.MX 6Dual – all SC and MC parts, consumer and automotive. Industrial MC parts not yet shipping. i.MX 6DualLite – all MC parts consumer parts. Automotive and industrial MC parts not yet shipping. i.MX 6Solo – all MC consumer parts. Automotive and industrial MC parts not yet shipping. Patch Availability and Location: Patches exist for both Linux and Android. They are available on freescale.com. See below for more details. i.MX 6Quad – www.freescale.com/imx6q i.MX 6Dual – www.freescale.com/imx6d i.MX 6DualLite – www.freescale.com/imx6dl  i.MX 6Solo – www.freescale.com/imx6s Select the “Software and Tools” tab and then expand the section “Updates and Patches”.  The relevant patches are: Linux – L3.0.35_1.1.1_LDO_PATCH (i.MX 6Quad/6Dual) Linux – L3.0.35_3.0.3_LDO_PATCH (i.MX 6DualLite/6Solo) Android – IMX6_R13.4103_ANDROID_LDO_PATCH (i.MX 6Quad/6Dual/6DualLite/6Solo) Communication Roll-out: i.MX FAE’s: done (via maillist). Will post copy of this email to i.MX support space by end of day 1 st March. i.MX DFAE’s: 8 th March. Customer notification: 8 th March. i.MX community: 8 th March (to coincide with customer notification). We are also working on an engineering bulletin that describes the change for customers who are not using our provided Linux and Android BSP’s. Target date: TBD. But goal is to make this available on/around mid-March. Best regards, Amanda and Kyle This document was generated from the following discussion: i.MX 6 Series LDO Ramp Issue: Linux and Android Patches Now Available

Streaming different use case pipelines between i.MX 95 and i.MX 8M Plus LF-6.12.20

  Test Environment i.MX8MP EVK L6.6.52   Backgroud The default BSP will assign SAI3 and I2C3 to M7 when we use imx8mp-evk-rpmsg.dtb. If customer want to assign SAI3 and I2C3 to A53 and test audio in Linux while running M7 sdk with remoterpoc.   Test steps   1. Delete all of audio related code in SDK in below function. BOARD_BootClockRUN  BOARD_RdcInit 2. Modify Uboot   arch/arm/dts/imx8mp-evk-u-boot.dtsi   The RDC will assign SAI3, sdma3 and i2c3 to M7 when M7 start. So we need to delete these lines.      3. Add RDC config in ATF plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c  Assign SAI3, sdma3 and i2c3 to A53.    4.Modify imx8mp-evk-rpmsg.dts Delete rpmsg audio and i2c3. diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts index e43c4dafdb88..4edc0cb71b1c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts @@ -4,8 +4,3 @@ */ #include "imx8mp-evk-rpmsg.dts" - -&rpmsg_audio { - /delete-property/ fsl,enable-lpa; - /delete-property/ fsl,rpmsg-in; -}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts index ddf5f76adc3b..75c9234d84b2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts @@ -8,11 +8,6 @@ #include "imx8mp-evk.dts" / { - aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c_rpbus_3; - }; reserved-memory { #address-cells = <2>; @@ -45,70 +40,6 @@ rsc_table: rsc-table@550ff000 { no-map; }; - audio_reserved: audio@81000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0 0x81000000 0 0x10000000>; - }; - - micfil_reserved: mic_rpmsg@91000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0 0x91000000 0 0x100000>; - }; - }; - - sound-wm8960 { - status = "disabled"; - }; - - sound-micfil { - status = "disabled"; - }; - - rpmsg_audio: rpmsg_audio { - compatible = "fsl,imx8mp-rpmsg-audio"; - model = "wm8960-audio"; - fsl,rpmsg-channel-name = "rpmsg-audio-channel"; - fsl,enable-lpa; - fsl,rpmsg-out; - fsl,rpmsg-in; - assigned-clocks = <&clk IMX8MP_CLK_SAI3>; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <12288000>; - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, - <&clk IMX8MP_AUDIO_PLL1_OUT>, - <&clk IMX8MP_AUDIO_PLL2_OUT>; - clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; - audio-codec = <&codec>; - memory-region = <&audio_reserved>; - power-domains = <&audiomix_pd>; - audio-routing = - "LINPUT1", "MICB", - "LINPUT3", "MICB"; - status = "okay"; - }; - - rpmsg_micfil: rpmsg_micfil { - compatible = "fsl,imx8mp-rpmsg-audio"; - model = "micfil-audio"; - fsl,rpmsg-channel-name = "rpmsg-micfil-channel"; - fsl,enable-lpa; - fsl,rpmsg-in; - assigned-clocks = <&clk IMX8MP_CLK_PDM>; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <196608000>; - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_IPG>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_ROOT>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, - <&clk IMX8MP_AUDIO_PLL1_OUT>, - <&clk IMX8MP_AUDIO_PLL2_OUT>; - clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; - memory-region = <&micfil_reserved>; - power-domains = <&audiomix_pd>; - status = "okay"; }; imx8mp-cm7 { @@ -144,72 +75,10 @@ &flexspi { status = "disabled"; }; -/delete-node/ &i2c3; - -&i2c_rpbus_3 { - compatible = "fsl,i2c-rpbus"; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - pca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - - ov5640_1: ov5640_mipi@3c { - compatible = "ovti,ov5640"; - reg = <0x3c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>; - clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; - clock-names = "xclk"; - assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; - assigned-clock-parents = <&clk IMX8MP_CLK_24M>; - assigned-clock-rates = <24000000>; - csi_id = <0>; - powerdown-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; - mclk = <24000000>; - mclk_source = <0>; - mipi_csi; - status = "disabled"; - - port { - ov5640_mipi_1_ep: endpoint { - remote-endpoint = <&mipi_csi1_ep>; - data-lanes = <1 2>; - clock-lanes = <0>; - }; - }; - }; - - codec: wm8960@1a { - compatible = "wlf,wm8960,lpa"; - reg = <0x1a>; - wlf,shared-lrclk; - SPKVDD1-supply = <&reg_audio_pwr>; - }; -}; - &pwm4{ status = "disabled"; }; -&sai3 { - status = "disabled"; -}; - -&micfil { - status = "disabled"; -}; - -&sdma3{ - status = "disabled"; -}; - &uart3 { status = "disabled"; };   Result We can play audio on wm8960 after we load M7 firmware.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-342654 

Question: When working with v1.6.0.55 using the standard profile for i.MX35 the tool fails most of the time when transferring the target root file system, on v1.6.0.42 it works just fine. The tags on the internal git don’t clearly mention a tool version, but a BSP. Wwhat are the differences between v1.6.0.55 and v1.6.0.42? Or to which tag(or commit) they correspond on git? Answer: 1.6.042 commit by looking at "Apps/MfgTool.exe/docs/changelog.txt": 1ca2a16df736ac51979a67423fef6a09bed6b7e2 And 1.6.055: "06a4f9190e34297b7273fc4bb4a92737e5bc837f"

Hi All, The new i.MX 6 SL L3.0.35_2.1.0 release is now available on the http://www.freescale.com/site. ·         Files available # Name Description 1 L3.0.35_2.1.0_LINUX_DOCS i.MX   6SoloLite Linux BSP Documentation. Includes Release Notes, Reference Manual,   User guide. API Documentation 2 L3.0.35_2.1.0_LINUX_MMDOCS i.MX 6SoloLite Linux Multimedia Codecs   Documentation. Includes   CODECs Release Notes and User's Guide 3 L3.0.35_2.1.0_ER_SOURCE i.MX   6SoloLite Linux BSP Source Code Files 4 L3.0.35_2.1.0_MM_CODECS i.MX   6SoloLite Linux Multimedia Codecs Sources 5 L3.0.35_2.1.0_AACP_CODECS i.MX   6SoloLite Linux AAC Plus Codec 6 L3.0.35_2.1.0_DEMO_IMAGE i.MX   6SoloLite Linux Binary Demo Files ·         Target HW boards o   i.MX6SL-EVK ·         New features o   Updated thermal equation for i.MX 6SoloLite o   Added Fuse check for all the devices o   Enabled DISPLAY power gating feature on TO1.2 ·         Known issues o   For known issues and limitations please consult the release notes.

The i.MX21ADS board needs a flash programmer software called iMX21ADS_TOOLKIT or just HAB. This programmer evolved to current ATK. You can download iMX21ADS_TOOLKIT here.  

                For the SPI NOR booting on fuse steps. 1.      Please boot your PCB on uboot and type below command for fuse boot setting. MX6Q SABRESD-MFG U-Boot > imxotp blow --force 5 0x0a000030 MX6Q SABRESD-MFG U-Boot > imxotp read 5 Reading fuse at index: 0x5 Fuse at (index: 0x5) value: 0xA000030 MX6Q SABRESD-MFG U-Boot > imxotp read 6 Reading fuse at index: 0x6 Fuse at (index: 0x6) value: 0x0 MX6Q SABRESD-MFG U-Boot > imxotp blow --force 6 0x10 Current fuse at (index: 0x6) value: 0x0 Blowing fuse at index: 0x6, value: 0x10 Reloading shadow registers... Operation succeeded fuse at (index: 0x6) value: 0x10 MX6Q SABRESD-MFG U-Boot > imxotp read 6 Reading fuse at index: 0x6 Fuse at (index: 0x6) value: 0x10 MX6Q SABRESD-MFG U-Boot > 2.      Set the boot mode for 00 as Boot from fuses 3.      You could see the SPI clock on scope after re power on.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345322 

Tel Aviv, December 2013   Variscite announces the support of Yocto over its iMX6 System-on-Modules   Variscite, a leading manufacturer of embedded solutions and System-on-Modules and Freescale’s Connected Partner, is pleased to announce the support of Yocto v4.1 Dora release over all Variscite’s iMX6 embedded products. Variscite develops, produces and manufactures a powerful range of System-on-Modules (SoM) and Single-Board-Computers (SBC), consistently setting market benchmarks in terms of speed and innovation. Today Variscite’s cost sensitive high performance portfolio serves over a thousand c ustomers in over 50 countries worldwide. The Yocto project was announced in 2010 to enable the creation of Linux distributions for embedded software that are independent of the underlying architecture of the embedded software itself. Variscite’s support of Yocto over its iMX6 solutions aligns with the company’s strategy to provide its customers with a complete set of leading embedded software and hardware solution, reducing development risk, cost and time-to-market. Variscite’s Yocto v4.1 Dora release supports iMX6 Solo, Dual Lite, Dual and Quad processors with a variety of speed grades, memory sizes and interfaces. More information can be found in: http://www.variwiki.com/index.php?title=Yocto_V4.1_Dora#Supported_hardware_and_features   About Variscite:   In less than a decade Variscite has taken a leading position in the System-on-Modules (SoM) design and manufacturing market. A trusted provider of development and consulting services for a variety of embedded platforms, Variscite transforms clients’ visions into successful products. Learn more about Variscite by visiting: www.variscite.com or contacting: Variscite Sales, sales@variscite.com , +972-9-9562910

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-341473 

ESAI module in i.MX6D/I.MX6D/I.MX6DL/I.MX6S supports several RESET funtions: Reset ESAI Core, Reset both Transmitter and Receiver, Reset Transmitter individually, Reset Receiver individually, Reset Transmitter FIFO and Reset Receiver FIFO. Below is a simple diagram for these RESET functions, which shows reset object and related register configurations. 1.Reset ESAI Core After setting ESAI_ECT ERST bit to be 1, ESAI core and configuration registers will be reset, but Transmitter and Recevier FIFOs can't be reset by the operation. 2. Reset both Transmitter and Receiver After setting ESAI_PCRC & ESAI_PRRC to be 0x000, Transmitter and Receiver can both be reset, The RESET is also called "Personal Reset" in it's reference manual. About PCRC & PRRC bits functionality, we can see the table: From the table, ESAI_PCRC=0x000 and ESAI_PRRC=0x000 will make ESAI disconnet external ESAI pins, and ESAI's Tranmitter and Receiver can't communicate with external audio codec.  See ESAI_PCRC and ESAI_PRRC register below: ---ESAI_PCRC register ---ESAI_PRRC register There are 12 bits in each register to contorl "DISCONNECTION" OR "CONNECTION" with ESAI pins. So for normal operations of ESAI, these 2 registers can't be changed. 3.Reset Transmitter & Receiver individually By setting ESAI_TCR[TPR]=1, Transmitter can be reset individually, and not affect Receiver. By setting ESAI_RCR[RPR]=1, Receiver can be reset individually, and not affect Transmitter . In reference manual, the reset is called "personal reset / individual reset", actually they means the same thing: --Reset Transmitter individually. --Reset Receiver individually. 4.Reset Transmitter FIFO and Reset Receiver FIFO ---By setting ESAI_TFCR[TFR]=1, Tranmitter FIFIO can be reset. ---By setting ESAI_RFCR[RFR]=1, Receiver FIFO can be reset. The Reset requires ESAI is operational, which means at least one pin is defined as an ESAI pin. NXP TIC team Weidong Sun