This tutorial guides on setting up and running the NFC Demo App using the PN7120 NFC Click board with the i.MX 7Dual SABRE-SD and its mikroBUS socket compatible: MikroE NFC Click Board on i.MX7D - i.MXDev Blog

i.MX8MP and i.MX95 both support USB3.0. In EVK board, USB download pin is USB3.0 with Type-C.  While in other boards, they may delete CC logic design PTN5110, or use USB2.0 signals instead. This document describes how to modify U-Boot to support a design without PTN5110 when using the uuu tool to download.

The ads7846 driver that is distributed with yocto 1.6 (Daisy, Linux 3.10.17) does not support device tree configuration hooks. Attached is a patch for the ads7846 touchscreen driver to support device tree. Also added to the driver are hooks to ignore the requirement for a voltage regulator configuration.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-344893 

Hi All I make fsl-image-qt5 in yocto. make command: $ MACHINE=imx6slevk source fsl-setup-release.sh -b build -e fb $ bitbake fsl-image-qt5 However, I couldn't make meta-toolchin-qt5 in yocto. The error is as follows. > | WARNING: exit code 1 from a shell command. > | ERROR: Function failed: do_configure (log file is located at /opt/yocto_build/yocto_fsl-bsp-imx6slevk/fsl-release-bsp/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/qtdeclarative/5.3.2-r0/temp/log.do_configure.3411) > ERROR: Task 771 (/opt/yocto_build/yocto_fsl-bsp-imx6slevk/fsl-release-bsp/sources/meta-qt5/recipes-qt/qt5/qtdeclarative_5.3.2.bb, do_configure) failed with exit code '1' > NOTE: Tasks Summary: Attempted 1235 tasks of which 1234 didn't need to be rerun and 1 failed. > No currently running tasks (1234 of 3376) > > Summary: 1 task failed: >   /opt/yocto_build/yocto_fsl-bsp-imx6slevk/fsl-release-bsp/sources/meta-qt5/recipes-qt/qt5/qtdeclarative_5.3.2.bb, do_configure > Summary: There was 1 ERROR message shown, returning a non-zero exit code. How do you make toolchain include Qt5?

Attached is the U-boot binary needed to construct the following image: i.MX 6Dual/6Quad Power Consumption Measurement Linux Image

System Manager configuration via Config tools for i.MX. Create a new project, modify, view or edit available resources for your specific core. What will you learn How to create a new System Manager project Viewing and managing resources Creating and assigning templates Configuration of System Manager Tip: you can skip to a specific chapter   Introduction   New System Manager project     System Manager views   System Manager templates   Assigning a resource   Creating custom template   Exporting code     Download the tools here: https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX   https://www.nxp.com/products/i.MX95

Overview The purpose of this document is to provide guidance for FlexIO 8080 display capability. Generally, the 8080 bus interface consists of one chip-select line (CS), one writing-latch line (WR), one reading-latch line (RD), one data/command-select line (RS, also called D/C), and 8 or 16 bidirectional data lines (Data Bus). Since The FlexIO instance of i.MX 943 support only 16 pins, the demo can only support 8 bit 8080 mode(two pin should be used as WR and RD signal.   Below are pins used in the 8 bit 8080 display. Panel Setup The panel in the example is X-LCD-PAR-S035. To use 8 bit 8080 mode, need ser IM[2:0] to be 011. Connection and Software i.MX 943 Need pull down SPI8_SEL1 and SPI8_SEL3 of PCA6416 in SW to select Arduino for 8080 pins D[7:4]. Here is the patch for system manager. For quick verification, use flash_m70 when building bootloader. diff --git a/configs/mx94evk.cfg b/configs/mx94evk.cfg index 9d46976..90bf089 100755 --- a/configs/mx94evk.cfg +++ b/configs/mx94evk.cfg @@ -499,6 +499,9 @@ ENC_PLL OWNER ENDAT2_1 OWNER ENDAT2_2 OWNER ENDAT3_1 OWNER +GPIO2 OWNER +GPIO3 OWNER +FLEXIO1 OWNER FLEXIO3 OWNER FLEXIO4 OWNER FLEXPWM1 OWNER @@ -515,6 +518,7 @@ HIPERFACE_SAFE1_2 OWNER HIPERFACE_SAFE2_1 OWNER HIPERFACE_SAFE2_2 OWNER IRQSTEER_M7_0 OWNER +LPI2C6 OWNER LPIT1 OWNER LPTMR1 OWNER LPTMR2 OWNER @@ -557,6 +561,25 @@ XBAR_DSC3 OWNER PIN_GPIO_IO24 OWNER PIN_GPIO_IO25 OWNER +# 8080 +PIN_GPIO_IO00 OWNER +PIN_GPIO_IO01 OWNER +PIN_GPIO_IO02 OWNER +PIN_GPIO_IO03 OWNER +PIN_GPIO_IO08 OWNER +PIN_GPIO_IO09 OWNER +PIN_GPIO_IO10 OWNER +PIN_GPIO_IO11 OWNER +PIN_GPIO_IO12 OWNER +PIN_GPIO_IO13 OWNER +PIN_GPIO_IO14 OWNER +PIN_GPIO_IO15 OWNER +PIN_GPIO_IO38 OWNER + +# I2C6 +PIN_GPIO_IO28 OWNER   Attached imx943_flexio_8080_8bit.zip is patch for m70 demo based on SDK_25_06_00_MCIMX943-EVK.   i.MX 93 Need pull up EXP_SEL(pin4 R4) of ADP5585 in SW to route some pins. Attached imx93_flexio_8080_8bit.zip is patch for m33 demo based on SDK_25_06_00_MCIMX93-EVK. The running status is similar as i.MX943.

  Solution           

On behalf of Gopise Yuan. A simple sharing for enabling some kernel options for using “lockdep”. It will be useful for detecting some deadlock (spinlock/mutex/…) issue. Validated on L4.14.x, and, found a lock violation…

Q: What is the Min LPDDR2 clock frequency allowed by the i.MX6? The Jedec Spec for LPDDR2 allows for a min tck period of 100ns. Are there any required relashionship between the DDR clock frequency and other clocks in the i.MX6? A: The JEDEC maximum period for the MX6 is 100nS as per the LPDDR2 specification.  There is a minimum period during boot, before everything is configured and fully up to speed of 18nS. Are you saying the imx6 memory controller can operatate down to the min frequecies specified in the LPDDR2 JEDEC spec? Given that there is no limit specified in the data sheet, it should operate that slowly, provided the clocking can be set for it to operate so slowly. I would imagine that the core will need to be running slowly as well, since it does not make sense to slow the memory bus without slowing the core down as well.

Features Additional Information Features The i.MX31 PDK, with Smart Speed™ technology, is a completely integrated hardware and software solution that simplifies product development so you can focus on your critical differentiation needed for market success. Reduce development time, and design products that have power to spare, even when running multiple applications simultaneously. Receive stellar image and graphic performance in a system design that dramatically reduces power consumption. The i.MX31 PDK provides: Modular hardware enabling multiple connectivity technologies Optimized development software for Linux®, Windows® CE 5.0 and Windows Embedded CE 6.0 operating systems Out-of-box experience, complete with demonstration software and performance data Maximum performance and power savings Complete "Design. Debug. Demo." capability as simple as 1,2,3 i.MX31 Applications Processor Module i.MX31 Applications Processor - ARM11™ 128 MB DDR SDRAM 256 MB NAND FLASH Power Management (PMIC MC13783) + Power Circuitry Audio HS USB PHY Touch Controller Connector Debug Module (Software Development) Debug Ethernet Port Debug Serial Port JTAG Reset, Interrupt, Boot Switches Debug LEDs CodeTest Interface Power Source Current/Power Monitoring Personality Module (Demo-ready) Acceleromater MMA7450L (Freescale) User I/O Connectivity (FM, 802.11, Bluetooth, USB OTG, USB HS) Button 2.7"TFT Display 2MP Camera Module SDcard, ATA HDD External Connectors (dock, headphones, TV out, GPS) Microphone Speaker Additional Information i.MX31 PDK Contents If you are new to i.MX31PDK development we suggest checking out:Not authorized to view the specified document 1673 To flash BootLoader: i.MX31 PDK Board Flashing Miscellaneous Tutorials Blink i.MX 31PDK LEDs Using U-Boot i.MX31 Testing RNGA I.MX31 Testing TvOut I.MX31 Using CLKO

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-344473 

In order to get Redboot running on i.MX35 PDK without a flashing procedure, a little modification in the binary file is needed. After that it can be loaded into RAM memory using the ATK tool. The Redboot Header To execute the binary Redboot file a header of 32 bytes long must be added: ddccbbaa0000000000000000hhggffee00000000000000000000000000000000 Where ddccbbaa is the 4-byte start address and hhggffee is the start address (all in Hexadecinal format) modified by the following procedure: value - 0x20 (or 32 decimal) + 0x08 (or 8 decimal) Note that in this header the values are placed from LSB to MSB bytes, so if the start address for MX35PDK is 0x87F00000 then the header should looks like: Start Address    --> 0x87F00000                                               --> 0000F087 Modified Address --> 0x87F00000 - 0x20 + 0x08 = 0x87EFFFE8 --> E8FFEF87 Header --> 0000F0870000000000000000E8FFEF8700000000000000000000000000000000 Now, this header must be appended to the beginning of the redboot.bin file.

When boot from battery, then plug in 5V cable, the actual charging current can't reach the preset charging current. It is because the HEADROOM_ADJ is not correctly set. Please use attached mx28_chargingcurrent_limit_bootfrombattery.patch. Grace

This is done with the 11.09 BSP for imx53 specifically. Attached is an amrnb.spec file, I put it in ltib/dist/lfs-5.1/amrnb. Then I extracted opencore-amr-0.1.3.tar.gz and put it in ltib/rpm/BUILD. I built with ltib ( ALl this could be added to the ltib menus as well 😞 ./ltib –m scbuild –p amrnb ./ltib –m scdeploy –p amrnb Then I applied the patch to .ltib for gst-plugins-ugly and built that with ltib. It will play a .3gp file with this pipeline: gst-launch filesrc location=/media/sd/test.3gp ! qtdemux name=demux demux.audio_00 ! queue ! amrnbdec ! alsasink demux.video_00 ! multiqueue ! mfw_vpudecoder ! mfw_isink Regards, Randy Krakora

Creating Deployment System          Configuring Bootloader       Running Linux     

Computer On Module • Processor Freescale i.MX535,1GHz/i.MX536, 800MHz • RAM 512MB/1GB DDR3 SDRAM • ROM 4GB EMMC,up to 32GB • Power supply Single 3.1V to 5.5V • Size 54mm SO-DIMM • Temp.-Range -20°C..70°C   -40°C..120°C Key Features • 10/100Mbps Ethernet • Two High Speed USB 2.0 ports • LCD controller up to 1600 x 1200, 24bpp • OpenGL ES 2.0 and OpenVG 1.1 hardware accelerators • Multi-format HD 1080p video decoder and 720p video encoder hardware engine • Two Camera Interfaces • NEON SIMD media accelerator • Unified 256KB L2 cache • Vector Floating Point Unit • Several interfaces: 3x UART, 2x SDIO, 2x SSI/AC97/I2S, I2C, CSPI, Keypad, Ext. Memory I/F • 3.3V I/O OS Support     • Linux     • Android Application:Smart mobile devices,Smart Display,Automotive Infotainment,Digital Signage, Telemedicine,Retail POS Terminal,Security,Barcode Scanner,Visual IP Phone,Patient Monitors,Surveillance Cameras,building control, factory / home automation, HMI For more information, please see Attachment We can provide a complete solution

 

An i.MX50 customer encountered such kernel bug recently. Android UI has no response, because the suspend work queue is blocked:     suspend       pm_suspend         enter_state           suspend_prepare / suspend_finish             pm_prepare_console / pm_restore_console               vt_move_to_console                 vt_waitactive                   vt_event_wait                     wait_event_interruptible Confimed the same bug can also happen on imx6SL which is running linux 3.0.35. e.g. by echo standby/mem > /sys/power/state It takes over thousand suspend/resume cycles to reproduce the problem. The bug fix has been merged since linux 3.6: commit a7b12929be6cc55eab2dac3330fa9f5984e12dda