i.MX Processors Knowledge Base

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX Processors Knowledge Base

Discussions

Sort by:
THE CONTENTS •Background Knowledge −Kernel Introduction −Linux Kernel Directory Structure of the Source Code •Kernel Loading Procedure −Linux OS Boot Process −First Stage of Loading Sequence(Assembly Language) −Second Stage of Loading Sequence(C Language)
View full article
[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-341481 
View full article
Add kcontrol API for Headphone Jack and Spk for WM8962, from this kcontrol, you can use amixer to change freely between Headphone and Spk. The names of the mixers 1: HP Function 2: SPK Function amixer controls: numid=62,iface=MIXER,name='HP Function' numid=63,iface=MIXER,name='SPK Function' 1: How to enable HeadPhone using this Kcontrol: amixer cget numid=62 numid=62,iface=MIXER,name='HP Function'    ; type=ENUMERATED,access=rw------,values=1,items=2    ; Item #0 'off'    ; Item #1 'on'    : values=0 amixer cset numid=62 1 //enable HP numid=62,iface=MIXER,name='HP Function'    ; type=ENUMERATED,access=rw------,values=1,items=2    ; Item #0 'off'    ; Item #1 'on'    : values=1 2: How to enable Speaker using this Kcontrol: amixer cget numid=63 numid=63,iface=MIXER,name='SPK Function'    ; type=ENUMERATED,access=rw------,values=1,items=2    ; Item #0 'off'    ; Item #1 'on'    : values=0 amixer cset numid=63 1 //SPK enable numid=63,iface=MIXER,name='SPK Function'    ; type=ENUMERATED,access=rw------,values=1,items=2    ; Item #0 'off'    ; Item #1 'on'    : values=1
View full article
Overview   This document intends to provide one reference how to emulate i.MX8QM 1.3GHz part running on i.MX8QM MEK with 1.6GHz part based on i.MX Linux BSP release.   You can find i.MX8QM/QP processors datasheet on NXP web: i.MX 8QuadMax 1.3GHz Automotive and Infotainment Applications Processors; i.MX 8QuadPlus 1.3GHz Automotive and Infotainment Applications Processors; i.MX 8QuadPlus Industrial Applications Processors Data Sheet; i.MX 8QuadMax Industrial Applications Processors Data Sheet;   Key differences between 1.3GHz part and 1.6GHz part is as follows: Key Differences 1.6GHz part 1.3GHz part 8QM/8QP A72 core max frequency 1600MHz 1296MHz 8QM GPU max frequency core 800MHz  shader 1000MHz core 650MHz shader 700MHz 8QM VDD_GPU mode Overdrive mode Remove overdrive mode, only nominal 8QM VDD_GPU nominal operation range Min 0.95V Typ 1.0 V Max 1.1V Min 0.98V Typ 1.03125V Max 1.14V   Software Changes   Since Linux 6.6.23_2.0.0 BSP release, i.MX8QM/8QP 1.3GHz part is supported into i.MX Linux release by identifying the fuse of 1.3GHz part and configuring frequency and voltage automatically. If you have i.MX8QM MEK board with 1.6GHz part, before revision E, you can apply software changes to emulate 1.3GHz part configurations explicitly. The following software reference patches are built based on Linux 6.6.52-2.2.0 release: Component Patch Name Description Linux Kernel 0001-arm64-dts-imx8qm-remove-A72-core-1.6GHz-operating-po.patch Used to remove Cortex-A72 core 1.6GHz operating-points 0002-arm64-dts-imx8qm-set-GPU-operating-points-at-nominal.patch Used to remove GPU overdrive operating-points and set GPU core frequency as 650MHz, GPU shader frequency as 700MHz. SCFW 0001-Increase-VDD-of-GPU.patch Used to increase GPU voltage ATF 0001-plat-imx8-make-ATF-kick-off-A72-core-freq-at-1.3GHz.patch Used to kickoff A72 core and set its frequency as 1.3GHz in ATF   Validation Test Apply patch into Linux kernel, SCFW porting kit, ATF, follow 6.6.52_2.2.0 release document(www.nxp.com/design/design-center/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX) to build and deploy image.     After Linux OS boot up,  run below command to check A72 and GPU frequency,  for example: #cat /sys/kernel/debug/gc/clk gpu0 mc clock: 647981058 HZ. gpu0 sh clock: 695997687 HZ. gpu1 mc clock: 647990370 HZ. gpu1 sh clock: 695987994 HZ   #cat /sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_max_freq 1296000   Measure VDD_GPU voltage from i.MX8QM MEK board TP53 and TP42 Untitled.png
View full article
All Boards GTK Manually All Boards GTK Glade All Boards GTK+
View full article
i.MX8MP and i.MX95 both support USB3.0. In EVK board, USB download pin is USB3.0 with Type-C.  While in other boards, they may delete CC logic design PTN5110, or use USB2.0 signals instead. This document describes how to modify U-Boot to support a design without PTN5110 when using the uuu tool to download.
View full article
Hey everyone! With the iMX8MM EVK, you also get an IR receiver LED interfaced with one of the GPIOs. Through this article today, I will demonstrate how to enable Infrared Receiver on the iMX8MM EVK so that data sent from the IR transmitter LEDs can be received and decoded on the iMX8MM EVK. Hardware used : iMX8MM EVK - i.MX 8M Mini Evaluation Kit | NXP Semiconductors Arduino Uno board IR TX module Arduino interfaced with IR TX will send IR messages to iMX8MM interfaced with IR RX LED Hardware connections: IR TX Module         <---->          Arduino Uno GND                          -                     GND 3.3V                          -                     3.3V DAT                           -                     D3 IR transmitter LED connected to Arduino Uno -- Kernel configurations needed: Linux Kernel Configurations Copy the kernel 'Image' built with the above changes and the IR decoder modules for the protocol you want to decode. All the ko modules are present i.e ir-rc5-decoder.ko for rc5 IR decoding in this folder after building: LIRC drivers Boot linux with the default dtb[imx8mm-evk.dtb] and the newly copied kernel 'Image' that you uploaded on the board.   At boot-up rc_register_device is called from drivers/media/rc/rc-main.c. A /dev/lirc0 node will also be created as a result of in-built driver loading. You can verify this by executing: lirc device node   On iM8MM, The IR receiver is connected to GPIO1_13. drivers/media/rc/gpio-ir-recv.c is responsible to configure this GPIO using the dts entry present in  arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi   Device tree changes gpio_ir_recv_probe will be called from drivers/media/rc/gpio-ir-recv.c.   At linux prompt, you can verify the gpio configuration using sysfs: IR GPIO Now insert the NEC and RC5 decoder modules. This gives the kernel ability to be able to decode the   NEC and RC5 IR protocols. LIRC Decoder Next, we need a program that utilizes the decoder driver to start decoding the IR signals coming onto the IR Receiver of iMX8MM EVK.   Some example invocations of the user-space binary we have built for the above purpose: RC5 Decoder RC6 Decoder NEC Decoder   ir_recv accepts 2 arguments:- 1st argument - protocol to enable 2nd argument - the remote-control device created in the /sys/class/rc example - /sys/class/rc/rc0 Note - Not to be confused with the protocols rc5 or rc6. The 2nd argument is not the name of the protocol ir_recv utility that we have built will open the /dev/lirc0 device and make an ioctl call LIRC_SET_REC_MODE to set the LIRC driver in Recording mode. These ioctls are handled in drivers/media/rc/lirc_dev.c in the kernel source code. So that whenever you run the ir_recv binary, it polls for the IR protocol scan code and prints it if successfully decoded. Attaching the ir_recv executable and the source code with this article for you to test and tweak. Please let me know if you have any follow-up questions. I would be happy to indulge. That's all I have for today. Thank you for your time!  
View full article
  Test Environment i.MX8MP EVK L6.6.52   Backgroud The default BSP will assign SAI3 and I2C3 to M7 when we use imx8mp-evk-rpmsg.dtb. If customer want to assign SAI3 and I2C3 to A53 and test audio in Linux while running M7 sdk with remoterpoc.   Test steps   1. Delete all of audio related code in SDK in below function. BOARD_BootClockRUN  BOARD_RdcInit 2. Modify Uboot   arch/arm/dts/imx8mp-evk-u-boot.dtsi   The RDC will assign SAI3, sdma3 and i2c3 to M7 when M7 start. So we need to delete these lines.    Snipaste_2025-02-07_12-51-29.jpg   3. Add RDC config in ATF plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c  Assign SAI3, sdma3 and i2c3 to A53.   Snipaste_2025-02-07_12-51-29.jpg  4.Modify imx8mp-evk-rpmsg.dts Delete rpmsg audio and i2c3. diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts index e43c4dafdb88..4edc0cb71b1c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg-lpv.dts @@ -4,8 +4,3 @@ */ #include "imx8mp-evk-rpmsg.dts" - -&rpmsg_audio { - /delete-property/ fsl,enable-lpa; - /delete-property/ fsl,rpmsg-in; -}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts index ddf5f76adc3b..75c9234d84b2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-rpmsg.dts @@ -8,11 +8,6 @@ #include "imx8mp-evk.dts" / { - aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c_rpbus_3; - }; reserved-memory { #address-cells = <2>; @@ -45,70 +40,6 @@ rsc_table: rsc-table@550ff000 { no-map; }; - audio_reserved: audio@81000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0 0x81000000 0 0x10000000>; - }; - - micfil_reserved: mic_rpmsg@91000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0 0x91000000 0 0x100000>; - }; - }; - - sound-wm8960 { - status = "disabled"; - }; - - sound-micfil { - status = "disabled"; - }; - - rpmsg_audio: rpmsg_audio { - compatible = "fsl,imx8mp-rpmsg-audio"; - model = "wm8960-audio"; - fsl,rpmsg-channel-name = "rpmsg-audio-channel"; - fsl,enable-lpa; - fsl,rpmsg-out; - fsl,rpmsg-in; - assigned-clocks = <&clk IMX8MP_CLK_SAI3>; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <12288000>; - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, - <&clk IMX8MP_AUDIO_PLL1_OUT>, - <&clk IMX8MP_AUDIO_PLL2_OUT>; - clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; - audio-codec = <&codec>; - memory-region = <&audio_reserved>; - power-domains = <&audiomix_pd>; - audio-routing = - "LINPUT1", "MICB", - "LINPUT3", "MICB"; - status = "okay"; - }; - - rpmsg_micfil: rpmsg_micfil { - compatible = "fsl,imx8mp-rpmsg-audio"; - model = "micfil-audio"; - fsl,rpmsg-channel-name = "rpmsg-micfil-channel"; - fsl,enable-lpa; - fsl,rpmsg-in; - assigned-clocks = <&clk IMX8MP_CLK_PDM>; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <196608000>; - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_IPG>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_ROOT>, - <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, - <&clk IMX8MP_AUDIO_PLL1_OUT>, - <&clk IMX8MP_AUDIO_PLL2_OUT>; - clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; - memory-region = <&micfil_reserved>; - power-domains = <&audiomix_pd>; - status = "okay"; }; imx8mp-cm7 { @@ -144,72 +75,10 @@ &flexspi { status = "disabled"; }; -/delete-node/ &i2c3; - -&i2c_rpbus_3 { - compatible = "fsl,i2c-rpbus"; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - pca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - - ov5640_1: ov5640_mipi@3c { - compatible = "ovti,ov5640"; - reg = <0x3c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>; - clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; - clock-names = "xclk"; - assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; - assigned-clock-parents = <&clk IMX8MP_CLK_24M>; - assigned-clock-rates = <24000000>; - csi_id = <0>; - powerdown-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; - mclk = <24000000>; - mclk_source = <0>; - mipi_csi; - status = "disabled"; - - port { - ov5640_mipi_1_ep: endpoint { - remote-endpoint = <&mipi_csi1_ep>; - data-lanes = <1 2>; - clock-lanes = <0>; - }; - }; - }; - - codec: wm8960@1a { - compatible = "wlf,wm8960,lpa"; - reg = <0x1a>; - wlf,shared-lrclk; - SPKVDD1-supply = <&reg_audio_pwr>; - }; -}; - &pwm4{ status = "disabled"; }; -&sai3 { - status = "disabled"; -}; - -&micfil { - status = "disabled"; -}; - -&sdma3{ - status = "disabled"; -}; - &uart3 { status = "disabled"; };   Result We can play audio on wm8960 after we load M7 firmware. Snipaste_2025-02-20_11-07-59.jpg
View full article
We are pleased to announce that Config Tools for i.MX v24.12 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) • DDR tool – Support for the custom System Manager image import is added. – i.MX 95 advanced tests are enabled: Vref for DQ and Vref for CA optimization • SerDes tool – Additional parameters for TX configuration on GUI (swing, margin, equalization) for i.MX 95 are added. – PCIe Gen1/Gen2/Gen3 switch on pattern generation. • Clocks – Modular clocks initialization is supported. – Initialization mode is visible in the Clocks diagram and Details view. – New Modular Initialization view for configuration of the initialization mode and core selection of the module is created. • TEE – Configuration and overview of areas with the same address and different address space is supported. – Code generation can be toogled for global options groups. – The process for releasing ELE crypto before setting up TRDC is supported. • Pins – Miscellaneous tab for various Pins configuration options is added. – Filtering for routing dialogs is added.
View full article
Please notice the following patches are only tested in the environment that is listed below. For the environment with other software versions or hardware equipment, some other editing  may be required Environment: i.MX 8MP EVK LVDS:LVDS BOE EV121WXM-N10-1850  LVDS to MiniSAS panel:XMX-LVDS-MINISAS Software: LF5.15.71 U-boot: 1. Apply '0001-Enable-DY1212W-4856-in-U-boot-for-i.MX8MP.patch' to enable EV121WXM-N10-1850  in U-boot stage. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-u-boot-to-show-logo-seamlessly-for-i.MX8MP.patch' to make sure display related models won't be power off, which will help to achieve seamless display. 3. In the original U-boot driver, PWM isn't enable. Therefore, apply '0003-Enable-PWM-and-BACKLIGHT-in-U-boot-and-modify-to-sho.patch' to enable PWM. Kernel: 1. Apply '0001-Enable-DY1212W-4856-in-Kernl-for-i.MX8MP.patch' to enable EV121WXM-N10-1850  in Kernel. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-Kernel-to-show-logo-seamlessly-for-i.MX8MP.patch' to make sure LVDS related models won't be init in the booting progress. 3. Apply '0003-Enable-PWM-and-BACKLIGHT-in-Kernel-and-modify-to-sho.patch' to make sure we could edit backlight of panel in Kernel. 
View full article
     The following steps allow you to add a pad Wakeup on i.MX 8QuadMax MEK CPU Board. On the Host.   Cloning the Linux kernel repository.   Clone the i.MX Linux Kernel repo to the home directory. cd ~ git clone -b lf-5.10.72-2.2.0 https://source.codeaurora.org/external/imx/linux-imx cd linux-imx/ Patching the device tree.   Open the imx8qm-mek.dts file: vim arch/arm64/boot/dts/freescale/imx8qm-mek.dts Add the following lines: &lsio_gpio2{       pad-wakeup-num = <1>;       pad-wakeup = <81 4 1>; }; In the line pad-wakeup-num = <1>; , the number "1" corresponds to the number of pads that you want to add. The line pad-wakeup = <81 4 1>; has three parameters: The first parameter corresponds to the "pin_id", you can find it in include/dt-bindings/pinctrl/pads-imx8qm.h , in this example we are using "IMX8QM_MIPI_CSI1_I2C0_SDA". The second parameter corresponds to the "'type'", you can find it in the i.MX 8QuadMax Applications Processor Reference Manual, in the page 802:   wakeup_crt.PNG For this example we are using "LOW". The third parameter corresponds to the "line", the number of bit in 32bit gpio group, you can find it in include/dt-bindings/pinctrl/pads-imx8qm.h In this example, "IMX8QM_MIPI_CSI1_I2C0_SDA" belongs to gpio group 2, line 1. Build the device tree.   Setup your toolchain, for example: source /opt/fsl-imx-wayland/5.10-hardknott/environment-setup-cortexa53-crypto-poky-linux Generate config file. make imx_v8_defconfig Compile the device tree. make freescale/imx8qm-mek.dtb Copy the .dtb file to the MEK CPU Board, for example with scp: scp imx8qm-mek.dtb root@<MEK_CPU_Board_IP>:/home/root Alternatively, you may copy the .dtb file directly to the FAT32 partition where the Kernel and Device Tree files are located. On the MEK CPU Board.   Switching the device tree.   To copy the updated device tree to the corresponding partition, first create a directory. mkdir Partition_1 Mount the partition one. mount /dev/mmcblk1p1 Partition_1/ Copy or move the device tree into partition one. cp imx8qm-mek.dtb Partition_1/ Reboot the board. reboot How to wake up the i.MX 8QuadMax MEK CPU Board.   In this example a wire was soldered on "R204":   2041.PNG 2042.PNG   Run the following command on the MEK CPU Board: echo mem > /sys/power/state And you will see something like: [   53.769266] PM: suspend entry (deep) [   53.902130] Filesystems sync: 0.129 seconds [   53.908068] Freezing user space processes ... (elapsed 0.002 seconds) done. [   53.917189] OOM killer disabled. [   53.920420] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [   53.929626] printk: Suspending console(s) (use no_console_suspend to debug) Connect the wire that was soldered on "R204" to ground, the MEK CPU Board will wake up and you will see something like: [   54.687125] fec 5b040000.ethernet eth0: Link is Down [   54.689876] PM: suspend devices took 0.756 seconds [   54.709570] Disabling non-boot CPUs ... [   54.710562] CPU1: shutdown [   54.711582] psci: CPU1 killed (polled 0 ms) [   54.714360] CPU2: shutdown [   54.715376] psci: CPU2 killed (polled 0 ms) [   54.717365] CPU3: shutdown [   54.718382] psci: CPU3 killed (polled 0 ms) [   54.719887] CPU4: shutdown [   54.720884] psci: CPU4 killed (polled 4 ms) [   54.722213] CPU5: shutdown [   54.723229] psci: CPU5 killed (polled 0 ms) [   54.724731] Enabling non-boot CPUs ... [   54.725388] Detected VIPT I-cache on CPU1 [   54.725423] GICv3: CPU1: found redistributor 1 region 0:0x0000000051b20000 [   54.725486] CPU1: Booted secondary processor 0x0000000001 [0x410fd034] [   54.726455] CPU1 is up [   54.726930] Detected VIPT I-cache on CPU2 [   54.726947] GICv3: CPU2: found redistributor 2 region 0:0x0000000051b40000 [   54.726976] CPU2: Booted secondary processor 0x0000000002 [0x410fd034] [   54.727478] CPU2 is up [   54.727955] Detected VIPT I-cache on CPU3 [   54.727971] GICv3: CPU3: found redistributor 3 region 0:0x0000000051b60000 [   54.728001] CPU3: Booted secondary processor 0x0000000003 [0x410fd034] [   54.728497] CPU3 is up [   54.729806] Detected PIPT I-cache on CPU4 [   54.729825] GICv3: CPU4: found redistributor 100 region 0:0x0000000051b80000 [   54.729857] CPU4: Booted secondary processor 0x0000000100 [0x410fd082] [   54.730490] CPU4 is up [   54.730985] Detected PIPT I-cache on CPU5 [   54.730999] GICv3: CPU5: found redistributor 101 region 0:0x0000000051ba0000 [   54.731021] CPU5: Booted secondary processor 0x0000000101 [0x410fd082] [   54.731679] CPU5 is up [   54.756440] hdmi_rx_hd_core_clk: failed to set clock parent -16 [   54.765828] gpio-mxc 5d0a0000.gpio: wakeup by pad, line 1 [   54.844242] ahci-imx 5f020000.sata: external osc is used. [   54.913582] caam 31400000.crypto: registering rng-caam [   54.918358] PM: resume devices took 0.148 seconds [   55.096663] OOM killer enabled. [   55.099814] Restarting tasks ... done. [   55.111833] PM: suspend exit  
View full article
Symptoms   When configure a gpio pin for a driver in the dts/dtsi file like below example,   e.g.   a-switch {            compatible = "a-switch-driver";            pinctrl-names = "default";            pinctrl-0 = <&pinctrl_switch>;            gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>;            status = "okay"; };   pinctrl_switch: switch_gpio {     fsl,pins = < IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01    0x21 >; };   then you may get the error when request the gpio in the driver during the kernel boot up.   Error message like this: a-switch: failed to request gpio a-switch: probe of a-switch failed with error -22   Linux version: L5.4.x   Diagnosis   Because the gpio_mxc_init function run before the function imx_scu_driver_init. The pm_domains for gpio is not ready before running mxc_gpio_probe, so gpio request will be failed.     Solution   There are two ways to resolve this issue 1. Build the driver as a module. i.e. select the driver in kernel’s menuconfig as “M”. Then , run “insmod” to load the driver after the kernel boot up.   OR   2. Apply below patch, let gpio driver init after scu driver. diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 1dfe513f8fcf..52b5799040b3 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -892,7 +892,7 @@ static int __init gpio_mxc_init(void) return platform_driver_register(&mxc_gpio_driver); } -subsys_initcall(gpio_mxc_init); +device_initcall(gpio_mxc_init);  
View full article
After upgrading Ubuntu 11.04 to 11.10, I encountered several building failures such as the following: error:"_FORTIFY_SOURCE" redefined [-Werror] To fix this building issue: 1. Following guides in Initializing a Build Environment | Android Open Source, to get build env ready for Ubuntu 11.10; 2. Edit build/core/combo/HOST_linux-x86.mk and replace:     "HOST_GLOBAL_CFLAGS += -D_FORTIFY_SOURCE=0"     with     "HOST_GLOBAL_CFLAGS += -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=0" Based on further Internet research, I found a Google Groups that summarizes all modifications to fix the building failure encountering in Ubuntu 11.10.
View full article
►Playbin2 provides a stand-alone everything-in-one abstraction for an audio and/or video player. •Audio sink and video sink can be specified by application •Supports subtitle for video files •Adjustable A/V offset •Selects audio/video/subtitle streams by input selector •Audio post-processing by audio convert, audio resample and volume • ►The pipeline is created by playbin2 dynamically: •Typefind checks the source type •Demuxer parses the source data and create pads for all the streams, respectively •Playbin2 searches for and creates decoders in element factory who have capability to decode specific format of audio/video •Playbin2 creates and connects audio sink chain and video sink chain Playbin2: interaction with application ►Set/get properties of playbin2 •“audio-sink”, “video-sink” •“current-audio”, “current-video”, “current-text” •“n-audio”, “n-video”, “n-text” (read only) •“uri”, “suburi”, “av-offset”, “volume”, “mute” ►Events •Bidirectional: flush start, flush end •Downstream: eos, new segment, tag •Upstream: qos, seek ►Queries •Position, duration, latency, rate, seeking, segment ►Messages •Eos, error, warning, info, tag, buffering, state changed, duration, latency, ►Signals •“video-changed”, “audio-changed”, “text-changed” •“video-tags-changed”, “audio-tags-changed”, “text-tags-changed” Playback: track selection                                               ►Pipeline for audio/video/subtitle multi-track file •Demuxer creates src pads for all the tracks, respectively •Each track has its own decoder and sink pad of input selector •One sink pad in input selector is activated to play corresponding track •Audio, video and subtitle have separated input selectors. •Take audio for example:                                                                                                                                                         ►Input selector •Only push the data from active sink pad to its src pad •The data from all the sink pads shall be synchronized, so that timestamps can be consecutive when switch to another track. Otherwise, there will be no sound or video for a long time after switching track. •If demuxer gets samples in file mode (need a large queue before decoder):              A lock is set for each inactive tracks to synchronize tracks. Otherwise, the inactive tracks would be decoded in full speed (usually much more faster than active track).              The lock compares the received timestamp with the last timestamp of active track. If larger, waits until the next timestamp (buffer) of acitived track arrives; if smaller, drop this buffer and get the next buffer. •If demuxer gets samples in track mode and the queue is small:             All tracks is synchronized by demuxer
View full article
Extending to the impact produced by being the First to release WEC7 on i.MX6 Development Platform, iWave Systems adds yet another accomplishment by announcing the availability of Windows Embedded Compact 7 (WEC7) reference BSP for Freescale’s i.MX6x SABRE SDB/SDP. The Freescale’s i.MX6x SABRE SDB/SDP Platform is powered with Freescale’s i.MX6 Quad/Dual Lite 1GHz, MMPF0100 Freescale PMIC. The WEC7 BSP release supports SATA II, Standard SD/SDIO, Gigabit Ethernet, LVDS, Touch Panel, HDMI port and also necessary hardware codecs supported by the CPU. Debugging tools like KITL and CETK are also supported. All the latest features that WEC7 offers such as Silverlight 3.0, MPEG-4 HD, Expression Blend, Active Sync and also Adobe Flash10.1 are made available.                                                                                                                                                                 Benefits: WEC7 Source code can be easily customized with respect to the target hardware platform Simple and low cost integration for any Freescale i.MX6x based platform       Quick time to market Highlights: Ideal for Quick Proof of concept (POC) development Shortens up to 60% of the new product development life cycle                                       Quick customization services in a very short period Features: Standard Features: i.MX6 Quad/Dual Lite 1GHz CPU MMPF0100 Freescale PMIC 1 GB DDR3 RAM Serial console SD boot SATA II SD/SDIO HDMI Gigabit Ethernet USB OTG Audio LVDS display Touch Optional Features: PCIe Camera CAN GPS VPU (HD Coding and Decoding supported) GPU (Open GL, Open VG, Direct3DM and DirectDraw) Target Applications: Automotive IVI Telematics Interactive POS Industrial HMI Medical Click Here for more details on WEC7 BSP Support for Freescale's i.MX6x Sabre SDB/SDP by iWave Click Here for more details on WEC7 BSP Support for various other i.MX processors
View full article
This document is describe the control method of USB Power based on I.MX6ULL-EVK.   1. Hardware Design USB OTG can be working as device mode, host mode, or switching between both device mode and host mode. (a) USB OTG Device mode When USB OTG is working as device mode, the USB OTG ID pin should be pulled up by a resistor. And the 5V power comes from the VBUS pin of MicroUSB which is the 5V from the external USB HOST. From the above schematic :- When the USB OTG1 ID is pulled to high, the G/S of the NMOSFET Q2SK3018 is turned on. The ENA pin of U1101 is low, and then no 5V output from OUTA. If USB OTG1 is connected to the external USB HOST, a 5V power source will enter the board and supply to the USB OTG1 VBUS pin. (b) Switch between Device and Host mode This is also called USB OTG’s Dual Role. When we plug in MicroUSB with USB TYPE-AB to USB TYPE-A-F cable, USB OTG1 will switch from USB device to Host mode. At this time, the USB OTG1 ID pin will be pulled down to low, the G / S of the NMOSFET will be turned off, the ENA pin of U1101 will be pulled low, and OUTA will output 5V voltage to the VBUS pin of MicroUSB. (c) USB OTG Host mode When USB OTG is working as host mode,  USB OTG1 ID pin connect an external resistor to pull it down or use internal resistor to pull it down. If using external resistor, 2.2K/3.3K ohm resistor is recommended. The USB_OTG1_PWR should output High to enable ENA of U1101, then OUTA will output 5V to USB OTG1 VBUS. On i.MX6ULL-EVK, USB OTG2 port is designed to be Host mode. It can be a design reference. When the USB_OTG2_PWR pulled to high, the U1101 supplies 5V to the outside. 2. Software modification The GPIO1_IO04 can be used to control USB OTG1 power.
View full article
For Fedora Users: Open a terminal as root Edit tftp file -> #gedit /etc/xinetd.d/tftp Add these lines: service tftp     {   socket_type = dgram   protocol = udp   wait = yes   user = root   server = /usr/sbin/in.tftpd   server_args = /tftpboot   disable = no   per_source = 100 2   flags = IPv4 } Restart the service: # /etc/init.d/xinetd restart OR # service xinetd restart
View full article
[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345359 
View full article
Q: To do a triple display demo based on imx6 SDP. The 3 channel are 1 lvds & 1hdmi & 1 lcd  and the OS is Android JB4.3. The dual display works and those 2 screens can all display the Android desktop. The setting as below. setenv bootargs console=ttymxc0,115200 init=/init rw video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 video=mxcfb1:dev=lcd,CLAAWVGA,if=RGB565 video=mxcfb2:off video=mxcfb3:dev=hdmi,1920x1080M60,if=RGB24 fbmem=10M fb0base=0x27b00000 vmalloc=400M androidboot.console=ttymxc0 androidboot.hardware=freescale static struct ipuv3_fb_platform_data sabresd_fb_data[] = {         { /*fb0*/         .disp_dev = "lcd",         .interface_pix_fmt = IPU_PIX_FMT_RGB565,         .mode_str = "CLAA-WVGA",         .default_bpp = 16,         .int_clk = true,         .late_init = false,         }, {         .disp_dev = "ldb",         .interface_pix_fmt = IPU_PIX_FMT_RGB666,         .mode_str = "LDB-XGA",         .default_bpp = 16,         .int_clk = false,         .late_init = false,             }, {         .disp_dev = "ldb",         .interface_pix_fmt = IPU_PIX_FMT_RGB666,         .mode_str = "LDB-XGA",         .default_bpp = 16,         .int_clk = false,         .late_init = false,         }, {         .disp_dev = "hdmi",         .interface_pix_fmt = IPU_PIX_FMT_RGB24,         .mode_str = "1920x1080M60",         .default_bpp = 16,         .int_clk = true,         .late_init = false,             }, }; static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {         .ipu_id = 1,          .disp_id = 1, }; static struct fsl_mxc_lcd_platform_data lcdif_data = {         .ipu_id = 0,         .disp_id = 0,         .default_ifmt = IPU_PIX_FMT_RGB565, }; static struct fsl_mxc_ldb_platform_data ldb_data = {         .ipu_id = 0,         .disp_id = 1,         .ext_ref = 1,         .mode = LDB_SEP1,         .sec_ipu_id = 1,         .sec_disp_id = 0, }; A: Android BSP doesn't support triple display, and so the change in kernel would not make the 3rd display work.
View full article
When the customer want to use the PCIE module on the i.MX6SX SDB board, they can use the oscillator to do the pretset, there are the test report.
View full article