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i.MX Processors Knowledge Base

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ATK (Advanced Toolkit) ATK (Advanced Toolkit) is a Windows software for programming the flash memory of i.MX boards. It can be downloaded here. Using ATK This section will describe the procedure to erase the flash memory and program the bootloader. 1 - Connect a serial cable between PC and i.MX board. 2 - Some hardware configurations (switches) must be done to flash the board. Set red and cream switches as below: Switch SW5 -> 000000 Switch SW4 -> 1000000 {{Note|On SW5 and SW4, "1" means the keys selected towards the edge of the board.} 3 - Run ATK (1.6 or above) going to Start -> Programs -> AdvancedToolKit -> AdvancedToolKit Set the options: i.MX CPU -> i.MX35_TO2 Device memory -> DDR2; Custom Initial File -> (keep it unmarked) Communication Channel -> Serial Port (Usually COM1) If you are using TO1, Device Memory -> MDDR 4 - Click on Flash Tools to erase, program or dump the the flash memory and click GO NAND Flash Erasing 1- Configure the Dip Switch of Personality Board: Switch 1 2 3 4 5 6 7 8 SW1 OFF OFF OFF OFF N/A N/A N/A N/A SW2 ON OFF OFF ON ON OFF OFF OFF 2- Choose NAND model K9LAG08U8M 3- Continue the steps Remember to select the checkbutton BBT (Back Block Table)
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The system controller timer service is responsible for: Watchdog - The watchdog resource is managed by the SCU. The SCFW exposes a "virtual" watchdog to all CPUs. This virtual watchdog is managed by software and it is based on a low power timer, the SCU also features a physical watchdog timer that is used to ensure the correct operation of the device. Some of the features implemented by this watchdog service are: - Update of the watchdog timeout - Start/stop of the watchdog - Refresh of the watchdog - Return of the watchdog status such as maximum watchdog timeout that can be set, watchdog timeout interval, and watchdog timeout interval remaining. Since this is usually handled by the OS itself no examples are provided in this guide. Real Time Clock (RTC) - The SCFW is responsible for providing access to the RTC. The features supported by the API are: - Set/get time - Setting alarms Only the partition that owns the SC_R_SYSTEM resource is allowed to set the time, alarms and calibration values for the RTC. All other partitions are able to read the RTC time.  Here is an example on setting the RTC from the M4 side: struct time_date{ uint16_t year; uint8_t month; uint8_t day; uint8_t hour; uint8_t min; uint8_t sec; } rtc_time; sc_err_t sc_status; sc_ipc_t ipc; /* Open IPC channel */ sc_status = sc_ipc_open(&ipc, SC_IPC_AP_CH0); if(sc_status != SC_ERR_NONE) printf("Error opening Inter Processor Channel\n"); /* Initialize RTC */ /* Hard code RTC time to January 5th 2018 at 12:00 hours */ sc_status = sc_timer_set_rtc_time(ipcHandle, 2018, 1, 5, 12, 0, 0); if(sc_status != SC_ERR_NONE) printf("Error initializing RTC. \r\n"); /* Return time */ sc_status = sc_timer_get_rtc_time(ipcHandle, &(rtc_time.year), &(rtc_time.month), &(rtc_time.day), &(rtc_time.hour), &(rtc_time.min), &(rtc_time.sec)); printf("Year: %d, Month: %d, Day: %d, Hour: %d, Minutes: %d, Seconds: %d. \r\n", rtc_time.year, rtc_time.month, rtc_time.day, rtc_time.hour, rtc_time.min, rtc_time.sec);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ https://community.nxp.com/docs/DOC-342654 
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This article is rather short that only mentions the script that is needed to make an iMX93EVK act as a USB mass storage device so that whenever you connect your iMX device to a windows/linux system via USB, it should get enumerated something like a usb drive.  The storage that is used in this example is mmc so the expectation is that you have inserted a mmc card in the slot. Below is the script:- #!/bin/sh   # This composite gadget include function: # - MASS STORAGE     # # Exit status is 0 for PASS, nonzero for FAIL # STATUS=0   # Check if there is udc available, if not, return fail UDC_DIR=/sys/class/udc if test "$(ls -A "$UDC_DIR")"; then echo "The available udc:" for entry in "$UDC_DIR"/* do echo "$entry" done else STATUS=1 echo "No udc available!" exit $STATUS; fi   id=1; udc_name=ci_hdrc.0 #back_file=/dev/mmcblk1 back_file=/tmp/lun0.img   mkdir /sys/kernel/config/usb_gadget/g$id cd /sys/kernel/config/usb_gadget/g$id   # Use NXP VID, i.MX8QXP PID echo 0x1fc9 > idVendor echo 0x12cf > idProduct   mkdir strings/0x409 echo 123456ABCDEF > strings/0x409/serialnumber echo NXP > strings/0x409/manufacturer echo "NXP iMX USB Composite Gadget" > strings/0x409/product   mkdir configs/c.1 mkdir configs/c.1/strings/0x409   echo 5 > configs/c.1/MaxPower echo 0xc0 > configs/c.1/bmAttributes   mkdir functions/mass_storage.1 echo $back_file > functions/mass_storage.1/lun.0/file ln -s functions/mass_storage.1 configs/c.1/   echo $udc_name > UDC First execute the script. After that insert the g_mass_storage module in the kernel by executing :- modprobe g_mass_storage file=/dev/mmcblk1 removable=1 In the dmesg output, you will see something like below:-   After that you can connect a C type USB cable to the USB1 port of imx93evk and the other end to any USB ports of a laptop. The moment it is connected, you would be able to see a USB drive similar to what you get when we connect a pen-drive. 
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In some cases, such as mass production or preparing a demo. We need u-boot environment stored in demo sdcard mirror image.  Here is a way: HW:  i.MX8MP evk SW:  LF_v5.15.52-2.1.0_images_IMX8MPEVK.zip The idea is to use fw_setenv to set the sdcard mirror as the operation on a real emmc/sdcard. Add test=ABCD in u-boot-initial-env for test purpose. And use fw_printenv to check and use hexdump to double confirm it. The uboot env is already written into sdcard mirror(imx-image-multimedia-imx8mpevk.wic). All those operations are on the host x86/x64 PC. ./fw_setenv -c fw_env.config -f u-boot-initial-env Environment WRONG, copy 0 Cannot read environment, using default ./fw_printenv -c fw_env.config Environment OK, copy 0 jh_root_dtb=imx8mp-evk-root.dtb loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bsp_script}; mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi arch=arm baudrate=115200 ...... ...... ...... splashimage=0x50000000 test=ABCD usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi vendor=freescale hexdump -s 0x400000 -n 2000 -C imx-image-multimedia-imx8mpevk.wic 00400000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| hexdump -s 0x400000 -n 10000 -C imx-image-multimedia-imx8mpevk.wic 00400000 5f a4 9b 97 20 6a 68 5f 72 6f 6f 74 5f 64 74 62 |_... jh_root_dtb| 00400010 3d 69 6d 78 38 6d 70 2d 65 76 6b 2d 72 6f 6f 74 |=imx8mp-evk-root| 00400020 2e 64 74 62 00 20 6c 6f 61 64 62 6f 6f 74 73 63 |.dtb. loadbootsc| 00400030 72 69 70 74 3d 66 61 74 6c 6f 61 64 20 6d 6d 63 |ript=fatload mmc| 00400040 20 24 7b 6d 6d 63 64 65 76 7d 3a 24 7b 6d 6d 63 | ${mmcdev}:${mmc| 00400050 70 61 72 74 7d 20 24 7b 6c 6f 61 64 61 64 64 72 |part} ${loadaddr| 00400060 7d 20 24 7b 62 73 70 5f 73 63 72 69 70 74 7d 3b |} ${bsp_script};| 00400070 00 20 6d 6d 63 5f 62 6f 6f 74 3d 69 66 20 6d 6d |. mmc_boot=if mm| ...... ...... ...... 00401390 76 3d 31 00 73 6f 63 3d 69 6d 78 38 6d 00 73 70 |v=1.soc=imx8m.sp| 004013a0 6c 61 73 68 69 6d 61 67 65 3d 30 78 35 30 30 30 |lashimage=0x5000| 004013b0 30 30 30 30 00 74 65 73 74 3d 41 42 43 44 00 75 |0000.test=ABCD.u| 004013c0 73 62 5f 62 6f 6f 74 3d 75 73 62 20 73 74 61 72 |sb_boot=usb star| 004013d0 74 3b 20 69 66 20 75 73 62 20 64 65 76 20 24 7b |t; if usb dev ${| 004013e0 64 65 76 6e 75 6d 7d 3b 20 74 68 65 6e 20 64 65 |devnum}; then de| flash the sdcard mirror into i.MX8MP evk board emmc to check uuu -b emmc_all imx-boot-imx8mp-lpddr4-evk-sd.bin-flash_evk imx-image-multimedia-imx8mpevk.wic  The first time boot, the enviroment is already there.  How to achieve that: a. fw_setenv/fw_printenv: https://github.com/sbabic/libubootenv.git Note: Please do not use uboot fw_setenv/fw_printenv Compile it on the host x86/x64 PC. It is used on host. b. u-boot-initial-env Under uboot, make u-boot-initial-env Note: Yocto deploys u-boot-initial-env by default c. fw_env.config  imx-image-multimedia-imx8mpevk.wic 0x400000 0x4000 0x400000 0x4000 are from uboot-imx\configs\imx8mp_evk_defconfig CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x400000 Now, you can run  ./fw_setenv -c fw_env.config -f u-boot-initial-env
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  Introduction   Platform: i.MX93 EVK Uboot: origin/lf_v2022.04(lf-6.1.1-1.0.0) The LVDS design and media block control in i.MX93 is very similiar with i.MX8MPlus.This article implements the LVDS driver in uboot. You need apply 0001-Add-fake-adp5585-pwm-driver.patch which implements the adp5585 pwm driver in uboot. This is a fake pwm driver only implement the pwm driver framework. You can't use pwm value to adjust brightness for the moment, but this is enough to enable the backlight. Then please apply 0002-Add-imx93-lvds-and-panel-driver.patch, you will see nxp logo with this panel: https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/dy1212w-4856:DY1212W-4856   Porting suggestions   1. Modify panel timing in drivers/video/simple_panel.c /* define your panel timing here and * copy it in simple_panel_get_display_timing */ static const struct display_timing boe_ev121wxm_n10_1850_timing = { .pixelclock.typ = 71143000, .hactive.typ = 1280, .hfront_porch.typ = 32, .hback_porch.typ = 80, .hsync_len.typ = 48, .vactive.typ = 800, .vfront_porch.typ = 6, .vback_porch.typ = 14, .vsync_len.typ = 3, }; static int simple_panel_get_display_timing(struct udevice *dev, struct display_timing *timings) { memcpy(timings, &boe_ev121wxm_n10_1850_timing, sizeof(*timings)); return 0; }   2.Modify VIDEO_PLL The VIDEO_PLL = pixel clock * 7. For default panel, the pixel clock is 71.143MHz and VIDEO_PLL  is 498MHz. static struct imx_fracpll_rate_table imx9_fracpll_tbl[] = { FRAC_PLL_RATE(1000000000U, 1, 166, 4, 2, 3), /* 1000Mhz */ FRAC_PLL_RATE(933000000U, 1, 155, 4, 1, 2), /* 933Mhz */ FRAC_PLL_RATE(700000000U, 1, 145, 5, 5, 6), /* 700Mhz */ FRAC_PLL_RATE(498000000U, 1, 166, 8, 0, 1),/* rate, rdiv, mfi, odiv, mfn, mfd */ FRAC_PLL_RATE(484000000U, 1, 121, 6, 0, 1), FRAC_PLL_RATE(445333333U, 1, 167, 9, 0, 1), FRAC_PLL_RATE(466000000U, 1, 155, 8, 1, 3), /* 466Mhz */ FRAC_PLL_RATE(400000000U, 1, 200, 12, 0, 1), /* 400Mhz */ FRAC_PLL_RATE(300000000U, 1, 150, 12, 0, 1), }; 3. Modify lcdif node in dts <498000000>, <71142857>, <400000000>, <133333333>; <VIDEO PLL>,<PIX CLK>, <MEDIA_AXI>,<MEDIA_APB> &lcdif { status = "okay"; - assigned-clock-rates = <484000000>, <121000000>, <400000000>, <133333333>; + assigned-clock-rates = <498000000>, <71142857>, <400000000>, <133333333>; };  
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As we haven't provided a guide with steps that implement the Linux OS encryption and signature for i.MX9x products so far. So, the document provides the steps for that. For details related to how to encrypt and sign a bootloader image, please have a reference to This Guide 
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This guide provides a step-by-step approach for beginners looking to flash a custom Kernel Image or device tree on an NXP i.MX board. Sometimes, we need to customize the Kernel Image or modify the device tree for our board. Fortunately, NXP provides the UUU (Universal Update Utility) tool, which allows us to flash and use a custom Kernel Image or update the device tree on our board.   Requirements Before proceeding, ensure you have the following: - The latest version of the UUU Tool. - An i.MX EVK board (i.MX6, i.MX7, i.MX8, i.MX9). - The power supply for the board. - Two USB cables (USB-C or Micro USB, depending on your board).   Preliminary Steps To customize the Kernel Image or device tree, refer to the following community posts: - How to Fix FRDM-IMX93 Linux Kernel BSP - How to Compile Linux Kernel Image and Device Tree Using Yocto SDK   Once you have your customized Linux Kernel Image or device tree ready, follow the steps below to deploy it to your board.   Flashing the Kernel Image or Device Tree Connect and Prepare the Board 1. Connect the USB debug cable and the OTG cable from your board to your host computer. 2. Power on your board and stop the boot process at the U-Boot stage by pressing a key in the terminal. 3. Enter fastboot mode by running the following command in the U-Boot terminal: u-boot -> fastboot 0   Flash the Custom Kernel Image or Device Tree   4. Open a terminal on your host computer and navigate to the directory containing the new Kernel Image or device tree. 5. Flash the new files using the following command: $ uuu -b fat_write <file_name> mmc <device>:<partition> <file_name_in_board> Example: $ uuu -b fat_write imx93-11x11-evk.dtb mmc 0:1 imx93-11x11-evk-custom.dtb In this example, the file imx93-11x11-evk.dtb stored on the host machine is flashed to the board's eMMC device, saving it as imx93-11x11-evk-custom.dtb.   Note: If you are using Linux, run the command with sudo. - For eMMC and SD card, the command is the same; just ensure you use the correct device number. - On the i.MX93, device 0 corresponds to eMMC, and device 1 corresponds to the SD card.   Update U-Boot Environment Variables   6. Exit fastboot mode by pressing CTRL+C. This returns you to the U-Boot terminal. 7. Set up the environment variablesto use the new files: For the Kernel Image: u-boot -> setenv image <custom_image_name> u-boot -> saveenv u-boot -> reset For the Device Tree: u-boot -> setenv fdtfile <custom_device_tree_name> u-boot -> saveenv u-boot -> reset The board should now boot using your modified Kernel Image and device tree.  
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Introduction. i.MX8ULP boot partition is handled by imx-boot image as the 8M family processors and i.MX 9 series processors, keeping the usage of imx-mkimage and UUU tools for updating the firmware to the boot media. The difference is that this processor is focus on working over Cortex-M, starting from boot which is handled by uPower ROM, it can boot Application Domain or Real Time Domain firmware images meanwhile other processors boot is less flexible, focusing on Cortex-A. This guide will explore this flexibility and it's intended for board users that test prebuilt images, want to get started with imx-boot customization, want to run SDK/Standalone examples on Cortex-M or need to perform recovery to their boards. 1. Hardware Setup. Retrieve your silicon revision from the TOP marking; BUILD A1 in this case. Identify your board in the base board silkscreen, you can work with MCIMX8ULP-EVK or MCIMX8ULP-EVK9. Connect 5V power source to P1. Connect USB type-A to type-C to USB0 J15. Connect USB type-A to type-micro-B to DEBUG J17.   2. Firmware Images Gathering. $ cd ~/Projects/ $ git clone https://github.com/nxp-imx/imx-mkimage.git Make sure that you use all images from the same release, this document uses first release for IMX8ULP; LF6.1.22. Download Sentinel Firmware retrieving the version from Release Notes. After installation copy the firmware for the silicon revision owned, mx8ulpa1 is used for REV A1. $ cd ~/Projects/ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin $ chmod a+x firmware-sentinel-0.10.bin $ ./firmware-sentinel-0.10.bin $ cp firmware-sentinel-0.10/mx8ulpa1-ahab-container.img ~/Projects/imx-mkimage/iMX8ULP/ Remaining firmware will be obtained from a Yocto build, is the method that requires less steps. Make sure that the MACHINE variable matches your board. $ mkdir ~/Projects/Yocto-BSP-i.MX $ cd ~/Projects/Yocto-BSP-i.MX/ $ repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-mickledore -m imx-6.1.22-2.0.0.xml $ repo sync $ MACHINE=imx8ulp-lpddr4-evk DISTRO=fsl-imx-xwayland source ./imx-setup-release.sh -b i.MX8ULPEVK $ bitbake core-image-minimal $ cd tmp/deploy/images/imx8ulp-lpddr4-evk/ $ cp bl31-imx8ulp.bin ~/Projects/imx-mkimage/iMX8ULP/bl31.bin $ cp u-boot-imx8ulp-lpddr4-evk.bin-sd ~/Projects/imx-mkimage/iMX8ULP/u-boot.bin $ cp u-boot-spl.bin-imx8ulp-lpddr4-evk-sd ~/Projects/imx-mkimage/iMX8ULP/u-boot-spl.bin $ cp imx-boot-tools/upower.bin ~/Projects/imx-mkimage/iMX8ULP/upower.bin Cortex-M firmware can be built with VS Code in Windows or by Standalone build in Linux, make sure that you have the GNU toolchain installed. Build the Power Mode Switch demo, is easier to work with it later in this document we will explore other type of demos. $ cd ~/Projects/ $ cp ~/Public/EVK-MIMX8ULP-power_mode_switch.zip . $ unzip EVK-MIMX8ULP-power_mode_switch.zip # Rename directory for this example, you can skip and use the default name. $ mv power_mode_switch/ Standalone-IMX8ULP-Power-Switch $ cd Standalone-IMX8ULP-Power-Switch/ $ ls $ chmod a+x *.sh $ ./clean.sh $ export ARMGCC_DIR=/opt/arm-gnu-toolchain-12.3.rel1-x86_64-arm-none-eabi/ # Adding a custom line (607) to print a custom message. # freq = CLOCK_GetFreq(kCLOCK_Cm33CorePlatClk); # PRINTF("\r\n#################### Standalone Built 02/21 ####################\n\r\n"); # PRINTF("\r\n#################### Power Mode Switch Task ####################\n\r\n"); $ nano source/power_mode_switch.c $ ./build_release.sh $ cp release/sdk20-app.bin ~/Projects/imx-mkimage/iMX8ULP/m33_image.bin $ ./clean.sh 3. Build and flash imx-boot firmware for Singleboot M33. This test will use Single boot – eMMC 1000_0000 pin config mode. Singleboot_M33 image stores AP FW and RT FW in eMMC, at boot time both cores work. $ cd ~/Projects/imx-mkimage/ $ make clean $ make SOC=iMX8ULP REV=A1 flash_singleboot_m33 $ cp iMX8ULP/flash.bin ~/Public/imx-boot.bin-flash_singleboot_m33 Set boot pins to 0100_0000 – Serial Download and power up the board. Flash the image using a Windows or Linux host through UUU tool. > uuu -b emmc .\imx-boot.bin-flash_singleboot_m33 Wait for UUU to print 'done' message for the command issued. 4. Test new imx-boot firmware. Set the boot pins to the config you build for and power up the board. Cortex-A output is sent through 3rd COM port and Cortex-M output through 4th. 5. Board running freertos_swtimer_cm33 and hello_world_cm33 demos. To run these demos build them through VS Code or Standalone build and copy them to imx-mkimage directory. $ cp <path to binary>/sdk20-app.bin ~/Projects/imx-mkimage/iMX8ULP/m33_image.bin $ cd ~/Projects/imx-mkimage/ $ make clean $ make SOC=iMX8ULP REV=A1 flash_singleboot_m33 $ cp iMX8ULP/flash.bin ~/Public/imx-boot.bin-flash_singleboot_m33 When this demos are running, they don't allow Cortex-A to get to U-boot, this is an issue when trying to flash new or recovery images, the board just reboots with the new FW but it's not written to eMMC, you can identify this situation when UUU prompts 100%, the command appears to hang and 'done' is not displayed. To flash a new firmware, IMX8ULP needs to boot from Serial Download pin config. Then run the script attached and go to step 4. > uuu .\uuu.auto 6. Running Dualboot demos for asynchronous operation. Dualboot are two images, AP FW which must be stored in eMMC and RT FW stored at FlexSPI0 NOR, at boot time both cores work. Boot is asynchronous and needs both images at the same time, this requires to flash two images at the same time, U-boot fastboot mode facilitates writing to eMMC while being able to use its console. Issue the following command at U-boot. => fastboot 0 Build the firmware images for A35-eMMC M33-NOR – 1000_0010* pin config. * You can also boot from LP mode – 1000_0001 pin config, this allows only M33 code to boot initially. $ make SOC=iMX8ULP REV=A1 flash_dualboot $ cp iMX8ULP/flash.bin ~/Public/imx-boot.bin-flash_dualboot $ make SOC=iMX8ULP REV=A1 flash_dualboot_m33 $ cp iMX8ULP/flash.bin ~/Public/imx-boot.bin-flash_dualboot_m33 > uuu -b emmc .\imx-boot.bin-flash_dualboot > uuu -b fat_write .\imx-boot.bin-flash_dualboot_m33 mmc 0:1 spi.bin => Ctrl + c => fatload mmc 0:1 ${loadaddr} spi.bin; setenv erase_unit 1000; setexpr erase_size ${filesize} + ${erase_unit}; setexpr erase_size ${erase_size} / ${erase_unit}; setexpr erase_size ${erase_size} * ${erase_unit}; sf probe 0:0; sf erase 0 ${erase_size} => sf write ${loadaddr} 0 ${filesize} Then go to step 4. Conclusion. This document explore all the boot configurations that feature the A35 storing its firmware in eMMC and M33 running its demo binary. Can help users that are looking to run demos on Cortex-M with their out-of-the-box board, continuing with them through the trial of different demos and boot modes to understand what are different outcomes, adapt the project in that way and develop the application over a template.
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Here is simple step to create a custom partition with AVB. Tested by i.MX8MN EVK and Android P9.0.0_2.3.1. Create image for xyz partition in 1024MB in Android build output folder # cd $OUT # mkdir xyz # echo "This is test txt file" > xyz/Readme.txt # make_ext4fs -l 1073672192 -s -a xyz xyz.ext4.img xyz   Apply the attached patch. uboot patch corrects the reading problem on avb footer.   Flash images by uuu # cd $OUT # sudo ./uuu_imx_android_flash.sh -f imx8mn   Check result.  Boot up and mount xyz partition # cd /data # mount /dev/block/mmcblk2p14 xyz # cat xyz/Readme.txt This is test txt file
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Q: how to do PCIe compliance measurement on the Sabre SDB? Phase Jitter on the PCIe reference clock had been see problem. Pin C7  "CLK1_N" and Pin D7 "CLK1_P"  were used like on the Sabre SD. During Compliance meassurments  margin of -80% and more.... was seen. Is there a known issue? Has someone done a similar compliance measurement on the Sabre SDB? A: The PCIe TX compliance tests on i.MX6 SD boards in TK's Open Lab.  Based on the internal PLL clock, i.MX6 SD boards pass the PCIe TX compliance tests. 1, please check the capacitor on NVCC_PLL_OUT, it should no less than 10uF, 22uF is better. 2, please check if the 24MHz input crystal is good enough. 50ppm is required. 3, please check the test step: 1.1     TX Test Configuration and Procedures Overview of Test Steps 1.      Integrate the patch for PCIE test to mainline, recompile the Kernel , and replace the old image of the board under test. ·         Make sure the following configuration has been set, when re-compiling the kernel image. # MX6 Options: # CONFIG_IMX_PCIE=y 2.      Correctly set up the test environment: ·         Connect the compliance load board (CLB x1/x16) revision 2.0 into the slot of DUT, and change the switch and jumpers to select x1 . ·         Connect the lane under test to oscilloscope via differential probe and matched coaxial , do remember that cable calibration should be done before test. ·         Connect the clock signal to the oscilloscope. The clock must have SSC enabled or disabled to be consistent with settings for the system during normal operation. ·         Power on the system. 3.      After I.MX6x enters Polling.Compliance , press the Toggle Button on CLB to select the output , make sure the data waveform is compliance pattern, 5.0GT/s for GEN2, 2.5GT/s for GEN1. 4.      Follow the Oscilloscope operation instruction, set it to the right mode. 5.      Capture and save at least 1 million * 200 ps of data and clock simultaneously at the sample rate of 50GS/s for GEN2, or 250,000 UI * 400 ps of data at the sample rate of 25GS/s for GEN1. 6.      Run free software Sigtest to analyze the PCIE TX signal. 7.      Customer could adjust the parameters of the PCIE_PHY by changing IOMUXC_GPR8 register settings to get the test past. a.       The default of this Register is configured as: imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8); b.      write the Register, Address: 20E_0000h base + 20h offset = 20E_0020h; command: /unit_tests/memtool -32 0x020e0020= FFFD4000 This document was generated from the following discussion: i.Mx6 PCIe compliance
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Connectivity - Using a Bluetooth Dongle Network Connection A simple way to set up a network connection using a Bluetooth dongle is using the Personal Area Networking (PAN) profile. Load the following modules on i.MX platform: # modprobe ehci-hcd # modprobe hci_usb # modprobe bnep Set hci0 up: # hciconfig hci0 up Check if the hci0 is set by typing: root@freescale ~$ hciconfig hci0:  Type: USB         BD Address: 00:1E:58:3F:4D:09 ACL MTU: 384:8 SCO MTU: 64:8         UP RUNNING PSCAN ISCAN         RX bytes:4813491 acl:53228 sco:0 events:208901 errors:0         TX bytes:156025160 acl:410140 sco:0 commands:83 errors:0 root@freescale ~$ hciconfig hci0 piscan Start the Bluetooth service: root@freescale ~$ /etc/rc.d/init.d/bluetooth start Start the pand service as Pan User (PANU): root@freescale ~$ pand -s -r PANU On Host (PC), load bnep module: $ modprobe bnep Start the pand service as Group Ad-hoc Network (GN): $ sudo pand --connect 00:1E:58:3F:4D:09 --service GN -n The target address (in this case 00:1E:58:3F:4D:09) can be found using hciconfig command on target A BNEP0 network should be created on host (PC) and target (i.MX): Configure BNEP0 IP on PC: $ sudo ifconfig bnep0 192.168.0.11 Configure BNEP0 IP on i.MX: $ ifconfig bnep0 192.168.0.10 Now the PAN network is set. You can test using ping: root@freescale ~$ ping 192.168.0.11 PING 192.168.0.11 (192.168.0.11): 56 data bytes 64 bytes from 192.168.0.11: icmp_seq=0 ttl=64 time=12.305 ms 64 bytes from 192.168.0.11: icmp_seq=1 ttl=64 time=27.782 ms 64 bytes from 192.168.0.11: icmp_seq=2 ttl=64 time=16.701 ms 64 bytes from 192.168.0.11: icmp_seq=3 ttl=64 time=36.732 ms 192.168.0.11 ping statistics --- 4 packets transmitted, 4 packets received, 0% packet loss round-trip min/avg/max/stddev = 12.305/23.380/36.732/9.551 ms
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The i.MX53 family of processors represents Freescale's next generation of advanced multimedia and power-efficient implementation of the ARM Cortex™-A8 core with core processing speeds up to 1.2 GHz. It is optimized for both performance and power to meet the demands of high-end, advanced applications. Ideal for a broad range of applications in the consumer, automotive, medical and industrial markets, the i.MX53 includes an integrated display controller, full HD capability, enhanced graphics and connectivity features. i.MX Family Comparison Product Information on Freescale.com i.MX534 Multimedia Applications Processor i.MX535 Multimedia Applications Processor i.MX536 Multimedia Applications Processor i.MX537 Multimedia Applications Processor Evaluation/Development Boards and Systems i.MX53 Quick Start Board Android How to enable WIFI support for iMX53 QSB Android IMX53 QSB android recovery mode Linux I.MX53 QSB Board Get Started How to flash a 4GB SD Card with the image used in training Enabling Dual Display in UBUNTU with the iMX53 QSB @running_dual_display SABRE Platform for Tablets based on i.MX53 Linux i.MX53 ARD Dual LVDS Enabling Dual LVDS panels i.MX53 USB Eth NFS Using an USB/Eth adapter to boot NFS User Applications i.MX53 Qt LVDS display Touch on Qt with LVDS display Embedded Software and Tools Android OS for i.MX Applications Processors i.MX53 Current Software Updates and Releases Partners / 3rd-Party Development Tools Rainbow-G11D:  i.MX53 Development Kit (iWave Embedding Intelligence) STKa53:  Starterkit STKa53 (Technology in Quality) DS-5:  ARM Development Studio 5 (ARM) Additional Resources Board Bring-up and DDR Initialization Tools Building QT5 for i.MX53 Change AUDMUX src_port causes "imx_ssi_irq mxc_ssi SISR 8003a3 SIER 180100 fifo_errs=XXXX" ConnectCore® i.MX53 / Wi-i.MX53 by Digi International Develop a Simple OpenVG Application Under Linux: Tutorial Embedded i.MX5x Application Development Kit for Android -$199 HDMI Audio Setting How to Enable the souphttpsrc Plugin on i.MX53 i.MX53 ARD Dual LVDS Imx53-fastboot-example i.MX53 Memory Calibration Script (AN4466) i.MX53 QSB Android Recovery Mode I.MX53 QSB Board Get Started i.MX53 QSB Board Video IMX53 QSB enable WIFI android i.MX53 QSB Ubuntu Dual Display i.MX53 Quick Start Board IMX53 SABRE AI i.MX53 Start-R Lab Exercise - Prof. Massimo Violante Politecnico of Torino i.MX53 Start-R Lab Exercise - Developing a loadable kernel module to manage GPIOs in i.MX53QSB i.MX53 USB Eth NFS i.MX53 Qt LVDS Display NOVPEK i.MX53 by NovTech Running Dual Display on i.MX53QSB bin2txt.pyw (U-boot splash screen support)
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If someone wants to use the OpenGL ES 2.0 extension "GL_OES_vertex_array_object", the macro "GL_GLEXT_PROTOTYPES" must be defined in his program first. Then he can get the extension program location by calling the API eglGetProcAddress.  Here is an example to use this extension. #define GL_GLEXT_PROTOTYPES PFNGLGENVERTEXARRAYSOESPROC glGenVertexArraysOESv; PFNGLBINDVERTEXARRAYOESPROC glBindVertexArrayOESv; PFNGLDELETEVERTEXARRAYSOESPROC glDeleteVertexArraysOESv; glGenVertexArraysOESv = (PFNGLGENVERTEXARRAYSOESPROC)eglGetProcAddress ( "glGenVertexArraysOES" ); glBindVertexArrayOESv = (PFNGLBINDVERTEXARRAYOESPROC)eglGetProcAddress ( "glBindVertexArrayOES" ); glDeleteVertexArraysOESv = (PFNGLDELETEVERTEXARRAYSOESPROC)eglGetProcAddress ( "glDeleteVertexArraysOES" ); After these steps, the new alias glGenVertexArraysOESv, glBindVertexArrayOESv, glDeleteVertexArraysOESv can be use to call the VAO operation function in OpenGL ES 2.0 extensions.
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INTRODUCTION REQUIREMENTS HARDWARE CONNECTIONS IMPLEMENTATION FUNCTIONAL DEMONSTRATION     1. INTRODUCTION   This document explains how to establish communication between the A9 core running Linux and the M4 core running an Arduino sketch on a UDOO NEO board to remotely control a robotic arm over Wi-Fi.   Figure 1: UDOO NEO board connected to the robotic arm   For more information about getting started with UDOO NEO board please refer to: Introduction - UDOO Neo Docs     2. REQUIREMENTS a) UDOO NEO board with UDOObuntu image and proper connectivity. The Linux image used is UDOObuntu 2 RC1 or RC2 (Ubuntu 14.04), available for download from the following link:      ARM Development Boards | Extended Support from UDOO For creating a bootable SD card and other basic setup please refer to the following guidelines:      Very First Start - UDOO Neo Docs Then, it is required to install the proper drivers to ensure connectivity, including USB communication with Linux terminal of the target board. Please refer to the link below:      Usb Direct Connection - UDOO Neo Docs b) The robotic arm itself. In this case, the used arm has four servomotors: three for articulation and one for open/close the clamp. c) A Wi-Fi router, and an additional Wi-Fi device with any SSH client application for the remote control of the arm.     3. HARDWARE CONNECTIONS   a) The first connection to consider is the USB Direct connection of the UDOO NEO board with the host PC, in order to configure the Wi-Fi network and remotely view of the desktop (VNC client) for Arduino sketch programming.   b) Then, it is required to consider the arm connection, which consists of four servomotors. Therefore, the motors must be powered by a separate power supply and controlled by four PWM signals. In this case, they will be connected to PWM_1, PWM_2, PWM_3 and PWM_4 signals of J4 connector (Arduino signals). Figure 2 shows the mentioned connection:   Figure 2: Servomotors connection to UDOO NEO board.     4. IMPLEMENTATION   4.1 Connecting to a Wi-Fi network. After turning on the UDOO NEO board, the USB Direct connection will install a virtual NIC on the host PC, in order to access to the “Dashboard”, a configuration webpage loaded on the NEO board that could be viewed from any web browser at address 192.168.7.2. You can connect to wireless networks by using the Web Control Panel, in Configuration/Network settings. After establishing connection with the Wi-Fi router, the Dashboard must indicate the assigned IP address of the NEO board as indicated on Figure 3. It is important to remember such address in order to establish the wireless access to the NEO board later (optionally, the NEO could be configured for a static IP address, or the router could be configure to assign the same IP address to the NEO board).   Figure 3: Dashboard showing the IP address of the NEO board.   Now the USB direct connection could be removed, as the Dashboard, remote terminal and VNC server are also available over Wi-Fi using the Wi-Fi IP address.   4.2. Programming the Arduino sketch. The remote desktop of the NEO could be viewed with any VNC client on the host PC, indicating the NEO’s IP address, user and password (same as SSH remote Terminal). The UDOObuntu image already include Arduino IDE configured for UDOO NEO board, so it is just required opening it to start writing the code. Figure 3 shows the UDOO NEO Desktop, which includes a Terminal window and the Arduino IDE. The sketch is available as attachment.   Figure 4: Desktop of UDOO NEO board.   4.3. Arduino sketch functionality. The Arduino program starts waiting for any incoming data over the serial port. After receiving any serial data, the four servomotors are initialized to the default position (90°). The serial port communication is established between a virtual serial port on Arduino side (Serial0), and the virtual serial port for the Multi-Core Communication (ttyMCC), like shown on Figure 5. For additional information please refer to the link below: Communication - UDOO Neo Docs Figure 5: Communication between cores. Once the motors are initialized, each movement is defined by a key to increase and decrease the angle position of the motors, except for the clamp, which is adjusted to open/close positions. Keys 'Q' and 'W' adjust the first motor; keys 'A' and 'S' adjust the second motor; keys 'D' and 'F' adjust the third motor, and finally, keys 'Z' and 'X' are used to open/close the clamp. Additionally, key 'R' resets all motors to default positions; key 'C' is used to enable/disable the PWM signals, and key 'V' prints the angle values of all motors. The adjust step of motors is defined with the macro “ANGLE_STEP”; the units are degrees.     5. FUNCTIONAL DEMONSTRATION   For demonstrative functionality, the UDOO NEO board running the Arduino sketch was connected to a Wi-Fi network, and it is also connected to the same network an Android phone with SSH app used to control the robotic arm. Figure 6 shows a screen capture of the mentioned app controlling the robotic arm. Figure 6: SSH app accessing to UDOO NEO.   Finally, the following video shows the functionality of the application:   Original Attachment has been moved to: robo_arm.ino.zip
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Atlas PMIC i.MX Platforms uses Freescale Atlas chipset as power management IC (PMIC). PMIC is connected with i.MX processor through SPI port. Reading and Changing PMIC Registers pmic_reg is a simple program that allows to read and change PMIC registers through SPI. Click here to download the binary Click here to download the source package Click here to download the spec file pmic_reg Installation To use pmic_reg, you can simply download the binary file and move it to your system. To build the source code, download and mv the source package (in this case "pmic_reg-1.0.tar.gz") to /opt/freescale/pkgs: sudo mv pmic_reg-1.0.tar.gz /opt/freescale/pkgs Download the spec file to spec directory: mkdir <ltib directory>/dist/lfs-5.1/pmic_reg cp pmic_reg.spec <ltib directory>/dist/lfs-5.1/pmic_reg On <ltib directory>, extract, build and deploy pmic_reg: ./ltib -p pmic_reg.spec -m prep ./ltib -p pmic_reg.spec -m scbuild ./ltib -p pmic_reg.spec -m scdeploy Source files will be located at <ltib directory>/rpm/BUILD/pmic_reg-1.0 and binary will be located at /usr/bin on your i.MX system rootfs. pmic_reg Usage To get pmic_reg help, just type pmic_reg: PMIC_REG v1.0 (2009.12.15) Usage To read all PMIC registers: pmic_reg r To write to a specific register: pmic_reg w <register address> <register value>
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The i.MX6 DL/S L3.035_3.0.4 patch release is now available onwww.freescale.com ·         Files available # Name Description 1 L3.0.35_3.0.4_TEMP_PATCH This patch release is based on the i.MX 6DualLite/6Solo   Linux L3.0.35_3.0.0 release. The purpose of this patch release is fix the   miscalibration issue for the thermal sensor.
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i.MX27 and i.MX31 Issues When Interfacing Micron's 78nm mDDRs Micron is discontinuing some "-75" mDDR parts (133MHz) popular on i.MX27 and i.MX31 designs, newer "-6" are being used to replace the EOL devices. However, loss of data issues may be experienced when i.MX mDDR controller is used to interface with newer Micron's mDDR. On some cases, the bootloader works, memory tests on RedBoot pass. However, Linux hangs when booting. Here are the DDR Controller configuration changes that may be used to avoid the issue: (This configuration is not proven to work on every design, but has been validated on at least 3 different boards.) ESDRAMC Configuration Registers Set ESDCFG0/1 to 0x0079D72F 0xD800_1004 = 0x79D72F Drive Strength Control Registers Use "Normal". i.MX27 Default. Enhanced MDDR Delay Line Configuration Debug Register Set the ESDCDLYx to 0x002C0000 0xD800_1020 = 0x2C0000 0xD800_1024 = 0x2C0000 0xD800_1028 = 0x2C0000 0xD800_102C = 0x2C0000
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  Purpose Under some situations, need to modify the binary image. Under some situations, no development environment. Under some situations, even no Linux. Only have windows. Board bring up need simple settings, such as simple/tiny rootfs.  Key Features Create small sdcard mirror image All operations are on binary files no need development environment(offline) Set the u-boot environment on binary image Windows OS support Snapshot:   Please download  create_sdcard_mirror_ext.zip.001.zip create_sdcard_mirror_ext.zip.002.zip create_sdcard_mirror_ext.zip.003.zip create_sdcard_mirror_ext.zip.004.zip create_sdcard_mirror_ext.zip.005.zip create_sdcard_mirror_ext.zip.006.zip extract each one to have below files  create_sdcard_mirror_ext.zip.001 create_sdcard_mirror_ext.zip.002 create_sdcard_mirror_ext.zip.003 create_sdcard_mirror_ext.zip.004 create_sdcard_mirror_ext.zip.005 create_sdcard_mirror_ext.zip.006 Put together and extract them.  
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