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Working with mainline U-Boot Freescale BSP provides an i.MX51 EVK U-boot port. However, i.MX51 EVK is also supported on I-boot main tree. This quick "how to" teaches how to use it. 0. Get u-boot code from the imx U-Boot Custodian tree: $ git clone git://git.denx.de/u-boot-imx.git 1. Prepare the environment: $ export PATH="$PATH:/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/" $ export CROSS_COMPILE=arm-none-linux-gnueabi- 2. Configure for i.MX 51 EVK $ cd u-boot-imx $ make mx51evk_config 3. Compile $ make u-boot.imx   iMX may SoCs use its internal ROM to execute some instructions at boot time, using "make u-boot.imx" an image containing the instructions 4. Copy the compiled file to a SD card on your host machine, insert the SD card and: $ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2 "/dev/mmcblk0" should replaced according to your host, use "dmesg" after inserting the SD to find out where is the SD on your host. Unmount it before issuing the dd command. seek 2, skips the first 1K bytes (2x512) of the SD where the ROM expects the boot image for SD. 5. Insert the SD on the i.MX51 EVK, and set the switches for SD card boot and power on the board.
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We will cross compile L5.4.3_1.0.0 on ubuntu18.04 LTS platform in three steps. 1. Installing Ubuntu 18.04 to vmplayer14 & Configuring Ubuntu 18.04 LTS 2. Compiling L5.4.3_1.0.0 BSP According to Steps in i.MX_Yocto_Project_User's_Guide.pdf 3. Handling tensorflow-lite compilation errors. --BEGIN No.1 Installing Ubuntu 18.04 to vmplayer14 & Configuring Ubuntu 18.04 LTS 1. Install 18.04 on vmplayer After installation is done, root user should be set at first. # sudo passwd root Then follow these steps to configuration ubuntu 18.04 for environment of compiliation --Changing sources of ubuntu 18.04 mirror If you are Chinese users, you can do the step, which can improve your system performance. # sudo cp /etc/apt/sources.list /etc/apt/sources.list.bak # sudo geit /etc/apt/source.list Comment I.MX customers outside China do not need to modify Ubuntu source list, or can modify it to local mirror site of Ubuntu 18.04, which can improve the speed of software upgrade. Delet all sources and copy following lines here, Then save it and exit Update ubuntu source deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic main restricted universe multiverse # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic main restricted universe multiverse deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-updates main restricted universe multiverse # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-updates main restricted universe multiverse deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-backports main restricted universe multiverse # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-backports main restricted universe multiverse deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-security main restricted universe multiverse # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-security main restricted universe multiverse # deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-proposed main restricted universe multiverse # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ bionic-proposed main restricted universe multiverse Then running these 2 commands to update sources and packages # sudo apt-get update # sudo apt-get upgrade 2. Installing packages for compiliation Packages For Compiling BSP # sudo apt-get install flex bison gperf build-essential zlib1g-dev lib32ncurses5-dev x11proto-core-dev libx11-dev lib32z1-dev libgl1-mesa-dev tofrodos python-markdown libxml2-utils xsltproc # sudo apt-get install uuid-dev:i386 liblzo2-dev:i386 gcc-multilib g++-multilib subversion openssh-server openssh-client uuid uuid-dev zlib1g-dev liblz-dev lzop  liblzo2-2 liblzo2-dev git-core curl # sudo apt-get install u-boot-tools mtd-utils android-tools-fsutils openjdk-8-jdk device-tree-compiler aptitude libcurl4-openssl-dev nss-updatedb # sudo apt-get install chrpath texinfo gawk cpio diffstat No.2 Compiling L5.4.3_1.0.0 BSP According to Steps in i.MX_Yocto_Project_User's_Guide.pdf          The detailed BSP compilation steps are given in i.MX_Yocto_Project_User's_Guide.pdf. Here are just some tips and simple steps. For Chinese customers, the system may not respond when the repo init or repo sync command is executed after obtaining the repo script. Detailed description is below: (1)Getting repo script # mkdir ~/bin (this step may not be needed if the bin folder already exists) # curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo # chmod a+x ~/bin/repo # export PATH=~/bin:$PATH (2)Getting Yocto source # mkdir imx-yocto-bsp # cd imx-yocto-bsp # repo init -u https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-zeus -m imx-5.4.3-1.0.0.xml # repo sync          After running repo init or repo sync, you may encounter a situation where there is no progress for a long time, and repo sync stops there without any prompt. This may be caused by googlesource site being inaccessible.          At this time, you can modify the googlesource URL to the URL of Tsinghua University. # gedit ./repo          Changing REPO_URL = 'https://gerrit.googlesource.com/git-repo'          To be:                    REPO_URL = 'https://mirrors.tuna.tsinghua.edu.cn/git/git-repo'          Save and exit. Then run “repo init -u https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-zeus -m imx-5.4.3-1.0.0.xml”. or repo sync No.3 Handling tensorflow-lite compilation errors       If you encounter a tensorflow-lite compilation error during the compilation process, the following processing methods may be helpful to you. Cause Analysis:          Compiling tensorflow-lite requires three steps: fetching packages, configuring environment, and compiling code.          During the configuring environment, the following 8 software packages need to be downloaded. If any of the 8 files are not successfully downloaded, an error will be reported and compilation will be terminated.          ①9f48e814419e.tar.gz          ②38ebac7b059e84692f53e5938f97a9943c120d98.zip          ③release-1.8.0.tar.gz          ④389ec3f906f018661a5308458d623d01f96d7b23.tar.gz          ⑤master.zip          ⑥816a4ae622e964763ca0862d9dbd19324a1eaf45.tar.gz          ⑦1f5eae5d6a135ff6811724f6c57f911d1f46bb15.tar.gz          ⑧fft.tgz          If you encounter this problem, you can refer to the following methods to solve it. Open the file with editor: ~/imx-yocto-bsp/build-xwayland/tmp/work/aarch64-poky-linux/tensorflow-lite/1.13.2-r0/git/tensorflow/lite/tools/make/download_dependencies.sh URLs EIGEN_URL="https://bitbucket.org/eigen/eigen/get/9f48e814419e.tar.gz" GEMMLOWP_URL="https://github.com/google/gemmlowp/archive/38ebac7b059e84692f53e5938f97a9943c120d98.zip" GOOGLETEST_URL="https://github.com/google/googletest/archive/release-1.8.0.tar.gz" ABSL_URL="https://github.com/abseil/abseil-cpp/archive/389ec3f906f018661a5308458d623d01f96d7b23.tar.gz" NEON_2_SSE_URL="https://github.com/intel/ARM_NEON_2_x86_SSE/archive/master.zip" FARMHASH_URL="https://github.com/google/farmhash/archive/816a4ae622e964763ca0862d9dbd19324a1eaf45.tar.gz" FLATBUFFERS_URL="https://github.com/google/flatbuffers/archive/1f5eae5d6a135ff6811724f6c57f911d1f46bb15.tar.gz" FFT2D_URL="http://www.kurims.kyoto-u.ac.jp/~ooura/fft.tgz" Save and exit. [comment]     Don’t run “bitbake tensorflow-lite -c cleanall before you modify it”, otherwise files will be deleted.  Then try to compile tensorflow-lite like below: # bitbake tensorflow-lite -c compile   At the same time, we can open this directory and check if the following directories are created. If these 8 directories are successfully created, it means that links we modified are no problem.          After tensorflow-lite is successfully built, we can continue to compile full images. # bitbake imx-image-full --END NXP TIC team Weidong Sun 2020/3/30
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Some customer need to test ENET IEEE1588 1pps ouput signal. This article describe all i.MX8 serials test procedure, including normal ENET port and EQOS port(i.MX8MP & i.MX8DXL support EQOS).
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The system controller timer service is responsible for: Watchdog - The watchdog resource is managed by the SCU. The SCFW exposes a "virtual" watchdog to all CPUs. This virtual watchdog is managed by software and it is based on a low power timer, the SCU also features a physical watchdog timer that is used to ensure the correct operation of the device. Some of the features implemented by this watchdog service are: - Update of the watchdog timeout - Start/stop of the watchdog - Refresh of the watchdog - Return of the watchdog status such as maximum watchdog timeout that can be set, watchdog timeout interval, and watchdog timeout interval remaining. Since this is usually handled by the OS itself no examples are provided in this guide. Real Time Clock (RTC) - The SCFW is responsible for providing access to the RTC. The features supported by the API are: - Set/get time - Setting alarms Only the partition that owns the SC_R_SYSTEM resource is allowed to set the time, alarms and calibration values for the RTC. All other partitions are able to read the RTC time.  Here is an example on setting the RTC from the M4 side: struct time_date{ uint16_t year; uint8_t month; uint8_t day; uint8_t hour; uint8_t min; uint8_t sec; } rtc_time; sc_err_t sc_status; sc_ipc_t ipc; /* Open IPC channel */ sc_status = sc_ipc_open(&ipc, SC_IPC_AP_CH0); if(sc_status != SC_ERR_NONE) printf("Error opening Inter Processor Channel\n"); /* Initialize RTC */ /* Hard code RTC time to January 5th 2018 at 12:00 hours */ sc_status = sc_timer_set_rtc_time(ipcHandle, 2018, 1, 5, 12, 0, 0); if(sc_status != SC_ERR_NONE) printf("Error initializing RTC. \r\n"); /* Return time */ sc_status = sc_timer_get_rtc_time(ipcHandle, &(rtc_time.year), &(rtc_time.month), &(rtc_time.day), &(rtc_time.hour), &(rtc_time.min), &(rtc_time.sec)); printf("Year: %d, Month: %d, Day: %d, Hour: %d, Minutes: %d, Seconds: %d. \r\n", rtc_time.year, rtc_time.month, rtc_time.day, rtc_time.hour, rtc_time.min, rtc_time.sec);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ https://community.nxp.com/docs/DOC-342654 
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vpuwraper can fulfill VPU decoder/encoder, if customer’s user case is simple, for example they just need to encode yuv stream to H264, or decode H264 stream to yuv, There is no need to use gstreamer or V4L2 complex framework, you can use vpuwraper. Platform: i.MX8MP + L5.4.70.2.3.0 Build Procedure: mkdir vpu cd vpu git clone https://github.com/nxp-imx/imx-vpuwrap   cd imx-vpuwrap/ git tag -l   git switch -c rel_imx_5.4.70_2.3.0   source ../../.././5.4.70.2.3.0/sdk/environment-setup-aarch64-poky-linux   make -f Makefile_8mp   Test on i.MX8MP EVK board Pls find attached test log for decode and encode If busChromaU in YUV file is null, you will failed to encode it, pls apply vpuwraper patch for L5.4.70.2.3.0.patch to fix it If YUV file is interleave format, you need to add interleave parameter : -interleave 1 ./test_enc_arm_elinux -i test.yuv -o aaa.h264 -f 2 -w 176 -h 96 -interleave 1   Thanks, Lambert
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The miscellaneous service is in charge of providing access to all features not handled by the other services some examples include the following features: Subsystems controls - Some subsystems have settings that can be configured through the SCFW. For instance it is possible to set thresholds for a temperature alarm and get the temperature value of the sensor in different resources. For a complete list of resources and its controls please refer to the sc_fw_api document Chapter 5 Control List. DMA configurations - The SCFW provides access to DMA grouping and priority functions. Security functions - The SCFW provides some security functions such as: Image loading and authentication Fuse writing Life cycle management. Debug features - The SCFW provides some debug functionality through its miscellaneous service, some examples include:  Output a character through the SCU UART port Obtain SCFW build information (SCFW version) Obtain device Unique ID For a complete list of functions supported by your device please refer to the (SVC) Miscellaneous Service chapter of the sc_fw_api document.  This guide will cover the most common functions,  Getting and setting a control The process to get and set a control on a resource is the same for all available controls. Refer to the Control list chapter of your SoC SCFW API document for a complete list of the available controls. The following example will be based on an i.MX8QM.  The control list looks as follows: The table lists the controls available per resource as well as the width of the data to get/set, the 'Set' column describes whether a control is 'settable' or not, for instance the temperature sensor on the A53 resource can only be read/retrieved it cannot be 'written' (set) therefore the 'Y' (yes) in this column is missing, a brief description of the control is also provided. To get a control sc_misc_get_control must be called: uint32_t val; sc_misc_get_control(ipc, SC_R_A53, SC_C_TEMP, &val)‍;‍‍‍‍‍‍ By default all calls to get_control need a pointer to a 32 bit unsigned integer, the width field on the control list table defines the span of meaningful data. In the example above the data from the temperature sensor in the A53 resource is retrieved. This call returns SC_ERR_NONE whenever it succeeds. If the parameters are invalid it returns SC_PARM and if the caller does not have access to that resource it returns SC_ERR_NOACCESS. To set a control sc_misc_set_control must be called: uint32_t val = high_alarm_temperature_value; sc_misc_set_control(ipc, SC_R_A53, SC_C_TEMP_HI, val);‍‍‍‍‍‍‍‍ As in the get example sc_misc_set_control expects a 32 bit unsigned integer, it is the responsibility of the user to pass a value within the width limits defined in the control list table. In the example above the upper threshold for the A53 resource is being set/configured. The return values are the same as in sc_misc_get_control. Other functions There is a different method for getting/setting temperatures in a friendly human readable format, the method above uses a 'raw' format to interact with the temperature sensors in the resources, an easier way is to use the sc_misc_get_temp and sc_misc_set_temp functions. This functions return the temperature value in degrees Celsius as well as it's fractional part. To define whether to get/set the value for the temperature sensor itself or one of it's alarm the sc_misc_temp_t has been defined. SC_MISC_TEMP      -> Temperature sensor SC_MISC_TEMP_HIGH -> Upper threshold temperature sensor alarm SC_MISC_TEMP_LOW  -> Lower threshold temperature sensor alarm‍‍‍‍‍‍‍‍‍ For instance to get the temperature reading from the A53 resource the following call can be made: int16_t celsius; int8_t tenths; sc_misc_get_temp(ipc, SC_R_A53, SC_MISC_TEMP, &celsius, &tenths);‍‍‍‍‍‍‍‍‍ And to set the upper threshold alarm: int16_t celsius = 80; int8_t tenths = 0; /* Set High temperature alarm to 80 degrees Celsius */ sc_misc_set_temp(ipc, SC_R_A53, SC_MISC_TEMP_HIGH, celsius, tenths);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Unique ID of the chip as well as the build info of the SCFW can also be obtained through the miscellaneous service, the following example queries for this information: /* Getting SCFW version information */ uint32_t build_version; uint32_t commit_hash; sc_misc_build_info(ipc, &build_version, &commit_hash);‍‍‍ /* Getting Device Unique ID */ uint32_t ID_L; uint32_t ID_H; /* The ID is a 64-bit number ID_L stores the lower 32-bit portion and ID_H the 32-bit upper portion */ sc_misc_unique_id(ipc, &ID_L, &ID_H);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Refer to the sc_fw_api document for a definition of the remaining miscellaneous functions. https://community.nxp.com/docs/DOC-342654 
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This guide walks you through the required steps to prepare your development environment and hardware for debugging the M core on the FRDM-IMX93 board using the MCU-LINK Pro. You’ll install the necessary firmware, perform minor hardware modifications, compile and flash a binary, and finally, initiate a debug session using MCUXpresso for VS Code. Requirements: FRDM-IMX93 Board MCU-LINK Pro Debug Probe Soldering Station (for minor rework) PC Host with MCUXpresso for VS Code installed Adapter Cables   Install Segger Firmware on MCU-LINK Pro By default, the MCU-LINK Pro does not support i.MX processors. Installing the Segger firmware is essential for proper debugging. Follow the firmware update guide to update your MCU-LINK Pro.   Rework the FRDM-IMX93 Board The FRDM-IMX93 uses UART5 (shared with the BT module) for debug pins, which causes conflicts. To enable reliable debugging, remove the following resistors: R3017 R3018 Note: After this modification, the Bluetooth module will no longer function under Linux. Schematic: FRDM BOARD:   Note: After this rework we can't use the Bluetooth module in Linux   Compile the Binary for the M Core Ensure MCUXpresso for VS Code is properly installed.   Import the iMX93-EVK SDK   Import "hello world" example Ensure that we are compiling a debug binary   Build Project   Flash the Binary using UUU Tool Connect the FRDM Board to your Host PC via USB   Enter Fastboot Mode in U-Boot Terminal => fastboot 0   On your Host PC, navigate to the binary location and flash it using the next commands: $ cd <project_location>/armgcc/debug/ $ uuu -b fat_write sdk20-app.bin mmc X:1 hello_world.bin Note: replace the X with 0 if you are booting from eMMC or 1 if you are booting from SD Card   Connect MCU-LINK Pro to the Target To set up debugging, connect the FRDM-IMX93 board to your host computer using the MCU-LINK Pro and the J-LINK Adapter for Cortex-M. FRDM-IMX93 Debug connector:   Required Connections Use the following pin mapping between the J-LINK Adapter and the FRDM-IMX93 debug connector:   J-LINK ADAPTER        -->         FRMD-IMX93  V REF        -->      3.3v(RPI Connector pin 1 )  SWDIO        -->      SWDIO (P14 pin 2)  SWCLK        -->      SWCLK (P14 pin 1)  GND        -->      GND (P14 pin 3)   Make sure all connections are secure before powering on the board.   Launch the M Core from U-Boot Terminal Use the following commands in the U-Boot terminal: => fatload mmc X:1 80000000 hello_world.bin; cp.b 0x80000000 0x201e0000 0x10000; => bootaux 0x1ffe0000 0 Note: replace the X with 0 if you are booting from eMMC or 1 if you are booting from SD Card   Start the Debug Session Once the M core is launched, you can start your debug session in VS Code using MCUXpresso:        With the MCU-LINK Pro configured, the FRDM-IMX93 reworked, and the binary successfully flashed and executed, you are now ready to debug applications on the M core using MCUXpresso and VS Code. This setup enables a reliable development workflow for i.MX93-based projects.
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GUI Guider version:  1.9.x LVGL version: v8.x.x , v9.x.x Host software requirements: Ubuntu 20.04, Ubuntu 22.04 or Debian 12 Hardware requirements: FRDM i.MX 93 Development Board i.MX 93 Evaluation Kit   Steps: 1. Export your project from the folder GUI-Guider-Projects to your Linux PC.            2. Build an image for iMX93 using The Yocto Project.    a. Based on iMX Yocto Porject Users Guide set directories and download the repo $ mkdir imx-bsp-6.6 $ cd imx-bsp-6.6 $: repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.52-2.2.0.xml $ repo sync Use distro fsl-imx-xwayland and select machine imx93evk and use this commnad with a build folder name: $ MACHINE=imx93evk DISTRO=fsl-imx-xwayland source ./imx-setup-release.sh - b bld-imx93evk b. Use bitbake command to start the build process. Also, add the -c populate_sdk to get the toolchain. $ bitbake imx-image-full -c populate_sdk  c. Install the Yocto toolchain located on <build-folder>/tmp/deploy/sdk/.  $ sudo sh ./fsl-imx-xwayland-glibc-x86_64-imx-image-full-armv8a-imx93evk-toolchain-6.6-scarthgap.sh d. Install ninja utility on the build host $ sudo apt update $ sudo apt upgrade -y $ sudo apt install ninja-build e. Unzip the gui guider and lvgl sources $ cd meta-gui-guider/recipes-graphics/gui-guider/gui-guider/ $ unzip gui-guider.zip $ cd ../../lvgl/lvgl/ $ unzip lvgl.zip $ cd ../../gui-guider/gui-guider/ $ mv ../../lvgl/lvgl/ . $ cd ports/linux/ f. Change the interpreter on build.sh from #!/bin/sh to #!/bin/bash. $ nano build.sh -- #!/bin/sh ++ #!/bin/bash g. use the following commands to make build.sh executable $ dos2unix build.sh $ chmod +x build.sh h. Execute the build.sh $ ./build.sh i. Copy the binary to the iMX93 using a USB or SCP.    RESULTS:     I hope this article will be helpful
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The purpose of this document is to provide extended guidance for selection of compatible LPDDR5 and LPDDR4x memory devices that are supported by the i.MX 95 and i.MX 952 processors. In all cases, it is strongly recommended to follow the DRAM layout guidelines outlined in the NXP Hardware Developer's Guides for the specific SoCs. Please note that some of the LPDDR4x devices may not support operation at low speeds and in addition, DQ ODT may not be active, which can impact signal integrity at these speeds. If low speed operation is planned in the use case, please consult with the memory vendor the configuration aspects and possible customization of the memory device so correct functionality is ensured. LPDDR5 - maximum supported densities SoC Max Data bus width Maximum density Assumed memory organization Notes i.MX 95 32-bit 128Gb/16GB dual rank, dual channel device with 17-row addresses and x8 (byte mode) organization 1, 3, 7 i.MX 952 32-bit 128Gb/16GB dual rank, dual channel device with 17-row addresses and x8 (byte mode) organization 1, 3, 7, 9   LPDDR5 - list of validated memories Note: The memory vendors often list their devices as LPDDR5x in their high-level product information while in fact, they are in most cases backward compatible with the LPDDR5 mode. This may lead to the false impression that there are not so many LPDDR5 devices on the market. In such cases, it is strongly recommended to check the full datasheet to confirm if the device is in fact LPDDR5/LPDDR5x or LPDDR5x only. The SoC cannot be used with devices that only support the LPDDR5X mode. The validation process is an ongoing effort - regular updates of the table are expected. SoC Density Memory Vendor  Validated Memory Part#  Notes i.MX 95 128Gb/16GB Micron MT62F4G32D8DV-023 FAAT:C - 64Gb/8GB  Samsung K3KL9L90QM-MHCT - 32Gb/4GB  Samsung K3KL8L80QM-MHCT 2 32Gb/4GB  Samsung K3KL8L80EM-MUCV 2        64Gb/8GB  SK HYNIX H58G66DK9VX067N 2 64Gb/8GB Micron MT62F2G32D4DS-023 FAAT:C 2, 6 32Gb/4GB Micron MT62F1G32D2DS-020 WT:D 2 16Gb/2GB Micron MT62F1G16D1DS-023 IT:B 2 64Gb / 8GB Rayson RS2G32LO5D24DB-31BT 2 32Gb/4GB Rayson ATL5X4G32M7E-31IT 2 64Gb / 8GB CXMT CXDB6CCBM-MA-A 2 i.MX 952 128Gb/16GB Micron MT62F4G32D8DV-023 FAAT:C 9 32Gb/4GB Micron MT62F1G32D2DS-020 WT:D 2   LPDDR5 - list of incompatible devices The SoC cannot be used with memory devices that only support the LPDDR5x mode. LPDDR4x - maximum supported densities SoC Max Data bus width Maximum density Assumed memory organization Notes i.MX 95 32-bit 128Gb/16GB dual rank, dual channel device with 17-row addresses 1 i.MX 952 32-bit 128Gb/16GB dual rank, dual channel device with 17-row addresses 1, 9   LPDDR4x - list of validated memories   The validation process is an ongoing effort - regular updates of the table are expected. SoC Density Memory Vendor Validated Memory Part# Notes i.MX 95 64Gb/8GB Micron   MT53E2G32D4DE-046 AUT:C  5 8Gb/1GB Micron MT53E256M32D1KS-046 IT:L 2 128Gb/16GB Micron MT53E4G32D8GS-046 2 64Gb/8GB SK Hynix H54G66BYYVPX104 2 32Gb/4GB Intelligent Memory IMBG32L4KBB_V10 2 48Gb/6GB Micron MT53E1536M32D4DT-046 WT:A 3, 8 24Gb/3GB Micron MT53E768M32D4DT-053 AIT:E 3, 8 8Gb/1GB Samsung K4U8E3S4ADGHCL  2 32Gb/4GB Intelligent Memory IMBG32LK4BBG-046I 2 32Gb/4GB Alliance Memory AS4C1G32MD4V-046BIN 2 64Gb/8GB Rayson ATL4X8G32M2D-46IT 2 64Gb/8GB Rayson ATL4X8G32M2D-46AIT 2 64Gb/8GB DW DWCTB36HLC0 2 8Gb/1GB Alliance Memory AS4C256M32MD4V-062BAN 2 32Gb/4GB ISSI IS46LQ32K01S2A-046BLA2 2 32Gb/4GB Nanya NT6AT1024T32AV-J1 2 i.MX 952 64Gb/8GB Micron   MT53E2G32D4DE-046 AUT:C  9   LPDDR4/4X - list of incompatible devices Note: This SoC supports LPDDR4x memory devices. This SoC is not compatible with memories that only support LPDDR4. Combo Devices that support both LPDDR4x and LPDDR4 are compatible with the SoC. Note 1: The numbers are based purely on the IP documentation for the DDR Controller and the DDR PHY, on the settings of the implementation parameters chosen for their integration into the SoC, SoC reference manual and on the JEDEC standards JESD209-5 (LPDDR5) and JESD209-4C/JESD209-4-1 (LPDDR4/4X). Therefore, they are not backed by validation, unless said otherwise and there is no guarantee that an SoC with the specific density and/or desired internal organization is offered by the memory vendors. Should the customers choose to use the maximum density and assume it in the intended use case, they do it at their own risk. Note 2: The memory part number did not undergo full JEDEC verification however, it passed all functional testing items. Note 3: Memory devices with binary densities (e.g., 1 GB, 2 GB, 4 GB) are preferred because they simplify memory management by aligning with system addressing schemes and reducing software complexity. Note 4: All memory parts are available at vendors unless stated otherwise. Checked Q2 2026 Note 5: Memory device supports both LPDDR4x and LPDDR4, however can only be used in LPDDR4x mode Note 6: Not validated by NXP but confirmed working on a non NXP Board Note 7: The maximum density supported may change in the future when DRAM vendors make higher density options available Note 8: This DRAM part number is not recommended for new designs Note 9: This SoC is in Pre-Production
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SoC: i.MX8MP LDP: Ubuntu22.04 and Ubuntu 20.04 Yocto: 6.1.22 mickledore   This doc includes two parts: 1)How to enable qt5 in LDP 2)How to enable qt5 in Yocto Linux 6.1.22     How to use qt5 in LDP(Linux Distribution Poc): The gcc and glibc is diffrent from Yocto Linux and Linux Distribution Poc. To cross compile the file between Linux and Ubuntu, we need to care about that.   To full enable the GPU usage of QT lib, please use "-gles" libs by apt-get command. Qt source code is not suggested, for it has not been tested. Building Qt5, for example: sudo apt-get update sudo apt-get -y install libqt5gui5-gles sudo apt-get -y install libqt5quick5-gles sudo apt-get -y install qtbase5-gles-dev   opengles test case glmark: sudo apt-get -y install glmark2-es2-wayland How to find the missing lib for apt-get: sudo apt-get install apt-file apt-file search xx   open wifi if needed NXP internal internet has limitation: sudo modprobe moal mod_para=nxp/wifi_mod_para.conf   and add "nameserver 8.8.8.8" in vi /etc/resolv.conf. You can also try:  echo "nameserver 8.8.8.8" | sudo tee /etc/resolv.conf > /dev/null   some times system time is not automatically update, and that cause apt-get update fail User and choose manually configure it by: sudo date -s "2023-08-31 14:00:00"   For Chinese support for ubuntu, please use: sudo apt-get install ttf-wqy-microhei ttf-wqy-zenhei xfonts-wqy   possible env path you need to export: XDG_RUNTIME_DIR="/run/user/1000" export QT_QPA_PLATFORM=wayland   User can choose root login by command like: user@imx8mpevk:~$ sudo passwd New password: Retype new password:   please use qmake to build qt project: 1)qmake -o Makefile HelloWorld.pro 2)make   some other qt libs: sudo apt-get install -y qtwayland5 sudo apt-get install -y qml-module-qtquick-controls sudo apt-get install -y qml-module-qtquick-controls2 sudo apt-get install -y qml-module-qtcharts sudo apt-get install -y libqt5multimedia5 sudo apt-get install -y libqt5serialport5 sudo apt-get install -y libqt5script5 sudo apt-get install -y qml-module-qt-labs-settings sudo apt-get install -y qml-module-qt-labs-platform sudo apt-get install -y qml-module-qtmultimedia sudo apt-get install -y libqt5webengine5 sudo apt-get install -y qml-module-qtwebengine sudo apt-get install -y qml-module-qtquick-dialogs     How to enable qt5 in Yocto 6.1.22: 1.download meta-qt5 git clone https://github.com/meta-qt5/meta-qt5.git git checkout origin/mickledore   copy Yocto version 5.10.72_2.2.0 sources\meta-imx\meta-sdk\dynamic-layers\qt5-layer to the same path of Yocto 6.1.22   2.apply two patches qt5-1.patch: modify the path from qt6 to qt5 qt5-2.patch: modify the qt5 related in meta-imx, including: 1)Yocto grammer update,from "_" to ":";  2)NXP grammer,from mx8 to mx8-nxp-sdk;  3)remove gstreamer1.0-plugins-good-qt, for qt5 has been natively added into gst-plugin-good-1.22(which is not in 1.18)   3.after input command like "DISTRO=fsl-imx-xwayland MACHINE=imx8mp-lpddr4-evk source imx-setup-release.sh -b build-xwayland", comment the "meta-nxp-demo-experience"   # i.MX Yocto Project Release layers BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-bsp" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-sdk" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-ml" BBLAYERS += "${BSPDIR}/sources/meta-imx/meta-v2x" #BBLAYERS += "${BSPDIR}/sources/meta-nxp-demo-experience"      
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Environment: openjdk-8 with L5.4.24-2.1.0 and GCC-9 1. Clone meta-java with dedicated branch name: git clone git://git.yoctoproject.org/meta-java -b zeus 2. Update .bb file for compile error in meta-java: diff --git a/recipes-core/icedtea/icedtea7-native.inc b/recipes-core/icedtea/icedtea7-native.inc index 8d0dc71..153a604 100644 --- a/recipes-core/icedtea/icedtea7-native.inc +++ b/recipes-core/icedtea/icedtea7-native.inc @@ -26,7 +26,7 @@ CXXFLAGS_append = " -fno-tree-dse" CXX_append = " -std=gnu++98" # WORKAROUND: ignore errors from new compilers -CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type" +CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type -Wno-error=format-overflow" inherit native java autotools pkgconfig inherit openjdk-build-helper 3. Add meta-java layer into bblayers.conf: BBLAYERS += "${BSPDIR}/sources/meta-java" 4. Edit the conf/local.conf to add openjdk variables # Possible provider: cacao-initial-native and jamvm-initial-native PREFERRED_PROVIDER_virtual/java-initial-native = "cacao-initial-native" # Possible provider: cacao-native and jamvm-native PREFERRED_PROVIDER_virtual/java-native = "jamvm-native" # Optional since there is only one provider for now PREFERRED_PROVIDER_virtual/javac-native = "ecj-bootstrap-native" PREFERRED_PROVIDER_java2-runtime = " openjdk-7-jre" IMAGE_INSTALL_append = " openjdk-7-jdk " diff --git a/recipes-core/openjdk/openjdk-8-common.inc b/recipes-core/openjdk/openjdk-8-common.inc index d8b30b8..ed03d60 100644 --- a/recipes-core/openjdk/openjdk-8-common.inc +++ b/recipes-core/openjdk/openjdk-8-common.inc @@ -181,5 +181,5 @@ FLAGS_GCC9 = "-fno-lifetime-dse -fno-delete-null-pointer-checks" BUILD_CFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" BUILD_CXXFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" # flags for -cross -TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" +TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)} -Wno-error=format-overflow" TARGET_CXXFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" diff --git a/recipes-core/openjdk/openjdk-8-native.inc b/recipes-core/openjdk/openjdk-8-native.inc index 321a43d..97ff03f 100644 5. Switch the host GCC to gcc-8 and g++-8: sudo apt-get install gcc-8 g++-8 sudo update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-8 --slave /usr/bin/g++ g++ /usr/bin/g++-8 --slave /usr/bin/gcov gcov /usr/bin/gcov-8 --slave /usr/bin/gcov-tool gcov-tool /usr/bin/gcov-tool-8 --slave /usr/bin/gcc-ar gcc-ar /usr/bin/gcc-ar-8 --slave /usr/bin/gcc-nm gcc-nm /usr/bin/gcc-nm-8 --slave /usr/bin/gcc-ranlib gcc-ranlib /usr/bin/gcc-ranlib-8 sudo update-alternatives --config gcc  6. And change the conf/local.conf from openjdk-7 -> openjdk-8: PREFERRED_PROVIDER_java2-runtime = " openjdk-8-jre" IMAGE_INSTALL_append = " openjdk-8 " 
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Q: how to do PCIe compliance measurement on the Sabre SDB? Phase Jitter on the PCIe reference clock had been see problem. Pin C7  "CLK1_N" and Pin D7 "CLK1_P"  were used like on the Sabre SD. During Compliance meassurments  margin of -80% and more.... was seen. Is there a known issue? Has someone done a similar compliance measurement on the Sabre SDB? A: The PCIe TX compliance tests on i.MX6 SD boards in TK's Open Lab.  Based on the internal PLL clock, i.MX6 SD boards pass the PCIe TX compliance tests. 1, please check the capacitor on NVCC_PLL_OUT, it should no less than 10uF, 22uF is better. 2, please check if the 24MHz input crystal is good enough. 50ppm is required. 3, please check the test step: 1.1     TX Test Configuration and Procedures Overview of Test Steps 1.      Integrate the patch for PCIE test to mainline, recompile the Kernel , and replace the old image of the board under test. ·         Make sure the following configuration has been set, when re-compiling the kernel image. # MX6 Options: # CONFIG_IMX_PCIE=y 2.      Correctly set up the test environment: ·         Connect the compliance load board (CLB x1/x16) revision 2.0 into the slot of DUT, and change the switch and jumpers to select x1 . ·         Connect the lane under test to oscilloscope via differential probe and matched coaxial , do remember that cable calibration should be done before test. ·         Connect the clock signal to the oscilloscope. The clock must have SSC enabled or disabled to be consistent with settings for the system during normal operation. ·         Power on the system. 3.      After I.MX6x enters Polling.Compliance , press the Toggle Button on CLB to select the output , make sure the data waveform is compliance pattern, 5.0GT/s for GEN2, 2.5GT/s for GEN1. 4.      Follow the Oscilloscope operation instruction, set it to the right mode. 5.      Capture and save at least 1 million * 200 ps of data and clock simultaneously at the sample rate of 50GS/s for GEN2, or 250,000 UI * 400 ps of data at the sample rate of 25GS/s for GEN1. 6.      Run free software Sigtest to analyze the PCIE TX signal. 7.      Customer could adjust the parameters of the PCIE_PHY by changing IOMUXC_GPR8 register settings to get the test past. a.       The default of this Register is configured as: imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8); b.      write the Register, Address: 20E_0000h base + 20h offset = 20E_0020h; command: /unit_tests/memtool -32 0x020e0020= FFFD4000 This document was generated from the following discussion: i.Mx6 PCIe compliance
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Connectivity - Using a Bluetooth Dongle Network Connection A simple way to set up a network connection using a Bluetooth dongle is using the Personal Area Networking (PAN) profile. Load the following modules on i.MX platform: # modprobe ehci-hcd # modprobe hci_usb # modprobe bnep Set hci0 up: # hciconfig hci0 up Check if the hci0 is set by typing: root@freescale ~$ hciconfig hci0:  Type: USB         BD Address: 00:1E:58:3F:4D:09 ACL MTU: 384:8 SCO MTU: 64:8         UP RUNNING PSCAN ISCAN         RX bytes:4813491 acl:53228 sco:0 events:208901 errors:0         TX bytes:156025160 acl:410140 sco:0 commands:83 errors:0 root@freescale ~$ hciconfig hci0 piscan Start the Bluetooth service: root@freescale ~$ /etc/rc.d/init.d/bluetooth start Start the pand service as Pan User (PANU): root@freescale ~$ pand -s -r PANU On Host (PC), load bnep module: $ modprobe bnep Start the pand service as Group Ad-hoc Network (GN): $ sudo pand --connect 00:1E:58:3F:4D:09 --service GN -n The target address (in this case 00:1E:58:3F:4D:09) can be found using hciconfig command on target A BNEP0 network should be created on host (PC) and target (i.MX): Configure BNEP0 IP on PC: $ sudo ifconfig bnep0 192.168.0.11 Configure BNEP0 IP on i.MX: $ ifconfig bnep0 192.168.0.10 Now the PAN network is set. You can test using ping: root@freescale ~$ ping 192.168.0.11 PING 192.168.0.11 (192.168.0.11): 56 data bytes 64 bytes from 192.168.0.11: icmp_seq=0 ttl=64 time=12.305 ms 64 bytes from 192.168.0.11: icmp_seq=1 ttl=64 time=27.782 ms 64 bytes from 192.168.0.11: icmp_seq=2 ttl=64 time=16.701 ms 64 bytes from 192.168.0.11: icmp_seq=3 ttl=64 time=36.732 ms 192.168.0.11 ping statistics --- 4 packets transmitted, 4 packets received, 0% packet loss round-trip min/avg/max/stddev = 12.305/23.380/36.732/9.551 ms
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-342837 
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The i.MX6SX series of applications processors are powered by two asymmetrical cores: one ARM Cortex-A9 and one Cortex-M4. It allows the coexistence of real-time and non-real-time applications on the same processor (M4 core running an RTOS, and A9 core running Linux or Android). This document will explain how to compile and download a customized MQX application to the QSPI Flash of the IMX6SX-SDB board using a Ubuntu host. The example application will be connecting a 16x2 LCD to GPIO pins of the i.MX6SX. As the IMX6SX-SDB board doesn’t have GPIO header, we will use the pins from SD3 socket, so, it will be required to add the proper pin definitions to the MQX BSP. First of all, the Yocto image will be used as base to boot the A9 core (BSP L3.14.28_1.0.0), because it is the main core and the M4 core will be held on reset until the A9 removes the reset from it. The Yocto image includes many device tree files on the FAT partition, and the default DTB doesn’t consider the existence of the M4 core (only required when Linux applications would consider the M4 core as a resource), so, for changing the DTB file, launch the following command on U-Boot: => setenv fdt_file imx6sx-sdb-m4.dtb We are going to download and uncompress MQX 4.1 for i.MX6SX (Linux hosted) from the following link: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MQX In this example, GCC compiler for ARM will be used, so, download and uncompress gcc-arm-none-eabi-4_8-2014q1 from the link below: https://launchpad.net/gcc-arm-embedded/+download Additional Linux commands consider that MQX and GCC were uncompressed on /home/user folder. In order to avoid compiler error, it will be required to set a couple of environments variables: $ export TOOLCHAIN_ROOTDIR=/home/user/gcc-arm-none-eabi-4_8-2014q1 $ export PATH=$PATH:/home/user/gcc-arm-none-eabi-4_8-2014q1/bin/ Before building any MQX example applications, it is required to build MQX libraries (included BSP and PSP), so, navigate to the next folders and launch the build script in each of them: $ cd /home/user/ Freescale_MQX_4.1.0_i.MX_6SoloX /mqx/build/make/bsp_imx6sx_sdb_m4/ $ ./build_gcc_arm.sh $ cd /home/user/ Freescale_MQX_4.1.0_i.MX_6SoloX /mqx/build/make/psp_imx6sx_sdb_m4/ $ ./build_gcc_arm.sh Now we can compile the example applications like the GPIO demo (that will be used as base for our customized application): /home/user/Freescale_MQX_4.1.0_i.MX_6SoloX/mqx/examples/gpio/ Our example application will configure the 6 pins of the SD3 socket (LWGPIO_PIN_SD3_DATA0, LWGPIO_PIN_SD3_DATA1, LWGPIO_PIN_SD3_DATA2, LWGPIO_PIN_SD3_DATA3, LWGPIO_PIN_SD3_CMD, LWGPIO_PIN_SD3_CLK) for using them by the M4 core on MQX; so, it will be required to add the proper definitions on the board’s header file for each pin (in this case, “imx6sx_sdb_m4.h”). The following corresponds to the LWGPIO_PIN_SD3_DATA0 pin (we are naming them as “SD2GPIO0 – SD2GPIO5”): #define BSP_SD2GPIO0_PROMPT         "SD2GPIO0" #define BSP_SD2GPIO0                (LWGPIO_PIN_SD3_DATA0) #define BSP_SD2GPIO0_MUX_GPIO       (LWGPIO_MUX_SD3_DATA0_GPIO) #define BSP_SD2GPIO0_MUX_IRQ        (LWGPIO_MUX_SD3_DATA0_GPIO) As this file is part of the BSP, it will be required to recompile the BSP after applying these modifications. The modified header file could be found on the attachments of this document. Now, we are going to copy the entire folder of the “gpio” example to the same location, and we will rename it as “sd2gpio”. Inside such folder, we should also rename the “gpio.c” file to “sd2gpio.c”. Besides, it is required to edit the “Makefile” file in order to redirect the included paths to the new folder. It is basically done on the following two lines: NAME = sd2gpio SOURCES += $(MQX_ROOTDIR)/mqx/examples/sd2gpio/sd2gpio.c The modified “Makefile” file is also available on the attachments. The “sd2gpio.c” file includes the main MQX task that will initialize the LWGPIOs using the definitions declared on the board’s header file. It also includes the functions used by the 16x2 LCD driver. This file is also included on the attachments of this thread. With all the modifications done and the BSP recompiled, we can now compile our customized application by launching the command: $ ./build_gcc_arm.sh Located on the following path: /home/user/Freescale_MQX_4.1.0_i.MX_6SoloX/mqx/examples/gpio/build/make/ gpio_imx6sx_sdb_m4/ The output file (an ELF file) will be located at the following path: /home/user/Freescale_MQX_4.1.0_i.MX_6SoloX/mqx/examples/gpio/build/make/ gpio_imx6sx_sdb_m4/cd gcc_arm/extflash_debug/ Now, we are going to move to this folder, and launching the following command to convert the ELF file to a BIN file. It is required because we will flash the QSPI Flash using the A9 core, and the symbols data of the ELF file is not required (actually, the flashing applications looks for “m4_qspi.bin” file): $ arm-none-eabi-objcopy -O binary sd2gpio_imx6sx_sdb_m4.elf m4_qspi.bin Next, copy the BIN file to the FAT partition of the SD card (considering it is mounted over /media/ 😞 $ cp m4_qspi.bin /media/Boot\ imx6sx/ && sync Now we will place the SD card on the SDB board and boot it. Stop the boot process on U-Boot and launch the following command for flashing the QSPI Flash from the BIN file: => run update_m4_from_sd Finally, start the MQX application by releasing the reset of the M4 by launching the following command: => run m4boot The figure below shows the LCD with the application working: Additional tests: If you want to run the M4 application out of reset you could modify the environment variable ‘bootcmd’. For displaying the default variable value, launch the following command: => printenv bootcmd So, for just removing the reset from M4 core without booting Linux, launch the command below: => setenv bootcmd=‘run m4boot’ If you want to avoid the count-down delay (for a faster boot), you could try the following command: => setenv bootdelay 0 Finally, if Linux is also boots after the M4, it will change some clock settings, and also mounts the SD3 driver, so, the pin configurations will be overrode. In order to avoid clock issues on the M4, add to boot parameters ‘uart_from_osc' like command below: => setenv mmcargs 'setenv bootargs no_console_suspend clk_ignore_unused uart_from_osc console=${console},${baudrate} root=${mmcroot}' Don’t forget to save the environment after changing environments variables and then, reboot: => saveenv
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Overview The purpose of this document is to provide the patches to fix display mess issue in TextView based on MX6 Android R13.4-GA and R13.4.1 ICS release. Please note these patches are only validated basically for dedicated issues. If you find any side effect with these patches, please add the comments into this document. Issue Description Software: R13.4-GA or R13.4.1 Android releases Hardware: i.MX6Dual/Quad SabreSD board or i.MX6DualLite SabreSD board. Test steps: Install testviewtest.apk Run this APK and key in the text, you will see the text display mess after key in more texts. You can also get the issue descriptions from https://community.freescale.com/thread/303194 Patches You can get the patches from attached textview_fix.zip. For R13.4-GA, please apply the following patches: kernel_imx, unzip Kernel/r13.4-ga/kernel-patch-r13.4-ga-gpu4.6.9p10.tar.gz and apply the patches. device/fsl-proprietary/gpu-viv: unzip gpu_lib/gpu-viv-lib-4.6.9p10-font-libGAL-crash-fix.tar.gz and replace lib folder. For R13.4.1, please apply the following patches: kernel_imx, Apply the patch Kernel/r13.4.1/0001-upgrade-gpu-4.6.9p10-kernel-driver_r13.4.1.patc device/fsl-proprietary/gpu-viv: unzip gpu_lib/gpu-viv-lib-4.6.9p10-font-libGAL-crash-fix.tar.gz and replace lib folder.
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i.MX28 GPIO pins only support the following IRQ types: IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and IRQ_TYPE_LEVEL_LOW. IRQ_TYPE_EDGE_BOTH is not supported. It application requires interrupt on both rising and falling edges, software can set the IRQ type to level trigger and set the polarity in reverse to the current GPIO input level. Below is the example. value = gpio_get_value(pdata->id_gpio) ? 1 : 0; if (value)     set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_LOW); else     set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_HIGH); ... When GPIO input value is low, set the IRQ type to IRQ_TYPE_LEVEL_HIGH. When the GPIO input value is high, set the IRQ type to IRQ_TYPE_LEVEL_LOW. Do the same checking in the GPIO IRQ handler. In this way, interrupts on both edges can be captured. This document was generated from the following discussion: i.MX28: GPIO interrupt on both rising and falling edges
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The i.MX6 DL/S L3.035_3.0.4 patch release is now available onwww.freescale.com ·         Files available # Name Description 1 L3.0.35_3.0.4_TEMP_PATCH This patch release is based on the i.MX 6DualLite/6Solo   Linux L3.0.35_3.0.0 release. The purpose of this patch release is fix the   miscalibration issue for the thermal sensor.
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Question: How do I add the opencore amrnb plugin to be the default for amrnb for use with playbin2? With a .3gp file to play and audio amrnb encoded, amr plugins do not work ( i.e. are not even part of the build and when configured to build, they do not even build ). Opencore had been added and got it to build and install with our ltib BSP and it plays the audio from the .3gp file in question fine ( but with an explicit pipeline ). But, the opencore amrnb plugin is not selected by gstreamer playbin2 when it does a typefind on the amrnb audio type. Answer: There are three options: 1. Fix the aiurdemux to allow correct demuxing 2. Lower the aiurdemux rank 3. Remove the /usr/lib/gstreamer-0.10/libmfw_gst_aiur_demux.so Obviously, 3 is a ugly hack but it can be just enough for customer. If option 1 or is selected, patches may be required from MM team. On this system, the aiurdemux does not have any issue, and audio playback works as expected. These are the VPU firmware and GST-FSL versions on YOCTO: VPU Version: firmware 1.4.50; libvpu: 5.3.2 MFW_GST_VPU_DECODER_PLUGIN 3.0.8 build on Sep 30 2013 16:36:27. where in LTIB: VPU Version: firmware 1.4.48; libvpu: 5.3.2 MFW_GST_VPU_DECODER_PLUGIN 2.0.3 build on Jul 23 2013 11:20:21. So the next moved would be to try upgrading versions on LTIB if they want to use this system; in case switching to Yocto is viable, then the upgrade is already done.
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