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Background Configure Trace32 Attach to SCFW with Lauterbach Snooping Perf Examples Example 1 : Snoop a function call (or a variable) Example 2: MonitorFrame Per Second Example 3: Monitor Frame Per Second and rendering size Background None of my automotive have trace pins on their board. Trace is consequently not possible. Anyway you can do "Snooping" with your Lauterbach JTAG probe. Snooping just send data as fast as possible. In the following example I will Snoop the i.MX8X' SCFW, notice I do not have the sources (except board.c) but I have the elf file (thus I have debug info with functions names for instance). Notice Snooping is available on all MCU/MPU with JTAG.   In my case I used it for the first time in 2015 on Vybrid, our first heterogeneous dual core (Cortex-A5 & Cortex-M4) with no XRDC... My customer has sent the final product with a JTAG connector and flashed SW product to me. I had a laconic comment: "software is done all around the world in UK, India and the US, when we flash all the software the Vybrid Reset for some version, we don't have the sources for this specific software we have flashed in this product. Good Luck". In this case snooping on both core at the same time was the only solution for me... At the end I have discovered (thanks to the last PC addresses before the crash) the cortex-A5 was deconfiguring a pin of the QSPI flash interface on which the M4 was eXecuting In Place (XiP). Configure Trace32 When your Trace32 is open, CPU>>System Settings... menu and configure the JtagClock as fast as possible (here 40MHz) to have fast data streaming: go in Trace>>Configuration menu Select "SNOOPer" Select to stream the Pointer Counter thus select the mode "PC" Pass to State to "Arm" You can increase also the SIZE of the buffer Launch your code: Attach to SCFW with Lauterbach In Trace32, CPU>>System Settings, chose IMX8QXP-SCU: And then do an "Attach": Then yu should see your SCU core running: Snooping And break your code, your "used" field " should be filled: Open Trace>>List>>Default Click on "Chart" On the trace list you can see the sampling rate: around 48µs in our case. It means you may (almost) not see functions lasting less than 48µs (depends when it is sampled), or you'll see it sometimes. But for performance analysis it can be useful to see which function is too slow (rather then instrument the code), but as I mentioned in my case function has to last more than 48µs! Perf You can also get Performance analysis. But keep in mind if your function is faster than 48µs in my case, the result will not be accurate! Go in Perf>>Perf Configuration (it can also be done un real time with Perf>>Perf List Dynamic)... and select "Snoop": Then put the State in "Arm" and click on "List" to open the "List Window" Launch your code and stop it. In the "List" window you'll see all the function ranked according to their usage occurrence (my SCFW is almost always in sleep!) Examples Example 1 : Snoop a function call (or a variable) With Snooping you cannot trace a function calls. To do that I add a global variable in the function. You'll have a little overhead due to that. I will use an i.MXRT1170 with the SDK 2.6.1. I have built the Tiger example (vglite). April 4th 2020: i.MXRT1170 is not public, meaning not officially supported by Lauterbach. Please follow the instruction in my SharePoint folder (if the link disappears, it may signify i.MXRT1170 is supported) to add support of the i.MXRT1170. https://nxp1-my.sharepoint.com/:f:/g/personal/vincent_aubineau_nxp_com/Ej8ID8mXaNZPnVgTWgYgqHQBzR0XcE0K4sl1WusR3UMBnw?e=…  I want to know the framerate. To do that I have to monitor the redraw() calls. What I do, is I put the "n" variable as global. Trace>>Configuration ... Chose "memory" and "changes" (to log only when the variable is changing): Then then click on select... and "i" Search for "n" variable and select it: Launch your software and then do a break. Click on "List": You have the list of your function call (as you can see it is not always the same), in the "ti. call" you have the duration between 2 call (keep in mind the function must not be called at high frequency: If you click on "draw", you can display the variable values (click on  to scale it): Example 2: Monitor Frame Per Second I can also monitor the fps if I pass "time" variable global: And you can have a reprensentation of you fps (notive I have unchecked "Changes" to have an easy to intrepret curve Example 3: Monitor Frame Per Second and rendering size Results often depends of several variables. If you display 2 variables on 1 display window, if the 2 variable does not have the same range, it is not easy to observe. The best solution I have found in this case is to have 2 "Draw" Windows. Add the 2 variables in the "SElect" field ("time" and "ScaleCount", beware, it is case sensitive). Launch your code, and stop it after a while. Then right click on the "time" and "ScaleCount" variable in your code to display 2 "Draw" window: Thus you have 2 "Draw" windows, and you see FPS depends on rendering size... logical!  
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(   converted from discussion created by Alfred Latypov   IMX6 PCI with external cloks  )    Hello, I had a problem, to launch a board with an imx6 solo processor with a pci-express, and with external clock. I'll tell you my decision. On my motherboard there is a pci-switch PI7C9X2G606 from Pericom with 4 endpoints of Intel type 82574 ethernet controller. I used the Linux kernel version 4.9.16 In the device-tree file, I used the following options to enable external clocks for CLK1 input gate (100MHz). Sorry, I had to change the root imx6 device tree file. See attached (imx6*.dtsi) files. From ..kernel/arch/arm/boot/dts/.. Add anatop external clock source for clocks section, and change clk source for pcie-phy. ... anaclk1 {             compatible = "fixed-clock";             reg = <0>;             #clock-cells = <0>;             clock-frequency = <100000000>;  /* 100MHz */         }; ... Change pcie section ...         pcie: pcie@0x01000000 {             compatible = "fsl,imx6q-pcie", "snps,dw-pcie";             reg = <0x01ffc000 0x04000>,                   <0x01f00000 0x80000>;             reg-names = "dbi", "config";             #address-cells = <3>;             #size-cells = <2>;             device_type = "pci";             ranges = <0x81000000 0 0          0x01e00000 0 0x00100000 /* downstream I/O */                   0x82000000 0 0x01000000 0x01000000 0 0x00e00000>; /* non-prefetchable memory */             /* ranges = <0x81000000 0 0          0x01f80000 0 0x00010000                   0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; */             num-lanes = <1>;             interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;             interrupt-names = "msi";             #interrupt-cells = <1>;             interrupt-map-mask = <0 0 0 0x7>;             interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;             clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,                  <&clks IMX6QDL_CLK_LVDS1_IN>,                  <&clks IMX6QDL_CLK_SATA_REF_100M>;             clock-names = "pcie", "pcie_bus", "pcie_phy";             status = "disabled";         }; ... and add new source clocks dependencies: .... &clks {         assigned-clocks = <&clks IMX6QDL_PLL6_BYPASS_SRC>,                           <&clks IMX6QDL_PLL6_BYPASS>;                                   assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS1_IN>,                                  <&clks IMX6QDL_PLL6_BYPASS_SRC>;         assigned-clock-rates = <100000000>, <100000000>; }; .... for your board dtsi. I could not start the pcie-bus with the function Gen2. Next, I needed to change the bus driver (pci-imx6.c), for fine tuning the bus clock frequency. I add MPLL frequency services functions (Thanks for Charle Powe i.MX6Q: Using an external reference for PCIe 😞 ... static void imx_pcie_override_phy_mpll(struct pcie_port *pp, u32 mpll_multiplier, u32 ref_clkdiv2) {     u32 ref_usb2_en;     u32 reg1;               pr_info("Overriding PCIe PHY MPLL config: multiplier = %d, clkdiv2 = %d\n",         mpll_multiplier, ref_clkdiv2);                   // set MPLL to disabled     ////pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0001);          // set MPLL multiplier         pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO,             (0x0001<<9 | (mpll_multiplier<<2)) & 0x03fc);          /*      * set the ref_clkdiv2.  when this override is enabled it      * overrides both ref_clkdiv2 and ref_usb2_en.  make sure      * the overriden ref_usb2_en reflects the original value.      */          pcie_phy_read(pp->dbi_base, PCIE_PHY_ATEOVRD, &reg1);          ref_usb2_en = (reg1 >> 1) & 0x1;        /* set the current value of ref_usb2_en as the override */          /* set the ref_clkdiv2 override  */          /* enable the ref_clkdiv2 override */          pcie_phy_write(pp->dbi_base, PCIE_PHY_ATEOVRD,             (ref_usb2_en << 1) | ref_clkdiv2 | (0x1 << 2));             /* enable MPLL */         ///pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0003);          } ... call this function in pcie_hos_init ... static void imx6_pcie_host_init(struct pcie_port *pp) {     imx6_pcie_assert_core_reset(pp);            imx6_pcie_init_phy(pp);            imx6_pcie_deassert_core_reset(pp);        imx_pcie_override_phy_mpll(pp, 50, 1); /* tune this */          dw_pcie_setup_rc(pp);     imx6_pcie_establish_link(pp);      if (IS_ENABLED(CONFIG_PCI_MSI))         dw_pcie_msi_init(pp); } ... See documentation for p.p. IMX6DLRM 50.5.1.2. Tune <pci_hotplug_mem_size> global variable for optimal pci window sizes enumeration. See for my imx6_add_pcie_port call. If you use a FEC module, it will stop working. You must use an external clock as specified in the documentation (http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf ). Changes are shown in the attached dtsi file. For clocks segment ... rmii_clk: clock@0 {             compatible = "fixed-clock";             reg = <0>;             #clock-cells = <0>;             clock-frequency = <50000000>;  /* 50MHz */         }; ... and for fec: ... fec: ethernet@02188000 {                 compatible = "fsl,imx6q-fec";                 reg = <0x02188000 0x4000>;                 interrupts-extended =                     <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,                     <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;                 clocks = <&clks IMX6QDL_CLK_ENET>,                      <&clks IMX6QDL_CLK_ENET>,                      <&rmii_clk>;                 clock-names = "ipg", "ahb", "ptp";                 status = "disabled";             }; ... If they are not required, disable this editing this file. Thanks for all. Sorry for my bad English. Alfred <[email protected]> This document was generated from the following discussion: IMX6 PCI with external cloks
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When to improve kernel booting using hibernation [1], I found kernel initialized each component [2] took too much time. One solution is to remove unnecessary module to save time. Another approach is to delay those modules until user space up. Then it won’t lost some features just because hopes to gain benefit on booting speed. This is very useful since hibernation’s trigger point is at the late_initcall [3]. Kernel doesn't need do much module initialize since hibernate will restore those module status later. The detailed implementation is in the attached patch. [1]: hibernation is a technique to store system memory content to storage. Then the device can be shutdown and read the content back after power on. [2]: component means subsystem or driver. [3]: Consult kernel/power/hibernate.c, software_resume
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The default BSP release supports sii902x hdmi card via LCDIF in i.MX6 Solo, but doesn't support it via IPU display interface in i.MX6 Dual/Quad/Plus. The patch provides support for the Sii902x HDMI video driver for i.MX6 Dual/Quad/Plus. Useful documents: MCIMXHDMICARD: Schematic for sii902x hdmi card MCIMX6Q-SMART DEVICE PLATFORM: Schematic for i.MX6 Quad Sabre SDP Software version: Linux 3.14.52_1.1.0-ga Verified platform: imx6q-sabresd imx6qp-sabresd Patch: 0001-video-mxc-sii902x-add-sii902x-hdmi-card-driver.patch 0002-arch-arm-boot-dts-add-sii902x-hdmi-card-devicetree-n.patch Features: Support video mode setup via uboot command; Support video mode setup via device tree; Supprt HDMI hot-plug; Support many video modes and a dynamic switching between them; Notes: The default settings( don't add "video=" to bootcmd) are as follows: ---------------------------------------------------------------------------------------- ------------ /sys/class/graphics/fb0 DISP4 BG - DI1 U:1024x768p-60 ldb 2-layer-fb-bg ------------ /sys/class/graphics/fb1 DISP4 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb2 DISP3 BG - DI1 U:1920x1080p-60 hdmi 2-layer-fb-bg ------------ /sys/class/graphics/fb3 DISP3 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb4 DISP3 BG sii902x_hdmi 1-layer-fb ------------ /sys/class/graphics/fb5 DISP4 BG --------------------------------------------------------------------------------------- If you want sii902x_hdmi to be fb0, you can add following arguments to bootcmd: video=mxcfb0:dev=sii902x_hdmi,1920x1080M@60,if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb2:off consoleblank=0 Risks: Sometimes the sii902x will fail to read hdmi edid information, and the modelist of this framebuffer will be NULL. At this time, the driver will setup a default video mode which has been tuned  on imx6q-sabresd and imx6qp-sabresd. The default video mode is as follows: /* 1080p @ 56 Hz */ 60, 1920, 1080, 7692, 100, 40, 30, 3, 10, 2, 0, FB_VMODE_NONINTERLACED, 0 The user can modify this default setting for their case. Specially, there are some risks to use 1080p@60 video mode for imx6qp-sabresd. The hdmi device will has no valid hdmi signal output in this case. For example, /* 1080p @ 60 Hz */ 60, 1920, 1080, 6734, 148, 88, 36, 4, 44, 4, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 The user sholud set these values according to hareware parameters.
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Hi All, The new Android JB4.3_1.1.0-GA release is now available on www.freescale.com ·         Files available           Name Description IMX6_JB43_110_ANDROID_DOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0 BSP Documentation. Includes Release Notes, User's Guide, QSG and   FAQ Sheet. IMX6_JB43_110_ANDROID_SOURCE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0 BSP, Documentation and Source Code for BSP and Codecs. IMX6_JB43_110_ANDROID_DEMO_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0  BSP Binary Demo Files IMX6_JB43_110_AACP_CODEC_CODA AAC   Plus Codec for i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX   6Sololite Android jb4.3_1.1.0 ·         Target HW boards o   i.MX6DL  SABRE SD board o   i.MX6Q  SABRE SD board o   i.MX6DQ SABRE AI board o   i.MX6DL SABRE AI board o   i.MX6SL EVK board ·         Release Description i.MX Android jb4.3_1.1.0 release includes all necessary codes, documents and tools to assist users in building and running Android 4.3 on the i.MX 6Quad, i.MX 6DualLite and i.MX6SoloLite hardware board from the scratch. The prebuilt images are also included for a quick trial on Freescale i.MX 6Quad and i.MX 6DualLite SABRE-SD Board and Platform, i.MX 6Quad and i.MX 6DualLite SABRE-AI Board and Platforms and i.MX6SoloLite EVK Board and Platforms. This release includes all Freescale porting and enhancements based on Android open source code. Most of deliveries in this release are provided in source code with the exception of some proprietary modules/libraries from third parties. ·         What's in this release         Android Source Code Patch All   Freescale i.MX specific patches (apply to Google Android repo)   to enable Android on i.MX based boards. For example Hardware   Abstraction Layer implementation, hardware codec acceleration,   etc. Packed in   android_jb4.3_1.1.0-ga_source.tar.gz Documents The   following documents are included in android_jb4.3_1.1.0-ga_docs.tar.gz: ●   i.MX Android jb4.3_1.1.0-ga Quick Start: A   manual explains how to run android on i.MX board by using prebuilt images. ●   i.MX Android jb4.3_1.1.0-ga User Guide: A   detailed manual for this release package. ●   i.MX Android jb4.3_1.1.0-ga FAQ: A document lists   “Frequently Asked Questions”. ●   i.MX Android Codec Release Notes: A   document to describes the Freescale Codec Package ●   i.MX Android Wi-FI Display Sink API Introduction A   document to describes how to use i.MX Android Wi-Fi Display Sink API ●   i.MX6 G2D API User Guide document to introduce how to use i.MX6 G2D API for   2D BLT usage ●   i.MX Android jb4.3_1.1.0-ga Release Note A   document to introduce the key updates and known issues in this release. Tools Tools   in android_jb4.3_1.1.0-ga_tools.tar.gz ●  MFGTool. Manufacturing tools for i.MX platform ●  USB tethering windows .inf driver configure file.tool/tetherxp.inf Prebuilt Images You   can test Android on i.MX with prebuilt image on i.MX board before building   any code. ● android_jb4.3_1.1.0-ga_image_6qsabresd.tar.gz: Prebuilt   images for the SABRE-SD board. ●  android_jb4.3_1.1.0-ga_image_6qsabreauto.tar.gz: Prebuilt   images for the SABRE-AI board. ●  android_jb4.3_1.1.0-ga_image_6slevk.tar.gz: Prebuilt images for the 6SL   SABRE-AI board. All   prebuilt images are in another package. See "i.MX Android jb4.3_1.1.0-ga   Quick Start" and "i.MX Android jb4.3_1.1.0-ga User Guide" to   understand which image should be used in which case. ·         Known issues For known issues and limitations please consult the release notes
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When I am planing to develop some features in Uboot, I found it has lots limitation without interrupt. For example, to have camera preview in Uboot. Polling in Uboot results non sync when camera preview and hard to keep code simple and clean. I decided to take some time survey interrupt and it is time to share it.   This patch (shown as attachment) is to enable the interrupt. It also has the sample code to set GPIO interrupt as well. The test below showed Uboot can get the interrupt when pressing Volume up key. Special thanks for Anson Huang for patient discussing with me on this.   irqinfo is the command to enable Volume up interrupt. The log do_irq is print when Uboot got the interrupt.   Original Attachment has been moved to: 0001-Enable-interrupt-on-i.MX6Q-SabreSD.patch.zip
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Getting started with Linux on the i.MX53QSB
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Issue: During DDR3 Burst Write, the DQS strobe signal must be driven low for a minimum of 0.3 x cycle period on the last data clock cycle before it is released. This ensures sufficient time for the write to be strobed correctly. When measuring this timing parameter, it has often been found to be too short. This may be contributing to write errors on customer boards, depending on the signal layout used by the board. Root Cause: The internal DQS strobe enable signal is controlled by the MMDC, which is tied to the SDCLK clock signal. But the DQS strobe signal can be delayed in the MMDC to match different SDCLK trace lengths by using Write Leveling parameters to ensure the the DQS strobe edge reaches the DDR3 device at the same time the SDCLK edges reaches the device. If the write level delay is too long, the MMDC can crop the end of the DQS strobe signal too short, causing a violation of the Write Post Amble Delay timing specification and potentially leading to  write errors. How much delay in the Write Leveling parameter would cause this problem? The Reference Manual states that a delay around half a cycle may cause problems, but testing on some boards indicates that delays even as short as 1/4 a cycle could cause violations of the Write Post Amble Delay. Solution: The MMDC was designed with the ability to add extra time to the strobe enable period during write procedures. This parameter is referred to as Write Additional Latency. It is found in the MMDCx_MDMISC register and the field is labeled as WALAT. Incrementing the value of this register field by one adds a full clock cycle delay to the Write Post Amble period, and ensures enough time at the end of a burst write to guarantee a correct write. There is no maximum value to Write Post Amble Delay. Setting WALAT = 1 (or larger if WL parameters are larger) will cause a small hit in overall performance, but will add to the reliability of write operations, particularly on boards that require larger WL parameter settings.
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Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response.   These are the detailed programming aids for the registers associated with DRAM initialization (DDR3 and LPDDR2) of the MX6DQP (also known as Rev 2 or Dual/Quad Plus), and covers the Sabre_SD boards and DDR3 based Auto Infotainment board. The last work sheet tab in the tool formats the register settings for use with the ARM RealView debugger (.inc) and the DDR Stress Test. It can be manually converted, by the user, to the DS5 .ds format or to a DCD file format used by uboot or other. The programming aids were developed based on NXP development boards and can be customized by the user for their board design. This tool serves as an aid to assist with programming the DDR interface of the MX6DQP and is based on the DDR initialization scripts developed by the R&D team and no guarantees are made by this tool. The following are some general notes regarding this tool: • Refer to the "How To Use" tab in the tool as a starting point to use this tool. • This tool may be updated on an as-needed basis for bug fixes or future improvements.  There is no schedule for aforementioned maintenance. • The MX6DQP adds a new third party IP called the NoC. The programming for these registers are automatically updated in the tool given a set of user input MMDC parameters and should not be modified manually.
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This is a simple document for recording some known-how and tips for building up the Windows 10 IoT development environment for i.MX platform. It can only be used as a complement for official document in BSP package (Guide/Release Note/etc.). Applicable for: Windows 10 IoT, i.MX BSP v1.4.1 (date to Nov/2023) Please refer to the PDF attached.
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Hardware:​  Soc: NXP i.MX 93 11x11 EVK FPGA:​ Lattice ECP5 Evaluation Board winteri_wang_0-1730257820139.jpg   Deploy the driver of FlexSPI and Test​​ Apply below patch into Linux kernel and compile. (6.1.55-2.2.0 is tested)​ git apply 0001-Added-flexspi-fpga-module-support-of-i.MX93.patch​ make imx_v8_defconfig​ make –j8​ Copy the generated imx93-11x11-evk-flexspi-m2-fpga.dtb to the boot partition​ Set the dtb in uboot​ setenv fdtfile imx93-11x11-evk-flexspi-m2-fpga.dtb ​ saveenv​ boot​ Copy the generated imx93_flexspi_fpga.ko and the test app source file flexspi_fpga_latency_test.c to home directory Run blow command to do the test​ gcc flexspi_fpga_latency_test.c​ ./a.out 128​ ​ winteri_wang_1-1730258385765.jpg About driver and test app​ ​The driver can be installed in test app automatically. Insmod command is called in test app as below.​ insmod imx93_flexspi_fpga.ko mux=1 div=30​ The parameter mux can be set to 0,1,2,3. Means 24MHz, 1000MHz, 800MHz, 625MHz root clock. And div is the divider. In default, 1000/30 = 33MHz is applied. More details of hardware connection: Since the adapter board is not on NXP website and it is just for test, there are two options. Use fly-wire to connect flexspi and lattice fpga instead of the adapter card. Use M.2 adapter card but need be produced by customer themselves.  If M.2 adapter is not used, fly-wire can be applied to connect i.MX93 to FPGA. The column of Pads is a pad list that can bring out signal lines from the bottom layer of i.MX93 EVK. i.MX 93 Pads of imx93 FPGA ECP5 SD3_CLK TP912 B10 SD3_CMD TP913 A9 SD3_DATA0 TP914 D8 SD3_DATA1 TP915 E8 SD3_DATA2 TP916 C7 SD3_DATA3 TP917 C6 GND   GND J1003-2 1V8   VCCIO0 Remove JP10 Jumper   winteri_wang_0-1742217018655.jpeg It is also possible that the customer would choose M.2 adapter card solution. The adapter card is simple and cheap. It can be redesigned easily with attached schematic as reference. Make sure the board thickness is 0.8mm. And recommend to apply GND copper to improve signal quality. The schematic is attached. To get the information about the demo from Lattice perspective, please check the link below. Lattice QSPI to NXP MPU Reference Design | Lattice Reference Design  
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From Android 12, NXP use GKI(Generl kernel image) instead of NXP's kernel code.  This follow up Android ASOP standard. This article described that when customer use Android 12 and later version, they need to pay attention on GKI development, which is different with previous version.
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Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. This is a detailed programming aid for the registers associated with MMDC initialization. The last sheet formats the register settings for use with ARM RealView ICE. It can also be used with the windows executable for the DDR Stress Test. This programming aid was used for internal NXP validation boards.
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Quaestion: What does exactly the RNG_TRIM after burning the SRK hash table? There is no such thing on the former i.MX HAB procedure. What would a random generator stuff bring here? Additionnally, there is the possibility to lock the SRK shadow register via an OTP bit. Is it recommeneded to lock it? if not, is it really possible to change the SRK hash value by modofying the shadow register value before performing the SRK hash key check in a HAB boot process? One last question: the PKI requires the user to enter a certificate lifetime. Does that really mean that openssl will refuse generating new signatures once the certificates lifetime is expired? Answer: 1. The intent of the of the RNG_TRIM fuses is for Freescale to essentially extendthe amount of time the RNG4 in CAAM has to generate entropy.  The longer this period the more likely it is that RNG4 will generate entropy that will pass its internal statistical tests.  The reason for the fuses is HAB (in the Closed configuration only) instantiates the RNG by default and needs some external indication on how to progran the RNG4 in CAAM to ensure the internal HW statistical tests will pass.  This was to allow the RNG to be useable by application code after execution has left the ROM.  However this requires that the RNG_TRIM fuse value be fully characterized across numerous conditions temperature, voltage etc.  This effort is still on going.  For customers performing secure boot (in Closed configuration) we recommend they follow Section 6.3 of http://cache.freescale.com/files/32bit/doc/app_note/AN4581.pdf.  In this case the RNG4 can be instantiated by CAAM driver code which can be easily changed if required. 2. Yes, once the SRK hash is provisioned to the SRK_HASH field it is recommended to blow the corresponding SRK_LOCK fuse.  If the SRK_LOCK fuse is not blown then additional fuses in the SRK_HASH field can be blown.  This will cause devices in the closed configuration to fail to boot.  i.e. "bricking" the device. 3. Please see https://community.freescale.com/message/334186#334186 for the answer to your question on the certificate validity period.
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This link contains the scripts, U-boot commands, and patch code shown on the application note AN5409 titled 'i.MX6 Dual/6 Quad Power Consumption Measurement'.
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Q: Q&A: Where to find IBIS Models on the web? A: In the first figure (FSL driving 100 ohm), the processor is DC coupled to a transmission line and terminated at the far end with a 100-ohm resistor. The results look pretty normal for this. In the other figure, the processor is dc coupled to a transmission line, then ac coupled to another transmission line segment (0.1u) with 50-ohm resistors to ground, and then drives the inputs of an HCSL clock buffer. The results are pretty un remarkable. The top red signal in the trace is one of the IMX6 clock outputs, the first green signal is the other clock output, and the last green signal (from top to bottom that is) is the differential signal seen by the clock buffer. The customer is concerned about the asymmetrical drive of the processor. It looks like LVDS clock outputs do not like to be AC coupled. This simulation resembles the way the clock is handled in the Smart Device schematics where the clock is AC coupled to the reference clock inputs on the PCIE connector. The ibis files were downloaded from the web (21x21_imx6q, consumer variant). So a few updates: I had the customer download the latest duallite IBIS models. Previously they were apparently using the quad/dual models. They are going to update HyperLynx and are going to run a simulation and let me know if they still see the same issue. He said he's using "linesim". Meanwhile he noticed a different problem with the duallite/solo IBIS models. Although the datasheet says LVDDR3 (1.35V) is supported, there is no model for DDR3_L either as input or output. The same model existed in the quad/dual models. Do you know why this option is not in the duallite IBIS models? Thanks! A ctm of mine would like to get the IBIS model with LVDDR3 support on the i.MX6 DL. For mx6-duallite IBIS models for DDR3L memory (1.35V). It'd be great if the models matched the quad version. Please find the new updated IBIS file in website. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6DL&nodeId=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab
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  This guide assumes that the developer has knowledge of the V4L2 API and has worked or is familiar with sensor drivers and their operation within the Linux kernel. This guide does not focus on the details of the sensor driver development that you want to port. It is assumed that you already have an existing driver for your sensor, before making the port. The version of the ISP's was 6.6.36 Linux BSP. If a different version is used, it is the developer's responsibility to review the API documentation for the corresponding version, since there may be changes that affect what is indicated in this guide. To port the camera sensor, the following steps must be taken as described in the following sections: Define sensor attributes and create instances. ISS Driver and ISP Media Server. Sensor Calibration Files. VVCAM Driver Creation. Device Tree Modifications. Define Sensor Attributes and Create Instances The following three steps are already implemented in CamDevice and are included for reference only. Step 1: Define the sensor attributes in the IsiSensor_s data structure. Step 2: Define the IsiSensorInstanceConfig_t configuration structure that will be used to create a new sensor instance. Step 3: Call the IsiCreateSensorIss() function to create a new sensor instance. ISS Driver and ISP Media Server Step 0 - Use a driver template as base code: Drivers can be found in $ISP_SOURCES_TOP/units/isi/drv/. For example, the ISP sources, come with the OV4656 and OS08a20 drivers. $ISP_SOURCES_TOP indicates the path of your working directory, where the respective sources are located. Step 1 - Add your <SENSOR> ISS Driver: Create the driver entry for your sensor in the path $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/source/<SENSOR>.c. Change all occurrences of the respective sensor name within the code, for instance, OV4656 -> <SENSOR>, respecting capital letters where applicable. Step 2 - Check the information on the IsiCamDrvConfig_s data structure: Data members defined in this data structure include the sensor ID (CameraDriverID) and the function pointer to the IsiSensor data structure. By using the address of the IsiCamDrvConfig_s structure, the driver can then access the sensor API attached to the function pointer. The following is an example of the structure: /***************************************************************************** * Each sensor driver needs to declare this struct for ISI load *****************************************************************************/ IsiCamDrvConfig_t IsiCamDrvConfig = {     .CameraDriverID = 0x0000,     .pIsiHalQuerySensor = <SENSOR>_IsiHalQuerySensorIss,     .pfIsiGetSensorIss = <SENSOR>_IsiGetSensorIss, };   Important Note: Modify the CameraDriverID according to the chip ID of your sensor. Apply this change to any Chip ID occurrence within the code. Step 3 - Check sensor macro definitions: In case there is any macro definition in the ISS Driver code, which involves specific properties of the sensor, you should modify it according to your requirements. For example: #define <SENSOR>_MIN_GAIN_STEP         (1.0f/16.0f)   Step 4 - Modify ISP Media Server build tools: Changes required in this step include: Add a CMakeLists.txt file in $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/ that builds your sensor module. Modify the CMakeLists.txt located at $ISP_SOURCES_TOP/units/isi/drv/CMakeLists.txt to include and reference your sensor directory. Modify the $ISP_SOURCES_TOP/appshell/ and $ISP_SOURCES_TOP/mediacontrol/ build tools, since by default they refer to the construction of a particular sensor, for example, the OV4656, so it is necessary to change the name of the corresponding sensor. Modify the $ISP_SOURCES_TOP/build-all-isp.sh script to reference the sensor modules and generate the corresponding binaries when building the ISP media server instance.   Step 5 - ISP Media Server run script: You need to add the operation modes defined for your sensor in the script. Each operating mode is associated with an order (mode 0, mode 1 ... mode N), a name used to execute the command in the terminal (e.g <sensor>_custom_mode_1), a resolution, and a specific calibration file for the sensor. The script is located at $ISP_SOURCES_TOP/imx/run.sh .   Step 6 - Sensor<X> config: At $ISP_SOURCES_TOP/units/isi/drv/ you can find the files to configure each sensor entry to the ISP, called Sensor0_Entry.cfg and Sensor1_Entry.cfg. There, the associated calibration files are indicated for each sensor operating mode, including the calibration files in XML format and the Dewarp Unit configuration files in JSON format. In addition, the .drv file generated for your sensor is referenced, creating the association between the respective /dev/video<X> node and the sensor driver module outputted from the ISP Media Server. In case you are using only one ISP channel, just modify Sensor0_Entry.cfg. In case you require both instances of the ISP, you will need to modify both files. Sensor Calibration Files It is a requirement for using the ISP, to have a calibration file in XML format, specific to the sensor you are using and according to the resolution and working mode. To obtain the calibration files in XML format, there are 3 options: Use the NXP ISP tuning tool for this you will need to ask for access or sign a NDA document. Pay NXP professional services to do the tune. Pay a third-party vendor to do the tune   VVCAM Driver Creation The changes indicated below are based on the assumption that there is a functional sensor driver in its base form, and that it is compatible with the V4L2 API. From now on we focus on applying the changes suggested in the NXP documentation, specifically to establish the communication of the VVCAM Driver (kernel side) and the ISI Layer. Step 0 - Create the sensor driver entry: Developers must add the driver code to the file located at $ISP_SOURCES_TOP/vvcam/v4l2/sensor/<sensor>/<sensor>_xxxx.c, along with a Makefile for the sensor driver module. In the same way, as indicated in the ISS Driver section, you can refer to one of the sample drivers that are included as part of the ISP sources, to review details about the implementation of the driver and the structure of the required Makefile.   Step 1 - Add the VVCAM mode info data structure array: This array stores all the supported modes information for your sensor. The ISI layer can get all the modes with the VVSENSORIOC_QUERY command. The following is an example of the structure, please fill in the information using the attributes of your sensor and the modes it supports. #include "vvsensor.h" . . .   static struct vvcam_mode_info_s <sensor>_mode_info[] = {         {         .index = 0,         .width = ... ,         .height = ... ,         .hdr_mode = ... ,         .bit_width = ... ,         .data_compress.enable = ... ,         .bayer_pattern = ... ,         .ae_info = {                        .                        .                        .                        },         .mipi_info = {                        .mipi_lane = ... ,                        },         },         {         .index = 1,         .         .         .         }, }; Step 2 - Define sensor client to i2c : Define the client_to_sensor macro (in case you don't have any already) and check the segments of the driver code that require this macro. #define client_to_<sensor>(client)\         container_of(i2c_get_clientdata(client), struct <sensor>, subdev)   Step 3 - Define the V4L2-subdev IOCTL function: Define and implement the <sensor>_priv_ioctl, which is used to receive the commands and parameters passed down by the user space through ioctl() and control the sensor. long <sensor>_priv_ioctl(struct v4l2_subdev *subdev, unsigned int cmd, void *arg) {         struct i2c_client *client = v4l2_get_subdevdata(subdev);         struct <sensor> *sensor = client_to_<sensor>(client);         struct vvcam_sccb_data_s reg;         uint32_t value = 0;         long ret = 0;           if(!sensor){                return -EINVAL;         }           switch (cmd) {         case VVSENSORIOC_G_CLK: {                ret = custom_implementation();                break;         }         case VIDIOC_QUERYCAP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_QUERY: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_CHIP_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_RESERVE_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_SENSOR_MODE:{                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_SENSOR_MODE: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_STREAM: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_WRITE_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_READ_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_EXP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_POWER:         case VVSENSORIOC_S_CLK:         case VVSENSORIOC_RESET:         case VVSENSORIOC_S_FPS:         case VVSENSORIOC_G_FPS:         case VVSENSORIOC_S_LONG_GAIN:         case VVSENSORIOC_S_GAIN:         case VVSENSORIOC_S_VSGAIN:         case VVSENSORIOC_S_LONG_EXP:         case VVSENSORIOC_S_VSEXP:          case VVSENSORIOC_S_WB:         case VVSENSORIOC_S_BLC:         case VVSENSORIOC_G_EXPAND_CURVE:                break;         default:                break;         }           return ret; }   As you can see in the example, some cases are implemented but others are not. Developers are free to implement the features they consider necessary, as long as a minimum base of operation of the driver is guaranteed (query commands, read and write registers, among others). It is the developer's responsibility to implement each custom function, for each case or scenario that may arise when interacting with the sensor. In addition to what was shown previously, a link must be created to make the ioctl connection with the driver in question. Link your priv_ioctl function on the v4l2_subdev_core_ops struct, as in the example below: static const struct v4l2_subdev_core_ops <sensor>_core_ops = {         .s_power       = v4l2_s_power,         .subscribe_event = v4l2_ctrl_subdev_subscribe_event,         .unsubscribe_event = v4l2_event_subdev_unsubscribe,      // IOCTL link         .ioctl = <sensor>_priv_ioctl, };   Step 4 - Verify your sensor's private data structure: After performing the modifications suggested, it would be a good practice to double-check your sensor's private data structure properties, in case there is one missing, and also check that the properties are initialized correctly on the driver's probe.   Step 5 - Modify VVCAM V4L2 sensor Makefile : At $ISP_SOURCES_TOP/vvcam/v4l2/sensor/Makefile, include your sensor object as follows: ... obj-m += <sensor>/ ... Important Note: There is a very common issue that appears when working with camera sensor drivers in i.MX8MP platforms. The kernel log message shows something similar to the following: mxc-mipi-csi2.<X>: is_entity_link_setup, No remote pad found! The link setup callback is required by the Media Controller when performing the linking process of the media entities involved in the capture process of the camera. Normally, this callback is triggered by the imx8-media-dev driver included as part of the Kernel sources. To make sure that the problem is not related to your sensor driver, verify the link setup callback is already created in the code, and if is not, you can add the following template: /* Function needed by i.MX8MP */ static int <sensor>_camera_link_setup(struct media_entity *entity,                                    const struct media_pad *local,                                    const struct media_pad *remote, u32 flags) {     /* Return always zero */         return 0; }   /* Add the link setup callback to the media entity operations struct */ static const struct media_entity_operations <sensor>_camera_subdev_media_ops = {         .link_setup = <sensor>_camera_link_setup, };     /* Verify the initialization process of the media entity ops in the sensor driver's probe function*/ static int <sensor>_probe(struct i2c_client *client, ...) {         /* Initialize subdev */         sd = &<sensor>->subdev;         sd->dev = &client->dev;         <sensor>->subdev.internal_ops = ...         <sensor>->subdev.flags |= ...         <sensor->subdev.entity.function = ...     /* Entity ops initialization */         <sensor->subdev.entity.ops = &<sensor>_camera_subdev_media_ops; } In most cases, adding the link setup function will solve the media controller issue, or at least it discards problems on the driver side. Device Tree Modifications On the Device Tree side, it is necessary to enable the ISP channels that will be used. Likewise, it is necessary to disable the ISI channels, which are normally the ones that connect to the MIPI_CSI2 ports to extract raw data from the sensor (in case the ISP is not used). A MIPI_CSI2 port can be mapped to either an ISI channel or an ISP channel, but not both simultaneously. In this guide, we focus on using the ISP, so any other custom configuration that you want to implement may vary from what is shown. In the code below, ISP channel 0 is enabled, and the connection is made to the port where the sensor is connected (mipi_csi_0). &mipi_csi_0 {         status = "okay";         port@0 {         // Example endpoint to <sensor>_ep                mipi0_sensor_ep: endpoint@1 {                        remote-endpoint = <&<sensor>_ep>;                };         }; };   &cameradev {         status = "okay"; };   &isi_0 {         status = "disabled"; };   &isi_1 {         status = "disabled"; };   &isp_0 {         status = "okay"; };   &isp_1 {         status = "disabled"; };   &dewarp {         status = "okay"; }; What is shown above does not represent a complete device tree file, is only a general skeleton of the points you should pay attention to when working with ISP channels. For simplicity, we omitted all the attributes that are normally defined when working with camera sensor drivers and their respective configurations in the i2c port of the hardware.   Note: Due to hardware restrictions when using ISP channels, it is recommended to use the isp_0 channel, when working with only one sensor. In case you need to use two sensors, you can enable both channels, taking into account the limitations regarding the output resolutions and the clock frequency when both channels are working simultaneously. What is not recommended is to use the isp_1 channel when working with a single sensor.   References ISP Independent Sensor Interface (ISI) API reference, I.MX8M Plus Camera Sensor Porting User guide: https://www.nxp.com/webapp/Download?colCode=IMX8MPCSPUG Sensor Calibration tool: https://www.nxp.com/webapp/Download?colCode=AN13565 i.MX8M Plus reference manual: https://www.nxp.com/webapp/Download?colCode=IMX8MPRM  
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Ftrace is powerful tracing utility embedded in Linux kernel. It provides a very good method for kernel developer to get insights of the kernel behavior. While official kernel doc for ftrace is somehow long and complex, this document provides a quicker and simpler way to get start with ftrace.
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