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Not all of imx6 boards can support SDR104, refer to imx6sx Reference Manual, BOOT_CFG1[2:3] = 11 is SDR104 normally hardware support 3.3v, but SDR104 only supports 1.8v. refer to the AI board schematic, you can find as below: For current yocto driver, which already supports sd3.0 standard, but kernel should change something to support this, for customer, one can refer to the source code in the yocto, the path:root/arch/arm/boot/dts/imx6sx-sdb.dts or path:root/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi For supporting SDR104, should change the dts file, because of 1.8v only, should remove no-1-8-v in the source code, then add vmmc-supply according to the dts file above. for example, based on the schematic, you can find: &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 1 0>; no-1-8-v; keep-power-in-suspend; enable-sdio-wakeup; status = "okay"; }; &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; cd-gpios = <&gpio6 15 0>; wp-gpios = <&gpio1 13 0>; /* * Due to board issue, we can not use external regulator for card slot * by default since the card power is shared with card detect pullup. * Disabling the vmmc regulator will cause unexpected card detect * interrupts. * HW rework is needed to fix this isssue. Remove R695 first, then you * can open below line to enable the using of external regulator. * Then you will be able to power off the card during suspend. This is * especially needed for a SD3.0 card re-enumeration working on UHS mode * Note: reg_sd3_vmmc is also need to be enabled */ /* vmmc-supply = <&reg_sd3_vmmc>; */ keep-power-in-suspend; enable-sdio-wakeup; status = "okay"; }; reg_sd3_vmmc: sd3_vmmc{ compatible = "regulator-fixed"; regulator-name = "P3V3_SDa_SWITCHED"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; enable-active-high; /* remove below line to enable this regulator */ status="disabled"; };
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(   converted from discussion created by Alfred Latypov   IMX6 PCI with external cloks  )    Hello, I had a problem, to launch a board with an imx6 solo processor with a pci-express, and with external clock. I'll tell you my decision. On my motherboard there is a pci-switch PI7C9X2G606 from Pericom with 4 endpoints of Intel type 82574 ethernet controller. I used the Linux kernel version 4.9.16 In the device-tree file, I used the following options to enable external clocks for CLK1 input gate (100MHz). Sorry, I had to change the root imx6 device tree file. See attached (imx6*.dtsi) files. From ..kernel/arch/arm/boot/dts/.. Add anatop external clock source for clocks section, and change clk source for pcie-phy. ... anaclk1 {             compatible = "fixed-clock";             reg = <0>;             #clock-cells = <0>;             clock-frequency = <100000000>;  /* 100MHz */         }; ... Change pcie section ...         pcie: pcie@0x01000000 {             compatible = "fsl,imx6q-pcie", "snps,dw-pcie";             reg = <0x01ffc000 0x04000>,                   <0x01f00000 0x80000>;             reg-names = "dbi", "config";             #address-cells = <3>;             #size-cells = <2>;             device_type = "pci";             ranges = <0x81000000 0 0          0x01e00000 0 0x00100000 /* downstream I/O */                   0x82000000 0 0x01000000 0x01000000 0 0x00e00000>; /* non-prefetchable memory */             /* ranges = <0x81000000 0 0          0x01f80000 0 0x00010000                   0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; */             num-lanes = <1>;             interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;             interrupt-names = "msi";             #interrupt-cells = <1>;             interrupt-map-mask = <0 0 0 0x7>;             interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,                             <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;             clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,                  <&clks IMX6QDL_CLK_LVDS1_IN>,                  <&clks IMX6QDL_CLK_SATA_REF_100M>;             clock-names = "pcie", "pcie_bus", "pcie_phy";             status = "disabled";         }; ... and add new source clocks dependencies: .... &clks {         assigned-clocks = <&clks IMX6QDL_PLL6_BYPASS_SRC>,                           <&clks IMX6QDL_PLL6_BYPASS>;                                   assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS1_IN>,                                  <&clks IMX6QDL_PLL6_BYPASS_SRC>;         assigned-clock-rates = <100000000>, <100000000>; }; .... for your board dtsi. I could not start the pcie-bus with the function Gen2. Next, I needed to change the bus driver (pci-imx6.c), for fine tuning the bus clock frequency. I add MPLL frequency services functions (Thanks for Charle Powe i.MX6Q: Using an external reference for PCIe 😞 ... static void imx_pcie_override_phy_mpll(struct pcie_port *pp, u32 mpll_multiplier, u32 ref_clkdiv2) {     u32 ref_usb2_en;     u32 reg1;               pr_info("Overriding PCIe PHY MPLL config: multiplier = %d, clkdiv2 = %d\n",         mpll_multiplier, ref_clkdiv2);                   // set MPLL to disabled     ////pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0001);          // set MPLL multiplier         pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO,             (0x0001<<9 | (mpll_multiplier<<2)) & 0x03fc);          /*      * set the ref_clkdiv2.  when this override is enabled it      * overrides both ref_clkdiv2 and ref_usb2_en.  make sure      * the overriden ref_usb2_en reflects the original value.      */          pcie_phy_read(pp->dbi_base, PCIE_PHY_ATEOVRD, &reg1);          ref_usb2_en = (reg1 >> 1) & 0x1;        /* set the current value of ref_usb2_en as the override */          /* set the ref_clkdiv2 override  */          /* enable the ref_clkdiv2 override */          pcie_phy_write(pp->dbi_base, PCIE_PHY_ATEOVRD,             (ref_usb2_en << 1) | ref_clkdiv2 | (0x1 << 2));             /* enable MPLL */         ///pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0003);          } ... call this function in pcie_hos_init ... static void imx6_pcie_host_init(struct pcie_port *pp) {     imx6_pcie_assert_core_reset(pp);            imx6_pcie_init_phy(pp);            imx6_pcie_deassert_core_reset(pp);        imx_pcie_override_phy_mpll(pp, 50, 1); /* tune this */          dw_pcie_setup_rc(pp);     imx6_pcie_establish_link(pp);      if (IS_ENABLED(CONFIG_PCI_MSI))         dw_pcie_msi_init(pp); } ... See documentation for p.p. IMX6DLRM 50.5.1.2. Tune <pci_hotplug_mem_size> global variable for optimal pci window sizes enumeration. See for my imx6_add_pcie_port call. If you use a FEC module, it will stop working. You must use an external clock as specified in the documentation (http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf ). Changes are shown in the attached dtsi file. For clocks segment ... rmii_clk: clock@0 {             compatible = "fixed-clock";             reg = <0>;             #clock-cells = <0>;             clock-frequency = <50000000>;  /* 50MHz */         }; ... and for fec: ... fec: ethernet@02188000 {                 compatible = "fsl,imx6q-fec";                 reg = <0x02188000 0x4000>;                 interrupts-extended =                     <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,                     <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;                 clocks = <&clks IMX6QDL_CLK_ENET>,                      <&clks IMX6QDL_CLK_ENET>,                      <&rmii_clk>;                 clock-names = "ipg", "ahb", "ptp";                 status = "disabled";             }; ... If they are not required, disable this editing this file. Thanks for all. Sorry for my bad English. Alfred <[email protected]> This document was generated from the following discussion: IMX6 PCI with external cloks
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When to improve kernel booting using hibernation [1], I found kernel initialized each component [2] took too much time. One solution is to remove unnecessary module to save time. Another approach is to delay those modules until user space up. Then it won’t lost some features just because hopes to gain benefit on booting speed. This is very useful since hibernation’s trigger point is at the late_initcall [3]. Kernel doesn't need do much module initialize since hibernate will restore those module status later. The detailed implementation is in the attached patch. [1]: hibernation is a technique to store system memory content to storage. Then the device can be shutdown and read the content back after power on. [2]: component means subsystem or driver. [3]: Consult kernel/power/hibernate.c, software_resume
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Platform: i.mx8qm/qxp OS: imx-yocto-L4.14.98_2.0.0_ga Camera: max9286 deserializer <=> max96705 serializer  + ar0144 or: max9286 deserializer <=> max96705 serializer + ov9284 Note that currently only one camera is support and the serializer should be connected to the IN0 of max9286. Data format: ar0144: mono raw 12bit. ov9284: mono raw 10bit. On imx8qm/qxp the data will be recieved as raw 16bit and the valid data bit start from bit[13] to LSB. for mono raw 12bit the valid data bit is 0bxxdd_dddd_dddd_ddxx for mono raw 10bit the valid data bit is 0bxxdd_dddd_dddd_xxxx max9286 and max96705 configuration: dbl bws PXL_CRC/edc hven hibw lccen him should be the same on both sides, this can be achieved by pin or register configurations. The crossbar function of max96705 can be used to fix the reversed data bit. for example, reversed 12bit with dbl to 1. 0x20 0xb 0x21 0xa 0x22 0x9 ....... 0x2b 0x0 0x30 0xb 0x31 0xa .... 0x3b 0x0 0x20 to 0x2b and 0x30 to 0x3b are the registers of max96705. Patch apply: 1. push the kernel-patch to the kernel source and apply it. 2. reconfig the kernel setting, make sure there is only CONFIG_MAX9286_AR0144 or        CONFIG_MAX9286_WISSEN(ov9284) enabled, all other max9286 related are disabled. You can run menuconfig to achieve this. 3. For testing copy the vulkan-v4l2.tar to the board, and run vulkan-v4l2.     the source code is at https://github.com/sheeaza/vulkan-v4l2 branch ar0144 for ar0144, branch ov9284 for ov9284. =========== updated patch for data format.
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Hardware:​  Soc: NXP i.MX 93 11x11 EVK FPGA:​ Lattice ECP5 Evaluation Board   Deploy the driver of FlexSPI and Test​​ Apply below patch into Linux kernel and compile. (6.1.55-2.2.0 is tested)​ git apply 0001-Added-flexspi-fpga-module-support-of-i.MX93.patch​ make imx_v8_defconfig​ make –j8​ Copy the generated imx93-11x11-evk-flexspi-m2-fpga.dtb to the boot partition​ Set the dtb in uboot​ setenv fdtfile imx93-11x11-evk-flexspi-m2-fpga.dtb ​ saveenv​ boot​ Copy the generated imx93_flexspi_fpga.ko and the test app source file flexspi_fpga_latency_test.c to home directory Run blow command to do the test​ gcc flexspi_fpga_latency_test.c​ ./a.out 128​ ​ About driver and test app​ ​The driver can be installed in test app automatically. Insmod command is called in test app as below.​ insmod imx93_flexspi_fpga.ko mux=1 div=30​ The parameter mux can be set to 0,1,2,3. Means 24MHz, 1000MHz, 800MHz, 625MHz root clock. And div is the divider. In default, 1000/30 = 33MHz is applied. More details of hardware connection: Since the adapter board is not on NXP website and it is just for test, there are two options. Use fly-wire to connect flexspi and lattice fpga instead of the adapter card. Use M.2 adapter card but need be produced by customer themselves.  If M.2 adapter is not used, fly-wire can be applied to connect i.MX93 to FPGA. The column of Pads is a pad list that can bring out signal lines from the bottom layer of i.MX93 EVK. i.MX 93 Pads of imx93 FPGA ECP5 SD3_CLK TP912 B10 SD3_CMD TP913 A9 SD3_DATA0 TP914 D8 SD3_DATA1 TP915 E8 SD3_DATA2 TP916 C7 SD3_DATA3 TP917 C6 GND   GND J1003-2 1V8   VCCIO0 Remove JP10 Jumper   It is also possible that the customer would choose M.2 adapter card solution. The adapter card is simple and cheap. It can be redesigned easily with attached schematic as reference. Make sure the board thickness is 0.8mm. And recommend to apply GND copper to improve signal quality. The schematic is attached. To get the information about the demo from Lattice perspective, please check the link below. Lattice QSPI to NXP MPU Reference Design | Lattice Reference Design  
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Getting started with Linux on the i.MX53QSB
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Hi All, The new Android JB4.3_1.1.0-GA release is now available on www.freescale.com ·         Files available           Name Description IMX6_JB43_110_ANDROID_DOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0 BSP Documentation. Includes Release Notes, User's Guide, QSG and   FAQ Sheet. IMX6_JB43_110_ANDROID_SOURCE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0 BSP, Documentation and Source Code for BSP and Codecs. IMX6_JB43_110_ANDROID_DEMO_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android   jb4.3_1.1.0  BSP Binary Demo Files IMX6_JB43_110_AACP_CODEC_CODA AAC   Plus Codec for i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX   6Sololite Android jb4.3_1.1.0 ·         Target HW boards o   i.MX6DL  SABRE SD board o   i.MX6Q  SABRE SD board o   i.MX6DQ SABRE AI board o   i.MX6DL SABRE AI board o   i.MX6SL EVK board ·         Release Description i.MX Android jb4.3_1.1.0 release includes all necessary codes, documents and tools to assist users in building and running Android 4.3 on the i.MX 6Quad, i.MX 6DualLite and i.MX6SoloLite hardware board from the scratch. The prebuilt images are also included for a quick trial on Freescale i.MX 6Quad and i.MX 6DualLite SABRE-SD Board and Platform, i.MX 6Quad and i.MX 6DualLite SABRE-AI Board and Platforms and i.MX6SoloLite EVK Board and Platforms. This release includes all Freescale porting and enhancements based on Android open source code. Most of deliveries in this release are provided in source code with the exception of some proprietary modules/libraries from third parties. ·         What's in this release         Android Source Code Patch All   Freescale i.MX specific patches (apply to Google Android repo)   to enable Android on i.MX based boards. For example Hardware   Abstraction Layer implementation, hardware codec acceleration,   etc. Packed in   android_jb4.3_1.1.0-ga_source.tar.gz Documents The   following documents are included in android_jb4.3_1.1.0-ga_docs.tar.gz: ●   i.MX Android jb4.3_1.1.0-ga Quick Start: A   manual explains how to run android on i.MX board by using prebuilt images. ●   i.MX Android jb4.3_1.1.0-ga User Guide: A   detailed manual for this release package. ●   i.MX Android jb4.3_1.1.0-ga FAQ: A document lists   “Frequently Asked Questions”. ●   i.MX Android Codec Release Notes: A   document to describes the Freescale Codec Package ●   i.MX Android Wi-FI Display Sink API Introduction A   document to describes how to use i.MX Android Wi-Fi Display Sink API ●   i.MX6 G2D API User Guide document to introduce how to use i.MX6 G2D API for   2D BLT usage ●   i.MX Android jb4.3_1.1.0-ga Release Note A   document to introduce the key updates and known issues in this release. Tools Tools   in android_jb4.3_1.1.0-ga_tools.tar.gz ●  MFGTool. Manufacturing tools for i.MX platform ●  USB tethering windows .inf driver configure file.tool/tetherxp.inf Prebuilt Images You   can test Android on i.MX with prebuilt image on i.MX board before building   any code. ● android_jb4.3_1.1.0-ga_image_6qsabresd.tar.gz: Prebuilt   images for the SABRE-SD board. ●  android_jb4.3_1.1.0-ga_image_6qsabreauto.tar.gz: Prebuilt   images for the SABRE-AI board. ●  android_jb4.3_1.1.0-ga_image_6slevk.tar.gz: Prebuilt images for the 6SL   SABRE-AI board. All   prebuilt images are in another package. See "i.MX Android jb4.3_1.1.0-ga   Quick Start" and "i.MX Android jb4.3_1.1.0-ga User Guide" to   understand which image should be used in which case. ·         Known issues For known issues and limitations please consult the release notes
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The default BSP release supports sii902x hdmi card via LCDIF in i.MX6 Solo, but doesn't support it via IPU display interface in i.MX6 Dual/Quad/Plus. The patch provides support for the Sii902x HDMI video driver for i.MX6 Dual/Quad/Plus. Useful documents: MCIMXHDMICARD: Schematic for sii902x hdmi card MCIMX6Q-SMART DEVICE PLATFORM: Schematic for i.MX6 Quad Sabre SDP Software version: Linux 3.14.52_1.1.0-ga Verified platform: imx6q-sabresd imx6qp-sabresd Patch: 0001-video-mxc-sii902x-add-sii902x-hdmi-card-driver.patch 0002-arch-arm-boot-dts-add-sii902x-hdmi-card-devicetree-n.patch Features: Support video mode setup via uboot command; Support video mode setup via device tree; Supprt HDMI hot-plug; Support many video modes and a dynamic switching between them; Notes: The default settings( don't add "video=" to bootcmd) are as follows: ---------------------------------------------------------------------------------------- ------------ /sys/class/graphics/fb0 DISP4 BG - DI1 U:1024x768p-60 ldb 2-layer-fb-bg ------------ /sys/class/graphics/fb1 DISP4 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb2 DISP3 BG - DI1 U:1920x1080p-60 hdmi 2-layer-fb-bg ------------ /sys/class/graphics/fb3 DISP3 FG overlay 2-layer-fb-fg ------------ /sys/class/graphics/fb4 DISP3 BG sii902x_hdmi 1-layer-fb ------------ /sys/class/graphics/fb5 DISP4 BG --------------------------------------------------------------------------------------- If you want sii902x_hdmi to be fb0, you can add following arguments to bootcmd: video=mxcfb0:dev=sii902x_hdmi,1920x1080M@60,if=RGB24 video=mxcfb1:off video=mxcfb2:off video=mxcfb2:off consoleblank=0 Risks: Sometimes the sii902x will fail to read hdmi edid information, and the modelist of this framebuffer will be NULL. At this time, the driver will setup a default video mode which has been tuned  on imx6q-sabresd and imx6qp-sabresd. The default video mode is as follows: /* 1080p @ 56 Hz */ 60, 1920, 1080, 7692, 100, 40, 30, 3, 10, 2, 0, FB_VMODE_NONINTERLACED, 0 The user can modify this default setting for their case. Specially, there are some risks to use 1080p@60 video mode for imx6qp-sabresd. The hdmi device will has no valid hdmi signal output in this case. For example, /* 1080p @ 60 Hz */ 60, 1920, 1080, 6734, 148, 88, 36, 4, 44, 4, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 The user sholud set these values according to hareware parameters.
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This is a simple document for recording some known-how and tips for building up the Windows 10 IoT development environment for i.MX platform. It can only be used as a complement for official document in BSP package (Guide/Release Note/etc.). Applicable for: Windows 10 IoT, i.MX BSP v1.4.1 (date to Nov/2023) Please refer to the PDF attached.
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From Android 12, NXP use GKI(Generl kernel image) instead of NXP's kernel code.  This follow up Android ASOP standard. This article described that when customer use Android 12 and later version, they need to pay attention on GKI development, which is different with previous version.
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When I am planing to develop some features in Uboot, I found it has lots limitation without interrupt. For example, to have camera preview in Uboot. Polling in Uboot results non sync when camera preview and hard to keep code simple and clean. I decided to take some time survey interrupt and it is time to share it.   This patch (shown as attachment) is to enable the interrupt. It also has the sample code to set GPIO interrupt as well. The test below showed Uboot can get the interrupt when pressing Volume up key. Special thanks for Anson Huang for patient discussing with me on this.   irqinfo is the command to enable Volume up interrupt. The log do_irq is print when Uboot got the interrupt.   Original Attachment has been moved to: 0001-Enable-interrupt-on-i.MX6Q-SabreSD.patch.zip
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Many times I came across one issue while using Redlib in MXUXpresso IDE project. I like to provide some guidance here to match the proper solution that can help others. Problem Statement : printf or sprintf doesn't print anything or printing random characters while using Redlib library. Reason : When you are creating your project you may ask to choose the c/c++ library setting to select either of the c libray provided by IDE in Advanced project setting wizard. If you have not checked the option "Redlib: Use floating point version of printf" (which will use the floating-point variant of printf) have tried to print the floating point value, You will end up with the problem mentioned above. Solution : You need to enable the floating support by modifying some preprocessor directives in "Defined symbols (-D)" wizard of your project. Path :  Your Project > properties > C/C++ Build > Setiings > Tool Settings > MCU C Compiler > Preprocessor. These are: PRINTF_FLOAT_ENABLE - keep the directive value to "1" SCANF_FLOAT_ENABLE - keep the directive value to "1" CR_INTEGER_PRINTF - Undefine/Remove this directive Click on Apply and close. That is it. Now you will have your expected prints for floating point values in your debugger console.
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Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response.   These are the detailed programming aids for the registers associated with DRAM initialization (DDR3 and LPDDR2) of the MX6DQP (also known as Rev 2 or Dual/Quad Plus), and covers the Sabre_SD boards and DDR3 based Auto Infotainment board. The last work sheet tab in the tool formats the register settings for use with the ARM RealView debugger (.inc) and the DDR Stress Test. It can be manually converted, by the user, to the DS5 .ds format or to a DCD file format used by uboot or other. The programming aids were developed based on NXP development boards and can be customized by the user for their board design. This tool serves as an aid to assist with programming the DDR interface of the MX6DQP and is based on the DDR initialization scripts developed by the R&D team and no guarantees are made by this tool. The following are some general notes regarding this tool: • Refer to the "How To Use" tab in the tool as a starting point to use this tool. • This tool may be updated on an as-needed basis for bug fixes or future improvements.  There is no schedule for aforementioned maintenance. • The MX6DQP adds a new third party IP called the NoC. The programming for these registers are automatically updated in the tool given a set of user input MMDC parameters and should not be modified manually.
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Issue: During DDR3 Burst Write, the DQS strobe signal must be driven low for a minimum of 0.3 x cycle period on the last data clock cycle before it is released. This ensures sufficient time for the write to be strobed correctly. When measuring this timing parameter, it has often been found to be too short. This may be contributing to write errors on customer boards, depending on the signal layout used by the board. Root Cause: The internal DQS strobe enable signal is controlled by the MMDC, which is tied to the SDCLK clock signal. But the DQS strobe signal can be delayed in the MMDC to match different SDCLK trace lengths by using Write Leveling parameters to ensure the the DQS strobe edge reaches the DDR3 device at the same time the SDCLK edges reaches the device. If the write level delay is too long, the MMDC can crop the end of the DQS strobe signal too short, causing a violation of the Write Post Amble Delay timing specification and potentially leading to  write errors. How much delay in the Write Leveling parameter would cause this problem? The Reference Manual states that a delay around half a cycle may cause problems, but testing on some boards indicates that delays even as short as 1/4 a cycle could cause violations of the Write Post Amble Delay. Solution: The MMDC was designed with the ability to add extra time to the strobe enable period during write procedures. This parameter is referred to as Write Additional Latency. It is found in the MMDCx_MDMISC register and the field is labeled as WALAT. Incrementing the value of this register field by one adds a full clock cycle delay to the Write Post Amble period, and ensures enough time at the end of a burst write to guarantee a correct write. There is no maximum value to Write Post Amble Delay. Setting WALAT = 1 (or larger if WL parameters are larger) will cause a small hit in overall performance, but will add to the reliability of write operations, particularly on boards that require larger WL parameter settings.
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  JEIDA-24 is adopted in most use-cases, and also the default format in Linux BSP(6.x)  Actually, JEIDA-18 is also supported in Linux BSP by not mentioned explicitly.   JEIDA-18 can be supported in two configuration: 1. Keep JEIDA-24 setting to display controllers, skip 4th data-lane in hardware connection: according JEIDA-24 output waveform, it has 4 data-lane enabled on LVDS bus: since the data-bits on TxOUT3 are the LSBs of the pixels, to change from JEIDA-24(RGB888, 4 data-lane) to JEIDA-18(RGB666, 3 data-lane), it can be achieved by skipping the TxOUT3 output(4th data-lane) in hardware connection, to make the JEIDA-18 format as the picture below(JEIDA-18 LCD panels only require 3 data-lanes)   2. Change the display controller settings to JEIDA-18: one reference by Variscite, one of the SoM vendor: https://variwiki.com/index.php?title=DART-MX8M-PLUS_Display&release=mx8mp-yocto-mickledore-6.1.36_2.1.0-v1.3 related setting quoted from the link above: Supported "data-mapping" values are "jeida-18", "jeida-24" and "vesa-24". Supported "fsl,data-mapping" values are "jeida", and "spwg". Supported "fsl,data-width" values are <18>, and <24>.    "data-mapping"= "jeida-18", "jeida-24" and "vesa-24" are handled in DRM driver, as the link below: https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/drm_of.c#L451 if (!strcmp(mapping, "jeida-18")) return MEDIA_BUS_FMT_RGB666_1X7X3_SPWG; if (!strcmp(mapping, "jeida-24")) return MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA; if (!strcmp(mapping, "vesa-24")) return MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;    Here the variable “MEDIA_BUS_FMT_RGB666_1X7X3_SPWG" is handled in ldb driver(MX8MP) as the link below: https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/bridge/fsl-ldb.c#L144 switch (bridge_state->output_bus_cfg.format) { case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: lvds_format_24bpp = false; lvds_format_jeida = true; break; case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: lvds_format_24bpp = true;  the bus_format would be "MEDIA_BUS_FMT_RGB666_1X18" in this configuration:  https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/imx/imx8mp-ldb.c#L178 switch (ldb_ch->bus_format) { case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18; break;    “MEDIA_BUS_FMT_RGB666_1X18” is not handled in LCDIF driver:  https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/imx/lcdifv3/lcdifv3-common.c#L310 switch (bus_format) { case MEDIA_BUS_FMT_RGB565_1X16: disp_para |= DISP_PARA_LINE_PATTERN(LP_RGB565); break; case MEDIA_BUS_FMT_RGB888_1X24: disp_para |= DISP_PARA_LINE_PATTERN(LP_RGB888_OR_YUV444); break; default: dev_err(lcdifv3->dev, "unknown bus format: %#x\n", bus_format); return;    hence there would be error message below in this configuration, which can be ignored: imx-lcdifv3 32e80000.lcd-controller: unknown bus format: 0x1009  
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  This guide assumes that the developer has knowledge of the V4L2 API and has worked or is familiar with sensor drivers and their operation within the Linux kernel. This guide does not focus on the details of the sensor driver development that you want to port. It is assumed that you already have an existing driver for your sensor, before making the port. The version of the ISP's was 6.6.36 Linux BSP. If a different version is used, it is the developer's responsibility to review the API documentation for the corresponding version, since there may be changes that affect what is indicated in this guide. To port the camera sensor, the following steps must be taken as described in the following sections: Define sensor attributes and create instances. ISS Driver and ISP Media Server. Sensor Calibration Files. VVCAM Driver Creation. Device Tree Modifications. Define Sensor Attributes and Create Instances The following three steps are already implemented in CamDevice and are included for reference only. Step 1: Define the sensor attributes in the IsiSensor_s data structure. Step 2: Define the IsiSensorInstanceConfig_t configuration structure that will be used to create a new sensor instance. Step 3: Call the IsiCreateSensorIss() function to create a new sensor instance. ISS Driver and ISP Media Server Step 0 - Use a driver template as base code: Drivers can be found in $ISP_SOURCES_TOP/units/isi/drv/. For example, the ISP sources, come with the OV4656 and OS08a20 drivers. $ISP_SOURCES_TOP indicates the path of your working directory, where the respective sources are located. Step 1 - Add your <SENSOR> ISS Driver: Create the driver entry for your sensor in the path $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/source/<SENSOR>.c. Change all occurrences of the respective sensor name within the code, for instance, OV4656 -> <SENSOR>, respecting capital letters where applicable. Step 2 - Check the information on the IsiCamDrvConfig_s data structure: Data members defined in this data structure include the sensor ID (CameraDriverID) and the function pointer to the IsiSensor data structure. By using the address of the IsiCamDrvConfig_s structure, the driver can then access the sensor API attached to the function pointer. The following is an example of the structure: /***************************************************************************** * Each sensor driver needs to declare this struct for ISI load *****************************************************************************/ IsiCamDrvConfig_t IsiCamDrvConfig = {     .CameraDriverID = 0x0000,     .pIsiHalQuerySensor = <SENSOR>_IsiHalQuerySensorIss,     .pfIsiGetSensorIss = <SENSOR>_IsiGetSensorIss, };   Important Note: Modify the CameraDriverID according to the chip ID of your sensor. Apply this change to any Chip ID occurrence within the code. Step 3 - Check sensor macro definitions: In case there is any macro definition in the ISS Driver code, which involves specific properties of the sensor, you should modify it according to your requirements. For example: #define <SENSOR>_MIN_GAIN_STEP         (1.0f/16.0f)   Step 4 - Modify ISP Media Server build tools: Changes required in this step include: Add a CMakeLists.txt file in $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/ that builds your sensor module. Modify the CMakeLists.txt located at $ISP_SOURCES_TOP/units/isi/drv/CMakeLists.txt to include and reference your sensor directory. Modify the $ISP_SOURCES_TOP/appshell/ and $ISP_SOURCES_TOP/mediacontrol/ build tools, since by default they refer to the construction of a particular sensor, for example, the OV4656, so it is necessary to change the name of the corresponding sensor. Modify the $ISP_SOURCES_TOP/build-all-isp.sh script to reference the sensor modules and generate the corresponding binaries when building the ISP media server instance.   Step 5 - ISP Media Server run script: You need to add the operation modes defined for your sensor in the script. Each operating mode is associated with an order (mode 0, mode 1 ... mode N), a name used to execute the command in the terminal (e.g <sensor>_custom_mode_1), a resolution, and a specific calibration file for the sensor. The script is located at $ISP_SOURCES_TOP/imx/run.sh .   Step 6 - Sensor<X> config: At $ISP_SOURCES_TOP/units/isi/drv/ you can find the files to configure each sensor entry to the ISP, called Sensor0_Entry.cfg and Sensor1_Entry.cfg. There, the associated calibration files are indicated for each sensor operating mode, including the calibration files in XML format and the Dewarp Unit configuration files in JSON format. In addition, the .drv file generated for your sensor is referenced, creating the association between the respective /dev/video<X> node and the sensor driver module outputted from the ISP Media Server. In case you are using only one ISP channel, just modify Sensor0_Entry.cfg. In case you require both instances of the ISP, you will need to modify both files. Sensor Calibration Files It is a requirement for using the ISP, to have a calibration file in XML format, specific to the sensor you are using and according to the resolution and working mode. To obtain the calibration files in XML format, there are 3 options: Use the NXP ISP tuning tool for this you will need to ask for access or sign a NDA document. Pay NXP professional services to do the tune. Pay a third-party vendor to do the tune   VVCAM Driver Creation The changes indicated below are based on the assumption that there is a functional sensor driver in its base form, and that it is compatible with the V4L2 API. From now on we focus on applying the changes suggested in the NXP documentation, specifically to establish the communication of the VVCAM Driver (kernel side) and the ISI Layer. Step 0 - Create the sensor driver entry: Developers must add the driver code to the file located at $ISP_SOURCES_TOP/vvcam/v4l2/sensor/<sensor>/<sensor>_xxxx.c, along with a Makefile for the sensor driver module. In the same way, as indicated in the ISS Driver section, you can refer to one of the sample drivers that are included as part of the ISP sources, to review details about the implementation of the driver and the structure of the required Makefile.   Step 1 - Add the VVCAM mode info data structure array: This array stores all the supported modes information for your sensor. The ISI layer can get all the modes with the VVSENSORIOC_QUERY command. The following is an example of the structure, please fill in the information using the attributes of your sensor and the modes it supports. #include "vvsensor.h" . . .   static struct vvcam_mode_info_s <sensor>_mode_info[] = {         {         .index = 0,         .width = ... ,         .height = ... ,         .hdr_mode = ... ,         .bit_width = ... ,         .data_compress.enable = ... ,         .bayer_pattern = ... ,         .ae_info = {                        .                        .                        .                        },         .mipi_info = {                        .mipi_lane = ... ,                        },         },         {         .index = 1,         .         .         .         }, }; Step 2 - Define sensor client to i2c : Define the client_to_sensor macro (in case you don't have any already) and check the segments of the driver code that require this macro. #define client_to_<sensor>(client)\         container_of(i2c_get_clientdata(client), struct <sensor>, subdev)   Step 3 - Define the V4L2-subdev IOCTL function: Define and implement the <sensor>_priv_ioctl, which is used to receive the commands and parameters passed down by the user space through ioctl() and control the sensor. long <sensor>_priv_ioctl(struct v4l2_subdev *subdev, unsigned int cmd, void *arg) {         struct i2c_client *client = v4l2_get_subdevdata(subdev);         struct <sensor> *sensor = client_to_<sensor>(client);         struct vvcam_sccb_data_s reg;         uint32_t value = 0;         long ret = 0;           if(!sensor){                return -EINVAL;         }           switch (cmd) {         case VVSENSORIOC_G_CLK: {                ret = custom_implementation();                break;         }         case VIDIOC_QUERYCAP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_QUERY: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_CHIP_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_RESERVE_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_SENSOR_MODE:{                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_SENSOR_MODE: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_STREAM: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_WRITE_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_READ_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_EXP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_POWER:         case VVSENSORIOC_S_CLK:         case VVSENSORIOC_RESET:         case VVSENSORIOC_S_FPS:         case VVSENSORIOC_G_FPS:         case VVSENSORIOC_S_LONG_GAIN:         case VVSENSORIOC_S_GAIN:         case VVSENSORIOC_S_VSGAIN:         case VVSENSORIOC_S_LONG_EXP:         case VVSENSORIOC_S_VSEXP:          case VVSENSORIOC_S_WB:         case VVSENSORIOC_S_BLC:         case VVSENSORIOC_G_EXPAND_CURVE:                break;         default:                break;         }           return ret; }   As you can see in the example, some cases are implemented but others are not. Developers are free to implement the features they consider necessary, as long as a minimum base of operation of the driver is guaranteed (query commands, read and write registers, among others). It is the developer's responsibility to implement each custom function, for each case or scenario that may arise when interacting with the sensor. In addition to what was shown previously, a link must be created to make the ioctl connection with the driver in question. Link your priv_ioctl function on the v4l2_subdev_core_ops struct, as in the example below: static const struct v4l2_subdev_core_ops <sensor>_core_ops = {         .s_power       = v4l2_s_power,         .subscribe_event = v4l2_ctrl_subdev_subscribe_event,         .unsubscribe_event = v4l2_event_subdev_unsubscribe,      // IOCTL link         .ioctl = <sensor>_priv_ioctl, };   Step 4 - Verify your sensor's private data structure: After performing the modifications suggested, it would be a good practice to double-check your sensor's private data structure properties, in case there is one missing, and also check that the properties are initialized correctly on the driver's probe.   Step 5 - Modify VVCAM V4L2 sensor Makefile : At $ISP_SOURCES_TOP/vvcam/v4l2/sensor/Makefile, include your sensor object as follows: ... obj-m += <sensor>/ ... Important Note: There is a very common issue that appears when working with camera sensor drivers in i.MX8MP platforms. The kernel log message shows something similar to the following: mxc-mipi-csi2.<X>: is_entity_link_setup, No remote pad found! The link setup callback is required by the Media Controller when performing the linking process of the media entities involved in the capture process of the camera. Normally, this callback is triggered by the imx8-media-dev driver included as part of the Kernel sources. To make sure that the problem is not related to your sensor driver, verify the link setup callback is already created in the code, and if is not, you can add the following template: /* Function needed by i.MX8MP */ static int <sensor>_camera_link_setup(struct media_entity *entity,                                    const struct media_pad *local,                                    const struct media_pad *remote, u32 flags) {     /* Return always zero */         return 0; }   /* Add the link setup callback to the media entity operations struct */ static const struct media_entity_operations <sensor>_camera_subdev_media_ops = {         .link_setup = <sensor>_camera_link_setup, };     /* Verify the initialization process of the media entity ops in the sensor driver's probe function*/ static int <sensor>_probe(struct i2c_client *client, ...) {         /* Initialize subdev */         sd = &<sensor>->subdev;         sd->dev = &client->dev;         <sensor>->subdev.internal_ops = ...         <sensor>->subdev.flags |= ...         <sensor->subdev.entity.function = ...     /* Entity ops initialization */         <sensor->subdev.entity.ops = &<sensor>_camera_subdev_media_ops; } In most cases, adding the link setup function will solve the media controller issue, or at least it discards problems on the driver side. Device Tree Modifications On the Device Tree side, it is necessary to enable the ISP channels that will be used. Likewise, it is necessary to disable the ISI channels, which are normally the ones that connect to the MIPI_CSI2 ports to extract raw data from the sensor (in case the ISP is not used). A MIPI_CSI2 port can be mapped to either an ISI channel or an ISP channel, but not both simultaneously. In this guide, we focus on using the ISP, so any other custom configuration that you want to implement may vary from what is shown. In the code below, ISP channel 0 is enabled, and the connection is made to the port where the sensor is connected (mipi_csi_0). &mipi_csi_0 {         status = "okay";         port@0 {         // Example endpoint to <sensor>_ep                mipi0_sensor_ep: endpoint@1 {                        remote-endpoint = <&<sensor>_ep>;                };         }; };   &cameradev {         status = "okay"; };   &isi_0 {         status = "disabled"; };   &isi_1 {         status = "disabled"; };   &isp_0 {         status = "okay"; };   &isp_1 {         status = "disabled"; };   &dewarp {         status = "okay"; }; What is shown above does not represent a complete device tree file, is only a general skeleton of the points you should pay attention to when working with ISP channels. For simplicity, we omitted all the attributes that are normally defined when working with camera sensor drivers and their respective configurations in the i2c port of the hardware.   Note: Due to hardware restrictions when using ISP channels, it is recommended to use the isp_0 channel, when working with only one sensor. In case you need to use two sensors, you can enable both channels, taking into account the limitations regarding the output resolutions and the clock frequency when both channels are working simultaneously. What is not recommended is to use the isp_1 channel when working with a single sensor.   References ISP Independent Sensor Interface (ISI) API reference, I.MX8M Plus Camera Sensor Porting User guide: https://www.nxp.com/webapp/Download?colCode=IMX8MPCSPUG Sensor Calibration tool: https://www.nxp.com/webapp/Download?colCode=AN13565 i.MX8M Plus reference manual: https://www.nxp.com/webapp/Download?colCode=IMX8MPRM  
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Ftrace is powerful tracing utility embedded in Linux kernel. It provides a very good method for kernel developer to get insights of the kernel behavior. While official kernel doc for ftrace is somehow long and complex, this document provides a quicker and simpler way to get start with ftrace.
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In the era of digitization, concepts like smart homes and the Internet of Things (IoT) are continuously evolving. To realize these visions, a robust and efficient network infrastructure becomes crucial. OpenWRT, with its open-source nature, high customizability, and excellent stability, has become a key player in leading the future development of networks. NXP, as a global leader in semiconductor technology innovation, leverages its expertise in embedded systems and communication to introduce an intelligent network solution based on OpenWRT, empowering the flourishing smart home and IoT ecosystems. This article will explore the current status and ways to access NXP's chip support for the wireless router solution, enabling readers to build a solid foundation for the next generation of networks. 1. Unique Features of OpenWRT 1.1. Noble Value of Open Source Freedom OpenWRT stands out with its open-source nature, granting users unlimited freedom to access, modify, and share the source code, unlocking significant innovation potential. This openness not only drives continuous technological advancements but also allows users to take active control of the network direction, saving costs. 1.2. Stable and Reliable Network Foundation Built on a mature Linux kernel, OpenWRT undergoes extensive evolution and fine-tuning, ensuring outstanding system stability. This results in fewer network failures, longer device lifespans, and solid support for various network needs. OpenWRT becomes an ideal choice for building reliable home networks, alleviating concerns about network instability or crashes. 1.3. Powerful Software Package Management OpenWRT's proud software package management system provides users with great flexibility. Users can freely install, update, and uninstall various applications and services based on their needs, achieving a highly personalized network environment for a smarter networking experience. OpenWRT allows users to install various network services and applications such as VPNs and proxy servers to meet specific network requirements, providing greater freedom to create a network environment that suits individual or family needs. 1.4. Strong Community Support The vast OpenWRT community is the source of its powerful driving force. Users can exchange experiences, solve problems, and even participate in project development within the community. This collaborative spirit propels continuous innovation and progress in OpenWRT. 2. Applications of NXP wireless router Solution 2.1. Construction of Smart Home Ecosystem The seamless integration of NXP's wireless router solution with the NXP Matter solution provides an ideal platform for users to build smart home ecosystems. With its powerful customization capabilities, users can easily connect, manage, and control various smart devices, creating a highly intelligent home environment. The solution integrates NXP's Bluetooth and Wi-Fi chip drivers, such as IW612, 88W9098, 88W8997, allowing users to effortlessly build an OpenThread Border Router (OTBR) or Zigbee Bridge based on OpenWRT. 2.2. Customized Network Services The NXP wireless router solution supports the customized installation of various network services and applications. Users can create personalized network services, such as VPNs, proxy servers, home routers, or gateways, based on their individual needs, achieving a more flexible networking experience. 2.3. Transmission of High-Definition Video Streams The transmission of high-definition video streams in smart homes imposes higher demands on network performance. NXP's wireless router solution, with its excellent network performance, combined with NXP's industrial-grade IP Camera solution, ensures users can smoothly enjoy high-definition video streams, providing a superior home entertainment experience. 2.4. Construction of Smart Security Systems Security systems are an essential part of smart homes. NXP's wireless router solution, with its advanced network security features, builds a more reliable and intelligent security system for users, enhancing home security. 3. NXP's Support for OpenWRT Given the numerous advantages and wide-ranging application scenarios of wireless router, NXP early on adapted to support OpenWRT. Full support has been provided for the entire Layerscape series processors, and mainstream IMX processors are also supported. The specific supported IMX platforms and details are as follows: Processor and Board Support         ARMv8                                             ARMv7       I.MX93EVK                                •      I.MX6ULL       I.MX8MPlus       I.MX8MMini       I.MX8MNano       I.MX8MQuad OpenWrt Version  Based on OpenWrt v23.05 from mainline (tag: v23.05.0-rc1) Toolchain: ARMV8: gcc-11.3, binutils-2.37 ARMV7: gcc-12.3, binutils-2.40 U-Boot Boot Loader IMX LF release, tag: lf-5.15.71-2.2.1 v2022.04 Linux Kernel       OpenWrt kernel 5.15.114 based on IMX SDK release kernel v5.15.71_2.2.1 Firmware       firmware-imx-8.18       firmware-sentinel-0.5.1 Main Features       Squashfs rootfs support on SD card.       Supported CLI and web configuation. - U-Boot: lf-5.15.71-2.2.1. - Arm Trusted firmware (TF-A) integration. - Boot from SDHC       Linux Kernel Core - Linux kernel 5.15.114 - Cortex-A53 (AARCH64), little endian for imx8m platform - Cortex-A55 (AARCH64), little endian for imx93 platform - Cortex-A7, little endian for imx6ull platform - 64-bit effective kernel addressing [Cortex-A53/A55]       Linux Kernel Drivers - SDIO 3.0 / eMMC5.1 - USB 3.0/2.0 Dual-Role with PHY type C - 32-bit LPDDR4 - 2x Gigabit Ethernet with AVB, IEEE 1588, EEE   and 1x w/ TSN - PCIe Gen 3 + WIFI - CAN FD - Dual-ch. QuadSPI (XIP) or 1x OctalSPI(XIP) - RTC Licensing The majority of the software included in the OpenWrt release is licensed under a form of open source license (e.g. GPL, BSD). Some software is licensed under the NXP EULA license. 4. How to Start Deploying and Using wireless router? To experience the powerful features of the Layerscape series chips with wireless router, download the source code from the official OpenWRT repository: https://git.openwrt.org/openwrt/openwrt.git. The OpenWRT support code for Layerscape is already integrated into the official OpenWRT codebase. Taking IMX8MMini-EVK as an example, here are the deployment steps for wireless router on the IMX platform using Ubuntu 22.04: 4.1. Get the source code from GitHub: https://github.com/nxp-imx/imx_openwrt (Tag: imx_v23.05_v5.15.114) 4.2. Compile, Install, and Configure wireless router: $ ./scripts/feeds update -a; ./scripts/feeds install -a; cp config.default .config; make -j $ sudo dd if=/mnt/tftpboot/imx8/matter_20230908/openwrt-imx-imx8-imx8mmini-squashfs-sdcard.img of=/dev/sdX bs=1M && sync This way, an wireless router bootable disk for SD card has been generated. You can directly use an SD card to boot and experience wireless router. For more compilation assistance, please refer to the README file in the source code: target/linux/imx/README. 4.3. Configuration and Personalization Users can access the wireless router device through the web interface or SSH to begin configuring and personalizing the network environment. This includes setting network rules, installing software packages, and ensuring that the device operates according to individual needs. The following image shows the interface for installing and removing software. Isn't it simple and convenient! 4.4. What to Do If You Encounter Issues? Firstly, you can seek support in the vibrant OpenWRT community. You can not only get assistance but also share your development or usage experiences and even participate in project development. This open community provides users with more opportunities for learning and growth, collectively driving continuous progress in OpenWRT. You can also participate in the official NXP community at https://community.nxp.com/t5/i-MX-Processors/bd-p/imx-processors to ask questions and share technical insights. Professional engineers are available to help you troubleshoot and overcome challenges. NXP OpenWRT looks forward to your participation!   Disclaimer This wireless router release is an NXP's Systems Engineering Initiative and is not part of NXP's Linux base enablement strategy for its MPU platforms. NXP does not vouch for the quality of this release and any follow up releases including adding support to new platforms is at the sole discretion of the Systems Engineering team. For specific requirements or needs please reach out to NXP's systems engineering team on the following email address "[email protected]."
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