Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. This is a detailed programming aid for the registers associated with MMDC initialization. The last sheet formats the register settings for use with ARM RealView ICE. It can also be used with the windows executable for the DDR Stress Test. This programming aid was used for internal NXP validation boards.

This link contains the scripts, U-boot commands, and patch code shown on the application note AN5409 titled 'i.MX6 Dual/6 Quad Power Consumption Measurement'.

One of the new feature of  the i.MX8 family is to support CAN FD. Fortunately the MEK board has a TJA1043 supporting CAN FD. The following document show you how to do simple CAN (FD) test under Linux. First of all let configure the CAN0 to be at 500kps in CAN, and 4Mbps in CAN FD: ip link set can0 up type can bitrate 500000 sample-point 0.75 dbitrate 4000000 dsample-point 0.8 fd on ‍‍‍‍‍‍‍ Let's do the same for CAN1: ip link set can1 up type can bitrate 500000 sample-point 0.75 dbitrate 4000000 dsample-point 0.8 fd on‍‍‍‍ Now you can do a bridge between CAN0 and CAN1 on the board. The easiest way is to put simple wires (pin 2 to pin 2 a,d pin 7 to pin 7), normally you have to twist your wires, but as it is on your desk, you can get rid of it): You can check the configurations of your FlexCAN: root@imx8qxpmek:~# ip -details link show can0 3: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 72 qdisc pfifo_fast state UNKNOWN mode DEFAULT group default qlen 10 link/can promiscuity 0 can <FD> state ERROR-WARNING (berr-counter tx 0 rx 0) restart-ms 0 bitrate 500000 sample-point 0.750 tq 25 prop-seg 29 phase-seg1 30 phase-seg2 20 sjw 1 flexcan: tseg1 2..64 tseg2 1..32 sjw 1..32 brp 1..1024 brp-inc 1 dbitrate 4000000 dsample-point 0.800 dtq 25 dprop-seg 3 dphase-seg1 4 dphase-seg2 2 dsjw 1 flexcan: dtseg1 1..39 dtseg2 1..8 dsjw 1..8 dbrp 1..1024 dbrp-inc 1 clock 40000000numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 root@imx8qxpmek:~# ip -details link show can1 4: can1: <NOARP,UP,LOWER_UP,ECHO> mtu 72 qdisc pfifo_fast state UNKNOWN mode DEFAULT group default qlen 10 link/can promiscuity 0 can <FD> state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 0 bitrate 500000 sample-point 0.750 tq 25 prop-seg 29 phase-seg1 30 phase-seg2 20 sjw 1 flexcan: tseg1 2..64 tseg2 1..32 sjw 1..32 brp 1..1024 brp-inc 1 dbitrate 4000000 dsample-point 0.800 dtq 25 dprop-seg 3 dphase-seg1 4 dphase-seg2 2 dsjw 1 flexcan: dtseg1 1..39 dtseg2 1..8 dsjw 1..8 dbrp 1..1024 dbrp-inc 1 clock 40000000numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 root@imx8qxpmek:~#‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Now a simple test can be to send random CAN FD messages, for that use "cangen" to send random CAN FD messages (read "cangen" documentation: https://manpages.debian.org/stretch-backports/can-utils/cangen.1.en.html 😞 root@imx8qxpmek:~# cangen can0 -v -b -g 20 can1 3E6 [00] can1 735 [20] F9 ED 40 53 AC CF 48 34 F9 ED 40 53 AC CF 48 34 F9 ED 40 53 can1 513 [20] 92 D2 E7 32 48 E6 EA 39 92 D2 E7 32 48 E6 EA 39 92 D2 E7 32 can1 03B [12] 6D 34 2F 11 52 8A 52 50 6D 34 2F 11 can1 47D [24] 72 08 88 0D E0 04 F7 09 72 08 88 0D E0 04 F7 09 72 08 88 0D E0 04 F7 09 can1 245 [00] can1 6F6 [48] B9 82 A1 49 4E ED BA 06 B9 82 A1 49 4E ED BA 06 B9 82 A1 49 4E ED BA 06 B9 82 A1 49 4E ED BA 06 B9 82 A1 49 4E ED BA 06 B9 82 A1 49 4E ED BA 06 can1 1F4 [16] 03 5B 7C 00 DA E5 FA 03 03 5B 7C 00 DA E5 FA 03 can1 38A [48] 71 CE A3 1A C0 8A 4F 20 71 CE A3 1A C0 8A 4F 20 71 CE A3 1A C0 8A 4F 20 71 CE A3 1A C0 8A 4F 20 71 CE A3 1A C0 8A 4F 20 71 CE A3 1A C0 8A 4F 20 can1 4C9 [20] 6C 5A 98 54 DD D1 CB 09 6C 5A 98 54 DD D1 CB 09 6C 5A 98 54 can1 536 [48] 25 B8 B6 43 71 CD 54 71 25 B8 B6 43 71 CD 54 71 25 B8 B6 43 71 CD 54 71 25 B8 B6 43 71 CD 54 71 25 B8 B6 43 71 CD 54 71 25 B8 B6 43 71 CD 54 71 can1 308 [02] C3 57 can1 33E [05] 65 8C 7B 21 83 can1 3F5 [05] EA E0 07 63 EB can1 633 [03] 39 10 18 can1 25D [32] 01 4E 65 41 E8 4D 94 6F 01 4E 65 41 E8 4D 94 6F 01 4E 65 41 E8 4D 94 6F 01 4E 65 41 E8 4D 94 6F can1 2FB [03] A8 D8 E3 can1 0DE [04] A1 11 3F 32 can1 012 [06] 85 23 B2 07 1A 03 can1 658 [08] A0 8A 2D 67 97 79 A1 64 can1 37D [05] 1A 57 E8 4F 72 can1 70A [04] 5E 6A B8 0F can1 3A8 [07] 65 C5 48 76 05 B6 11 can1 5D4 [07] ED 03 A6 07 CF D8 DC can1 7DA [05] 94 18 50 09 B8 can1 7A9 [05] CC 5E 02 74 BC can1 3FC [01] D6 can1 599 [06] EB 23 02 61 16 D9 can1 47C [06] 88 20 F2 62 86 3B can1 30A [06] C4 98 57 61 B2 4E can1 57E [16] B8 04 86 5B 52 EB DF 45 B8 04 86 5B 52 EB DF 45 can1 191 [05] 22 C4 BC 26 6B can1 53B [06] 23 AA AA 00 E4 F4 can1 6EB [64] A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D A0 64 BE 5E E7 FA 20 1D‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ You can check with a scope your CAN FD frame (here CAN High): And you can see the first part of the frame sent @500kps and the second part @4Mbps. If you unplug one wire, the messages will no longer be sent as no acknowlege will occurs. You can also send message without flexible datarate. In our case, we'll send long frame at 500kps (no more 4Mbps transfer for end of the frame): imx8qxpmek:~# cangen can0 -v -f -g 20 can0 6FE##0.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E.6B.C6.BA.1A.82.2D.29.7E can0 3E2##0.D4.9E.3D can0 1DE##0.D0.D8.33.50.7E.39 can0 7CE##0.FA.68.25.74.86.E7.E1.4A.FA.68.25.74.86.E7.E1.4A.FA.68.25.74 can0 7C3##0.58.E6.F2.1E.BD.7D.F8.7F can0 32A##0.0D.06.98.0D.08.81.5C.4E.0D.06.98.0D.08.81.5C.4E.0D.06.98.0D.08.81.5C.4E.0D.06.98.0D.08.81.5C.4E.0D.06.98.0D.08.81.5C.4E.0D.06.98.0D.08.81.5C.4E can0 48B##0.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47.76.48.B4.34.59.81.B9.47 can0 3FC##0.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00.6E.70.F7.36.FB.82.B9.00 can0 4BE##0.7D.B0.E2.7E.A0.F0.DF.24.7D.B0.E2.7E can0 60C##0.0E can0 257##0.69.11.0C.4B.25.CA.16.65.69.11.0C.4B.25.CA.16.65.69.11.0C.4B.25.CA.16.65.69.11.0C.4B.25.CA.16.65.69.11.0C.4B.25.CA.16.65.69.11.0C.4B.25.CA.16.65 can0 0BA##0.AB.B1.F8 can0 0FC##0.3A.7E.FB.34 can0 452##0.2F.4D.04.26.DE.80.EA can0 2C7##0.37.02.A4.4D.C3 can0 0B4##0.BE.39.AD.3B.73 can0 17E##0.13.66.44.6A.8A.8F.CE.7A.13.66.44.6A.8A.8F.CE.7A.13.66.44.6A‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ You can also force the CAN to only send CAN 2.0b frames (not FD, you'll have 8-byte data max frames): imx8qxpmek:~# cangen can0 -v -g 20 can0 7FF#8F.04.3F.31.EB can0 135#92.7C.46.5C.95.4E.6C.48 can0 0F8#E3.E4.7E.4D.92.2A.1D.69 can0 68F#C6.B7.BA.35.78.06 can0 4EC#D8.D9.86.19.40.BE.64.05 can0 09F#EE.E1.70.7D.13.C9.18.53 can0 7CE#BB.CD.FE.50.3E.B6.A4.4A can0 3C7#04 can0 1F6#B2.E4.4B.42 can0 080#C1.81.65.41 can0 14C#0B.B4.7E.5D can0 15A#53 can0 1CF#86.D4.ED.11.6E.BA.20.14 can0 257#82.83.39.67 can0 2C1#64.20.DF.0D.89.0E.14.55 can0 45E#50.72.44.76.55.4E.96.0F can0 6FC#80.81 can0 046#F6 can0 1E5#6D can0 0D2# can0 7EB#0F.3D.29.78.42.72.60.61 can0 480#68 can0 1CE#CB.05.12.74.2D.0E.F2.14 can0 634#82.5C.88.24.31.75.AF.03 can0 71D#AE.4C can0 144#F5.A8.17.70 can0 2A5#69.BE can0 222#18.C6.AA.4A.0D.5A.EC.48 can0 5FA#4F.CC.4C.2A.7B.BA.31 can0 3B9#BD.B1.2F.3C.87.D5.D1 can0 583#B4.E3.C3.4E.B8.D3.22.43‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Quaestion: What does exactly the RNG_TRIM after burning the SRK hash table? There is no such thing on the former i.MX HAB procedure. What would a random generator stuff bring here? Additionnally, there is the possibility to lock the SRK shadow register via an OTP bit. Is it recommeneded to lock it? if not, is it really possible to change the SRK hash value by modofying the shadow register value before performing the SRK hash key check in a HAB boot process? One last question: the PKI requires the user to enter a certificate lifetime. Does that really mean that openssl will refuse generating new signatures once the certificates lifetime is expired? Answer: 1. The intent of the of the RNG_TRIM fuses is for Freescale to essentially extendthe amount of time the RNG4 in CAAM has to generate entropy.  The longer this period the more likely it is that RNG4 will generate entropy that will pass its internal statistical tests.  The reason for the fuses is HAB (in the Closed configuration only) instantiates the RNG by default and needs some external indication on how to progran the RNG4 in CAAM to ensure the internal HW statistical tests will pass.  This was to allow the RNG to be useable by application code after execution has left the ROM.  However this requires that the RNG_TRIM fuse value be fully characterized across numerous conditions temperature, voltage etc.  This effort is still on going.  For customers performing secure boot (in Closed configuration) we recommend they follow Section 6.3 of http://cache.freescale.com/files/32bit/doc/app_note/AN4581.pdf.  In this case the RNG4 can be instantiated by CAAM driver code which can be easily changed if required. 2. Yes, once the SRK hash is provisioned to the SRK_HASH field it is recommended to blow the corresponding SRK_LOCK fuse.  If the SRK_LOCK fuse is not blown then additional fuses in the SRK_HASH field can be blown.  This will cause devices in the closed configuration to fail to boot.  i.e. "bricking" the device. 3. Please see https://community.freescale.com/message/334186#334186 for the answer to your question on the certificate validity period.

Q: Q&A: Where to find IBIS Models on the web? A: In the first figure (FSL driving 100 ohm), the processor is DC coupled to a transmission line and terminated at the far end with a 100-ohm resistor. The results look pretty normal for this. In the other figure, the processor is dc coupled to a transmission line, then ac coupled to another transmission line segment (0.1u) with 50-ohm resistors to ground, and then drives the inputs of an HCSL clock buffer. The results are pretty un remarkable. The top red signal in the trace is one of the IMX6 clock outputs, the first green signal is the other clock output, and the last green signal (from top to bottom that is) is the differential signal seen by the clock buffer. The customer is concerned about the asymmetrical drive of the processor. It looks like LVDS clock outputs do not like to be AC coupled. This simulation resembles the way the clock is handled in the Smart Device schematics where the clock is AC coupled to the reference clock inputs on the PCIE connector. The ibis files were downloaded from the web (21x21_imx6q, consumer variant). So a few updates: I had the customer download the latest duallite IBIS models. Previously they were apparently using the quad/dual models. They are going to update HyperLynx and are going to run a simulation and let me know if they still see the same issue. He said he's using "linesim". Meanwhile he noticed a different problem with the duallite/solo IBIS models. Although the datasheet says LVDDR3 (1.35V) is supported, there is no model for DDR3_L either as input or output. The same model existed in the quad/dual models. Do you know why this option is not in the duallite IBIS models? Thanks! A ctm of mine would like to get the IBIS model with LVDDR3 support on the i.MX6 DL. For mx6-duallite IBIS models for DDR3L memory (1.35V). It'd be great if the models matched the quad version. Please find the new updated IBIS file in website. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6DL&nodeId=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab

  Some customers want to expose their i3c device on the /dev, In order to develop their i3c APP or operation the i3c device like I2C. But in our default BSP code, we do not support this feature for I3C device, This article will introduce how to make the i3c device expose to the user space. Board : i.MX 93 EVK BSP Version : lf-6.1.55-2.2.0 I3C device : LSM6DSOXTR Step 1 : Rework the i.MX93 EVK Board, Install the R1010.      Step 2 : Apply the add_i3c_device_to_dev.patch file to the linux kernel code              Command : git apply add_i3c_device_to_dev.patch Step 3 : Re-compile the kernel Image file.              Command : make imx_v8_defconfig                                  make Step 4 : Boot your board with "imx93-11x11-evk-i3c.dtb" file and see if you can see the I3C device on the /dev directory. Result : We can see the i3c device is appeared in /dev directory, The i2c-8 is an i2c device mounted to the i3c bus. The i3c is backward compatible with i2c device. It will simulate the I2C signal loading i2c device.                 PS : You can also use the i2ctool detect i2c-8 device. As shown in the following picture:   Note : If you need the patch file, Please contact me any time for free.

This doc will show: i.MX8DXL EVK board without connect  hardware LCD display, using FreeRDP to share screen to remote PC which is in same network,  PC take this shared screen could  run any command on i.MX8DXL EVK board.   HW: i.MX8DXL EVK board,  PC  SW: i.MX8DXL Linux 5.15.32 BSP release, and code change in this doc   1> i.MX8DXL Linux kernel side, just use imx8dxl-evk-lcdif.dts, but did not connect any LCD display,  so Linux kernel could create related drm device, and weston could be start. But on 8DXL EVK board, ENET1_RGMII_TXD3 and ADMA_LCDIF_D03 pin conflict,  so need code change as 5.15.32-imx8dxl-evk-lcdif.dts.diff.   2> yocto/bld/conf/local.conf, add below line, as freerdp depend on ffmpeg. LICENSE_FLAGS_ACCEPTED+="commercial"   3> For i.MX8DXL,  weston use software pixman render, to use NEON optimization,  pixman need switch to  latest 0.42.0,  enter folder (yocto/bld/tmp/work/armv8a-poky-linux/pixman/1_0.40.0-r0/pixman-0.40.0),  git clone (https://github.com/freedesktop/pixman.git) and checkout to latest 0.42.0:  Also chaneg related build flag at bb file as pixman_0.40.0.bb.diff.     4> Default  freerdp need switch to 2.8.0, enter folder (yocto/bld/tmp/work/armv8a-poky-linux/freerdp/1_2.4.1-r0/git),  git clone (https://github.com/FreeRDP/FreeRDP.git), check out to 2.8.0; And to use neon accelerate freerdp related function, such as color space conversion, image codec encoding ,  need apply patch  freerdp-codechange-neon.diff. And related bb file compile flag change as freerdp_2.4.1.bb.diff     5> bitbake -c compile ffmpeg bitbake -c install ffmpeg   bitbake -c compile pixman  bitbake -c install pixman    bitbake -c compile  freerdp bitbake -c install  freerdp   Copy  generated new libs to default released i.MX8DXL rootfs, make sure ffmeg , pixman, freerdp related libs are  from your build, for example: libfreerdp-client2.so.2 -> libfreerdp-client2.so.2.8.0 libfreerdp2.so.2 -> libfreerdp2.so.2.8.0 libwinpr-tools2.so.2 -> libwinpr-tools2.so.2.8.0 libwinpr2.so.2 -> libwinpr2.so.2.8.0   6> i.MX8DXL Linux rootfs:  file /etc/xdg/weston/weston.ini,  change start-on-startup to true: [screen-share] command=/usr/bin/weston --backend=rdp-backend.so --shell=fullscreen-shell.so --no-clients-resize --rdp-tls-cert=/etc/freerdp/keys/serve start-on-startup=true   7> i.MX8DXL Linux OS, run below cmd: winpr-makecert -path $PWD copy generated files to /etc/freerdp/keys/server.crt and /etc/freerdp/keys/server.key   8> reboot i.MX8DXL EVK board,  make sure  EVK board and PC in the same network; check i.MX8DXL Linux OS , there are two process name as "weston", one process is weston rdp backend to share screen to PC.   9> PC side, get wfreerdp.exe from  https://github.com/FreeRDP/FreeRDP/wiki/Prebuilds PC side run cmd as: wfreerdp.exe /v:ipaddress_of_8DXLEVK     Reference: 1>https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX#design-resources 2>https://github.com/FreeRDP 3>https://github.com/freedesktop/pixman 4>https://github.com/DLTcollab/sse2neon  

Hi all,      I have a problem about usb mass storage driver, that's it can't enumerate my mass storage device.      but it can enumerate my mouse, keyboard...etc hid device.      anyone have idea about it ?      I always get below messages when my mass storage device plugs in.      and below is my dmesg information      My hardware -->      Type A receptacle on otg controller ~

This patch release is target for LPDDR2 ( dual channels in interleave mode ) support on i.MX6DL platform. Two patches are prepared to modify u-boot and kernel in order to have correct DRAM init sequence, 400MHz & 24MHz frequency switching and suspend/resume support. The patches are not fully verified. It is provided as reference for customer to enable their i.MX6DL board with LPDDR2. Customization and Testing is needed by customer. We need to remind some points here: MMDC_MDCFG3LP in 24MHz need to increase the margin ( 0x40222 -> 0x80555 ) in order to pass the OS frequency switch stress test. We are identifying the reason but this workaround is working fine and included to the patch. Code changes in kernel is prepared so that it is compatible to DDR3. In other words, the DDR type will be detected and a correct handling will be done for LPDDR2 and DDR3. In LPDDR2 system, we can't put SDQ pin into LPM during suspend. Otherwise, the system cannot resume. Dual channels in fix mapping mode is not recommended to use.

The getevent function shows kernel events like press button events, touchscreen events, sensor events (like accelerometers or magnetometers). bash-3.2# getevent -h Usage: getevent [-t] [-n] [-s switchmask] [-S] [-v [mask]] [-p] [-q] [-c count] [-r] [device]       -t: show time stamps       -n: don't print newlines       -s: print switch states for given bits       -S: print all switch states       -v: verbosity mask (errs=1, dev=2, name=4, info=8, vers=16, pos. events=32)       -p: show possible events (errs, dev, name, pos. events)       -q: quiet (clear verbosity mask)       -c: print given number of events then exit       -r: print rate events are received Bellow an example of all events on some board bash-3.2# getevent -p add device 1: /dev/input/event2   name:    "mxc_ts"   events:       SYN (0000): 0000  0001  0003       KEY (0001): 014a       ABS (0003): 0000  value 0, min 0, max 0, fuzz 0 flat 0                         0001  value 0, min 0, max 0, fuzz 0 flat 0                         0018  value 0, min 0, max 0, fuzz 0 flat 0 could not get driver version for /dev/input/mouse0, Not a typewriter add device 2: /dev/input/event1   name:    "mxc_power_key"   events:     SYN (0000): 0000  0001     KEY (0001): 003e add device 3: /dev/input/event0   name:    "mxckpd"   events:     SYN (0000): 0000  0001     KEY (0001): 0002  0003  0004  0005  003b  003c  003d  003e                       0066  0067  0069  006a  006c  008b  009e  0161 could not get driver version for /dev/input/mice, Not a typewriter For example, some touchscreen event. Any touchscreen press-up or press-down will return a vector of values related with the event (please, see include/linux/input.h for detail) bash-3.2# getevent /dev/input/event2 0003 0000 0000020e 0003 0001 0000014a 0003 0018 00000037 0001 014a 00000001 0000 0000 00000000 0003 0000 00000209 0003 0001 00000147

1 How to build out userdata.img and cache.img The default fsl android  bsp don't support userdata.img and cache.img. You need add the below patch to build  out these images. The hardware for below patch is imx7D. You can adjust your patch according your hardware. diff --git a/imx7/BoardConfigCommon.mk b/imx7/BoardConfigCommon.mk index 14e4881..c207727 100644 --- a/imx7/BoardConfigCommon.mk +++ b/imx7/BoardConfigCommon.mk @@ -61,7 +61,11 @@ BOARD_BOOTIMAGE_PARTITION_SIZE :=  16777216 BOARD_RECOVERYIMAGE_PARTITION_SIZE := 16777216 BOARD_SYSTEMIMAGE_PARTITION_SIZE := 377487360 +BOARD_USERDATAIMAGE_PARTITION_SIZE := 576716800 +TARGET_USERIMAGES_USE_EXT4 := true +BOARD_CACHEIMAGE_PARTITION_SIZE := 69206016 +BOARD_CACHEIMAGE_FILE_SYSTEM_TYPE := ext4 BOARD_FLASH_BLOCK_SIZE := 4096 TARGET_RECOVERY_UI_LIB := librecovery_ui_imx - +TARGET_USERIMAGES_SPARSE_EXT_DISABLED := true 2  How to add  pre-install apk. I add a content pre-app in device/fsl/imx7. helloworld.apk is the added pre-install apk. diff --git a/imx7/pre-app/AnTutuV2.4.apk b/imx7/pre-app/helloworld.apk new file mode 100755 index 0000000..a96003a Binary files /dev/null and b/imx7/pre-app/AnTutuV2.4.apk differ diff --git a/imx7/sabresd_7d.mk b/imx7/sabresd_7d.mk index d7c5c76..11be86c 100644 --- a/imx7/sabresd_7d.mk +++ b/imx7/sabresd_7d.mk @@ -27,7 +27,8 @@ PRODUCT_COPY_FILES += \         device/fsl/common/input/20b8000_kpp.idc:system/usr/idc/20b8000_kpp.idc \         device/fsl/common/input/20b8000_kpp.kl:system/usr/keylayout/20b8000_kpp.kl \         device/fsl/sabresd_7d/audio_policy.conf:system/etc/audio_policy.conf \ -       device/fsl/sabresd_7d/audio_effects.conf:system/vendor/etc/audio_effects.conf +       device/fsl/sabresd_7d/audio_effects.conf:system/vendor/etc/audio_effects.conf \ +       device/fsl/imx7/pre-app/*:data/. 3 What are userdata.img and cache.img for? userdata.img: we need to integrate some customized APKs which should be preinstalled but should be able removed/updated by end user after product delivery. Which means they cannot be installed as system APPs in /system/app folder but User APPs in /data/app folder. At this point, we need compile userimage by ourself. Cache.img: /cache include the content when apk start running. You may storage some special content which app need. I have not find any advantage to pre-build cache.img. Note:      a. The  userdata.img and cache.img's format is sparse ext4 image. You need convert it through simg2img.           The  tool simg2img located at lp5.1_sabresd_7d_4_20/out/host/linux-x86/bin/simg2img           You can use below command to get raw ext4 userdata.img which can be burned into emmc/sd.           out/host/linux-x86/bin/simg2img userdata.img userdata_raw.img     b. BOARD_USERDATAIMAGE_PARTITION_SIZE BOARD_CACHEIMAGE_PARTITION_SIZE define the size of data and cache partition Reference: https://community.freescale.com/docs/DOC-105215

Overview i.MX6Dual/Quad and i.MX6DualLite supports 32-bit and 64-bit DDR3. Freescale i.MX6 SabreSD board deploys 64bit DDR3 and 64bit DDR3 script is delivered into Linux/Android Software release. This document introduces how to create i.MX6 32bit DDR script based on 64bit DDR script when deploying 32bit DDR on customized board. Changes Set the DSE field in the following iomux registers to 0 - disable unused IO pad to save power: IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4 IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5 IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6 IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7 IOMUXC_SW_PAD_CTL_GRP_B4DS IOMUXC_SW_PAD_CTL_GRP_B5DS IOMUXC_SW_PAD_CTL_GRP_B6DS IOMUXC_SW_PAD_CTL_GRP_B7DS IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM4 IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM5 IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM6 IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM7 Update MMDC registers to reflect 32bit DDR changes: MMDC0_MDASP: Update CS0_END if CS size is changed. MMDC0_MDCTL: set DSIZ to 32 bit MMDC1_MPODTCTRL: Set it as 0 and disable the odt of higher byte Follow "i.MX 6 Series DDR Calibration" Application note to calibrate DDR parameters. Reference One example about 32bit DDR script is located under uboot-imx git ( File: board/freescale/mx6q_sabresd/flash_header.S). Open it and you can see the following script: #if defined CONFIG_MX6DL_DDR3 #if defined CONFIG_DDR_32BIT ... #endif You can refer to it and create your 32bit DDR script.

This documents describes how to add the NFC support to i.MX8M mini evk running Yocto. Hardware setup: The i.MX8M mini evk (see i.MX 8M Mini Evaluation Kit | NXP) featuring Raspberry Pi compliant connector, the OM5578/RPI PN7150 demo kit can be used to perform this porting (see NFC Development Kits for Arduino and more|NXP). However a small modification must be done because some of the signals required by PN7150 are not mapped to i.MX8M mini expansion connector pins. OM5578 IRQ signal must be mapped to Raspberry Pi connector pin #19 and OM5578 IRQ signal must be mapped to Raspberry Pi connector pin #21. See below a picture of the modification: Then, the two boards can fit together as shown in the picture below: Quick start using demo image: The demo image including support for PN7150, is based on i.MX Linux 4.14.78_1.0.0 BSP software release (see i.MX Software | NXP). Related documentation can be downloaded from here: https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS. Just flash the demo image (downloaded from here: https://www.nxp.com/lgfiles/updates/NFC/LINUX_L4-14-78_IMAGE_MX8MMEVK.zip) following guidelines from i.MX_Linux_User's_Guide document (part of L4.14.78_1.0.0_LINUX Documentation package mentioned above). Then in a terminal you can run the demo application included in the image executing the command:    # nfcDemoApp poll Approaching the NFC tag, provided as reference in the OM5578 demo kit, to the NFC Antenna will trigger such display: Adding PN7150 support to imx-linux-sumo release: Pre-condition is to have L4.14.78_1.0.0 release installed and already built as described in i.MX Yocto Project User's Guide (part of L4.14.78_1.0.0_LINUX Documentation package mentioned above) :     $ repo init -u https://source.codeaurora.org/external/imx/imx-manifest  -b imx-linux-sumo -m imx-4.14.78-1.0.0_ga.xml     $ repo sync     $ MACHINE=imx8mmevk DISTRO=fsl-imx-xwayland source fsl-setup-release.sh -b build_dir     $ bitbake fsl-image-validation-imx Then to add PN7150 support to your imx-linux-sumo environment, follow below step by step guidelines: In the sources directory, download the meta-nxp-nfc layer from https://github.com/NXPNFCLinux/meta-nxp-nfc     $ git clone https://github.com/NXPNFCLinux/meta-nxp-nfc.git  Define hardware connection between CPU and PN7150 in device-tree adding the following lines to file build_dir/tmp/work-shared/imx8mmevk/kernel-source/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts: @@ -227,6 +227,8 @@                         fsl,pins = <                                 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL                  0x400001c3                                 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA                  0x400001c3 +                               MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11             0x41 +                               MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12             0x41                         >;                 };   @@ -747,6 +749,13 @@         pinctrl-0 = <&pinctrl_i2c3>;         status = "okay";   +       pn54x: pn54x@28 { +               compatible ="nxp,pn547"; +               reg = <0x28>; +               interrupt-gpios = <&gpio5 11 0>; +               enable-gpios = <&gpio5 12 0>; +       }; +         pca6416: gpio@20 {                 compatible = "ti,tca6416";                 reg = <0x20>; Add the meta-nxp-nfc layer to the build definition updating file build_dir/conf/bblayers.conf with: BBLAYERS += " ${BSPDIR}/sources/meta-nxp-nfc" Add the meta-nxp-nfc layer components to the image definition updating file build_dir/conf/local.conf with: IMAGE_INSTALL_append = " kernel-module-nxp-pn5xx nxp-nfc-bin " Re-build the linux kernel:     $ bitbake -f -c compile linux-imx && bitbake -f -c deploy linux-imx Build meta-nxp-nfc layer:     $ bitbake nxp-nfc Re-build the complete image to include the modifications:     $ bitbake fsl-image-validation-imx Then you can flash the updated image to your i.MX8M mini evk and run the demo application as described in above "Quick start using demo image" chapter. Reference: This porting have been done (demo image and instructions) following guidelines provided in AN11679_PN71xx_Linux_Software_Stack_Integration_Guidelines document.

Following docs(English or Chinese version) are also can be referred as a hand on guide. Freescale i.MX6 DRAM Port Application Guide-DDR3  飞思卡尔i.MX6平台DRAM接口高阶应用指导-DDR3篇    Please find i.Mx6DQSDL LPDDR2 Script Aid through below link. i.Mx6DQSDL LPDDR2 Script Aid  Please find i.Mx6DQSDL DDR3 Script Aid through below link. i.MX6DQSDL DDR3 Script Aid  Please find i.MX6SX DDR3 Script Aid through below link. i.MX6SX DDR3 Script Aid  Please find i.MX6SL LPDDR2 Script Aid through below link. i.MX6SL LPDDR2 Script Aid  Please find i.MX6UL DDR3 Script Aid through below link.. https://community.nxp.com/docs/DOC-329899  Please find i.MX6UL LPDDR2 Script Aid through below link. i.MX6UL_LPDDR2_Script_Aid  Please find i.MX6ULL DDR3 Script Aid through below link. i.MX6ULL_DDR3_Script_Aid 

Q: What is i.Mx6 ECSPI max frequency? https://community.freescale.com/message/338305 But in the RM we clearly state 60 MHz is the default config while Boot from SPI. I cannot measure it because I have no board where I can boot from SPI Nor. Also if I look at clocking, PLL  is 480MHz divided by 8 is fixed thus we get 60 MHz. Next divider can be either 1, thus ECSPI_CLK_ROOT  = 60MHz or 2, thus ECSPI_CLK_ROOT = 30 MHz. A: From i.MX6 Datasheet (IMX6DQCEC, Rev. 2.3, 07/2013), Table 52 (ECSPI Master Mode Timing Parameters) : ECSPIx_SCLK Cycle Time–Read • Slow group                                        55 ns • Fast group                                        40 ns         ECSPIx_SCLK Cycle Time–Write          15 ns So, only for writing we can get ~60 MHz.

Sometime need standalone compile device tree. Only Linux headers and device tree directory are needed.         

In this doc will show how to use i.MX8QXP DPU do image warp.   SW: i.MX Linux BSP L5.4.24_2.1.0 bsp release and patch in this doc HW: i.MX8QXP MEK board, ov5640 camera, HDMI display   Introduction Image Warping is the process of digitally manipulating image data such that the image’s projection precisely matches a specific projection surface or shape.   i.MX8QXP DPU controller could do image warp work by its blit engine and display engine. I choose to enable blit engine’s fetchwarp9 unit to do warp work. Check i.MX8QXP RM, Blit Engine support Image Warp as: “Performs a re-sampling of the source image with any pattern. The sample point positions are read from a compressed coordinate buffer.” So you need prepare two input buffers, one buffer store original image data, the other buffer store resample point coordinate, DPU blit engine will read that two buffer by fetchwarp9 unit, then output result image buffer which contain warped image data. Note i.MX8QXP DPU blit engine fetchwarp9 unit, for the input original image buffer, support RGB and YUV 4:4:4 format. The resample point coordinate buffer contents is depend on what kind warp transformation in your use case; and for each resample point coordinate format check i.MX8QXP RM fecthwarp unit description as below. In this doc, using the 2xs12.4 format, each point x coordinate use (12+4) bit, same as y coordinate.   For DPU fetchwarp9 unit, to enable it work for image warp, check i.MX8QXP RM:   2.Patch notes and test code imx8-dpu-warp-kernel.diff contain the kernel side change for drm ioctl api permission and add vmap function of ion dma_buf_ops. libg2d.so contain the binary for adding warp feature. g2d.h is header file which add define for G2D_WARP and G2D_YUV4. imx8-ov5640-dpu-warp-render.c is a sample code which show how to call g2d lib to image warp, need open the G2D_WARP flag. And this code contain some example calculate the coordinate buffer of rotate, swirl, barrel distortion, affine transformation, perspective transformation, wave transformation. And this code will show read camera input frame then add warp process , then render warp image frame to display.   The test cmd usage as below, read 1080P frame from ov5640 camera, do warp then render warp image to drm plane. Note as dpu fetchwarp9 unit support YUV 4:4:4 input image frame, so below cmd need set parameter YUV4, which will ask ISI driver output YUV 4:4:4 image frame. imx8-ov5640-dpu-warp-render  -i /dev/video0 -f YUV4  -S 1920,1080  -M imx-drm -p 91:38 -F XB24  -b 6  -e g2d  -t 5         -i <video-node> set video node (default: /dev/video0)         -f <fourcc>     set input format using 4cc         -S <width,height>       set input resolution         -s <width,height>@<left,top>    set crop area         -M <drm-module> set DRM module         -o <connector_id>:<crtc_id>:<mode>      set a mode         -p <connector_id>:<crtc_id>     output to a plane         -F <fourcc>     set output format using 4cc         -t <warptype>   set 0 neutual 1 rotate 2 swirl 3 divisionmodel 4 affine 5 perpsptive 6 wave         -b buffer_count set number of buffers        3.Example original image:                     Reference: https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM https://www.nxp.com/webapp/Download?colCode=L5.4.24_2.1.0_MX8QXPC0&appType=license https://en.wikipedia.org/wiki/Image_geometry_correction https://lists.freedesktop.org/archives/dri-devel/2012-March/019778.html https://store.kde.org/p/1246558 https://github.com/ImageMagick/ImageMagick        

This document describes the steps for flashing eMMC from SD Card on i.MX6Q SabreSD board. Download the prebuilt images (Linux 4.1.15) of i.MX6Q SabreSD board from this link. Flash the sdcard image on SD Card. sudo dd if=<sdcard_image> of=/dev/sdX bs=1M && sync Select Boot Mode to SD Card and boot the board from SD Card. Stop the console at u-boot and execute below command. ums 0 mmc 1                 // this will mount SD card as USB Mass Storage to your system Copy bootloader image from system to USB Mass Storage cp <u-boot_image> /media/username/<rootfs>/home/root/ Eject the USB Mass Storage and terminate the ums process by pressing ctrl+c in u-boot. Power Off and Power On the board and login to the kernel console. Flash the bootloader image to eMMC dd if=/home/root/<u-boot_image> of=/dev/mmcblk3 bs=512 seek=2 conv=fsync Mount the partition 1 of SD Card to copy the kernel image and DTB file to /home/root folder. mount /dev/mmcblk2p1 /mnt/ cp -r /mnt/zImage /mnt/imx6q-sabresd.dtb /home/root umount /dev/mmcblk2p1 Make partitions on eMMC manually as per section 4.3.3 in this document using fdisk /dev/mmcblk3 command. Format the partition 1 on eMMC as VFAT and partition 2 as ext4 with below commands mkfs.vfat /dev/mmcblk3p1 mkfs.ext4 /dev/mmcblk3p2 Mount the partion 1 of eMMC and copy kernel image & DTB file. mount /dev/mmcblk3p1 /mnt/ cp -r /home/root/zImage /home/root/imx6q-sabresd.dtb /mnt/ umount /dev/mmcblk3p1 Mount the partion 2 of eMMC & SD Card and copy the file system. mount /dev/mmcblk3p2 /mnt/                                                         // mount partition 2 of SD Card mkdir /home/root/rootfs && mount /dev/mmcblk3p2 rootfs     // mount partition 2 of eMMC cp -ar /mnt/* /home/root/rootfs/ sync umount /dev/mmcblk2p2 umount /dev/mmcblk3p2 Change the Boot Mode to eMMC Power Up the Board. (this will boot the images from eMMC) NOTE: Above steps does not require any other images for eMMC. All the images for eMMC and SD Card are same. Regards, Shivani

Attachched is the reference patch to enable the PMIC external watchdog in SCFW, it is based on SCFW porting kit v1.1.2 from NXP website: https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_SCFWKIT&appType=license&location=null Please apply the patches to "imx-scfw-porting-kit-1.1.2/src/scfw_export_mx8qx_b0" On iMX8QXP MEK board, the patches will enable the PF8100 watchdog by macro "#define ENABLE_PMIC_EXTERNAL_WDOG", and it will refresh the watchdog timer by I2C interface. The default timeout value is 0xD for 8192ms (#define PMIC_EXTERNAL_WDOG_TIMEOUT  0xD), and SCFW will refresh it with 1000ms period (board_pmic_wdog_refresh_period_ms = 1000U). When the iMX8 system goto low power mode, it will pull SCU_PMIC_STANDBY to notify the PMIC, then PMIC will switch to suspend mode too, during PMIC suspend mode, this watchdog timer is off too. It will restart after PMIC resume to normal mode. Without PMIC OTP burning for WDOG, the current setting of patch will trigger hard reset after PMIC WDOG is timeout. 0001-scfw-add-board-board-tick.patch This patch is used to added polling ticket in board.c, after SCFW running, it will call board_tick() with 10ms period. In future SCFW release, this patch is not needed to apply, it is in default code, only when SCFW porting kit version is 1.1.2 and early version, you need apply this patch. 0002-scfw-enable-pmic-external-wdog.patch This is the reference patch to enable the PF8100 watchdog timer and refresh code. iMX8QXP MEK is used as the example. Note: In default SCFW, it had already used internel watchdog to make sure SCFW is always running, if SCFW is built as no debug version (M=0 D=0), all SCFW halt will cause SOC reset. And if hardware had connected the SCU_WDOG_OUT pin from iMX8QXP to PMIC's WDI pin, then during SOC reset, the PMIC will also do hard reset to make a POR reboot for the whole system.

Hi, the document "how to create ubuntu hardfloat rootfs for imx6d/q" was shared by Junping Mao. https://community.freescale.com/docs/DOC-95387 Here, i build the OpenCV based on the ubuntu hardfloat rootfs for i.MX6Q sabre board. Details about building instruction pls refer to the attachment. Thanks!