There are two ethernet ports in i.MX8MP： FEC0 and FEC1(eQOS). Normally we use iperf to test ethernets ports performance. However, when using tftp test, the result is different in two ports. This document describe how to fine tune parameters to increase speed under tftp test or other use case. It is suitable for most i.MX serials and most BSP version.

Customers are experiencing significant and unexpected performance issues in their applications running on Android 14 relative to the performance that they saw on older versions of the OS (such as A12 or A13). This is a known issue on Android Community and is note related to NXP implementation of AOSP (Android Open Source Project). The information Android 14 can recollect from any debuggable application is a lot. With the help of Perfetto you can get and incredible analysis of all processes running on Android OS or an analysis of the memory usages. All this features have a side effect on debuggable applications, where debuggable application can experiment low performance. The degradation on the performance is around 1.5x and 2.0x the time taken on a previous Android version. In order to take really measurements on the application performance it is necessary to disable those features when building the apk . Quick Workaround There are two ways of disabling debug features: Build a release variant by adding a dummy key to Android-Studio. Read the following link to get further details on how to do it. Set debuggable feature to false on build.gradle (Module :app) . Here an example: android { buildTypes { debug { applicationIdSuffix '.debug' debuggable false // The important line! } } } Rebuild the apk and installed to the target with adb install <my-apk> . The application should now have the same performances it was having with A13 or older. References: Debuggable APP lag after updating to Android14

Poring from MCIMX6Y2CVM05AB to MCIMX6Y1DVM05AB Backgroud: Our customers encounter Kernel stuck at starting kernel issue. Here is detail description as below: (1 )Using customer board, and the main chip is MCIMX6Y1DVM05AB. (2) MCIMX6Y2CVM05AB works fine using the same image. (3)The kernel version is L5.10.52. But the old L4.14.98 works fine. (4)Using imx6ull evk's dtb has the same symptom. (imx6ull-14x14-evk.dtb in L5.10.52 prebuild image from NXP. (5)The  L4.14.98 versionBSP both  MCIMX6Y1DVM05AB and MCIMX6Y2CVM05AB can work well For the L5.10.52 only the MCIMX6Y2CVM05AB can work​. Kernel crash at here:   Generally speaking, most customer need to porting from old chip to new, for this customer need to use porting from the new product to old products they have their reasons.     Two reasons: (1) Their previous project use MCIMX6Y1DVM05AB. And also have MCIMX6Y1DVM05AB stock. (2) And the customer needs 15kpcs for urgent demand. But there is no MCIMX6Y2CVM05AB stock in their city.​ Porting steps: For these two products, they are difference, but most pins to pins in design. 1\Found the difference for this two product: See the datasheet: https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLCEC.pdf https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLIEC.pdf     For the MCIMX6Y1DVM05AB do not have the LCD/CSI, one CAN, one Ethernet,one ADC.   2\Check the customer’s board dts setting and modify Ask customer for their Board dts file and check: The MCIMX6Y1DVM05AB chip has only followed features, so customer should make sure the related drivers are removed from dts. That means in climaxL5.10.52.7z, customer should disable the followed drivers: pxp, lcdif, can2. (csi and fec2 are already disabled) (1) Disable the fec2   (2)CSI disable   (3)Lcdif disable   (4)CAN 2 Remove     Result: After remove these unused functions. The MCIMX6Y1DVM05AB could boot well on customer’s board. If customer use the MCIMX6Y2CVM05AB, all these functions need to add.  

Hardware:​  Soc: NXP i.MX 93 11x11 EVK FPGA:​ Lattice ECP5 Evaluation Board   Deploy the driver of FlexSPI and Test​​ Apply below patch into Linux kernel and compile. (6.1.55-2.2.0 is tested)​ git apply 0001-Added-flexspi-fpga-module-support-of-i.MX93.patch​ make imx_v8_defconfig​ make –j8​ Copy the generated imx93-11x11-evk-flexspi-m2-fpga.dtb to the boot partition​ Set the dtb in uboot​ setenv fdtfile imx93-11x11-evk-flexspi-m2-fpga.dtb ​ saveenv​ boot​ Copy the generated imx93_flexspi_fpga.ko and the test app source file flexspi_fpga_latency_test.c to home directory Run blow command to do the test​ gcc flexspi_fpga_latency_test.c​ ./a.out 128​ ​ About driver and test app​ ​The driver can be installed in test app automatically. Insmod command is called in test app as below.​ insmod imx93_flexspi_fpga.ko mux=1 div=30​ The parameter mux can be set to 0,1,2,3. Means 24MHz, 1000MHz, 800MHz, 625MHz root clock. And div is the divider. In default, 1000/30 = 33MHz is applied. More details of hardware connection: Since the adapter board is not on NXP website and it is just for test, there are two options. Use fly-wire to connect flexspi and lattice fpga instead of the adapter card. Use M.2 adapter card but need be produced by customer themselves.  If M.2 adapter is not used, fly-wire can be applied to connect i.MX93 to FPGA. The column of Pads is a pad list that can bring out signal lines from the bottom layer of i.MX93 EVK. i.MX 93 Pads of imx93 FPGA ECP5 SD3_CLK TP912 B10 SD3_CMD TP913 A9 SD3_DATA0 TP914 D8 SD3_DATA1 TP915 E8 SD3_DATA2 TP916 C7 SD3_DATA3 TP917 C6 GND   GND J1003-2 1V8   VCCIO0 Remove JP10 Jumper   It is also possible that the customer would choose M.2 adapter card solution. The adapter card is simple and cheap. It can be redesigned easily with attached schematic as reference. Make sure the board thickness is 0.8mm. And recommend to apply GND copper to improve signal quality. The schematic is attached. To get the information about the demo from Lattice perspective, please check the link below. Lattice QSPI to NXP MPU Reference Design | Lattice Reference Design  

share more detailed steps how to bring up stereo capture of basler camera by imx8mp

This is an example for user to transfer files between i.MX8MP Linux platform and other devices via Bluetooth. Environment : Hardware : i.MX8MP LPDDR4 EVK Board, Android Phone Software : L6.6.23-2.0.0   Step1 : Build Yocto image and burnt to the SD card or EMMC repo init -u https://github.com/nxp-imx/imx-manifest.git -b imx-linux-scarthgap -m imx-6.6.23-2.0.0.xml repo sync DISTRO=fsl-imx-xwayland MACHINE=imx8mp-lpddr4-evk source imx-setup-release.sh -b build-xwayland Add the following code to "conf/local.conf"          IMAGE_INSTALL:append = " glibc-gconv-utf-16" bitbake imx-image-full uuu -b emmc_all imx-image-full-imx8mp-lpddr4-evk.rootfs-20240919015845.wic Step2 : Test steps Boot board with "imx8mp-evk-usdhc1-m2.dtb" file. load Wi-Fi Firmware           root@imx8mp-lpddr4-evk:~# modprobe moal mod_para=nxp/wifi_mod_para.conf Load BT firmware and enable BT          root@imx8mp-lpddr4-evk:~# modprobe btnxpuart          root@imx8mp-lpddr4-evk:~# hciconfig                    root@imx8mp-lpddr4-evk:~# hciconfig hci0 up connect  the BT of Android Phone          root@imx8mp-lpddr4-evk:~# bluetoothctl          [bluetooth]# default-agent          [bluetooth]# agent on          [bluetooth]# discoverable on          [bluetooth]# scan on          [bluetooth]# scan off                    [bluetooth]# pair 90:F0:52:92:A6:6C          we need to type Yes on board and click 配对 on phone.                           [bluetooth]# connect 90:F0:52:92:A6:6C                 [Meizu16m]# quit          Transfer file          1). Android Phone-> i.MX8MP EVK Board          root@imx8mp-lpddr4-evk:~# /usr/libexec/bluetooth/obexd -a -n -r /root/ & obexctl                   Then select a file on your phone ad choose transfer by Bluetooth.                   2).i.MX8MP EVK Board -> Android Phone          [obex]# connect 90:F0:52:92:A6:6C                   [90:F0:52:92:A6:6C]# send /home/root/test.txt          Note :  1. Do not suggestion use IOS phone. 2. If your i.MX8MP board can not scan your BT device, Suggest change the device BT name and run on "scan on" command again.  

Overview The purpose of this document is to provide a guide on how to enable UART 4 on i.MX8M Mini on Cortex A53. By default on i.MX-ATF is set on Cortex M4 Domain, i.MX-ATF helps ensure that i.MX processors boot securely. Reference: imx-atf. Requirements: Arm Toolchain: sudo apt-get install gcc-aarch64-linux-gnu 1. Build imx-boot image For a better reference how to build imx-boot image, go to Section 4.5.13 How to build imx-boot image by using imx-mkimage available on i.MX Linux User's Guide.   $ cd ~ $ git clone https://github.com/nxp-imx/uboot-imx -b lf_v2023.04 $ cd uboot-imx/ $ git checkout lf-6.6.23-2.0.0 $ make -j $(nproc --all) ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- imx8mm_evk_defconfig $ export ARCH=arm64 $ cd ~ $ git clone https://github.com/nxp-imx/imx-mkimage.git $ cd imx-mkimage/ $ git checkout lf-6.6.23-2.0.0 $ cd ~ $ git clone https://github.com/nxp-imx/imx-atf.git $ cd imx-atf/ $ git checkout lf-6.6.23-2.0.0   The master domain for the UART4 is assigned to the Cortex M4, so, make the following changes to assign it to the A53 processor instead: diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c index 179b6226f..b0427afff 100644 --- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c @@ -114,10 +114,11 @@ static const struct imx_csu_cfg csu_cfg[] = { #else static const struct imx_rdc_cfg rdc[] = { /* Master domain assignment */ - RDC_MDAn(RDC_MDA_M4, DID1), + RDC_MDAn(RDC_MDA_A53, DID0), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W),   After applying the changes, set your toolchain and then, compile with the following command: $ make PLAT=imx8mm bl31   In case you have the following error: Use this command to unset the flags and compile again: $ unset LDFLAGS   Then, copy the corresponding files to imx-mkimage/iMX8M. For more information, please check section 4.5.13 on i.MX Linux User's Guide. *NOTE: Some of this files are located on a link which you can access with the following command, for more information check the Release Notes, in this case for version 6.6.23-2.0.0 on Embedded Linux for i.MX Applications Processors. $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.24-fbe0a4c.bin $ chmod +x firmware-imx-8.24-fbe0a4c.bin $ ./firmware-imx-8.24-fbe0a4c.bin   Finally, copy flash.bin located on: imx-mkimage/iMX8M to a folder to flash your board as follows: You can download the uuu.exe from mfgtools and the .wic file from the prebuild images from: Embeded Linux for i.MX Applications Processors uuu.exe -b emmc_all flash.bin imx-image-full-imx8mmevk.wic   2. Change DTB to enable UART4 First, copy and rename the imx8mm-evk.dts to identify there is a change for enabling UART4: $ cd linux-imx $ cp arch/arm64/boot/dts/freescale/imx8mm-evk.dts arch/arm64/boot/dts/freescale/imx8mm-evk-uart4.dts $ vi arch/arm64/boot/dts/freescale/imx8mm-evk-uart4.dts And make the following changes: &ecspi2 { status = "disabled"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; assigned-clocks = <&clk IMX8MM_CLK_UART4>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; fsl,uart-has-rtscts; status = "okay"; }; &iomuxc { pinctrl_uart4: uart4grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140 MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x140 MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x140 MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x140 >; }; }   After applying the changes, set your toolchain and then, compile with the following commands: $ make imx_v8_defconfig $ make freescale/imx8mm-evk-uart4.dtb Finally, copy the DTB to your board, reboot it and change the DTB in the u-boot environment, boot your board and take a look to see if the UART4 is correctly enabled.    

We are pleased to announce that Config Tools for i.MX v16.1 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) • Clocks – Disabling enabled clock outputs that have settings with shared bit-fields after reopening the configuration is fixed. – Clock slices with multiple outputs are supported. • TEE – An incorrect number of the MPU region attributes shown for the configuration of RT1180 is fixed. – An incorrect domain visibility and tab names when DAC is disabled on RT1180 is fixed.

The purpose of this document is to provide extended guidance for the selection of compatible LPDDR4 memory devices that are supported by the i.MX 91 series of processors. In all cases, it is strongly recommended to follow the DRAM layout guidelines outlined in the NXP Hardware Developer's Guides for the specific SoCs. Memory devices with binary densities (e.g., 1 GB, 2 GB, 4 GB) are preferred because they simplify memory management by aligning with system addressing schemes and reducing software complexity.   LPDDR4 - Maximum Supported Densities SoC Max Data bus width Maximum density Assumed memory organization Notes i.MX 91 (i.MX 91xx) 16-bit 16 Gb / (2 GB) single rank, single channel device with 17-row addresses (R0 - R16) 1, 2, 3   LPDDR4 - List of Validated Memories The validation process is an ongoing effort - regular updates of the table are expected. SoC Density Memory Vendor Validated Memory Part# Notes i.MX 91 16 Gb / (2 GB) Micron MT53E1G16D1FW-046 AAT:A MT53E1G16D1ZW-046 AAT:C 5    2 Gb / (256 MB)  Winbond  W66BP6NBHAHJ 4 8 Gb / (1 GB) Nanya NT6AN512M16AV-J1I   4 Gb / (512 MB) Nanya NT6AN256M16AV-J1I 4 8 Gb / (1 GB) ISSI IS43LQ16512B-046BLI 4 12 Gb / (1.5 GB) Micron MT53E768M16D1ZW-046 4 16 Gb / (2 GB) Intelligent Memory IMAG16L4KBBG 4 2 Gb / (256 MB) Nanya NT6AN128M16AV-J1 4 4 Gb / (512 MB) UniIC SCB11N4G160BF-04ZI 4 4 Gb / (512 MB) ISSI IS43LQ16256B-053BLI 4 4 Gb / (512 MB) Winbond W66CP6RBHAHJ 4     Note: This device supports operation with LPDDR4 memories only. LPDDR4x operation is not supported. Dual‑mode memories that support both LPDDR4 and LPDDR4x are allowed as long as the device can operate in LPDDR4 mode, including using LPDDR4 I/O voltage levels and initialization sequences. NOTE: LPDDR4 devices from certain memory vendors may not support operation at low speeds and in addition, DQ ODT may not be active, which can impact signal integrity at these speeds. If low-speed operation is planned in the use case, please consult with the memory vendor about the configuration aspects and possible customization of the memory device so correct functionality is ensured. Note 1: The numbers are based purely on the IP documentation for the DDR Controller and the DDR PHY, on the settings of the implementation parameters chosen for their integration into the SoC, SoC reference manual and on the JEDEC standards JESD209-4B (LPDDR4). Therefore, they are not backed by validation, unless said otherwise and there is no guarantee that an SoC with the specific density and/or desired internal organization is offered by the memory vendors. Should the customers choose to use the maximum density and assume it in the intended use case, they do it at their own risk. Note 2: Byte-mode LPDDR4 devices (x16 channel internally split between two dies, x8 each) of any density are not supported therefore, the numbers are applicable only to devices with x16 internal organization (referred to as "standard" in the JEDEC specification). Note 3: The SoC also supports dual rank single channel devices therefore, 16Gb/2GB density can be also achieved by using a dual rank single channel device with 16-row addresses (R0 - R15). Note 4: The memory part number did not undergo full JEDEC verification however, it passed all functional testing items. Note 5: The memory part number is not recommended for new designs and superseded by a new part number

The layer attached to this article is obsolete. Please use the meta-imx-fastboot GitHub repo instead.   The purpose of this article is to show how to reduce the boot time on i.MX 8QXP using U-Boot Falcon Mode. The general technique is presented in the AN14093. This article was tested on LF-6.6.23-2.0.0 BSP. How to do it 1. Follow the steps in the i.MX Yocto Project User's Guide and prepare your Yocto building environment. We will further assume that the BSP is in the ~/imx-yocto-bsp directory and the build directory is ~/imx-yocto-bsp/build. 2. Unpack the attached archive in ~/imx-yocto-bsp/sources. This should create the ~/imx-yocto-bsp/sources/meta-imx-fastboot directory.  3. Add the meta-imx-fastboot layer to your build using the following command: bitbake-layers add-layer ~/imx-yocto-bsp/sources/meta-imx-fastboot 4. If you've previously built an image in the same tree, clean the u-boot-imx and imx-boot packages using the following command: bitbake -c clean u-boot-imx imx-boot 5. Build the new image. Out of the box, this package is configured for core-image-minimal. We will show you below how to adapt it for other images: bitbake core-image-minimal 6. Write the resulted image on eMMC/SD using your preferred method and boot the board. 7. By default, the board will boot normally. To enable fast boot, stop the board in U-Boot, and run the following command: u-boot => run prepare_fdt 8. Reboot the board. From this point on, the board should boot in fast mode. Far less messages will be printed by the kernel or systemd during boot. You may further optimize the boot time by removing unnecessary features from the kernel and/or removing unnecessary services started by systemd. Please refer to AN14093. 9. If you ever want to re-enter U-Boot, please keep the 'c' key pressed in the serial console during board power-on. It's easiest if you press and keep the 'c' key pressed before powering on/pressing the reset button. How it works The layer we've added contains patches for U-Boot, ATF and imx-mkimage. In addition, it modifies the core-image-minimal recipe. In U-Boot, the necessary options for Falcon Mode are added in a new configuration file, named imx8qxp_mek_falcon_defconfig, as well as an implementation of the spl_start_uboot() function. In ATF, the device tree load address is added in the correct parameter. In mkimage, two new targets are created: kernel-atf-container.img (to be deployed in the boot partition) and uImage (to be deployed in the rootfs). The change in the core-image-minimal recipe ensures that the new files are copied in the resulting image. If you want to build a different image, you need to copy the content of core-image-minimal.bbappend in a new file, named according to the image you want to build. For example, if you want to build imx-image-full, you could use the following command: cp ~/imx-yocto-bsp/sources/meta-imx-fastboot/recipes-fsl/images/core-image-minimal.bbappend ~/imx-yocto-bsp/sources/meta-imx-fastboot/recipes-fsl/images/imx-image-full.bbappend       *** DISCLAIMER *** Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

This article describes how to use the Preempt-RT Linux kernel in the i.MX Linux BSP 6.6.23_2.0.0. This is particularly useful for platforms such as i.MX 95, for which there is not yet a Real-Time Edge Software release.    How to do it    1. Follow the steps in the i.MX Yocto Project User's Guide and build your preferred image, for example core-image-minimal. Will further assume that the BSP is in the ~/imx-yocto-bsp directory and the build directory is ~/imx-yocto-bsp/build. 2. Unpack the attached archive in ~/imx-yocto-bsp/sources. This should create the ~/imx-yocto-bsp/sources/meta-otherkernels directory. This archive will work out of the box for i.MX 95 and i.MX 93, and may require some modifications for other platforms, as described below. 3. Add the meta-otherkernels to your build using the following command: bitbake-layers add-layer ~/imx-yocto-bsp/sources/meta-otherkernels 4. Add the OVERRIDES .= ":preempt-rt" to ~/imx-yocto-bsp/build/conf/local.conf file using the following command: echo 'OVERRIDES .= ":preempt-rt"' >> ~/imx-yocto-bsp/build/conf/local.conf This enables the Preempt-RT kernel for your build. You can always go back to your regular kernel by removing this line from ~/imx-yocto-bsp/build/conf/local.conf. 5. Build again your image. After booting this image, you can check the kernel version using: uname -a      How it works    The meta-otherkernels layer contains a .bbappend  for the linux-imx kernel recipe which replaces the sources URL with the Real-Time Edge kernel when the "preempt-rt" override is active. In addition, due to the fact that the current real-time kernel does not support all the board configurations, the layer config file (meta-otherkernels/conf/layer.conf) removes from the build the device tree files that are not supported (when "preempt-rt" override is active).   If you use this layer for other SoCs (other than i.MX 93/i.MX 95), you may need to edit the meta-otherkernels/conf/layer.conf and add the unsupported device trees. If an  unsupported device tree is left, Yocto will give an error during build.        *** DISCLAIMER *** Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

This article describe i.MX8MP normal HAB security boot, and server/client mode. For server/client mode, it is based on customer requirement, because private is stored in server can't be accessed.

This knowledge base add imx8ulp swupdate support based on AN13872. Uboot patch: add_swupdate_support_for_imx8ulp_in_uboot.patch swupdate-scripts patch: 0001-add-imx8ulp-support-in-swupdate-scripts.patch Note You must generate new key referring  5.4.3.3 Generating a key before build. Commands 1. base image build command   ./assemble_base_image.sh -b imx8ulp -e emmc -d doublecopy -m   2. update image build command   ./swu_update_image_build.sh -e -s ./priv.pem -b imx8ulp -g   3. flash command:   uuu -b emmc_all .\imx-boot-imx8ulp-lpddr4-evk-sd.bin-flash_singleboot_m33 .\swu_doublecopy_rescue_imx8ulp_emmc_20240914.sdcard       Useful links: https://sbabic.github.io/swupdate/building-with-yocto.html#automatic-sha256-in-sw-description https://sbabic.github.io/swupdate/sw-description.html?highlight=hwrevision   

Introduction Time Synchronization stands for the alignment of time within distributed nodes, pretty critical for real-time applications, control and measurement systems as voice and video networks; all of them being embedded applications. It needs the synchronization of frequency, phase and time between all the nodes and offers action coordination, high precision triggers and event reference or timestamping. [1] A Time Synchronization resource it's the ethernet standard for time PTP or IEEE 1588 standard, its study begin with the physical representation of time information: PPS; Pulse Per Second. An squared wave timed by the capable MACs, in i.MX families we have two MACs of which. Background Customers are interested in this signal, we have an i.MX 8M Plus kernel 5 resource but there is a new processor family using the next major kernel version; 6. [2] We will go through demonstrating PPS on i.MX 93 EVK in both MACs; FEC and EQOS. HW setup i.MX 93 EVK boot over eMMC. Connect power and debug receptacles. Hands-on for FEC or eth0 MAC uSDHC2 pin group conflicts with the pps output pin and you are ought to remove the uSDHC2 nodes and assign the event0 out pin to the FEC pin group as shown below. --- imx93-11x11-evk.dts 2024-08-23 18:19:56.344798901 +0200 +++ imx93-11x11-evk-pps.dts 2024-09-02 21:31:46.569477421 +0200 @@ -100,18 +100,6 @@ regulator-max-microvolt = <1800000>; }; - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; - off-on-delay-us = <12000>; - enable-active-high; - }; - reg_vdd_12v: regulator-vdd-12v { compatible = "regulator-fixed"; regulator-name = "reg_vdd_12v"; @@ -770,21 +766,6 @@ status = "okay"; }; -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; - fsl,cd-gpio-wakeup-disable; - vmmc-supply = <&reg_usdhc2_vmmc>; - bus-width = <4>; - status = "okay"; - no-sdio; - no-mmc; -}; - &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc3_wlan>; @@ -860,14 +842,15 @@ MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e + MX93_PAD_SD2_DATA0__ENET1_1588_EVENT0_OUT 0x31e >; }; @@ -887,6 +870,7 @@ MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e + MX93_PAD_SD2_DATA0__GPIO3_IO03 0x31e >; }; @@ -998,75 +982,6 @@ >; }; - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins = < - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc2gpiogrpsleep { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 - MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e - MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe - MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - pinctrl_usdhc2_sleep: usdhc2grpsleep { - fsl,pins = < - MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e - MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e - MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e - MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e - MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e - MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e - MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e - >; - }; - /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc3: usdhc3grp { fsl,pins = < The driver also needs the following rework. --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -184,7 +184,8 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable) val |= (1 << FEC_T_TF_OFFSET | 1 << FEC_T_TIE_OFFSET); val &= ~(1 << FEC_T_TDRE_OFFSET); val &= ~(FEC_T_TMODE_MASK); - val |= (FEC_HIGH_PULSE << FEC_T_TMODE_OFFSET); + // val |= (FEC_HIGH_PULSE << FEC_T_TMODE_OFFSET); + val |= (FEC_TMODE_TOGGLE << FEC_T_TMODE_OFFSET); writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); /* Write the second compare event timestamp and calculate After booting the board, run these commands: $ ptp4l -A -4 -H -m -i eth0 & $ echo 1 > /sys/class/ptp/ptp0/pps_enable These will get the SD2_DATA0 or TP1009 running a square wave at 0.5 Hz through setting the ptp0 port with: -A    Select the delay mechanism automatically. Start with E2E and switch to P2P when a peer delay request is received. -4    Select the UDP IPv4 network transport. This is the default transport. -H    Select the hardware time stamping. -m    Print messages to the standard output. Run the next command to set the pps (1 Hz signal): $ echo "0 $(date +%s) 100000000 1 0" > /sys/class/ptp/ptp0/period The last because the current driver needs the actual date and a future start; in this case the signal will start within 100 ms, in order to work. You can try with different start times until the optimal value is found. [3]   Hands-on for EQOS or eth1 MAC This is reduced to the proper devicetree changes, and it does not have driver rework nor pps_enable control file. It uses SD2_CLK or TP1008, so DTS need this adjustment: --- imx93-11x11-evk.dts 2024-08-23 18:19:56.344798901 +0200 +++ imx93-11x11-evk-pps.dts 2024-09-02 21:31:46.569477421 +0200 @@ -100,18 +100,6 @@ regulator-max-microvolt = <1800000>; }; - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; - off-on-delay-us = <12000>; - enable-active-high; - }; - reg_vdd_12v: regulator-vdd-12v { compatible = "regulator-fixed"; regulator-name = "reg_vdd_12v"; @@ -770,21 +766,6 @@ status = "okay"; }; -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; - fsl,cd-gpio-wakeup-disable; - vmmc-supply = <&reg_usdhc2_vmmc>; - bus-width = <4>; - status = "okay"; - no-sdio; - no-mmc; -}; - &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc3_wlan>; @@ -822,14 +802,15 @@ MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e + MX93_PAD_SD2_CLK__ENET_QOS_1588_EVENT0_OUT 0x31e >; }; @@ -849,6 +830,7 @@ MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e + MX93_PAD_SD2_CLK__GPIO3_IO01 0x31e >; }; @@ -998,75 +982,6 @@ >; }; - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins = < - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc2gpiogrpsleep { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 - MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e - MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe - MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - pinctrl_usdhc2_sleep: usdhc2grpsleep { - fsl,pins = < - MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e - MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e - MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e - MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e - MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e - MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e - MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e - >; - }; - /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc3: usdhc3grp { fsl,pins = < After boot, issue these commands: $ ptp4l -A -4 -H -m -i eth1 & $ echo "0 $(date +%s) 1000000000 1 0" > /sys/class/ptp/ptp1/period You will have an squared wave of 1 Hz running within 1 s with the same settings as the FEC setup.   Conclusion Both PPS can run in the same image changes and DTS changes, proven in imx-linux-nanbield branch, with the manifest imx-6.6.3-1.0.0.xml. And it's the start of testing IEEE 1588 and syncing capabilities of this i.MX 9 series processors. Sources [1] http://events17.linuxfoundation.org/sites/events/files/slides/elc_insop_2015.pdf [2] https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8-serials-IEEE1588-1pps-test-procedure/ta-p/1490634 [3] https://github.com/nxp-imx/linux-imx/blob/b586a521770e508d1d440ccb085c7696b9d6d387/Documentation/ABI/testing/sysfs-ptp#L2

Customer proposed to debug code on A core during development stage.  HW: i.MX93/i.MX8MP SW: L6.1.36, Real-time edge Feature: Besides debugging code, enabled compiling image by eclipse. cpu0 boot, then kick off/halt other secondary cpu, debug code on secondary cpu core. Auto reset board and connect jlink to be convenient for restarting debugging.  

P3T1755 Demo   In this space I want to show you the things that you can create usign our products.   In  this demo I demostrate a use case creating a GUI for a Temperature Sensor.   We can create modern GUIs and more with LVGL combined with our powerful processors.               CPU USAGE As we can see  the CPU usage for this demo is around 2%   Pictures         This demo is based on the previous publused articles.   References: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Adding-support-to-P3T1755-on-Linux/ta-p/1855874 https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-run-LGVL-on-iMX-using-framebuffer/ta-p/1853768  

This guide is a continuation from our latest Debian 12 Installation Guide for iMX8MM, iMX8MP, iMX8MN and iMX93. Here we will describe the process to install the multimedia and hardware acceleration packages, specifically GPU, VPU and Gstreamer on i.MX8M Mini, i.MX8M Plus and i.MX8M Nano. The guide is based on the one provided by our colleague Build Ubuntu For i.MX8 Series Platform - NXP Community, which requires to previously build an image using Yocto Project with the following distro and image name. Distro name - fsl-imx-wayland Image name – imx-image-multimedia For more information please check our BSP documentation i.MX Yocto Project User’s Guide.   Hardware Requirements Linux Host Computer (Ubuntu 20.04 or later) USB Card reader or Micro SD to SD adapter SD Card Evaluation Kit Board for the i.MX8M Nano, i.MX8M Mini, i.MX8M Plus   Software Requirements Linux Ubuntu (20.04 tested) or Debian for Host Computer BSP version 6.1.55 built with Yocto Project   After built the image we can start the installation by following the steps below:   GPU Installation The GPU Installation consists of copy the files from packages imx-gpu-g2d, imx-gpu-viv, libdrm to the Debian system. As our latest installation guide, we will continue naming “mountpoint” to the directory where Debian system is mounted on our host machine. Regarding the path provided on each step, we put labels <build-path> and <machine> that you will need to change based on your environment. These are the paths that Yocto Project uses to save the packages. However, this could change on your environment and you can find the work directory from each package using the following command: bitbake -e <package-name> | grep ^WORKDIR= This command will show you the absolute path of the package work directory. 1. Install GPU Packages $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/imx-gpu-g2d/6.4.11.p2.2-r0/image/* mountpoint $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/imx-gpu-viv/1_6.4.11.p2.2-aarch64-r0/image/* mountpoint $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/libdrm/2.4.115.imx-r0/image/* mountpoint   2. Install Linux IMX Headers and IMX Parser $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/linux-imx-headers/6.1-r0/image/* mountpoint $ sudo cp -Pra <build-path>/tmp/work/armv8a-poky-linux/imx-parser/4.8.2-r0/image/* mountpoint   3. Use chroot $ sudo LANG=C.UTF-8 chroot mountpoint/ qemu-aarch64-static /bin/bash   4. Install Dependencies $ apt install libudev-dev libinput-dev libxkbcommon-dev libpam0g-dev libx11-xcb-dev libxcb-xfixes0-dev libxcb-composite0-dev libxcursor-dev libxcb-shape0-dev libdbus-1-dev libdbus-glib-1-dev libsystemd-dev libpixman-1-dev libcairo2-dev libffi-dev libxml2-dev kbd libexpat1-dev autoconf automake libtool meson cmake ssh net-tools network-manager iputils-ping rsyslog bash-completion htop resolvconf dialog vim udhcpc udhcpd git v4l-utils alsa-utils git gcc less autoconf autopoint libtool bison flex gtk-doc-tools libglib2.0-dev libpango1.0-dev libatk1.0-dev kmod pciutils libjpeg-dev   5. Create a folder for Multimedia Installation. Here we will clone all the multimedia repositories.  $ mkdir multimedia_packages $ cd multimedia_packages   6. Build Wayland $ git clone https://gitlab.freedesktop.org/wayland/wayland.git $ cd wayland $ git checkout 1.22.0 $ meson setup build --prefix=/usr -Ddocumentation=false -Ddtd_validation=true $ cd build $ ninja install   7. Build Wayland Protocols IMX $ git clone https://github.com/nxp-imx/wayland-protocols-imx.git $ cd wayland-protocols-imx $ git checkout wayland-protocols-imx-1.32 $ meson setup build --prefix=/usr -Dtests=false $ cd build $ ninja install   8. Build Weston $ git clone https://github.com/nxp-imx/weston-imx.git $ cd weston-imx $ git checkout weston-imx-11.0.3 $ meson setup build --prefix=/usr -Dpipewire=false -Dsimple-clients=all -Ddemo-clients=true -Ddeprecated-color-management-colord=false -Drenderer-gl=true -Dbackend-headless=false -Dimage-jpeg=true -Drenderer-g2d=true -Dbackend-drm=true -Dlauncher-libseat=false -Dcolor-management-lcms=false -Dbackend-rdp=false -Dremoting=false -Dscreenshare=true -Dshell-desktop=true -Dshell-fullscreen=true -Dshell-ivi=true -Dshell-kiosk=true -Dsystemd=true -Dlauncher-logind=true -Dbackend-drm-screencast-vaapi=false -Dbackend-wayland=false -Dimage-webp=false -Dbackend-x11=false -Dxwayland=false $ cd build $ ninja install   VPU Installation To install VPU and Gstreamer please follow the steps below: 1. Install firmware-imx $ sudo cp -Pra <build-path>/tmp/work/all-poky-linux/firmware-imx/1_8.22-r0/image/lib/* mountpoint/lib/   2. Install VPU Driver $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/imx-vpu-hantro/1.31.0-r0/image/* mountpoint $ sudo cp -Pra <build-path>/tmp/work/armv8a-<machine>-poky-linux/imx-vpuwrap/git-r0/image/* mountpoint   3. Use chroot $ sudo LANG=C.UTF-8 chroot mountpoint/ qemu-aarch64-static /bin/bash   4. Install dependencies for Gstreamer Plugins $ apt install libgirepository1.0-dev gettext liborc-0.4-dev libasound2-dev libogg-dev libtheora-dev libvorbis-dev libbz2-dev libflac-dev libgdk-pixbuf-2.0-dev libmp3lame-dev libmpg123-dev libpulse-dev libspeex-dev libtag1-dev libbluetooth-dev libusb-1.0-0-dev libcurl4-openssl-dev libssl-dev librsvg2-dev libsbc-dev libsndfile1-dev   5. Change directory to multimedia packages. $ cd multimedia-packages   6. Build gstreamer $ git clone https://github.com/nxp-imx/gstreamer -b lf-6.1.55-2.2.0 $ cd gstreamer $ meson setup build --prefix=/usr -Dintrospection=enabled -Ddoc=disabled -Dexamples=disabled -Ddbghelp=disabled -Dnls=enabled -Dbash-completion=disabled -Dcheck=enabled -Dcoretracers=disabled -Dgst_debug=true -Dlibdw=disabled -Dtests=enabled -Dtools=enabled -Dtracer_hooks=true -Dlibunwind=disabled -Dc_args=-I/usr/include/imx $ cd build $ ninja install   7. Build gst-plugins-base $ git clone https://github.com/nxp-imx/gst-plugins-base -b lf-6.1.55-2.2.0 $ cd gst-plugins-base $ meson setup build --prefix=/usr -Dalsa=enabled -Dcdparanoia=disabled -Dgl-graphene=disabled -Dgl-jpeg=disabled -Dopus=disabled -Dogg=enabled -Dorc=enabled -Dpango=enabled -Dgl-png=enabled -Dqt5=disabled -Dtheora=enabled -Dtremor=disabled -Dvorbis=enabled -Dlibvisual=disabled -Dx11=disabled -Dxvideo=disabled -Dxshm=disabled -Dc_args=-I/usr/include/imx $ cd build $ ninja install   8. Build gst-plugins-good $ git clone https://github.com/nxp-imx/gst-plugins-good -b lf-6.1.55-2.2.0 $ cd gst-plugins-good $ meson setup build --prefix=/usr -Dexamples=disabled -Dnls=enabled -Ddoc=disabled -Daalib=disabled -Ddirectsound=disabled -Ddv=disabled -Dlibcaca=disabled -Doss=enabled -Doss4=disabled -Dosxaudio=disabled -Dosxvideo=disabled -Dshout2=disabled -Dtwolame=disabled -Dwaveform=disabled -Dasm=disabled -Dbz2=enabled -Dcairo=enabled -Ddv1394=disabled -Dflac=enabled -Dgdk-pixbuf=enabled -Dgtk3=disabled -Dv4l2-gudev=enabled -Djack=disabled -Djpeg=enabled -Dlame=enabled -Dpng=enabled -Dv4l2-libv4l2=disabled -Dmpg123=enabled -Dorc=enabled -Dpulse=enabled -Dqt5=disabled -Drpicamsrc=disabled -Dsoup=enabled -Dspeex=enabled -Dtaglib=enabled -Dv4l2=enabled -Dv4l2-probe=true -Dvpx=disabled -Dwavpack=disabled -Dximagesrc=disabled -Dximagesrc-xshm=disabled -Dximagesrc-xfixes=disabled -Dximagesrc-xdamage=disabled -Dc_args=-I/usr/include/imx $ cd build $ ninja install   9. Build gst-plugins-bad $ git clone https://github.com/nxp-imx/gst-plugins-bad -b lf-6.1.55-2.2.0 $ cd gst-plugins-bad $ meson setup build --prefix=/usr -Dintrospection=enabled -Dexamples=disabled -Dnls=enabled -Dgpl=disabled -Ddoc=disabled -Daes=enabled -Dcodecalpha=enabled -Ddecklink=enabled -Ddvb=enabled -Dfbdev=enabled -Dipcpipeline=enabled -Dshm=enabled -Dtranscode=enabled -Dandroidmedia=disabled -Dapplemedia=disabled -Dasio=disabled -Dbs2b=disabled -Dchromaprint=disabled -Dd3dvideosink=disabled -Dd3d11=disabled -Ddirectsound=disabled -Ddts=disabled -Dfdkaac=disabled -Dflite=disabled -Dgme=disabled -Dgs=disabled -Dgsm=disabled -Diqa=disabled -Dkate=disabled -Dladspa=disabled -Dldac=disabled -Dlv2=disabled -Dmagicleap=disabled -Dmediafoundation=disabled -Dmicrodns=disabled -Dmpeg2enc=disabled -Dmplex=disabled -Dmusepack=disabled -Dnvcodec=disabled -Dopenexr=disabled -Dopenni2=disabled -Dopenaptx=disabled -Dopensles=disabled -Donnx=disabled -Dqroverlay=disabled -Dsoundtouch=disabled -Dspandsp=disabled -Dsvthevcenc=disabled -Dteletext=disabled -Dwasapi=disabled -Dwasapi2=disabled -Dwildmidi=disabled -Dwinks=disabled -Dwinscreencap=disabled -Dwpe=disabled -Dzxing=disabled -Daom=disabled -Dassrender=disabled -Davtp=disabled -Dbluez=enabled -Dbz2=enabled -Dclosedcaption=enabled -Dcurl=enabled -Ddash=enabled -Ddc1394=disabled -Ddirectfb=disabled -Ddtls=disabled -Dfaac=disabled -Dfaad=disabled -Dfluidsynth=disabled -Dgl=enabled -Dhls=enabled -Dkms=enabled -Dcolormanagement=disabled -Dlibde265=disabled -Dcurl-ssh2=disabled -Dmodplug=disabled -Dmsdk=disabled -Dneon=disabled -Dopenal=disabled -Dopencv=disabled -Dopenh264=disabled -Dopenjpeg=disabled -Dopenmpt=disabled -Dhls-crypto=openssl -Dopus=disabled -Dorc=enabled -Dresindvd=disabled -Drsvg=enabled -Drtmp=disabled -Dsbc=enabled -Dsctp=disabled -Dsmoothstreaming=enabled -Dsndfile=enabled -Dsrt=disabled -Dsrtp=disabled -Dtinyalsa=disabled -Dtinycompress=enabled -Dttml=enabled -Duvch264=enabled -Dv4l2codecs=disabled -Dva=disabled -Dvoaacenc=disabled -Dvoamrwbenc=disabled -Dvulkan=disabled -Dwayland=enabled -Dwebp=enabled -Dwebrtc=disabled -Dwebrtcdsp=disabled -Dx11=disabled -Dx265=disabled -Dzbar=disabled -Dc_args=-I/usr/include/imx $ cd build $ ninja install   10. Build imx-gst1.0-plugin $ git clone https://github.com/nxp-imx/imx-gst1.0-plugin -b lf-6.1.55-2.2.0 $ cd imx-gst1.0-plugin $ meson setup build --prefix=/usr -Dplatform=MX8 -Dc_args=-I/usr/include/imx $ cd build $ ninja install   11. Exit chroot $ exit   Verify Installation For verification process, boot your target from the SD Card. (Review your specific target documentation) 1. Verify Weston For this verification you will need to be root user. # export XDG_RUNTIME_DIR=/run/user/0 # weston   2. Verify VPU and Gstreamer Use the following Gstreamer pipeline for Hardware Accelerated VPU Encode. # gst-launch-1.0 videotestsrc ! video/x-raw, format=I420, width=640, height=480 ! vpuenc_h264 ! filesink location=test.mp4   Then you can reproduce the file with this command: # gplay-1.0 test.mp4   Finally, you have installed and verified the GPU, VPU and Multimedia packages. Now, you can start testing audio and video applications.

i.MX93 eMMC Secondary Boot          i.MX93 eMMC Secondary Boot.zip   i.MX8MP eMMC Secondary Boot           i.MX8MP eMMC Secondary Boot.zip i.MX8MM SDCARD Secondary Boot Demo https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MM-SDCARD-Secondary-Boot-Demo/ta-p/1500011   i.MX8QXP eMMC Secondary Boot https://community.nxp.com/t5/i-MX-Community-Articles/i-MX8QXP-eMMC-Secondary-Boot/ba-p/1257704#M45    i.MX6 SDCARD Secondary Boot Demo           i.MX6_SDCARD_Secondary_Boot_Demo.pdf      

We are pleased to announce that Config Tools for i.MX v16.0 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) The product is based on Eclipse 2023-12 Framework – Enable the Peripherals tool in the Config Tools for i.MX – Enable the Clocks tool in the Config Tools for i.MX – A new command-line argument (- UpdateCode) has been added. It performs the same action as the Update Code button in the user interface. It must be used with -HeadlessTool. DDR tool – CA bus driver strength and ODT configuration for the mScale processors are added. – [MX 93/MX 91] The UART configuration from UI is added. – MX 91 DDR tool update for Config tools – MX 93 PF 09 DDR tool support is added. SerDes tool – MX 95 SerDes tool support is enabled. Pins tool – Simultaneous routing detection (routing of one signal may result in multiple signals being routed based on the same register settings) is added. In that case, such signals are offered to be added into the configuration. – Support of internal pins that are not available in the package is added.

Hello, here Jorge. On this post I will explain how to enable MQS1 on i.MX8ULP. As background about how to setup the environment to build the image using Yocto, please take a look on our i.MX Yocto Project User's Guide: Requirements: i.MX 8ULP EVK. Serial console emulator (Tera Term, Putty, etc.). USB Type-C cable. Micro USB cable. Headphones/speakers. Linux PC. Build done in Linux 6.6.23_2.0.0. i.MX8ULP audio subsystem. i.MX 8ULP extends audio capabilities on i.MX 7ULP by adding dedicated DSP cores for voice trigger and audio processing, enabling lower latency and power efficiency to support variety of audio applications. Some of hardware blocks implemented on 8ULP to support audio use cases are the next: Cadence Fusion F1 DSP processor. Cadence HiFi4 DSP processor. PowerQuad hardware accelerator with fixed and floating + FFT. Digital Microphone interface with support of up-to 8 PDM channels. Up-to 8 independent SAI instances. Up-to 2 Medium Quality Sound (MQS). Sony/Philips Digital interface (SPDIF). As is described before, MQS0 and MQS1 are part of real time domain and application domain respectively. I’m going to focus this post on how to enable MQS1 on application domain. Medium Quality Sound (MQS)  This module is basically generates a PWM from PCM audio data. For the major part of typical audio applications will require an external CODEC to deliver the audio quality but, sometimes where the application does not demand this quality, MQS can provide a medium quality audio via GPIO pin that can directly drive the audio output to a speaker or headphone via inexpensive external amplifier/buffer instead of CODEC. The design of the MQS can be described as follows: Input the PCM audio data (from SAI) into a 16-bit register. Up-sample data to match PWM switching frequency. Perform a simple 2nd order Sigma-Delta smooth on the current data versus previous data. Convert the PCM register into a 6-bit PWM width register and output through a GPIO pin.   How to enable it? By default, our BSP does not enable clock for MQS1. This clock is controlled on CGC1 (AD), specifically on MQS1CLK (Multiplexer to select the audio clock connected to the MQS clock input). So, it is needed to modify imx8ulp-clock.h and clk-imx8ulp.c. Please take a look on patch attached at the end of this post to see the modification in drivers easily. These drivers have the definition/configuration for MQS1_SEL in CGC1 and needs to be added as follows: MQS1_SEL definition needs to be added in imx8ulp-clock.h: #define IMX8ULP_CLK_MQS1_SEL 56 #define IMX8ULP_CLK_CGC1_END 57 MQS1_SEL configuration needs to be added in imx8ulp_clk_cgc1_init of clk-imx8ulp.c: clks[IMX8ULP_CLK_MQS1_SEL] = imx_clk_hw_mux2("mqs1_sel", base + 0x90c, 0, 2, sai45_sels, ARRAY_SIZE(sai45_sels)); Also, it is necessary to configure MQS1 on device tree of i.MX8ULP. Add this in soc: soc@0 of imx8ulp.dtsi: mqs1: mqs@0x29290064 { reg = <0x29290064 0x4>; compatible = "fsl,imx8qm-mqs"; assigned-clocks = <&cgc1 IMX8ULP_CLK_MQS1_SEL>; assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>; clocks = <&cgc1 IMX8ULP_CLK_MQS1_SEL>, <&cgc1 IMX8ULP_CLK_MQS1_SEL>; clock-names = "core", "mclk"; status = "disabled"; }; And create a new device tree, in this case is going to be named imx8ulp-evk-mqs.dts and is as follows: #include "imx8ulp-evk.dts" / { sound-simple-mqs { compatible = "simple-audio-card"; simple-audio-card,name = "imx-simple-mqs"; simple-audio-card,frame-master = <&sndcpu>; simple-audio-card,bitclock-master = <&sndcpu>; simple-audio-card,dai-link@0 { format = "left_j"; sndcpu: cpu { sound-dai = <&sai4>; }; codec { sound-dai = <&mqs1>; }; }; }; }; &cgc1 { assigned-clock-rates = <24576000>; }; &iomuxc1 { pinctrl_mqs1: mqs1grp { fsl,pins = < MX8ULP_PAD_PTF7__MQS1_LEFT 0x43 >; }; }; &mqs1 { #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mqs1>; status = "okay"; }; &sai4 { #sound-dai-cells = <0>; assigned-clocks = <&cgc1 IMX8ULP_CLK_SAI4_SEL>; assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>; status = "okay"; }; Let’s apply these changes on our BSP, in my case I’m going to create a new layer in Yocto to add these modifications with a patch that can be found at the end on this post, here the steps: Install essential Yocto Project host packages: $ sudo apt install gawk wget git diffstat unzip texinfo gcc build-essential chrpath socat cpio python3 python3-pip python3-pexpect xz-utils debianutils iputils-ping python3-git python3-jinja2 python3-subunit zstd liblz4-tool file locales libacl1 Install the “repo” utility: $ mkdir ~/bin $ curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo $ chmod a+x ~/bin/repo $ export PATH=~/bin:$PATH Set up Git: $ git config --global user.name "Your Name" $ git config --global user.email "Your Email" $ git config –list Download the i.MX Yocto Project Community BSP recipe layers and create build folder: $ mkdir imx-yocto-bsp $ cd imx-yocto-bsp $ repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.23-2.0.0.xml $ repo sync $ DISTRO=fsl-imx-wayland MACHINE=imx8ulp-lpddr4-evk source imx-setup-release.sh -b 8ulp_build Create the new layer: $ cd ~/imx-yocto-bsp/sources $ bibake-layers create-layer meta-mqs $ cd meta-mqs conf/layer.conf should be as follows: BBPATH .= ":${LAYERDIR}" BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ ${LAYERDIR}/recipes-*/*/*.bbappend" BBFILE_COLLECTIONS += "meta-mqs" BBFILE_PATTERN_meta-mqs = "^${LAYERDIR}/" BBFILE_PRIORITY_meta-mqs = "6" LAYERSERIES_COMPAT_meta-mqs = "nanbield" Let’s change the recipe: $ sudo rm -r recipes-example $ mkdir -p recipes-kernel/linux/files 0001-8ULP-MQS-Enable.patch should be copied to ~/imx-yocto-bsp/sources/meta-mqs/recipes-kernel/linux/files Add an append (on this case is called “linux-imx_%.bbappend”)to change the recipe with next content: FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI += "file:// 0001-8ULP-MQS-Enable.patch " addtask copy_dts after do_unpack before do_prepare_recipe_sysroot do_copy_dts () { if [ -n "${DTS_FILE}" ]; then if [ -f ${DTS_FILE} ]; then echo "do_copy_dts: copying ${DTS_FILE} in ${S}/arch/arm64/boot/dts/freescale" cp ${DTS_FILE} ${S}/arch/arm64/boot/dts/freescale/ fi fi } The next step is add the layer and build the image: $ cd ~/imx-yocto-bsp/8ulp_build $ bitbake-layers add-layer ~/imx-yocto-bsp/sources/meta-mqs Confirm that the layer has been added: $ bitbake-layers show-layers Build the image: $ bitbake imx-image-multimedia i.MX8ULP EVK limitations The i.MX8ULP has the next MQS1 pins available: But, in the EVK board, the mayor part of these pins are used for other functions such as: - Push button: - MIPI DSI:  - Etc… So, take the output signal of MQS1 pins of EVK board is difficult, in this article, I’m going to configure PTF7 only (MQS1_left) for practicality. If you are working with this board and you need to use these pins for MQS function you will need to manipulate the traces and take the required signals. If you are designing a custom board, planning is essential to avoid this issue. Flash the board. One the build has been finished, we will have the necessary files to flash the board and test it. If you are not too familiarized with this process I suggest you take a look on this post. First, put the board in serial download mode changing the boot configuration switches on the board:   The next step is connecting the power cable, micro-USB cable on the debug port and USB-C type cable to USB0 connector on the board. Then, turn-on the board and run the next command in terminal of build directory: uuu -b emmc_all imx-boot-imx8ulpevk-sd.bin-flash_singleboot_m33 imx-image-multimedia-imx8ulpevk.wic Now, power-off the board, change the boot mode to single boot-eMMC and power it on to test it. Test MQS1 in i.MX8ULP. To test MQS1 it is needed to change the device tree we created, we can do it with the next commands in U-boot: u-boot=> setenv fdtfile imx8ulp-evk-mqs.dtb u-boot=> saveenv u-boot=> boot Now we can test MQS1 on i.MX8ULP EVK, let's confirm that the clock is active in MQS module with the next command: $ cat /sys/kernel/debug/clk/clk_summary -n As you can see mqs1_sel is active and running at 24576000 Hz: And the card appears if we run the next command: $ aplay -l To play audio through MQS we can do it as any sound card: $ speaker-test -D sysdefault:CARD=imxsimplemqs -c 2 -f 48000 -F S16_LE -t pink -P 3 The signal should look like this in the pin output: And like this after a filter, for example the filter used in i.MX93 EVK.   With this post we have been able check the general operation of MQS, configure and compile the image with the required changes to enable MQS1 on EVK board and measure the output on the board. There is a considerable limitation on EVK board since we cannot test left and right outputs without intervene the base board, but this can be helpful as a reference to who would like to use this audio output on i.MX8ULP processor. Best regards. References. Yocto Project customization guide - NXP Community How to add a new layer and a new recipe in Yocto - NXP Community Flashing Linux BSP using UUU - NXP.  i.MX8ULP reference manual. Embedded Linux Projects Using Yocto Project Cookbook.