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some customers have issue with uboot resetting on new bsp because of lack of mac address and different design fom nxp evk board, this doc shows how to set the mac address in different way(fuse, dts file, header file), then check the different HW design between customized board with nxp board, according to the HW design to change the uboot 
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Please notice the following patches are only tested in the environment that is listed below. For the environment with other software versions or hardware equipment, some other editing  may be required Environment: i.MX 8MP EVK MIPI DSI: MX8-DSI-OLED1 (RM67191) Software: LF5.15.71 U-boot: 1. Apply '0001-Modify-u-boot-to-show-logo-seamlessly.patch' to make sure display related models won't be power off, which will help to achieve seamless display. Kernel: 1. Apply '0001-Keep-NXP-logo-until-Weston-is-booted-8MP-MIPI.patch' to make sure MIPI-DSI related models won't be re-init in the booting progress.
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Please notice the following patches are only tested in the environment that is listed below. For the environment with other software versions or hardware equipment, some other editing  may be required Environment: i.MX 93 EVK LVDS:LVDS BOE EV121WXM-N10-1850  Software: LF6.1.36 U-boot: 1. Apply '0001-Add-LVDS-driver-and-BOE-12.1-EV121WXM-N10-1850-LVDS-.patch' to enable EV121WXM-N10-1850  in U-boot stage. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-u-boot-to-show-logo-seamlessly.patch' to make sure display related models won't be power off, which will help to achieve seamless display. Kernel: 1. Apply '0001-Keep-NXP-logo-until-Weston-is-booted-for-i.MX93-in-L.patch' to make sure LVDS related models won't be init in the booting progress.
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Please notice the following patches are only tested in the environment that is listed below. For the environment with other software versions or hardware equipment, some other editing  may be required Environment: i.MX 8MP EVK LVDS:LVDS BOE EV121WXM-N10-1850  LVDS to MiniSAS panel:XMX-LVDS-MINISAS Software: LF5.15.71 U-boot: 1. Apply '0001-Enable-DY1212W-4856-in-U-boot-for-i.MX8MP.patch' to enable EV121WXM-N10-1850  in U-boot stage. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-u-boot-to-show-logo-seamlessly-for-i.MX8MP.patch' to make sure display related models won't be power off, which will help to achieve seamless display. 3. In the original U-boot driver, PWM isn't enable. Therefore, apply '0003-Enable-PWM-and-BACKLIGHT-in-U-boot-and-modify-to-sho.patch' to enable PWM. Kernel: 1. Apply '0001-Enable-DY1212W-4856-in-Kernl-for-i.MX8MP.patch' to enable EV121WXM-N10-1850  in Kernel. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-Kernel-to-show-logo-seamlessly-for-i.MX8MP.patch' to make sure LVDS related models won't be init in the booting progress. 3. Apply '0003-Enable-PWM-and-BACKLIGHT-in-Kernel-and-modify-to-sho.patch' to make sure we could edit backlight of panel in Kernel. 
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  JEIDA-24 is adopted in most use-cases, and also the default format in Linux BSP(6.x)  Actually, JEIDA-18 is also supported in Linux BSP by not mentioned explicitly.   JEIDA-18 can be supported in two configuration: 1. Keep JEIDA-24 setting to display controllers, skip 4th data-lane in hardware connection: according JEIDA-24 output waveform, it has 4 data-lane enabled on LVDS bus: since the data-bits on TxOUT3 are the LSBs of the pixels, to change from JEIDA-24(RGB888, 4 data-lane) to JEIDA-18(RGB666, 3 data-lane), it can be achieved by skipping the TxOUT3 output(4th data-lane) in hardware connection, to make the JEIDA-18 format as the picture below(JEIDA-18 LCD panels only require 3 data-lanes)   2. Change the display controller settings to JEIDA-18: one reference by Variscite, one of the SoM vendor: https://variwiki.com/index.php?title=DART-MX8M-PLUS_Display&release=mx8mp-yocto-mickledore-6.1.36_2.1.0-v1.3 related setting quoted from the link above: Supported "data-mapping" values are "jeida-18", "jeida-24" and "vesa-24". Supported "fsl,data-mapping" values are "jeida", and "spwg". Supported "fsl,data-width" values are <18>, and <24>.    "data-mapping"= "jeida-18", "jeida-24" and "vesa-24" are handled in DRM driver, as the link below: https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/drm_of.c#L451 if (!strcmp(mapping, "jeida-18")) return MEDIA_BUS_FMT_RGB666_1X7X3_SPWG; if (!strcmp(mapping, "jeida-24")) return MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA; if (!strcmp(mapping, "vesa-24")) return MEDIA_BUS_FMT_RGB888_1X7X4_SPWG;    Here the variable “MEDIA_BUS_FMT_RGB666_1X7X3_SPWG" is handled in ldb driver(MX8MP) as the link below: https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/bridge/fsl-ldb.c#L144 switch (bridge_state->output_bus_cfg.format) { case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: lvds_format_24bpp = false; lvds_format_jeida = true; break; case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: lvds_format_24bpp = true;  the bus_format would be "MEDIA_BUS_FMT_RGB666_1X18" in this configuration:  https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/drm/imx/imx8mp-ldb.c#L178 switch (ldb_ch->bus_format) { case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18; break;    “MEDIA_BUS_FMT_RGB666_1X18” is not handled in LCDIF driver:  https://github.com/nxp-imx/linux-imx/blob/d23d64eea5111e1607efcce1d601834fceec92cb/drivers/gpu/imx/lcdifv3/lcdifv3-common.c#L310 switch (bus_format) { case MEDIA_BUS_FMT_RGB565_1X16: disp_para |= DISP_PARA_LINE_PATTERN(LP_RGB565); break; case MEDIA_BUS_FMT_RGB888_1X24: disp_para |= DISP_PARA_LINE_PATTERN(LP_RGB888_OR_YUV444); break; default: dev_err(lcdifv3->dev, "unknown bus format: %#x\n", bus_format); return;    hence there would be error message below in this configuration, which can be ignored: imx-lcdifv3 32e80000.lcd-controller: unknown bus format: 0x1009  
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Hibernation mode (suspend to disk) will be useful for boot time optimization, especially under heavy application usage cases. This article is a quick guide for how to enable hibernation mode in Linux running on i.MX93. Some limitation and pitfalls will also be introduced.   Detail PDF attached.    
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There are two ethernet ports in i.MX8MP: FEC0 and FEC1(eQOS). Normally we use iperf to test ethernets ports performance. However, when using tftp test, the result is different in two ports. This document describe how to fine tune parameters to increase speed under tftp test or other use case. It is suitable for most i.MX serials and most BSP version.
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Customers are experiencing significant and unexpected performance issues in their applications running on Android 14 relative to the performance that they saw on older versions of the OS (such as A12 or A13). This is a known issue on Android Community and is note related to NXP implementation of AOSP (Android Open Source Project). The information Android 14 can recollect from any debuggable application is a lot. With the help of Perfetto you can get and incredible analysis of all processes running on Android OS or an analysis of the memory usages. All this features have a side effect on debuggable applications, where debuggable application can experiment low performance. The degradation on the performance is around 1.5x and 2.0x the time taken on a previous Android version. In order to take really measurements on the application performance it is necessary to disable those features when building the apk . Quick Workaround There are two ways of disabling debug features: Build a release variant by adding a dummy key to Android-Studio. Read the following link to get further details on how to do it. Set debuggable feature to false on build.gradle (Module :app) . Here an example: android { buildTypes { debug { applicationIdSuffix '.debug' debuggable false // The important line! } } } Rebuild the apk and installed to the target with adb install <my-apk> . The application should now have the same performances it was having with A13 or older. References: Debuggable APP lag after updating to Android14
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Poring from MCIMX6Y2CVM05AB to MCIMX6Y1DVM05AB Backgroud: Our customers encounter Kernel stuck at starting kernel issue. Here is detail description as below: (1 )Using customer board, and the main chip is MCIMX6Y1DVM05AB. (2) MCIMX6Y2CVM05AB works fine using the same image. (3)The kernel version is L5.10.52. But the old L4.14.98 works fine. (4)Using imx6ull evk's dtb has the same symptom. (imx6ull-14x14-evk.dtb in L5.10.52 prebuild image from NXP. (5)The  L4.14.98 versionBSP both  MCIMX6Y1DVM05AB and MCIMX6Y2CVM05AB can work well For the L5.10.52 only the MCIMX6Y2CVM05AB can work​. Kernel crash at here:   Generally speaking, most customer need to porting from old chip to new, for this customer need to use porting from the new product to old products they have their reasons.     Two reasons: (1) Their previous project use MCIMX6Y1DVM05AB. And also have MCIMX6Y1DVM05AB stock. (2) And the customer needs 15kpcs for urgent demand. But there is no MCIMX6Y2CVM05AB stock in their city.​ Porting steps: For these two products, they are difference, but most pins to pins in design. 1\Found the difference for this two product: See the datasheet: https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLCEC.pdf https://www.nxp.com.cn/docs/en/data-sheet/IMX6ULLIEC.pdf     For the MCIMX6Y1DVM05AB do not have the LCD/CSI, one CAN, one Ethernet,one ADC.   2\Check the customer’s board dts setting and modify Ask customer for their Board dts file and check: The MCIMX6Y1DVM05AB chip has only followed features, so customer should make sure the related drivers are removed from dts. That means in climaxL5.10.52.7z, customer should disable the followed drivers: pxp, lcdif, can2. (csi and fec2 are already disabled) (1) Disable the fec2   (2)CSI disable   (3)Lcdif disable   (4)CAN 2 Remove     Result: After remove these unused functions. The MCIMX6Y1DVM05AB could boot well on customer’s board. If customer use the MCIMX6Y2CVM05AB, all these functions need to add.  
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Hardware:​  Soc: NXP i.MX 93 11x11 EVK FPGA:​ Lattice ECP5 Evaluation Board   Deploy the driver of FlexSPI and Test​​ Apply below patch into Linux kernel and compile. (6.1.55-2.2.0 is tested)​ git apply 0001-Added-flexspi-fpga-module-support-of-i.MX93.patch​ make imx_v8_defconfig​ make –j8​ Copy the generated imx93-11x11-evk-flexspi-m2-fpga.dtb to the boot partition​ Set the dtb in uboot​ setenv fdtfile imx93-11x11-evk-flexspi-m2-fpga.dtb ​ saveenv​ boot​ Copy the generated imx93_flexspi_fpga.ko and the test app source file flexspi_fpga_latency_test.c to home directory Run blow command to do the test​ gcc flexspi_fpga_latency_test.c​ ./a.out 128​ ​ About driver and test app​ ​The driver can be installed in test app automatically. Insmod command is called in test app as below.​ insmod imx93_flexspi_fpga.ko mux=1 div=30​ The parameter mux can be set to 0,1,2,3. Means 24MHz, 1000MHz, 800MHz, 625MHz root clock. And div is the divider. In default, 1000/30 = 33MHz is applied. More details of hardware connection: Since the adapter board is not on NXP website and it is just for test, there are two options. Use fly-wire to connect flexspi and lattice fpga instead of the adapter card. Use M.2 adapter card but need be produced by customer themselves.  If M.2 adapter is not used, fly-wire can be applied to connect i.MX93 to FPGA. The column of Pads is a pad list that can bring out signal lines from the bottom layer of i.MX93 EVK. i.MX 93 Pads of imx93 FPGA ECP5 SD3_CLK TP912 B10 SD3_CMD TP913 A9 SD3_DATA0 TP914 D8 SD3_DATA1 TP915 E8 SD3_DATA2 TP916 C7 SD3_DATA3 TP917 C6 GND   GND J1003-2 1V8   VCCIO0 Remove JP10 Jumper   It is also possible that the customer would choose M.2 adapter card solution. The adapter card is simple and cheap. It can be redesigned easily with attached schematic as reference. Make sure the board thickness is 0.8mm. And recommend to apply GND copper to improve signal quality. The schematic is attached. To get the information about the demo from Lattice perspective, please check the link below. Lattice QSPI to NXP MPU Reference Design | Lattice Reference Design  
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share more detailed steps how to bring up stereo capture of basler camera by imx8mp
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This is an example for user to transfer files between i.MX8MP Linux platform and other devices via Bluetooth. Environment : Hardware : i.MX8MP LPDDR4 EVK Board, Android Phone Software : L6.6.23-2.0.0   Step1 : Build Yocto image and burnt to the SD card or EMMC repo init -u https://github.com/nxp-imx/imx-manifest.git -b imx-linux-scarthgap -m imx-6.6.23-2.0.0.xml repo sync DISTRO=fsl-imx-xwayland MACHINE=imx8mp-lpddr4-evk source imx-setup-release.sh -b build-xwayland Add the following code to "conf/local.conf"          IMAGE_INSTALL:append = " glibc-gconv-utf-16" bitbake imx-image-full uuu -b emmc_all imx-image-full-imx8mp-lpddr4-evk.rootfs-20240919015845.wic Step2 : Test steps Boot board with "imx8mp-evk-usdhc1-m2.dtb" file. load Wi-Fi Firmware           root@imx8mp-lpddr4-evk:~# modprobe moal mod_para=nxp/wifi_mod_para.conf Load BT firmware and enable BT          root@imx8mp-lpddr4-evk:~# modprobe btnxpuart          root@imx8mp-lpddr4-evk:~# hciconfig                    root@imx8mp-lpddr4-evk:~# hciconfig hci0 up connect  the BT of Android Phone          root@imx8mp-lpddr4-evk:~# bluetoothctl          [bluetooth]# default-agent          [bluetooth]# agent on          [bluetooth]# discoverable on          [bluetooth]# scan on          [bluetooth]# scan off                    [bluetooth]# pair 90:F0:52:92:A6:6C          we need to type Yes on board and click 配对 on phone.                           [bluetooth]# connect 90:F0:52:92:A6:6C                 [Meizu16m]# quit          Transfer file          1). Android Phone-> i.MX8MP EVK Board          root@imx8mp-lpddr4-evk:~# /usr/libexec/bluetooth/obexd -a -n -r /root/ & obexctl                   Then select a file on your phone ad choose transfer by Bluetooth.                   2).i.MX8MP EVK Board -> Android Phone          [obex]# connect 90:F0:52:92:A6:6C                   [90:F0:52:92:A6:6C]# send /home/root/test.txt          Note :  1. Do not suggestion use IOS phone. 2. If your i.MX8MP board can not scan your BT device, Suggest change the device BT name and run on "scan on" command again.  
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Overview The purpose of this document is to provide a guide on how to enable UART 4 on i.MX8M Mini on Cortex A53. By default on i.MX-ATF is set on Cortex M4 Domain, i.MX-ATF helps ensure that i.MX processors boot securely. Reference: imx-atf. Requirements: Arm Toolchain: sudo apt-get install gcc-aarch64-linux-gnu 1. Build imx-boot image For a better reference how to build imx-boot image, go to Section 4.5.13 How to build imx-boot image by using imx-mkimage available on i.MX Linux User's Guide.   $ cd ~ $ git clone https://github.com/nxp-imx/uboot-imx -b lf_v2023.04 $ cd uboot-imx/ $ git checkout lf-6.6.23-2.0.0 $ make -j $(nproc --all) ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- imx8mm_evk_defconfig $ export ARCH=arm64 $ cd ~ $ git clone https://github.com/nxp-imx/imx-mkimage.git $ cd imx-mkimage/ $ git checkout lf-6.6.23-2.0.0 $ cd ~ $ git clone https://github.com/nxp-imx/imx-atf.git $ cd imx-atf/ $ git checkout lf-6.6.23-2.0.0   The master domain for the UART4 is assigned to the Cortex M4, so, make the following changes to assign it to the A53 processor instead: diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c index 179b6226f..b0427afff 100644 --- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c @@ -114,10 +114,11 @@ static const struct imx_csu_cfg csu_cfg[] = { #else static const struct imx_rdc_cfg rdc[] = { /* Master domain assignment */ - RDC_MDAn(RDC_MDA_M4, DID1), + RDC_MDAn(RDC_MDA_A53, DID0), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W),   After applying the changes, set your toolchain and then, compile with the following command: $ make PLAT=imx8mm bl31   In case you have the following error: Use this command to unset the flags and compile again: $ unset LDFLAGS   Then, copy the corresponding files to imx-mkimage/iMX8M. For more information, please check section 4.5.13 on i.MX Linux User's Guide. *NOTE: Some of this files are located on a link which you can access with the following command, for more information check the Release Notes, in this case for version 6.6.23-2.0.0 on Embedded Linux for i.MX Applications Processors. $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.24-fbe0a4c.bin $ chmod +x firmware-imx-8.24-fbe0a4c.bin $ ./firmware-imx-8.24-fbe0a4c.bin   Finally, copy flash.bin located on: imx-mkimage/iMX8M to a folder to flash your board as follows: You can download the uuu.exe from mfgtools and the .wic file from the prebuild images from: Embeded Linux for i.MX Applications Processors uuu.exe -b emmc_all flash.bin imx-image-full-imx8mmevk.wic   2. Change DTB to enable UART4 First, copy and rename the imx8mm-evk.dts to identify there is a change for enabling UART4: $ cd linux-imx $ cp arch/arm64/boot/dts/freescale/imx8mm-evk.dts arch/arm64/boot/dts/freescale/imx8mm-evk-uart4.dts $ vi arch/arm64/boot/dts/freescale/imx8mm-evk-uart4.dts And make the following changes: &ecspi2 { status = "disabled"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; assigned-clocks = <&clk IMX8MM_CLK_UART4>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; fsl,uart-has-rtscts; status = "okay"; }; &iomuxc { pinctrl_uart4: uart4grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140 MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x140 MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x140 MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x140 >; }; }   After applying the changes, set your toolchain and then, compile with the following commands: $ make imx_v8_defconfig $ make freescale/imx8mm-evk-uart4.dtb Finally, copy the DTB to your board, reboot it and change the DTB in the u-boot environment, boot your board and take a look to see if the UART4 is correctly enabled.    
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We are pleased to announce that Config Tools for i.MX v16.1 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) • Clocks – Disabling enabled clock outputs that have settings with shared bit-fields after reopening the configuration is fixed. – Clock slices with multiple outputs are supported. • TEE – An incorrect number of the MPU region attributes shown for the configuration of RT1180 is fixed. – An incorrect domain visibility and tab names when DAC is disabled on RT1180 is fixed.
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The purpose of this document is to provide extended guidance for the selection of compatible LPDDR4 memory devices that are supported by the i.MX 91 series of processors. In all cases, it is strongly recommended to follow the DRAM layout guidelines outlined in the NXP Hardware Developer's Guides for the specific SoCs. Memory devices with binary densities (e.g., 1 GB, 2 GB, 4 GB) are preferred because they simplify memory management by aligning with system addressing schemes and reducing software complexity.   LPDDR4 - Maximum Supported Densities SoC Max Data bus width Maximum density Assumed memory organization Notes i.MX 91 (i.MX 91xx) 16-bit 16 Gb / (2 GB) single rank, single channel device with 17-row addresses (R0 - R16) 1, 2, 3   LPDDR4 - List of Validated Memories The validation process is an ongoing effort - regular updates of the table are expected. SoC Density Memory Vendor Validated Memory Part# Notes i.MX 91 16 Gb / (2 GB) Micron MT53E1G16D1FW-046 AAT:A MT53E1G16D1ZW-046 AAT:C 5    2 Gb / (256 MB)  Winbond  W66BP6NBHAHJ 4 8 Gb / (1 GB) Nanya NT6AN512M16AV-J1I   4 Gb / (512 MB) Nanya NT6AN256M16AV-J1I 4 8 Gb / (1 GB) ISSI IS43LQ16512B-046BLI 4 12 Gb / (1.5 GB) Micron MT53E768M16D1ZW-046 4 16 Gb / (2 GB) Intelligent Memory IMAG16L4KBBG 4 2 Gb / (256 MB) Nanya NT6AN128M16AV-J1 4 4 Gb / (512 MB) UniIC SCB11N4G160BF-04ZI 4 4 Gb / (512 MB) ISSI IS43LQ16256B-053BLI 4 4 Gb / (512 MB) Winbond W66CP6RBHAHJ 4     Note: This device supports operation with LPDDR4 memories only. LPDDR4x operation is not supported. Dual‑mode memories that support both LPDDR4 and LPDDR4x are allowed as long as the device can operate in LPDDR4 mode, including using LPDDR4 I/O voltage levels and initialization sequences. NOTE: LPDDR4 devices from certain memory vendors may not support operation at low speeds and in addition, DQ ODT may not be active, which can impact signal integrity at these speeds. If low-speed operation is planned in the use case, please consult with the memory vendor about the configuration aspects and possible customization of the memory device so correct functionality is ensured. Note 1: The numbers are based purely on the IP documentation for the DDR Controller and the DDR PHY, on the settings of the implementation parameters chosen for their integration into the SoC, SoC reference manual and on the JEDEC standards JESD209-4B (LPDDR4). Therefore, they are not backed by validation, unless said otherwise and there is no guarantee that an SoC with the specific density and/or desired internal organization is offered by the memory vendors. Should the customers choose to use the maximum density and assume it in the intended use case, they do it at their own risk. Note 2: Byte-mode LPDDR4 devices (x16 channel internally split between two dies, x8 each) of any density are not supported therefore, the numbers are applicable only to devices with x16 internal organization (referred to as "standard" in the JEDEC specification). Note 3: The SoC also supports dual rank single channel devices therefore, 16Gb/2GB density can be also achieved by using a dual rank single channel device with 16-row addresses (R0 - R15). Note 4: The memory part number did not undergo full JEDEC verification however, it passed all functional testing items. Note 5: The memory part number is not recommended for new designs and superseded by a new part number
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The layer attached to this article is obsolete. Please use the meta-imx-fastboot GitHub repo instead.   The purpose of this article is to show how to reduce the boot time on i.MX 8QXP using U-Boot Falcon Mode. The general technique is presented in the AN14093. This article was tested on LF-6.6.23-2.0.0 BSP. How to do it 1. Follow the steps in the i.MX Yocto Project User's Guide and prepare your Yocto building environment. We will further assume that the BSP is in the ~/imx-yocto-bsp directory and the build directory is ~/imx-yocto-bsp/build. 2. Unpack the attached archive in ~/imx-yocto-bsp/sources. This should create the ~/imx-yocto-bsp/sources/meta-imx-fastboot directory.  3. Add the meta-imx-fastboot layer to your build using the following command: bitbake-layers add-layer ~/imx-yocto-bsp/sources/meta-imx-fastboot 4. If you've previously built an image in the same tree, clean the u-boot-imx and imx-boot packages using the following command: bitbake -c clean u-boot-imx imx-boot 5. Build the new image. Out of the box, this package is configured for core-image-minimal. We will show you below how to adapt it for other images: bitbake core-image-minimal 6. Write the resulted image on eMMC/SD using your preferred method and boot the board. 7. By default, the board will boot normally. To enable fast boot, stop the board in U-Boot, and run the following command: u-boot => run prepare_fdt 8. Reboot the board. From this point on, the board should boot in fast mode. Far less messages will be printed by the kernel or systemd during boot. You may further optimize the boot time by removing unnecessary features from the kernel and/or removing unnecessary services started by systemd. Please refer to AN14093. 9. If you ever want to re-enter U-Boot, please keep the 'c' key pressed in the serial console during board power-on. It's easiest if you press and keep the 'c' key pressed before powering on/pressing the reset button. How it works The layer we've added contains patches for U-Boot, ATF and imx-mkimage. In addition, it modifies the core-image-minimal recipe. In U-Boot, the necessary options for Falcon Mode are added in a new configuration file, named imx8qxp_mek_falcon_defconfig, as well as an implementation of the spl_start_uboot() function. In ATF, the device tree load address is added in the correct parameter. In mkimage, two new targets are created: kernel-atf-container.img (to be deployed in the boot partition) and uImage (to be deployed in the rootfs). The change in the core-image-minimal recipe ensures that the new files are copied in the resulting image. If you want to build a different image, you need to copy the content of core-image-minimal.bbappend in a new file, named according to the image you want to build. For example, if you want to build imx-image-full, you could use the following command: cp ~/imx-yocto-bsp/sources/meta-imx-fastboot/recipes-fsl/images/core-image-minimal.bbappend ~/imx-yocto-bsp/sources/meta-imx-fastboot/recipes-fsl/images/imx-image-full.bbappend       *** DISCLAIMER *** Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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This article describes how to use the Preempt-RT Linux kernel in the i.MX Linux BSP 6.6.23_2.0.0. This is particularly useful for platforms such as i.MX 95, for which there is not yet a Real-Time Edge Software release.    How to do it    1. Follow the steps in the i.MX Yocto Project User's Guide and build your preferred image, for example core-image-minimal. Will further assume that the BSP is in the ~/imx-yocto-bsp directory and the build directory is ~/imx-yocto-bsp/build. 2. Unpack the attached archive in ~/imx-yocto-bsp/sources. This should create the ~/imx-yocto-bsp/sources/meta-otherkernels directory. This archive will work out of the box for i.MX 95 and i.MX 93, and may require some modifications for other platforms, as described below. 3. Add the meta-otherkernels to your build using the following command: bitbake-layers add-layer ~/imx-yocto-bsp/sources/meta-otherkernels 4. Add the OVERRIDES .= ":preempt-rt" to ~/imx-yocto-bsp/build/conf/local.conf file using the following command: echo 'OVERRIDES .= ":preempt-rt"' >> ~/imx-yocto-bsp/build/conf/local.conf This enables the Preempt-RT kernel for your build. You can always go back to your regular kernel by removing this line from ~/imx-yocto-bsp/build/conf/local.conf. 5. Build again your image. After booting this image, you can check the kernel version using: uname -a      How it works    The meta-otherkernels layer contains a .bbappend  for the linux-imx kernel recipe which replaces the sources URL with the Real-Time Edge kernel when the "preempt-rt" override is active. In addition, due to the fact that the current real-time kernel does not support all the board configurations, the layer config file (meta-otherkernels/conf/layer.conf) removes from the build the device tree files that are not supported (when "preempt-rt" override is active).   If you use this layer for other SoCs (other than i.MX 93/i.MX 95), you may need to edit the meta-otherkernels/conf/layer.conf and add the unsupported device trees. If an  unsupported device tree is left, Yocto will give an error during build.        *** DISCLAIMER *** Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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This article describe i.MX8MP normal HAB security boot, and server/client mode. For server/client mode, it is based on customer requirement, because private is stored in server can't be accessed.
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This knowledge base add imx8ulp swupdate support based on AN13872. Uboot patch: add_swupdate_support_for_imx8ulp_in_uboot.patch swupdate-scripts patch: 0001-add-imx8ulp-support-in-swupdate-scripts.patch Note You must generate new key referring  5.4.3.3 Generating a key before build. Commands 1. base image build command   ./assemble_base_image.sh -b imx8ulp -e emmc -d doublecopy -m   2. update image build command   ./swu_update_image_build.sh -e -s ./priv.pem -b imx8ulp -g   3. flash command:   uuu -b emmc_all .\imx-boot-imx8ulp-lpddr4-evk-sd.bin-flash_singleboot_m33 .\swu_doublecopy_rescue_imx8ulp_emmc_20240914.sdcard       Useful links: https://sbabic.github.io/swupdate/building-with-yocto.html#automatic-sha256-in-sw-description https://sbabic.github.io/swupdate/sw-description.html?highlight=hwrevision   
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  This guide assumes that the developer has knowledge of the V4L2 API and has worked or is familiar with sensor drivers and their operation within the Linux kernel. This guide does not focus on the details of the sensor driver development that you want to port. It is assumed that you already have an existing driver for your sensor, before making the port. The version of the ISP's was 6.6.36 Linux BSP. If a different version is used, it is the developer's responsibility to review the API documentation for the corresponding version, since there may be changes that affect what is indicated in this guide. To port the camera sensor, the following steps must be taken as described in the following sections: Define sensor attributes and create instances. ISS Driver and ISP Media Server. Sensor Calibration Files. VVCAM Driver Creation. Device Tree Modifications. Define Sensor Attributes and Create Instances The following three steps are already implemented in CamDevice and are included for reference only. Step 1: Define the sensor attributes in the IsiSensor_s data structure. Step 2: Define the IsiSensorInstanceConfig_t configuration structure that will be used to create a new sensor instance. Step 3: Call the IsiCreateSensorIss() function to create a new sensor instance. ISS Driver and ISP Media Server Step 0 - Use a driver template as base code: Drivers can be found in $ISP_SOURCES_TOP/units/isi/drv/. For example, the ISP sources, come with the OV4656 and OS08a20 drivers. $ISP_SOURCES_TOP indicates the path of your working directory, where the respective sources are located. Step 1 - Add your <SENSOR> ISS Driver: Create the driver entry for your sensor in the path $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/source/<SENSOR>.c. Change all occurrences of the respective sensor name within the code, for instance, OV4656 -> <SENSOR>, respecting capital letters where applicable. Step 2 - Check the information on the IsiCamDrvConfig_s data structure: Data members defined in this data structure include the sensor ID (CameraDriverID) and the function pointer to the IsiSensor data structure. By using the address of the IsiCamDrvConfig_s structure, the driver can then access the sensor API attached to the function pointer. The following is an example of the structure: /***************************************************************************** * Each sensor driver needs to declare this struct for ISI load *****************************************************************************/ IsiCamDrvConfig_t IsiCamDrvConfig = {     .CameraDriverID = 0x0000,     .pIsiHalQuerySensor = <SENSOR>_IsiHalQuerySensorIss,     .pfIsiGetSensorIss = <SENSOR>_IsiGetSensorIss, };   Important Note: Modify the CameraDriverID according to the chip ID of your sensor. Apply this change to any Chip ID occurrence within the code. Step 3 - Check sensor macro definitions: In case there is any macro definition in the ISS Driver code, which involves specific properties of the sensor, you should modify it according to your requirements. For example: #define <SENSOR>_MIN_GAIN_STEP         (1.0f/16.0f)   Step 4 - Modify ISP Media Server build tools: Changes required in this step include: Add a CMakeLists.txt file in $ISP_SOURCES_TOP/units/isi/drv/<SENSOR>/ that builds your sensor module. Modify the CMakeLists.txt located at $ISP_SOURCES_TOP/units/isi/drv/CMakeLists.txt to include and reference your sensor directory. Modify the $ISP_SOURCES_TOP/appshell/ and $ISP_SOURCES_TOP/mediacontrol/ build tools, since by default they refer to the construction of a particular sensor, for example, the OV4656, so it is necessary to change the name of the corresponding sensor. Modify the $ISP_SOURCES_TOP/build-all-isp.sh script to reference the sensor modules and generate the corresponding binaries when building the ISP media server instance.   Step 5 - ISP Media Server run script: You need to add the operation modes defined for your sensor in the script. Each operating mode is associated with an order (mode 0, mode 1 ... mode N), a name used to execute the command in the terminal (e.g <sensor>_custom_mode_1), a resolution, and a specific calibration file for the sensor. The script is located at $ISP_SOURCES_TOP/imx/run.sh .   Step 6 - Sensor<X> config: At $ISP_SOURCES_TOP/units/isi/drv/ you can find the files to configure each sensor entry to the ISP, called Sensor0_Entry.cfg and Sensor1_Entry.cfg. There, the associated calibration files are indicated for each sensor operating mode, including the calibration files in XML format and the Dewarp Unit configuration files in JSON format. In addition, the .drv file generated for your sensor is referenced, creating the association between the respective /dev/video<X> node and the sensor driver module outputted from the ISP Media Server. In case you are using only one ISP channel, just modify Sensor0_Entry.cfg. In case you require both instances of the ISP, you will need to modify both files. Sensor Calibration Files It is a requirement for using the ISP, to have a calibration file in XML format, specific to the sensor you are using and according to the resolution and working mode. To obtain the calibration files in XML format, there are 3 options: Use the NXP ISP tuning tool for this you will need to ask for access or sign a NDA document. Pay NXP professional services to do the tune. Pay a third-party vendor to do the tune   VVCAM Driver Creation The changes indicated below are based on the assumption that there is a functional sensor driver in its base form, and that it is compatible with the V4L2 API. From now on we focus on applying the changes suggested in the NXP documentation, specifically to establish the communication of the VVCAM Driver (kernel side) and the ISI Layer. Step 0 - Create the sensor driver entry: Developers must add the driver code to the file located at $ISP_SOURCES_TOP/vvcam/v4l2/sensor/<sensor>/<sensor>_xxxx.c, along with a Makefile for the sensor driver module. In the same way, as indicated in the ISS Driver section, you can refer to one of the sample drivers that are included as part of the ISP sources, to review details about the implementation of the driver and the structure of the required Makefile.   Step 1 - Add the VVCAM mode info data structure array: This array stores all the supported modes information for your sensor. The ISI layer can get all the modes with the VVSENSORIOC_QUERY command. The following is an example of the structure, please fill in the information using the attributes of your sensor and the modes it supports. #include "vvsensor.h" . . .   static struct vvcam_mode_info_s <sensor>_mode_info[] = {         {         .index = 0,         .width = ... ,         .height = ... ,         .hdr_mode = ... ,         .bit_width = ... ,         .data_compress.enable = ... ,         .bayer_pattern = ... ,         .ae_info = {                        .                        .                        .                        },         .mipi_info = {                        .mipi_lane = ... ,                        },         },         {         .index = 1,         .         .         .         }, }; Step 2 - Define sensor client to i2c : Define the client_to_sensor macro (in case you don't have any already) and check the segments of the driver code that require this macro. #define client_to_<sensor>(client)\         container_of(i2c_get_clientdata(client), struct <sensor>, subdev)   Step 3 - Define the V4L2-subdev IOCTL function: Define and implement the <sensor>_priv_ioctl, which is used to receive the commands and parameters passed down by the user space through ioctl() and control the sensor. long <sensor>_priv_ioctl(struct v4l2_subdev *subdev, unsigned int cmd, void *arg) {         struct i2c_client *client = v4l2_get_subdevdata(subdev);         struct <sensor> *sensor = client_to_<sensor>(client);         struct vvcam_sccb_data_s reg;         uint32_t value = 0;         long ret = 0;           if(!sensor){                return -EINVAL;         }           switch (cmd) {         case VVSENSORIOC_G_CLK: {                ret = custom_implementation();                break;         }         case VIDIOC_QUERYCAP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_QUERY: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_CHIP_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_RESERVE_ID: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_G_SENSOR_MODE:{                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_SENSOR_MODE: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_STREAM: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_WRITE_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_READ_REG: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_EXP: {                ret = custom_implementation();                break;         }         case VVSENSORIOC_S_POWER:         case VVSENSORIOC_S_CLK:         case VVSENSORIOC_RESET:         case VVSENSORIOC_S_FPS:         case VVSENSORIOC_G_FPS:         case VVSENSORIOC_S_LONG_GAIN:         case VVSENSORIOC_S_GAIN:         case VVSENSORIOC_S_VSGAIN:         case VVSENSORIOC_S_LONG_EXP:         case VVSENSORIOC_S_VSEXP:          case VVSENSORIOC_S_WB:         case VVSENSORIOC_S_BLC:         case VVSENSORIOC_G_EXPAND_CURVE:                break;         default:                break;         }           return ret; }   As you can see in the example, some cases are implemented but others are not. Developers are free to implement the features they consider necessary, as long as a minimum base of operation of the driver is guaranteed (query commands, read and write registers, among others). It is the developer's responsibility to implement each custom function, for each case or scenario that may arise when interacting with the sensor. In addition to what was shown previously, a link must be created to make the ioctl connection with the driver in question. Link your priv_ioctl function on the v4l2_subdev_core_ops struct, as in the example below: static const struct v4l2_subdev_core_ops <sensor>_core_ops = {         .s_power       = v4l2_s_power,         .subscribe_event = v4l2_ctrl_subdev_subscribe_event,         .unsubscribe_event = v4l2_event_subdev_unsubscribe,      // IOCTL link         .ioctl = <sensor>_priv_ioctl, };   Step 4 - Verify your sensor's private data structure: After performing the modifications suggested, it would be a good practice to double-check your sensor's private data structure properties, in case there is one missing, and also check that the properties are initialized correctly on the driver's probe.   Step 5 - Modify VVCAM V4L2 sensor Makefile : At $ISP_SOURCES_TOP/vvcam/v4l2/sensor/Makefile, include your sensor object as follows: ... obj-m += <sensor>/ ... Important Note: There is a very common issue that appears when working with camera sensor drivers in i.MX8MP platforms. The kernel log message shows something similar to the following: mxc-mipi-csi2.<X>: is_entity_link_setup, No remote pad found! The link setup callback is required by the Media Controller when performing the linking process of the media entities involved in the capture process of the camera. Normally, this callback is triggered by the imx8-media-dev driver included as part of the Kernel sources. To make sure that the problem is not related to your sensor driver, verify the link setup callback is already created in the code, and if is not, you can add the following template: /* Function needed by i.MX8MP */ static int <sensor>_camera_link_setup(struct media_entity *entity,                                    const struct media_pad *local,                                    const struct media_pad *remote, u32 flags) {     /* Return always zero */         return 0; }   /* Add the link setup callback to the media entity operations struct */ static const struct media_entity_operations <sensor>_camera_subdev_media_ops = {         .link_setup = <sensor>_camera_link_setup, };     /* Verify the initialization process of the media entity ops in the sensor driver's probe function*/ static int <sensor>_probe(struct i2c_client *client, ...) {         /* Initialize subdev */         sd = &<sensor>->subdev;         sd->dev = &client->dev;         <sensor>->subdev.internal_ops = ...         <sensor>->subdev.flags |= ...         <sensor->subdev.entity.function = ...     /* Entity ops initialization */         <sensor->subdev.entity.ops = &<sensor>_camera_subdev_media_ops; } In most cases, adding the link setup function will solve the media controller issue, or at least it discards problems on the driver side. Device Tree Modifications On the Device Tree side, it is necessary to enable the ISP channels that will be used. Likewise, it is necessary to disable the ISI channels, which are normally the ones that connect to the MIPI_CSI2 ports to extract raw data from the sensor (in case the ISP is not used). A MIPI_CSI2 port can be mapped to either an ISI channel or an ISP channel, but not both simultaneously. In this guide, we focus on using the ISP, so any other custom configuration that you want to implement may vary from what is shown. In the code below, ISP channel 0 is enabled, and the connection is made to the port where the sensor is connected (mipi_csi_0). &mipi_csi_0 {         status = "okay";         port@0 {         // Example endpoint to <sensor>_ep                mipi0_sensor_ep: endpoint@1 {                        remote-endpoint = <&<sensor>_ep>;                };         }; };   &cameradev {         status = "okay"; };   &isi_0 {         status = "disabled"; };   &isi_1 {         status = "disabled"; };   &isp_0 {         status = "okay"; };   &isp_1 {         status = "disabled"; };   &dewarp {         status = "okay"; }; What is shown above does not represent a complete device tree file, is only a general skeleton of the points you should pay attention to when working with ISP channels. For simplicity, we omitted all the attributes that are normally defined when working with camera sensor drivers and their respective configurations in the i2c port of the hardware.   Note: Due to hardware restrictions when using ISP channels, it is recommended to use the isp_0 channel, when working with only one sensor. In case you need to use two sensors, you can enable both channels, taking into account the limitations regarding the output resolutions and the clock frequency when both channels are working simultaneously. What is not recommended is to use the isp_1 channel when working with a single sensor.   References ISP Independent Sensor Interface (ISI) API reference, I.MX8M Plus Camera Sensor Porting User guide: https://www.nxp.com/webapp/Download?colCode=IMX8MPCSPUG Sensor Calibration tool: https://www.nxp.com/webapp/Download?colCode=AN13565 i.MX8M Plus reference manual: https://www.nxp.com/webapp/Download?colCode=IMX8MPRM  
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