Hardware:
- Soc: NXP i.MX 93 11x11 EVK
- FPGA: Lattice ECP5 Evaluation Board
Deploy the driver of FlexSPI and Test
- Apply below patch into Linux kernel and compile. (6.1.55-2.2.0 is tested)
git apply 0001-Added-flexspi-fpga-module-support-of-i.MX93.patch
make imx_v8_defconfig
make –j8
- Copy the generated imx93-11x11-evk-flexspi-m2-fpga.dtb to the boot partition
- Set the dtb in uboot
setenv fdtfile imx93-11x11-evk-flexspi-m2-fpga.dtb
saveenv
boot
- Copy the generated imx93_flexspi_fpga.ko and the test app source file flexspi_fpga_latency_test.c to home directory
Run blow command to do the test
gcc flexspi_fpga_latency_test.c
./a.out 128
About driver and test app
The driver can be installed in test app automatically. Insmod command is called in test app as below.
insmod imx93_flexspi_fpga.ko mux=1 div=30
The parameter mux can be set to 0,1,2,3. Means 24MHz, 1000MHz, 800MHz, 625MHz root clock. And div is the divider. In default, 1000/30 = 33MHz is applied.
More details of hardware connection:
Since the adapter board is not on NXP website and it is just for test, there are two options.
- Use fly-wire to connect flexspi and lattice fpga instead of the adapter card.
- Use M.2 adapter card but need be produced by customer themselves.
If M.2 adapter is not used, fly-wire can be applied to connect i.MX93 to FPGA. The column of Pads is a pad list that can bring out signal lines from the bottom layer of i.MX93 EVK.
|
i.MX 93 |
Pads of imx93 |
FPGA ECP5 |
|
SD3_CLK |
TP912 |
B10 |
|
SD3_CMD |
TP913 |
A9 |
|
SD3_DATA0 |
TP914 |
C6 |
|
SD3_DATA1 |
TP915 |
C7 |
|
SD3_DATA2 |
TP916 |
E8 |
|
SD3_DATA3 |
TP917 |
D8 |
|
GND |
|
GND |
|
J1003-2 1V8 |
|
VCCIO0 Remove JP10 Jumper |
It is also possible that the customer would choose M.2 adapter card solution. The adapter card is simple and cheap. It can be redesigned easily with attached schematic as reference. Make sure the board thickness is 0.8mm. And recommend to apply GND copper to improve signal quality. The schematic is attached.
To get the information about the demo from Lattice perspective, please check the link below.
Lattice QSPI to NXP MPU Reference Design | Lattice Reference Design
