Question: What is minimum requirement for VDDSNVS_IN voltage to keep RTC timing info in SNVS block? In the datasheet, there is requirement for VDDSNVS_IN input and it is 2.9V to 3.3V. Is it recommended requirement for RTC operation? Other security function is not used in SNVS and just interested in basic RTC fuction after power off. Answer: The finall answer is tha to folow our datasheet saying for no matter if you are only RTC keeping application. "The SNVS regulator takes the SNVS_IN supply and generates the SNVS_CAP supply which powers the real time clock and SNVS blocks. If  VDDHIGH_IN is present, then the SNVS_IN supply is internally shorted to the VDDHIGH_IN supply to allow coin cell recharging if necessary. The output voltage is roughly one third(1/3) of SNVS_IN. -- in the SNVS_CAP powered on-chip logics, need min 0.9v for normal operation, we can only guarantee the operation in this condition, whih means min SNVS_IN = 3*SNVS_CAP = around 2.7. with some margin, so min 2.8v is the requireent. Again, we can only guarantee the operation in this condition(VDD_SNVS_CAP >0.9v). The datasheet is correct : VDDSNVS_IN must not be less than 2.8 V (Table 6. Operating Ranges, of IMX6DQCEC,  Rev. 2.2, 07/2013 )  I guess you talked about operating condition in ON mode. In case of OFF mode, VSNVS output of PFUZE depends on LICELL input power and usually coincell can supply under 2.5V output. According to PFUZE spec, VSNVS output in OFF mode is under 1.8V. And as I know, LP (low power) part of SNVS is only operation al in OFF mode so I don't think VDDSNVS_IN requires over 3V in that condition. In my assumption, SNVS can maintain itis data and RTC if VDDSNVS_IN is over 1.1 ~ 1.3V in OFF mode but I just want to know what is our spec for it. If we consider low power modes of the i.MX6, then - according to Table 10 (Stop Mode Current and Power Consumption) of IMX6DQCEC, Rev. 2.3, 07/2013 (for example) - in "SNVS Only" mode VDD_SNVS_IN of 2.8V is considered. Here 2.8 V is taken as minimal value. At least, as we can see, there are no other specifications.

In the default release the SSI1 doesn't suport double FIFO in audio driver. Attached was the code to support double FIFO with updated DMA script.

In i.MX51 platfrom the PMIC 13892 also has a internal RTC. We can use this RTC instead of the i.mx51 SRTC. Attached was the implementation of it.

Currently the default i.MX51 wince release doesn't support high capacity MMC card. Attached was the patch of how to enable high capacity MMC card in i.mx51. Original Attachment has been moved to: High-capacity-MMC-support.zip

We use flash header which will be access by ROM code to do the NAND boot or secure boot. This is a document introduce the flash header.

In the i.MX51 default WINCE6  release, the eCSPI doesn't support multiple bursts mode and set the wait states. Attached was the document and code for how to enable the multiple bursts mode and how to set the wait states between two burst.

Question: How much control of the bitrate does the i.MX6's VPU provide? VPU API includes a bitrate setting in the EcnOpenParam, is this a maximum, minimum, or something else? To encode two 1280x1080 streams at 30fps with a bit rate of at least 20Mbps, from the information in the following thread, it looks like this isn't supported due to VPU bandwitdh, Is there any limit on bitrate due to the VPU's processing bandwidth?  I.e., if the stream is limited to one 1280x1080 channel, can we choose a maximum bit rate and if so, how do we determine what it is? Answer: The bitRate field in the EncOpenParam structure is the desired target bit rate in kbps. If 0, there is no rate control and frames are encoded based on the quantization parameter specified by the quantParam field in EncParam.structure. It seems upper limit is 20Mbps for 1280x1080@30fps. So you should specified bitrate=2000 in your use case. In general, the maximum bitrate is about 30Mbps. Vpu driver will return invalid parameter if the appointed bitrate reach out of the range (0, 32767kbps). Please refer to Q&A: MX6 VPU H.264 Dual Stream Encode Limits.

Question: Is it true ture that MX6 VPU is capable of encoding dual H.264 streams that are 1024x600 at 60fps?  There are slides that claim three 720p30 streams or two 1080p30 streams simultaneously. There is little guidance as to what the VPU limits in resolution, frame rate and bit rate are for other resoluitons and frame rates. Is there any information that can be used to decide if  the VPU can encode an arbitrary video stream or multiple arbitrary video streams?  Since memory bandwidth will enter into this decision at some point has anyone quantified the memory bandwidth requirements verses video resolution and frame rate? Answer: Maximum supported trhoughput,  is 72,576,000 pixels /s @ VPU frecuency of 266 mhz 2 x  1024 x 600 x 60hz = 73,728,000 So this is not supported. If framerate is lower i.e.  30hz  then it will be supported.

Hi All, The new i.MX 6 Q/D/DL/S/SL L3.0.35_4.1.0 GA release is now available on the http://www.freescale.com/site. ·         Files available                                   # Name Description 1 L3.0.35_4.1.0_LINUX_DOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Linux BSP   Documentation. Includes Release Notes, Reference Manual, User guide. API   Documentation 2 L3.0.35_4.1.0_LINUX_MMDOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Multimedia Codecs Documentation.   Includes CODECs Release Notes and User's Guide 3 L3.0.35_4.1.0_SOURCE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Linux BSP   Source Code Files 4 L3.0.35_4.1.0_MM_CODECS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Multimedia Codecs Sources 5 L3.0.35_4.1.0_AACP_CODECS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux AAC Plus Codec 6 L3.0.35_4.1.0_DEMO_IMAGE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Binary Demo Files 7 L3.0.35_4.1.0_UBUNTU_RFS_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux File System for the Ubuntu Images 8 i.MX_6D/Q_Vivante_VDK_146_Tools Set   of applications for the Linux L3.0.35_4.1.0 BSP, designed to be used by   graphics application developers to rapidly develop and port graphics   applications. Includes applications, GPU Driver with vprofiler enabled and   documentation. 9 IMX_6DL_6S_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6DualLite and i.MX   6Solo. 10 IMX_6DQ_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6Quad and i.MX 6Dual. 11 IMX_6SL_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6Sololite. ·         Target HW boards o   i.MX 6Quad SABRE-SDP o   i.MX 6Quad SABRE-SDB o   i.MX 6Quad SABRE-AI o   i.MX 6DualLite SABRE-SDP o   i.MX 6DualLite SABRE-AI o   i.MX 6SL EVK ·         New features o   BSP New Features on i.MX 6D/Q, i.MX 6DL/S and MX 6SL: §  HDCP §  CEC §  GPU4.6.9p12 §  Audio playback IRAM/SDMA §  V4L capture resize on MX6SL §  MX6DQ disable the double line fill feature of PL310 ·         Known issues o   For known issues and limitations please consult the release notes.

i.MX28 LCD driver 8080 bus interface mechanism please read readme.txt and it will teach you how to use it

I have imx53 quick sort board i downloaded u-boot-mx53.bin and uImage to loade that into the board and dowloaded rootfs.ext2.gz in the L2.6.35_11.09.01_ERimages and i did partitions on 1GB memory card and loaded that u-boot-mx53.bin,uImage images on to the 500mb of NTFS filesystem and loaded and rootfs.ext2.gz on to the othe 500mb of ext4 file system the i inserted memorycard in to the board but u-boot logs are not comming what will be the solution

1. User Case: Demo Architecture: Demo Description: A, B, C and Speaker all are i.MX6DQ SabreSD board and running Ubuntu system. A is media server which send out broadcast 30Mbps h264 video and audio stream and running iperf to send out tcp packets via best efforts lane to PC. B and C are clients to get video data only and play in screen.  Speaker is a client to receive audio data only and play to speaker. PC which install ubuntu system is used to received best efforts data from A. Demo Goal: Use Gstreamer playback 30Mbps streaming  "H264_AVC_1080p_30fps_27Mbps_mp3.avi", while running iperf TCP streaming under the following two case: 1. Running the non-CBS kernel 2. Enable the FIQ kernel Validate the Qav (Queue and Forwarding Protocol) which is developed by SW. 2. Resource: FIQ Patch: 0001-GIC-FIQ-EPIT-implement.patch 0002-set-EPIT-priority-to-highest.patch 0003-GIC-support-SMP-4-cores-of-FIQ.patch CBS &Shaper Patch: 0004-Implement-credit-base-shaper-alogrithim-to-schdule-A.patch 0005-enet-avb-CBS-SIRQ-rum-mode-pass-performance-stress-t.patch Others Patch: 0006-Fix-the-61883-sub-type-protocol-check.patch 0007-Add-hrtimer-for-the-sirq.-Talker-transmit-packets-nu.patch 0008-1.-Fix-memory-map-size-issue.patch 0009-Increase-BD-entries-to-reduce-the-full-times.patch 0010-Add-sys-interface-to-log-out-the-video-packet-number.patch 0011-Add-AVB-timestamp-support.patch 0012-GIC-support-SMP-4-cores-of-FIQ.patch Gstreamer UDPAVB Plug-in Library and Source: Library: udp/output/libgstudp.so Source: udp/* 3. Setup the Patch:       - Low level:  kernel enet driver implement CBS and traffic shaper:              1. Apply all the patches in the patch_whole.tar.gz in the attachment               2. Rebuild kernel 3.0.35: Enable "CONFIG_ENET_IMX6_AVB" to support AVB.                        Enable "CONFIG_RUN_IN_FIQ"  in kernel:            let CBS run in FIQ mode.                3. make uImage.                You can also use the uImage-avb-fig in the attachment directly.  Flash to the SD card use dd command, the user gudie refer to the  i.MX_6Dual6Quad SABRE_SD_Linux_User_Guide.pdf.                Note: the uImage_org_nonavb in the attachment is the kernel image without QAV and FIQ. - High level: use Gstreamer as the media input/output interface, encapsulation with IEEE1722 format:         Before the below action, you should already have seutp the Ubuntu Rootfs,  copied all the Freescale *.deb files that come alone with the Release BSP demo image package and copied all the MM codec *.deb files (IMX_MMCODEC_3.0.7.tar) that from Freescale offical website, the user gudie refer to the  i.MX_6Dual6Quad SABRE_SD_Linux_User_Guide.pdf. 1. Add gstreamer setup version as following: - gstreamer core version: 0.10.35 - gst-plugins-good version: 0.10.30 - gst-plugins-bad version: 0.10.11 2. Setup: - tar xvzf udp.tar.gz - cd gst-plugins-good-0.10.30 - ./configure - make - make install - cp ~/udp/* gst/udp/ - cd gst/udp - make - cp  libgstudp.so /usr/lib/gstreamer-0.10/ - gst-inspect | grep avb         //Check whether the avb plugin is installed successfully. If the three avb plugin is printed out in the terminal, the avb plugins are proved to install properly. 4. Run the Demo:       1.  Start the iperf server in PC linux machine by inputting " iperf -s -i 1&".              2.  Power on the A board, ensure the board can get the DHCP IP address, Start the iperf client on the demo board which sends outgoing Audio-Video streaming in the background. Input "iperf -c <iperf server ip> - t 6000&". If the connection is  successful, the iperf log should be able to be seen in the linux machine terminal.              3.  Power on the B and C board, inputting the following command to receive video data:            Run "./startRxVideoAVB.sh"  to start gstreamer video receive process on video display board       4.  Power on the speaker board, inputting the following command to receive audio data:             Run "./startRxAudioAVB.sh" to start gstream audio receive process on audio  playback board 5.  Inputting the following command to send video/audio data to client at the A board terminal windowns:                              Run "./startTxAVB.sh" to start the 1722 streaming traffic                                      (note: H264_AVC_1080p_30fps_27Mbps_mp3.avi located at current directory)               6.  Change to the kernel with QAV and follow the steps 1~5 above 5. Result: Without FIQ Qav,  video play at client B and C serious freeze. It takes 3 minutes to play 1min 40s h264 stream.  iperf speed over 80Mbps. With FIQ Qav, video play at client B and  C is smooth and same as without iperf in background. Iperf show speed is less than 70Mbps.  FIQ Qav correctly reserve necessary bandwidth to AV stream 6. Know issues Failed to request the IP from DHCP         [Solution]  For FIQ, after kernel up, you must run the command: echo 1 > /sys/devices/platform/imx_wfi_issue.0/enable   2.   Kernel is halted or crashed [Solution] In bootloader parameter, add 'nosmp' in bootargs_mmc.

In traditional file system, the WinCE image is a signal file “NK.NB0”/”NK.BIN”. And when using NAND flash for storage, since it can’t support XIP, the total “NK.NB0” need be copied into RAM before running. The EBOOT will do this copy. In this way, there are two main shortages: Long boot time and big size RAM requirement. If the WinCE image is big (Included more features), these issues will be critical. The BINFS can fix those two issues fine. It gave the chance to use 32MB RAM run 64MB WinCE image, this can cost down the final products. In BINFS file system, the final WinCE image will be divided into multi-BIN files, and only the XIPKERNEL BIN (Less than 7 MB) need be copied into RAM by EBOOT. The files in other BIN will work with demand paging mode. These files will be loaded into RAM only when they need run.

Current the SSI is set to I2S slave mode in FSL default release BSP. attached the code for how to set it to master mode.

I've recently done some digging into fstrim feature on sabresd-6q. Here list it below detailed: Background:      When Nexus 7 first came out, many users felt it was speedy and high-performance. But after months of installing applications and using the tablet, things began slowing down.This was a friction point that many hoped would be fixed in the new Nexus 7 (2013) model, which it was. There’s even more to the story though, it turns out Google has fixed that storage I/O aging problem on all Nexus devices with the Android 4.3 update which comes with a little-hyped feature that could be huge for performance in the future – TRIM support via fstrim. Why slowing down？      Remember that deleting a file in software isn't actually communicated to solid state storage (whether SSD or eMMC). The space is freed up from the user's perspective, but the eMMC controller in this case still treats the pages in NAND as having valid data. Let's say you copy a 3GB movie to your internal storage, watch the movie and later delete it. You'd have 3GB free to re-use, but until you re-write those blocks the eMMC controller would treat all 3GB as valid data. There's a data structure used by the eMMC controller that tracks mapping logical locations to physical locations in NAND. I won't go into great detail here but the more complex that mapping becomes, and the more locations that have to be tracked, the slower internal NAND management works. Why SSD has such issue? Root cause is "Flash memory is divided into blocks, which is further divided in pages. The minimum write unit is a page, but the smallest erase unit is a block" which will cause fragments as time goes. Why fstrim?      Fstrim is one mechanism of linux filesystem which derives from TRIM. TRIM is already introduced since linux2.6.33. It is the name of a command that the operating system can send to tell the SSD which blocks are free in the filesystem.The SSD uses this information to internally defragment the blocks and keep free pages available to be written quickly and efficiently. How framework triggers fstrim in android4.3?      Android4.3 introduces a new service IdleMaintenanceService to manage when and how trigger fstrim in right time. Once system satisfies the following conditions, it will send out one "ACTION_IDLE_MAINTENANCE_START" intent which the MountService listens for. Last time  "ACTION_IDLE_MAINTENANCE_START" intent has been sent before 24 hours. The device is either off-charger with 80% battery or on-charger with 30% battery The device can go idle state. User don't use it for 71 minutes. Test fstrim on Imx.6      In order to wait little time to trigger fstrim, I tried to change the following variables not to wait 71 minutes and 24 hours. After changing, it will trigger one time fstrim two minutes after system goes into idle state every 30 minutes. --- a/services/java/com/android/server/IdleMaintenanceService.java +++ b/services/java/com/android/server/IdleMaintenanceService.java -    private static final long MIN_IDLE_MAINTENANCE_INTERVAL_MILLIS = 24 * 60 * 60 * 1000; // 1 day +    private static final long MIN_IDLE_MAINTENANCE_INTERVAL_MILLIS = 30 * 60 * 1000; // 30 minute -    private static final long MIN_USER_INACTIVITY_IDLE_MAINTENANCE_START = 71 * 60 * 1000; // 71 min +    private static final long MIN_USER_INACTIVITY_IDLE_MAINTENANCE_START = 2 * 60 * 1000; // 2 min -    private static final long MAX_IDLE_MAINTENANCE_DURATION = 71 * 60 * 1000; // 71 min +    private static final long MAX_IDLE_MAINTENANCE_DURATION = 2 * 60 * 1000; // 2 min Firstly I  run Quadrant apk to see my I/O performance at beginning, Its score is 3544. During this 30 minutes, you can try to mess your system. Try your best to install most apks. Run monkey test in background. Then I  run Quadrant again to check my I/O performance, its score is only a little decline 3538. After that I run "logcat | busybox grep -i fstrim" in console to wait for the action of fstrim, here is my logcat: 130|root@sabresd_6dq:/ # logcat -d | busybox grep -i fstrim I/fstrim  ( 2344): Starting fstrim work... I/fstrim  ( 2344): Invoking FITRIM ioctl on /data I/fstrim  ( 2344): Trimmed 6367305728 bytes on /data I/fstrim  ( 2344): Invoking FITRIM ioctl on /cache I/fstrim  ( 2344): Trimmed 526355456 bytes on /cache I/fstrim  ( 2344): Finished fstrim work. OK, I checked the I/O information again, its score is restored to 3546: Conclusion      Good, fstrim takes effect. So on imx.6 using android4.3, fstrim will also work automatically. We will also enjoy good performance in I/O memory.Great!

This document provide an overall guide how to get started with i.MX6 development. There are several chapters: 1. how to get necessary docs from freescale website; 2. how to setup environment and build your own images;3. Hardware design consideration;4. How to get help. I hope the doc will bring you in i.MX world more easily, and hope you all have a fun in it.

Q: how to do PCIe compliance measurement on the Sabre SDB? Phase Jitter on the PCIe reference clock had been see problem. Pin C7  "CLK1_N" and Pin D7 "CLK1_P"  were used like on the Sabre SD. During Compliance meassurments  margin of -80% and more.... was seen. Is there a known issue? Has someone done a similar compliance measurement on the Sabre SDB? A: The PCIe TX compliance tests on i.MX6 SD boards in TK's Open Lab.  Based on the internal PLL clock, i.MX6 SD boards pass the PCIe TX compliance tests. 1, please check the capacitor on NVCC_PLL_OUT, it should no less than 10uF, 22uF is better. 2, please check if the 24MHz input crystal is good enough. 50ppm is required. 3, please check the test step: 1.1     TX Test Configuration and Procedures Overview of Test Steps 1.      Integrate the patch for PCIE test to mainline, recompile the Kernel , and replace the old image of the board under test. ·         Make sure the following configuration has been set, when re-compiling the kernel image. # MX6 Options: # CONFIG_IMX_PCIE=y 2.      Correctly set up the test environment: ·         Connect the compliance load board (CLB x1/x16) revision 2.0 into the slot of DUT, and change the switch and jumpers to select x1 . ·         Connect the lane under test to oscilloscope via differential probe and matched coaxial , do remember that cable calibration should be done before test. ·         Connect the clock signal to the oscilloscope. The clock must have SSC enabled or disabled to be consistent with settings for the system during normal operation. ·         Power on the system. 3.      After I.MX6x enters Polling.Compliance , press the Toggle Button on CLB to select the output , make sure the data waveform is compliance pattern, 5.0GT/s for GEN2, 2.5GT/s for GEN1. 4.      Follow the Oscilloscope operation instruction, set it to the right mode. 5.      Capture and save at least 1 million * 200 ps of data and clock simultaneously at the sample rate of 50GS/s for GEN2, or 250,000 UI * 400 ps of data at the sample rate of 25GS/s for GEN1. 6.      Run free software Sigtest to analyze the PCIE TX signal. 7.      Customer could adjust the parameters of the PCIE_PHY by changing IOMUXC_GPR8 register settings to get the test past. a.       The default of this Register is configured as: imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8); b.      write the Register, Address: 20E_0000h base + 20h offset = 20E_0020h; command: /unit_tests/memtool -32 0x020e0020= FFFD4000 This document was generated from the following discussion: i.Mx6 PCIe compliance

Q:Is there an issue using odd DIV_SELECT values? When setting the CPU clock (maybe others also) in uboot, the code will only use even valuesfor the DIV_SELECT field. There is nothing in the Reference Manual or Errata that indicates only even values can be used for this field. There were 2 SR's that had conflicting answers and we are trying to determine what can be used. The CPU freq setting trying to be achieved is 996MHz. With a 24MHz source, you need 24MHz x 41.5 = 996MHz. Since the DIV_SELECT is x2, a value of 83 would be needed. A: Below is the DIV_SELECT description of ARM PLL, since the Fin is 24MHz, so there is no odd issue of DVI_SELECT, as 24 / 2 = 12MHz. Such as for 996M, this value is 83, that is fine. "This field controls the pll loop divider. Valid range for divider value: 54-108. Fout = Fin * div_select/2.0." This document was generated from the following discussion: mx6Q PLL Setting