i.MX31 - 3 Stack There are two boot modes for IMX31PDK. In Internal Boot mode, the processor will execute an address from internal memory, and in External Boot mode the processor will execute an address from a external memory properly configured. This modes can be configured setting the values of dip switch SW5-SW10 shown in image below. Debug board. Top view. External Boot from Flash In this mode, the processor will execute an address into a external flash (NAND). If there is a bootloader saved in the right place in flash, it will be executed and the system will start. If there are a kernel image and a root file system saved configured, the operational system will start. The values for the IMX31PDK dip switches programming the boot sequence are show in table below. SW5 SW6 SW7 SW8 SW9 SW10 Internal Boot (programming flash) 0 0 0 0 0 0 External Boot from Flash 0 1 0 0 0 0 Internal Boot The Internal Boot mode enables ATK to communicate with processor and perform the writing of images into flash (bootloader image, kernel image and root file system image).

[中文翻译版] 见附件   原文链接： Add a new shared memory region on Android Auto P9.0.0_GA2.1.0 BSP 

Currently the default i.MX51 wince release doesn't support high capacity MMC card. Attached was the patch of how to enable high capacity MMC card in i.mx51. Original Attachment has been moved to: High-capacity-MMC-support.zip

P3T1755 Demo   In this space I want to show you the things that you can create usign our products.   In  this demo I demostrate a use case creating a GUI for a Temperature Sensor.   We can create modern GUIs and more with LVGL combined with our powerful processors.               CPU USAGE As we can see  the CPU usage for this demo is around 2%   Pictures         This demo is based on the previous publused articles.   References: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Adding-support-to-P3T1755-on-Linux/ta-p/1855874 https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-run-LGVL-on-iMX-using-framebuffer/ta-p/1853768  

In L2.6.35_11.09.01_ER BSP Uboot, the MMC driver was updated, but there is issue that when you modified some uboot code, the MMC driver has chance to fail to work. The root cause is that mmc->has_init hasn't been initialized. Sometimes the value will be not zero, then mmc driver will be skipped for initialization. Attached is the patch to fix this issue in L2.6.35_11.09.01_ER BSP Uboot.

Question: Did we tested active PCIe components while the Cortex-A9 was in Sleep Mode (suspend to memory)? Answer: It's a known issue that PCIe can't support suspend/resume. And can't be built in kernel image if the system want suspend/resume. I think PCIe will be active while core is in sleep more. Is it different scenario? No, the pcie core is not active, it is in L2 state after suspend, and it can't resume back to L0 state when system resume is called. So, DO NOT let pcie do suspend operation right now. BTW, the tested device: * INTEL x1 1000M CT network card. * INTEL iwl wifi cards. * x1 pcie to usb3.0 card Yes, this patch had been tested on imx_3.0.35_4.0 release, and would be merged into next 3.0.35 release. TO1.2 is used. We tested the Patch against imx_3.0.35_4.0 release

The patch is based on jb4.3_1.1.1-ga_rc2. Merge some commits from kitkat.

Customer requirement: Use NOR boot as a backup — boot from NOR, then mount kernel, DTB, and rootfs from NAND. Test module: https://www.nxp.com/design/design-center/development-boards-and-designs/m2-nand-flash-daughter-card:M2-NAND-FLASH   Test under L6.12.49 Uboot.   1. Why Does U-Boot Source Need Modification on i.MX95? i.MX93's boot ROM initializes the SD3_XXX and SD1_XXX PADs. On the i.MX93 EVK design, SD3_XXX is routed to the M.2 connector, and SD1_XXX is connected to eMMC.   For i.MX95, the boot ROM only initializes the XSPI1_XXX PADs. The FlexSPI signals can be muxed out from SD3_XXX, but the boot ROM cannot boot from SD3_XXX.   Due to these differences, the uboot.bin flashed into NOR must have the ability to read NAND. However, the default BSP always reads from NOR, so U-Boot must be modified to activate the M.2 NAND module. 2. Flashing NAND To flash NAND, a custom UUU script must be used. Using the built-in UUU spinand flashing script is not recommended — the built-in script assumes NAND is accessible in U-Boot, but the default imx-boot uses NOR. 2.1 UUU Script uuu_version 1.2.39 # Please replace below item with actual name # @_flash_fw.bin | boot loader firmware, for i.MX8QM/QX, it's different from _flash.bin, for all other platforms, it's same as _flash.bin # @_flash.bin | boot loader file burn to NAND # @_Image | linux kernel image, zImage for arm32, Image for arm64 # @_board.dtb | board dtb file # @_initramfs.cpio.zst.uboot | initramfs # @_tee | optee image # @_rootfs.tar.zst | rootfs # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM, skip QSPI header SDPS: boot -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -skipfhdr # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -offset 0x10000 -skipfhdr SDPU: jump # } # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -skipspl -skipfhdr SDPV: jump # } FB: ucmd setenv fastboot_buffer ${loadaddr} FB: download -f Image.bin FB: ucmd setenv fastboot_buffer ${fdt_addr} FB: download -f imx95-19x19-evk.dtb FB: ucmd setenv fastboot_buffer ${initrd_addr} FB: download -f fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot FB: ucmd setenv bootargs ${bootargs} ${mtdparts} FB: ucmd setenv fdtfile imx95-19x19-evk.dtb #FB: ucmd setenv bootargs console=ttymxc3,115200 ${mtdparts} FB: acmd ${kboot} ${loadaddr} ${initrd_addr} ${fdt_addr} FBK: ucmd cat /proc/mtd FBK: ucmd rm -f /tmp/mtd.sh FBK: ucmd cat /proc/mtd | while read dev size erase name; do mtd=`echo $dev | sed 's/mtd//;s/://'`; name=`echo $name | tr -d '"'`; echo export $name=$mtd >> /tmp/mtd.sh; done # mapping name FBK: ucmd . /tmp/mtd.sh; [ -n "${bootloader}" ] && echo export nandboot=${bootloader} >> /tmp/mtd.sh FBK: ucmd . /tmp/mtd.sh; [ -n "${kernel}" ] && echo export nandkernel=${kernel} >> /tmp/mtd.sh FBK: ucmd . /tmp/mtd.sh; [ -n "${dtb}" ] && echo export nanddtb=${dtb} >> /tmp/mtd.sh FBK: ucmd . /tmp/mtd.sh; [ -n "${rootfs}" ] && echo export nandrootfs=${rootfs} >> /tmp/mtd.sh FBK: ucmd chmod 755 /tmp/mtd.sh FBK: ucmd cat /tmp/mtd.sh FBK: ucmd mount -t debugfs debugfs /sys/kernel/debug || true # write boot loader — this partition was set to read-only in DTS during testing, skip erase for now # FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandboot} 0 0 # FBK: ucp imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi t:/tmp/boot # FBK: ucmd . /tmp/mtd.sh; cd /tmp; soc=`cat /sys/devices/soc0/soc_id 2>/dev/null`; pad=""; case "$soc" in MX8Q*|MX8DXL*|MX8MN*|MX8MP*) ;; *) pad="-x" ;; esac; kobs-ng init $pad -v --chip_0_device_path=/dev/mtd${nandboot} /tmp/boot # burn kernel FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandkernel} 0 0 FBK: acmd . /tmp/mtd.sh; nandwrite -p /dev/mtd${nandkernel} - FBK: ucp Image.bin t:- FBK: sync # burn dtb FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nanddtb} 0 0 FBK: ucp imx95-19x19-evk.dtb t:/tmp/dtb FBK: ucmd . /tmp/mtd.sh; nandwrite -p /dev/mtd${nanddtb} /tmp/dtb # burn uTee # FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandtee} 0 0 # FBK: ucp _tee t:/tmp/tee # FBK: ucmd . /tmp/mtd.sh; nandwrite -p /dev/mtd${nandtee} /tmp/tee # burn rootfs FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandrootfs} 0 0 FBK: ucmd ubidetach /dev/ubi_ctrl -m ${nandrootfs} || true FBK: ucmd . /tmp/mtd.sh; ubiattach /dev/ubi_ctrl -m ${nandrootfs} FBK: ucmd ubimkvol /dev/ubi0 -N nandrootfs -m FBK: ucmd mkdir -p /mnt/mtd FBK: ucmd mount -t ubifs ubi0:nandrootfs /mnt/mtd FBK: acmd export EXTRACT_UNSAFE_SYMLINKS=1; tar --zstd --warning=no-timestamp -x -C /mnt/mtd FBK: ucp core-image-base-imx95-19x19-lpddr5-evk.rootfs-20260429064745.tar.zst t:- FBK: sync FBK: ucmd umount /mnt/mtd FBK: done 2.2 Linux Patch diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts index d21335d8af84..0db2cefbab01 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -388,17 +388,47 @@ &flexspi1 { pinctrl-0 = <&pinctrl_flexspi1>; status = "okay"; - mt35xu01gbba: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexspi1_reset>; - reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; + W25N02KWZEIR: flash@0 { + compatible = "spi-nand"; #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <200000000>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; + reg = <0>; + spi-max-frequency = <104000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x000000 0x800000>; // 8MB + // read-only;//if you hope imx-boot read only + }; + + partition@1 { + label = "config"; + reg = <0x800000 0x800000>; //8MB + }; + + partition@2 { + label = "kernel"; + reg = <0x1000000 0x2800000>; //40MB + }; + + partition@3 { + label = "dtb"; + reg = <0x3800000 0x20000>; //128K + }; + + partition@4 { + label = "rootfs"; + reg = <0x3820000 0xFFFFFFFF>; + linux,rootfs; + }; + }; }; }; @@ -887,17 +917,12 @@ IMX95_PAD_GPIO_IO27__CAN2_RX 0x39e pinctrl_flexspi1: flexspi1grp { fsl,pins = < - IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B 0x3fe - IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK 0x3fe - IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS 0x3fe - IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe - IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe - IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe - IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe - IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4 0x3fe - IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5 0x3fe - IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6 0x3fe - IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7 0x3fe + IMX95_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x3fe + IMX95_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x3fe + IMX95_PAD_SD3_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe + IMX95_PAD_SD3_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe + IMX95_PAD_SD3_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe + IMX95_PAD_SD3_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe >; }; 2.3 Flashing Log 2:31-182BA9E87D9840BA>Start Cmd:SDPS: boot -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -skipfhdr 100%2:31-182BA9E87D9840BA>Okay (5.364s) New USB Device Attached at 2:31-182BA9E87D9840BA 2:31-182BA9E87D9840BA>Start Cmd:SDPV: delay 1000 2:31-182BA9E87D9840BA>Okay (1.009s) 2:31-182BA9E87D9840BA>Start Cmd:SDPV: write -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -skipspl -skipfhdr 100%2:31-182BA9E87D9840BA>Okay (3.165s) 2:31-182BA9E87D9840BA>Start Cmd:SDPV: jump 100%2:31-182BA9E87D9840BA>Okay (0.017s) New USB Device Attached at 2:31-182BA9E87D9840BA 2:31-182BA9E87D9840BA>Start Cmd:FB: ucmd setenv fastboot_buffer ${loadaddr} 2:31-182BA9E87D9840BA>Okay (0.014s) 2:31-182BA9E87D9840BA>Start Cmd:FB: download -f Image.bin 2:31-182BA9E87D9840BA>Okay (1.715s) 2:31-182BA9E87D9840BA>Start Cmd:FB: ucmd setenv fastboot_buffer ${fdt_addr} 2:31-182BA9E87D9840BA>Okay (0.011s) 2:31-182BA9E87D9840BA>Start Cmd:FB: download -f imx95-19x19-evk.dtb 2:31-182BA9E87D9840BA>Okay (0.026s) 2:31-182BA9E87D9840BA>Start Cmd:FB: ucmd setenv fastboot_buffer ${initrd_addr} 2:31-182BA9E87D9840BA>Okay (0.011s) 2:31-182BA9E87D9840BA>Start Cmd:FB: download -f fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot 2:31-182BA9E87D9840BA>Okay (0.702s) 2:31-182BA9E87D9840BA>Start Cmd:FB: ucmd setenv bootargs ${bootargs} ${mtdparts} 2:31-182BA9E87D9840BA>Okay (0.011s) 2:31-182BA9E87D9840BA>Start Cmd:FB: ucmd setenv fdtfile imx95-19x19-evk.dtb 2:31-182BA9E87D9840BA>Okay (0.011s) 2:31-182BA9E87D9840BA>Start Cmd:FB: acmd ${kboot} ${loadaddr} ${initrd_addr} ${fdt_addr} 2:31-182BA9E87D9840BA>Okay (0.007s) New USB Device Attached at 2:31-0000000000000000 2:31-0000000000000000>Start Cmd:FBK: ucmd cat /proc/mtd dev: size erasesize name mtd0: 00800000 00020000 "bootloader" mtd1: 00800000 00020000 "config" mtd2: 02800000 00020000 "kernel" mtd3: 00020000 00020000 "dtb" mtd4: 0c7e0000 00020000 "rootfs" 2:31-0000000000000000>Okay (0.015s) 2:31-0000000000000000>Start Cmd:FBK: ucmd rm -f /tmp/mtd.sh 2:31-0000000000000000>Okay (0.007s) 2:31-0000000000000000>Start Cmd:FBK: ucmd cat /proc/mtd | while read dev size erase name; do mtd=`echo $dev | sed 's/mtd//;s/://'`; name=`echo $name | tr -d '"'`; echo export $name=$mtd >> /tmp/mtd.sh; done 2:31-0000000000000000>Okay (0.077s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; [ -n "${bootloader}" ] && echo export nandboot=${bootloader} >> /tmp/mtd.sh 2:31-0000000000000000>Okay (0.006s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; [ -n "${kernel}" ] && echo export nandkernel=${kernel} >> /tmp/mtd.sh 2:31-0000000000000000>Okay (0.008s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; [ -n "${dtb}" ] && echo export nanddtb=${dtb} >> /tmp/mtd.sh 2:31-0000000000000000>Okay (0.006s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; [ -n "${rootfs}" ] && echo export nandrootfs=${rootfs} >> /tmp/mtd.sh 2:31-0000000000000000>Okay (0.008s) 2:31-0000000000000000>Start Cmd:FBK: ucmd chmod 755 /tmp/mtd.sh 2:31-0000000000000000>Okay (0.007s) 2:31-0000000000000000>Start Cmd:FBK: ucmd cat /tmp/mtd.sh export name=dev export bootloader=0 export config=1 export kernel=2 export dtb=3 export rootfs=4 export nandboot=0 export nandkernel=2 export nanddtb=3 export nandrootfs=4 2:31-0000000000000000>Okay (0.007s) 2:31-0000000000000000>Start Cmd:FBK: ucmd mount -t debugfs debugfs /sys/kernel/debug || true 2:31-0000000000000000>Okay (0.01s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandkernel} 0 0 Erasing 40960 Kibyte @ 0 -- 100 % complete 2:31-0000000000000000>Okay (0.856s) 2:31-0000000000000000>Start Cmd:FBK: acmd . /tmp/mtd.sh; nandwrite -p /dev/mtd${nandkernel} - 2:31-0000000000000000>Okay (0.051s) 2:31-0000000000000000>Start Cmd:FBK: ucp Image.bin t:- 33%Writing data to block 0 at offset 0x0 Writing data to block 1 at offset 0x20000 Writing data to block 2 at offset 0x40000 Writing data to block 3 at offset 0x60000 Writing data to block 4 at offset 0x80000 Writing data to block 5 at offset 0xa0000 Writing data to block 6 at offset 0xc0000 Writing data to block 7 at offset 0xe0000 Writing data to block 8 at offset 0x100000 Writing data to block 9 at offset 0x120000 Writing data to block 10 at offset 0x140000 Writing data to block 11 at offset 0x160000 Writing data to block 12 at offset 0x180000 Writing data to block 13 at offset 0x1a0000 Writing data to block 14 at offset 0x1c0000 Writing data to block 15 at offset 0x1e0000 Writing data to block 16 at offset 0x200000 Writing data to block 17 at offset 0x220000 Writing data to block 18 at offset 0x240000 Writing data to block 19 at offset 0x260000 Writing data to block 20 at offset 0x280000 Writing data to block 21 at offset 0x2a0000 Writing data to block 22 at offset 0x2c0000 Writing data to block 23 at offset 0x2e0000 Writing data to block 24 at offset 0x300000 Writing data to block 25 at offset 0x320000 Writing data to block 26 at offset 0x340000 Writing data to block 27 at offset 0x360000 Writing data to block 28 at offset 0x380000 Writing data to block 29 at offset 0x3a0000 Writing data to block 30 at offset 0x3c0000 Writing data to block 31 at offset 0x3e0000 Writing data to block 32 at offset 0x400000 Writing data to block 33 at offset 0x420000 Writing data to block 34 at offset 0x440000 Writing data to block 35 at offset 0x460000 Writing data to block 36 at offset 0x480000 Writing data to block 37 at offset 0x4a0000 Writing data to block 38 at offset 0x4c0000 Writing data to block 39 at offset 0x4e0000 Writing data to block 40 at offset 0x500000 Writing data to block 41 at offset 0x520000 Writing data to block 42 at offset 0x540000 Writing data to block 43 at offset 0x560000 Writing data to block 44 at offset 0x580000 Writing data to block 45 at offset 0x5a0000 Writing data to block 46 at offset 0x5c0000 Writing data to block 47 at offset 0x5e0000 Writing data to block 48 at offset 0x600000 Writing data to block 49 at offset 0x620000 Writing data to block 50 at offset 0x640000 Writing data to block 51 at offset 0x660000 Writing data to block 52 at offset 0x680000 Writing data to block 53 at offset 0x6a0000 Writing data to block 54 at offset 0x6c0000 Writing data to block 55 at offset 0x6e0000 Writing data to block 56 at offset 0x700000 Writing data to block 57 at offset 0x720000 Writing data to block 58 at offset 0x740000 Writing data to block 59 at offset 0x760000 Writing data to block 60 at offset 0x780000 Writing data to block 61 at offset 0x7a0000 Writing data to block 62 at offset 0x7c0000 Writing data to block 63 at offset 0x7e0000 Writing data to block 64 at offset 0x800000 Writing data to block 65 at offset 0x820000 Writing data to block 66 at offset 0x840000 Writing data to block 67 at offset 0x860000 Writing data to block 68 at offset 0x880000 Writing data to block 69 at offset 0x8a0000 Writing data to block 70 at offset 0x8c0000 Writing data to block 71 at offset 0x8e0000 Writing data to block 72 at offset 0x900000 Writing data to block 73 at offset 0x920000 Writing data to block 74 at offset 0x940000 Writing data to block 75 at offset 0x960000 Writing data to block 76 at offset 0x980000 Writing data to block 77 at offset 0x9a0000 Writing data to block 78 at offset 0x9c0000 Writing data to block 79 at offset 0x9e0000 Writing data to block 80 at offset 0xa00000 Writing data to block 81 at offset 0xa20000 Writing data to block 82 at offset 0xa40000 Writing data to block 83 at offset 0xa60000 Writing data to block 84 at offset 0xa80000 Writing data to block 85 at offset 0xaa0000 Writing data to block 86 at offset 0xac0000 Writing data to block 87 at offset 0xae0000 Writing data to block 88 at offset 0xb00000 Writing data to block 89 at offset 0xb20000 Writing data to block 90 at offset 0xb40000 Writing data to block 91 at offset 0xb60000 Writing data to block 92 at offset 0xb80000 65%t offset 0xba0000k 93 a Writing data to block 94 at offset 0xbc0000 Writing data to block 95 at offset 0xbe0000 Writing data to block 96 at offset 0xc00000 Writing data to block 97 at offset 0xc20000 Writing data to block 98 at offset 0xc40000 Writing data to block 99 at offset 0xc60000 Writing data to block 100 at offset 0xc80000 Writing data to block 101 at offset 0xca0000 Writing data to block 102 at offset 0xcc0000 Writing data to block 103 at offset 0xce0000 Writing data to block 104 at offset 0xd00000 Writing data to block 105 at offset 0xd20000 Writing data to block 106 at offset 0xd40000 Writing data to block 107 at offset 0xd60000 Writing data to block 108 at offset 0xd80000 Writing data to block 109 at offset 0xda0000 Writing data to block 110 at offset 0xdc0000 Writing data to block 111 at offset 0xde0000 Writing data to block 112 at offset 0xe00000 Writing data to block 113 at offset 0xe20000 Writing data to block 114 at offset 0xe40000 Writing data to block 115 at offset 0xe60000 Writing data to block 116 at offset 0xe80000 Writing data to block 117 at offset 0xea0000 Writing data to block 118 at offset 0xec0000 Writing data to block 119 at offset 0xee0000 Writing data to block 120 at offset 0xf00000 Writing data to block 121 at offset 0xf20000 Writing data to block 122 at offset 0xf40000 Writing data to block 123 at offset 0xf60000 Writing data to block 124 at offset 0xf80000 Writing data to block 125 at offset 0xfa0000 Writing data to block 126 at offset 0xfc0000 Writing data to block 127 at offset 0xfe0000 Writing data to block 128 at offset 0x1000000 Writing data to block 129 at offset 0x1020000 Writing data to block 130 at offset 0x1040000 Writing data to block 131 at offset 0x1060000 Writing data to block 132 at offset 0x1080000 Writing data to block 133 at offset 0x10a0000 Writing data to block 134 at offset 0x10c0000 Writing data to block 135 at offset 0x10e0000 Writing data to block 136 at offset 0x1100000 Writing data to block 137 at offset 0x1120000 Writing data to block 138 at offset 0x1140000 Writing data to block 139 at offset 0x1160000 Writing data to block 140 at offset 0x1180000 Writing data to block 141 at offset 0x11a0000 Writing data to block 142 at offset 0x11c0000 Writing data to block 143 at offset 0x11e0000 Writing data to block 144 at offset 0x1200000 Writing data to block 145 at offset 0x1220000 Writing data to block 146 at offset 0x1240000 Writing data to block 147 at offset 0x1260000 Writing data to block 148 at offset 0x1280000 Writing data to block 149 at offset 0x12a0000 Writing data to block 150 at offset 0x12c0000 Writing data to block 151 at offset 0x12e0000 Writing data to block 152 at offset 0x1300000 Writing data to block 153 at offset 0x1320000 Writing data to block 154 at offset 0x1340000 Writing data to block 155 at offset 0x1360000 Writing data to block 156 at offset 0x1380000 Writing data to block 157 at offset 0x13a0000 Writing data to block 158 at offset 0x13c0000 Writing data to block 159 at offset 0x13e0000 Writing data to block 160 at offset 0x1400000 Writing data to block 161 at offset 0x1420000 Writing data to block 162 at offset 0x1440000 Writing data to block 163 at offset 0x1460000 Writing data to block 164 at offset 0x1480000 Writing data to block 165 at offset 0x14a0000 Writing data to block 166 at offset 0x14c0000 Writing data to block 167 at offset 0x14e0000 Writing data to block 168 at offset 0x1500000 Writing data to block 169 at offset 0x1520000 Writing data to block 170 at offset 0x1540000 Writing data to block 171 at offset 0x1560000 Writing data to block 172 at offset 0x1580000 Writing data to block 173 at offset 0x15a0000 Writing data to block 174 at offset 0x15c0000 Writing data to block 175 at offset 0x15e0000 Writing data to block 176 at offset 0x1600000 Writing data to block 177 at offset 0x1620000 Writing data to block 178 at offset 0x1640000 Writing data to block 179 at offset 0x1660000 Writing data to block 180 at offset 0x1680000 Writing data to block 181 at offset 0x16a0000 Writing data to block 182 at offset 0x16c0000 97%3 at offset 0x16e0000 Writing data to block 184 at offset 0x1700000 Writing data to block 185 at offset 0x1720000 Writing data to block 186 at offset 0x1740000 Writing data to block 187 at offset 0x1760000 Writing data to block 188 at offset 0x1780000 Writing data to block 189 at offset 0x17a0000 Writing data to block 190 at offset 0x17c0000 Writing data to block 191 at offset 0x17e0000 Writing data to block 192 at offset 0x1800000 Writing data to block 193 at offset 0x1820000 Writing data to block 194 at offset 0x1840000 Writing data to block 195 at offset 0x1860000 Writing data to block 196 at offset 0x1880000 Writing data to block 197 at offset 0x18a0000 Writing data to block 198 at offset 0x18c0000 Writing data to block 199 at offset 0x18e0000 Writing data to block 200 at offset 0x1900000 Writing data to block 201 at offset 0x1920000 Writing data to block 202 at offset 0x1940000 Writing data to block 203 at offset 0x1960000 Writing data to block 204 at offset 0x1980000 Writing data to block 205 at offset 0x19a0000 Writing data to block 206 at offset 0x19c0000 Writing data to block 207 at offset 0x19e0000 Writing data to block 208 at offset 0x1a00000 Writing data to block 209 at offset 0x1a20000 Writing data to block 210 at offset 0x1a40000 Writing data to block 211 at offset 0x1a60000 Writing data to block 212 at offset 0x1a80000 Writing data to block 213 at offset 0x1aa0000 Writing data to block 214 at offset 0x1ac0000 Writing data to block 215 at offset 0x1ae0000 Writing data to block 216 at offset 0x1b00000 Writing data to block 217 at offset 0x1b20000 Writing data to block 218 at offset 0x1b40000 Writing data to block 219 at offset 0x1b60000 Writing data to block 220 at offset 0x1b80000 Writing data to block 221 at offset 0x1ba0000 Writing data to block 222 at offset 0x1bc0000 Writing data to block 223 at offset 0x1be0000 Writing data to block 224 at offset 0x1c00000 Writing data to block 225 at offset 0x1c20000 Writing data to block 226 at offset 0x1c40000 Writing data to block 227 at offset 0x1c60000 Writing data to block 228 at offset 0x1c80000 Writing data to block 229 at offset 0x1ca0000 Writing data to block 230 at offset 0x1cc0000 Writing data to block 231 at offset 0x1ce0000 Writing data to block 232 at offset 0x1d00000 Writing data to block 233 at offset 0x1d20000 Writing data to block 234 at offset 0x1d40000 Writing data to block 235 at offset 0x1d60000 Writing data to block 236 at offset 0x1d80000 Writing data to block 237 at offset 0x1da0000 Writing data to block 238 at offset 0x1dc0000 Writing data to block 239 at offset 0x1de0000 Writing data to block 240 at offset 0x1e00000 Writing data to block 241 at offset 0x1e20000 Writing data to block 242 at offset 0x1e40000 Writing data to block 243 at offset 0x1e60000 Writing data to block 244 at offset 0x1e80000 Writing data to block 245 at offset 0x1ea0000 Writing data to block 246 at offset 0x1ec0000 Writing data to block 247 at offset 0x1ee0000 Writing data to block 248 at offset 0x1f00000 Writing data to block 249 at offset 0x1f20000 Writing data to block 250 at offset 0x1f40000 Writing data to block 251 at offset 0x1f60000 Writing data to block 252 at offset 0x1f80000 Writing data to block 253 at offset 0x1fa0000 Writing data to block 254 at offset 0x1fc0000 Writing data to block 255 at offset 0x1fe0000 Writing data to block 256 at offset 0x2000000 Writing data to block 257 at offset 0x2020000 Writing data to block 258 at offset 0x2040000 Writing data to block 259 at offset 0x2060000 Writing data to block 260 at offset 0x2080000 Writing data to block 261 at offset 0x20a0000 Writing data to block 262 at offset 0x20c0000 Writing data to block 263 at offset 0x20e0000 Writing data to block 264 at offset 0x2100000 Writing data to block 265 at offset 0x2120000 Writing data to block 266 at offset 0x2140000 Writing data to block 267 at offset 0x2160000 Writing data to block 268 at offset 0x2180000 Writing data to block 269 at offset 0x21a0000 Writing data to block 270 at offset 0x21c0000 Writing data to block 271 at offset 0x21e0000 100%2:31-0000000000000000>Okay (13.24s) 2:31-0000000000000000>Start Cmd:FBK: sync at offset 0x2200000 Writing data to block 273 at offset 0x2220000 Writing data to block 274 at offset 0x2240000 Writing data to block 275 at offset 0x2260000 Writing data to block 276 at offset 0x2280000 2:31-0000000000000000>Okay (0.038s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nanddtb} 0 0 Erasing 128 Kibyte @ 0 -- 100 % complete 2:31-0000000000000000>Okay (0.015s) 2:31-0000000000000000>Start Cmd:FBK: ucp imx95-19x19-evk.dtb t:/tmp/dtb 100%2:31-0000000000000000>Okay (0.015s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; nandwrite -p /dev/mtd${nanddtb} /tmp/dtb Writing data to block 0 at offset 0x0 2:31-0000000000000000>Okay (0.047s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; flash_erase /dev/mtd${nandrootfs} 0 0 Erasing 204672 Kibyte @ 0 -- 100 % complete 2:31-0000000000000000>Okay (4.231s) 2:31-0000000000000000>Start Cmd:FBK: ucmd ubidetach /dev/ubi_ctrl -m ${nandrootfs} || true 2:31-0000000000000000>Okay (0.019s) 2:31-0000000000000000>Start Cmd:FBK: ucmd . /tmp/mtd.sh; ubiattach /dev/ubi_ctrl -m ${nandrootfs} UBI device number 0, total 1599 LEBs (203034624 bytes, 193.6 MiB), available 1555 LEBs (197447680 bytes, 188.3 MiB), LEB size 126976 bytes (124.0 KiB) 2:31-0000000000000000>Okay (0.384s) 2:31-0000000000000000>Start Cmd:FBK: ucmd ubimkvol /dev/ubi0 -N nandrootfs -m Set volume size to 197447680 Volume ID 0, size 1555 LEBs (197447680 bytes, 188.3 MiB), LEB size 126976 bytes (124.0 KiB), dynamic, name "nandrootfs", alignment 1 2:31-0000000000000000>Okay (0.051s) 2:31-0000000000000000>Start Cmd:FBK: ucmd mkdir -p /mnt/mtd 2:31-0000000000000000>Okay (0.008s) 2:31-0000000000000000>Start Cmd:FBK: ucmd mount -t ubifs ubi0:nandrootfs /mnt/mtd 2:31-0000000000000000>Okay (0.204s) 2:31-0000000000000000>Start Cmd:FBK: acmd export EXTRACT_UNSAFE_SYMLINKS=1; tar --zstd --warning=no-timestamp -x -C /mnt/mtd 2:31-0000000000000000>Okay (0.052s) 2:31-0000000000000000>Start Cmd:FBK: ucp core-image-base-imx95-19x19-lpddr5-evk.rootfs-20260429064745.tar.zst t:- 100%2:31-0000000000000000>Okay (192.3s) 2:31-0000000000000000>Start Cmd:FBK: sync   3. Flashing NOR The bootloader flashed to NOR must use the newly added imx95_19x19_evk_spinand_defconfig . Therefore, imx95-evk.inc must be modified to enable this. 3.1 UUU Script uuu_version 1.2.39 # @_flexspi.bin | bootloader # @_image [_flexspi.bin] | image burn to flexspi, default is the same as bootloader # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f .\imx-boot-nor.bin-flash_a55_flexspi # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM, skip QSPI header SDPS: boot -f .\imx-boot-nor.bin-flash_a55_flexspi -skipfhdr # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f .\imx-boot-nor.bin-flash_a55_flexspi -offset 0x10000 -skipfhdr SDPU: jump # } # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f .\imx-boot-nor.bin-flash_a55_flexspi -skipspl -skipfhdr SDPV: jump # } #######################second################################# FB: ucmd setenv fastboot_buffer ${loadaddr} FB: download -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi # Check Image if include flexspi header FB: ucmd if qspihdr dump ${fastboot_buffer}; then setenv qspihdr_exist yes; else setenv qspihdr_exist no; fi; # Check Image size if larger than 16M, then use uboot command to write image FB: ucmd if itest ${fastboot_bytes} -gt 1000000; then setenv qspihdr_large yes; else setenv qspihdr_large no; fi; FB[-t 60000]: ucmd if test ${qspihdr_exist} = yes -a ${qspihdr_large} = no; then qspihdr init ${fastboot_buffer} ${fastboot_bytes} safe; else true; fi; #if uboot can't support qspihdr command, use uboot image to write qspi image, which require image include qspi flash header FB: ucmd if test ${qspihdr_exist} = no; then sf probe; else true; fi; FB[-t 40000]: ucmd if test ${qspihdr_exist} = no; then sf erase 0 +${fastboot_bytes}; else true; fi; FB[-t 20000]: ucmd if test ${qspihdr_exist} = no; then sf write ${fastboot_buffer} 0 ${fastboot_bytes}; else true; fi; # if Image is larger than 16M, use uboot command to write image FB: ucmd if test ${qspihdr_large} = yes; then sf probe; else true; fi; FB: write -f .\imx-boot-imx95-19x19-lpddr5-evk-fspi.bin-flash_a55_flexspi -format "if test ${qspihdr_large} = yes; then sf erase @off +@size; sf write ${fastboot_buffer} @off @size; else true; fi;" -blksz 1 -each 0x100000 FB: done   3.2 U-Boot Patches The functionality implemented is: in the SPL stage, activate NOR FLASH (this is the default code setting), so that uboot.bin can be read from NOR during the SPL stage; then upon entering U-Boot, override the pinctrl settings in the DTB so that the FlexSPI driver uses the NAND pins, and then bring up the NAND on the M.2 connector during U-Boot initialization. imx95_19x19_evk_spinand_defconfig is based on the FSPI defconfig with MTD NAND configuration enabled in U-Boot. diff --git a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi index 3c0c2d7b0f2..0d8fb0c3978 100644 --- a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi +++ b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi @@ -182,3 +182,7 @@ assigned-clock-parents = <0>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; }; + +#ifdef CONFIG_MTD_SPI_NAND +#include "imx95-19x19-evk-spinand.dtsi" +#endif \ No newline at end of file diff --git a/board/freescale/imx95_evk/imx95_evk.c b/board/freescale/imx95_evk/imx95_evk.c index 9790c610ac7..333e051c090 100644 --- a/board/freescale/imx95_evk/imx95_evk.c +++ b/board/freescale/imx95_evk/imx95_evk.c @@ -22,6 +22,8 @@ #include <i2c.h> #include <dm/uclass.h> #include <dm/uclass-internal.h> +#include <dm.h> +#include <dm/device.h> extern int board_fix_fdt_fuse(void *fdt); @@ -383,6 +385,25 @@ void netc_init(void) pci_init(); } +static void flexspi_nor_fixup(void) +{ + struct gpio_desc desc; + int ret; + + ret = dm_gpio_lookup_name("GPIO5_10", &desc); + if (ret) + return; + + ret = dm_gpio_request(&desc, "XSPI1_SS0_B"); + if (ret) + return; + + dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); + dm_gpio_set_value(&desc, 1); + + printf("flexspi_nor_fixup\n"); +} + static void flexspi_nor_steup(void) { struct gpio_desc desc; @@ -453,6 +474,78 @@ void lvds_backlight_on(void) dm_i2c_write(dev, 0x8, &reg, 1); } +static int fdt_switch_flexspi_pinctrl_to_nand(void *fdt) +{ + int off; + const void *prop; + int len; + int ret; + const char *flexspi_path = "/soc/bus@42000000/spi@425e0000"; + + off = fdt_path_offset(fdt, flexspi_path); + if (off < 0) { + printf("FDT: failed to find flexspi node %s, err=%d\n", + flexspi_path, off); + return off; + } + + prop = fdt_getprop(fdt, off, "pinctrl-1", &len); + if (!prop || len <= 0) { + printf("FDT: no pinctrl-1 found under %s\n", flexspi_path); + return -FDT_ERR_NOTFOUND; + } + + ret = fdt_setprop(fdt, off, "pinctrl-0", prop, len); + if (ret < 0) { + printf("FDT: failed to overwrite pinctrl-0, err=%d\n", ret); + return ret; + } + + printf("FDT: switched %s pinctrl-0 <- pinctrl-1 (NAND)\n", + flexspi_path); + + return 0; +} + +static void delete_fdt_flash0(void *fdt) +{ + int i = 0; + int nodeoff, ret; + static const char * const spi_nodes[] = { + "/soc/bus@42000000/spi@425e0000/flash@0" + }; + + printf("delete_fdt_flash0\n"); + + for (i = 0; i < ARRAY_SIZE(spi_nodes); i++) { + nodeoff = fdt_path_offset(fdt, spi_nodes[i]); + if (nodeoff >= 0) { +delete_node: + ret = fdt_del_node(fdt, nodeoff); + if (ret == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(fdt, 512); + if (!ret) { + nodeoff = fdt_path_offset(fdt, spi_nodes[i]); + if (nodeoff >= 0) + goto delete_node; + } + } + + if (ret) + printf("failed to delete node %s, ret=%d\n", + spi_nodes[i], ret); + else + printf("deleted node %s\n", spi_nodes[i]); + } + } +} + +static void fdt_fixup_flexspi(void *fdt) +{ + delete_fdt_flash0(fdt); + fdt_switch_flexspi_pinctrl_to_nand(fdt); +} + int board_init(void) { int ret; @@ -475,17 +568,50 @@ int board_init(void) netc_init(); - flexspi_nor_steup(); + // avoid NAND erase affect NOR with same FLEXSPI1_A_SS0_B + flexspi_nor_fixup(); power_on_m7("mx95evkrpmsg"); + printf("board_init\n"); + lvds_backlight_on(); return 0; } +static void debug_probe_fspi_nand(void) +{ + struct udevice *bus; + struct udevice *child; + int ret; + + printf("debug_probe_fspi_nand: start\n"); + + ret = uclass_get_device_by_name(UCLASS_SPI, "spi@425e0000", &bus); + printf("get spi bus ret=%d, bus=%p\n", ret, bus); + if (ret) + return; + + ret = device_probe(bus); + printf("probe spi bus ret=%d\n", ret); + + child = NULL; + device_find_first_child(bus, &child); + while (child) { + printf("child name=%s\n", child->name); + ret = device_probe(child); + printf("probe child %s ret=%d\n", child->name, ret); + device_find_next_child(&child); + } + + printf("debug_probe_fspi_nand: done\n"); +} + int board_late_init(void) { + printf("board_late_init\n"); + debug_probe_fspi_nand(); if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) board_late_mmc_env_init(); @@ -645,6 +771,8 @@ static int board_fix_19x19_evk(void *fdt) int ret; const char *netcfg = "mx95netc"; + fdt_fixup_flexspi(fdt); + ret = scmi_misc_cfginfo(&msel, cfgname); if (!ret) { debug("SM: %s\n", cfgname); diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 078b97f6544..07fb96cbfcc 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -1177,6 +1177,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) static int nxp_fspi_probe(struct udevice *bus) { + printf("------------>nxp_fspi_probe\n"); struct nxp_fspi *f = dev_get_priv(bus); f->devtype_data = @@ -1241,6 +1242,7 @@ static int nxp_fspi_of_to_plat(struct udevice *bus) #if CONFIG_IS_ENABLED(CLK) int ret; #endif + printf("------------>nxp_fspi_of_to_plat\n"); fdt_addr_t iobase; fdt_addr_t iobase_size; diff --git a/dts/upstream/src/arm64/freescale/imx95-19x19-evk.dts b/dts/upstream/src/arm64/freescale/imx95-19x19-evk.dts index 6086cb7fa5a..10e9f76c5af 100644 --- a/dts/upstream/src/arm64/freescale/imx95-19x19-evk.dts +++ b/dts/upstream/src/arm64/freescale/imx95-19x19-evk.dts @@ -194,11 +194,12 @@ }; &flexspi1 { - pinctrl-names = "default"; + pinctrl-names = "default", "nand"; pinctrl-0 = <&pinctrl_flexspi1>; + pinctrl-1 = <&pinctrl_flexspi1_nand>; status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; pinctrl-names = "default"; @@ -445,6 +446,18 @@ >; }; + pinctrl_flexspi1_nand: flexspi1nandgrp { + fsl,pins = < + IMX95_PAD_XSPI1_SS0_B__GPIO5_IO_BIT10 0x3fe + IMX95_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x3fe + IMX95_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x3fe + IMX95_PAD_SD3_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe + IMX95_PAD_SD3_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe + IMX95_PAD_SD3_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe + IMX95_PAD_SD3_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe + >; + }; + pinctrl_flexspi1_reset: flexspi1-reset-grp { fsl,pins = < IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11 0x3fe   3.3 imx95-evk.inc Content require conf/machine/include/imx-base.inc require conf/machine/include/arm/armv8-2a/tune-cortexa55.inc MACHINE_FEATURES += "pci wifi bluetooth optee" MACHINE_FEATURES:append:use-nxp-bsp = " nxpwifi-all-pcie nxpwifi-all-sdio jailhouse dpdk xen" KERNEL_DEVICETREE = " \ freescale/${KERNEL_DEVICETREE_BASENAME}.dtb \ " UBOOT_DTB_NAME = "${KERNEL_DEVICETREE_BASENAME}.dtb" IMX_DEFAULT_BOOTLOADER:use-nxp-bsp = "u-boot-imx" IMX_DEFAULT_BOOTLOADER:use-mainline-bsp = "u-boot-fslc" LOADADDR = "" UBOOT_SUFFIX = "bin" UBOOT_MAKE_TARGET = "" SPL_BINARY = "spl/u-boot-spl.bin" UBOOT_CONFIG ??= "sd" UBOOT_CONFIG[sd] = "${UBOOT_CONFIG_BASENAME}_defconfig,sdcard" UBOOT_CONFIG[sd-ecc] = "${UBOOT_CONFIG_BASENAME}_defconfig,sdcard" UBOOT_CONFIG[fspi] = "${UBOOT_CONFIG_BASENAME}_spinand_defconfig"///////////////////here UBOOT_CONFIG[spinand] = "${UBOOT_CONFIG_BASENAME}_spinand_defconfig"////////////////here ATF_PLATFORM = "imx95" OEI_CORE = "m33" OEI_SOC = "mx95" OEI_BOARD ?= "mx95lp5" DDR_TYPE ?= "lpddr5" IMXBOOT_VARIANTS = "alt jailhouse netc rpmsg sof" # Multiple system manager configs by IMXBOOT_VARIANT SYSTEM_MANAGER_CONFIG = \ "${@bb.utils.contains('IMXBOOT_VARIANT', 'alt', 'mx95alt', \ bb.utils.contains('IMXBOOT_VARIANT', 'jailhouse', 'mx95evkjailhouse', \ bb.utils.contains('IMXBOOT_VARIANT', 'netc', 'mx95netc', \ bb.utils.contains('IMXBOOT_VARIANT', 'rpmsg', 'mx95evkrpmsg', \ bb.utils.contains('IMXBOOT_VARIANT', 'sof', 'mx95evksof', \ 'mx95evk', d), d), d), d), d)}" # imx-boot (flash.bin) targets based on UBOOT_CONFIG and IMXBOOT_VARIANT IMXBOOT_TARGETS_SD = " \ ${@bb.utils.contains('IMXBOOT_VARIANT', 'alt', '${IMXBOOT_TARGETS_BASENAME}_alt', \ bb.utils.contains('IMXBOOT_VARIANT', 'jailhouse', '${IMXBOOT_TARGETS_BASENAME}_jailhouse', \ bb.utils.contains('IMXBOOT_VARIANT', 'netc', '${IMXBOOT_TARGETS_BASENAME}_netc', \ bb.utils.contains('IMXBOOT_VARIANT', 'rpmsg', '${IMXBOOT_TARGETS_BASENAME}_lpboot_sm_a55', \ bb.utils.contains('IMXBOOT_VARIANT', 'sof', '${IMXBOOT_TARGETS_BASENAME}_a55', \ '${IMXBOOT_TARGETS_BASENAME}_all ${IMXBOOT_TARGETS_BASENAME}_a55', d), d), d), d), d)} \ " IMXBOOT_TARGETS = " \ ${@bb.utils.contains('UBOOT_CONFIG', 'fspi', '${IMXBOOT_TARGETS_BASENAME}_a55_flexspi', \ bb.utils.contains('UBOOT_CONFIG', 'sd-ecc', '${IMXBOOT_TARGETS_BASENAME}_all', \ '${IMXBOOT_TARGETS_SD}', d), d)} \ " IMX_BOOT_SOC_TARGET = "iMX95" IMX_BOOT_SEEK = "32" # We have to disable SERIAL_CONSOLE due to auto-serial-console SERIAL_CONSOLES = "115200;ttyLP0" IMX_DEFAULT_BSP = "nxp"   4. NOR Boot Test After NOR boot, U-Boot activates the NAND on the M.2 connector, successfully reads the kernel and device tree from NAND. After entering the kernel, the rootfs is successfully mounted. U-Boot SPL 2025.04-g4ddbad60eff3-dirty (Mar 19 2026 - 03:13:58 +0000) SYS Boot reason: por, origin: -1, errid: -1 SYS shutdown reason: por, origin: -1, errid: -1 Normal Boot Trying to boot from SPI ------------>nxp_fspi_of_to_plat ------------>nxp_fspi_probe Boot stage: Primary Image set: 0, offset: 0x1000 Load image from QSPI 0xde400------------------------------->NOR BOOT NOTICE: BL31: v2.12.0(release):lf-6.12.49-2.2.0 NOTICE: BL31: Built : 10:35:59, Apr 21 2026 U-Boot 2025.04-g4ddbad60eff3-dirty (Mar 19 2026 - 03:13:58 +0000) CPU: i.MX9596 rev2.0 at 1800MHz CPU: Extended Industrial temperature grade (-40C to 125C) at 28C LM Boot reason: por, origin: -1, errid: -1 LM shutdown reason: por, origin: -1, errid: -1 Model: NXP i.MX95 19X19 board DRAM: delete_fdt_flash0 deleted node /soc/bus@42000000/spi@425e0000/flash@0 FDT: switched /soc/bus@42000000/spi@425e0000 pinctrl-0 <- pinctrl-1 (NAND) 15.8 GiB TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C6 0x50] PCIE-2: Link down PCIE-3: Link down cfg name not match mx95evkrpmsg:mx95evk, ignore board_init Core: 317 devices, 38 uclasses, devicetree: separate MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from nowhere... OK [*]-Video Link 0clk disp1pix already disabled adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d probe video device failed, ret -19 [0] display-controller@4b400000, video [1] channel@0, video_bridge [2] bridge@8, video_bridge [3] dsi@4acf0000, video_bridge [4] hdmi@3d, panel clk disp1pix already disabled adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d probe video device failed, ret -19 In: serial Out: serial Err: serial BuildInfo: - SM firmware Build 763, Commit de30901b, Apr 15 2026 01:18:07 - ELE firmware version 2.0.4-9ca4d997 board_late_init debug_probe_fspi_nand: start ------------>nxp_fspi_of_to_plat ------------>nxp_fspi_probe get spi bus ret=0, bus=00000000fd4a13d0 probe spi bus ret=0 child name=mt29f4g01abbfd12@0 probe child mt29f4g01abbfd12@0 ret=0----------------->SWITCH TO NAND debug_probe_fspi_nand: done UID: 182ba9e87d9840babd9d12161b48e82d Net: eth0: enetc-0 [PRIME], eth1: enetc-2 Fastboot: Normal Normal Boot Hit any key to stop autoboot: 0 u-boot=> setenv bootargs 'console=ttyLP0,115200 earlycon ubi.mtd=rootfs root=ubi0:nandrootfs rootfstype=ubifs rootwait rw' u-boot=> mtd read kernel ${loadaddr} 0 0x2800000 Reading 41943040 byte(s) (20480 page(s)) at offset 0x00000000 u-boot=> mtd read dtb ${fdt_addr} 0 0x20000 Reading 131072 byte(s) (64 page(s)) at offset 0x00000000 u-boot=> booti ${loadaddr} - ${fdt_addr} ------------------>read kernel, dtb in NAND ## Flattened Device Tree blob at 93000000 Booting using the fdt blob at 0x93000000 Working FDT set to 93000000 Loading Device Tree to 000000009ffe5000, end 000000009ffffeaf ... OK Working FDT set to 9ffe5000 clk disp1pix already disabled adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d probe video device failed, ret -19 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] Linux version 6.18.2-1.0.0-gf49f45233f7b-dirty (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 15.2.0, GNU ld (GNU Binutils) 2.45.0.20250908) #1 SMP PREEMPT Tue Apr 28 08:20:17 UTC 2026 [ 0.000000] KASLR enabled [ 0.000000] Machine model: NXP i.MX95 19X19 board [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000c3000000, size 960 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000c3000000..0x00000000feffffff (983040 KiB) map reusable linux,cma [ 0.000000] earlycon: lpuart32 at MMIO32 0x0000000044380000 (options '') ................... [ 2.416067] spi-nand spi1.0: Winbond SPI NAND was found. [ 2.428075] spi-nand spi1.0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128 [ 2.450050] 5 fixed-partitions partitions found on MTD device spi1.0 [ 2.450059] Creating 5 MTD partitions on "spi1.0": [ 2.463548] 0x000000000000-0x000000800000 : "bootloader" [ 2.529065] 0x000000800000-0x000001000000 : "config" [ 2.543539] 0x000001000000-0x000003800000 : "kernel" [ 2.580906] 0x000003800000-0x000003820000 : "dtb" [ 2.586513] 0x000003820000-0x00010381ffff : "rootfs" [ 2.591493] mtd: partition "rootfs" extends beyond the end of device "spi1.0" -- size truncated to 0xc7e0000 [ 2.748893] mtd: setting mtd4 (rootfs) as root device [ 4.909898] ubi0: attaching mtd4 [ 5.406361] ubi0: scanning is finished [ 5.454338] ubi0: attached mtd4 (name "rootfs", size 199 MiB) [ 5.460134] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes [ 5.467131] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048 [ 5.473950] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096 [ 5.480935] ubi0: good PEBs: 1599, bad PEBs: 0, corrupted PEBs: 0 [ 5.487037] ubi0: user volume: 1, internal volumes: 1, max. volumes count: 128 [ 5.494255] ubi0: max/mean erase counter: 10/1, WL threshold: 4096, image sequence number: 2909496578 [ 5.503473] ubi0: available PEBs: 0, total reserved PEBs: 1599, PEBs reserved for bad PEB handling: 40 [ 5.512840] ubi0: background thread "ubi_bgt0d" started, PID 135 [ 5.594576] UBIFS (ubi0:0): Mounting in unauthenticated mode [ 5.600411] UBIFS (ubi0:0): background thread "ubifs_bgt0_0" started, PID 141 [ 5.617312] UBIFS (ubi0:0): recovery needed [ 5.801795] UBIFS (ubi0:0): recovery completed [ 5.806343] UBIFS (ubi0:0): UBIFS: mounted UBI device 0, volume 0, name "nandrootfs" [ 5.814101] UBIFS (ubi0:0): LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes [ 5.824021] UBIFS (ubi0:0): FS size: 195923968 bytes (186 MiB, 1543 LEBs), max 1555 LEBs, journal size 9777152 bytes (9 MiB, 77 LEBs) [ 5.836024] UBIFS (ubi0:0): reserved for root: 4952683 bytes (4836 KiB) [ 5.842640] UBIFS (ubi0:0): media format: w5/r0 (latest is w5/r0), UUID 02E616B2-3C31-4F48-A886-9B4D26DB37C1, small LPT model [ 5.854616] VFS: Mounted root (ubifs filesystem) on device 0:23. [ 5.860973] devtmpfs: mounted [ 5.864349] Freeing unused kernel memory: 2112K [ 5.868991] Run /sbin/init as init process [ 5.874243] Run /etc/init as init process [ 5.879058] Run /bin/init as init process [ 5.884114] Run /bin/sh as init process  

This page serves as a hub to gather the links to all the currently available ISP supported camera lists for the i.MX Applications processors.  Camera Compatibility Guides Processor/Family Link to Guide i.MX 8M Plus i.MX 8M Plus ISP Camera Compatibility Guide i.MX 95 i.MX 95 ISP Camera Compatibility Guide   Additional Resources i.MX Camera Software Pack AN AN14376: i.MX Camera Software Pack | NXP Semiconductors

Some customer want to measure DSM power and do some customize in their own board. We supply the the AN13917 to customer already. But some customer also have some questions about it , so here give more details and test for it for customer will more clearly understand and use it. 1 i.MX 93 power mode overview The i.MX 93 supports the following power modes: Run mode: In this mode, the Cortex-A55 CPU is active and running. Some portions can be shut off for power saving. Low-power run mode: This mode is defined as a Low-power run mode with all external power rails on. In this mode, all unnecessary power domains (MIX) can be off. The AONMIX and internal modules, such as OSC24M/PLL, are an exception in this mode. The Cortex CPU in AONMIX handles all the computing and data processing. Cortex-A55 is powered down and DRAM can be in self-refresh/retention mode. Idle mode: This mode is defined as one that a CPU can enter automatically when no threads are engaged, and no high-speed devices are in use. CPU can be put into a power-gated state, but with L3 data retained, DRAM, and bus clocks are reduced. Most of the internal logic is clock-gated; yet is still powered. In this mode, all the external power from PMIC remains the same, and most IPs remain in their state. Therefore, the interrupt response in this mode is quick compared to the Run mode. Suspend mode: This mode is defined as the most power-saving mode since it shuts off all the clocks and all the unnecessary power supplies. In this mode, the Cortex-A55 CPU is fully power gated, all internal digital logic, and the analog circuits that can be powered down are off, and all PHYs are power gated. VDD_SOC(and related digital supply) voltage is reduced to the "Suspend mode" voltage. Compared to Idle, this mode takes a longer time to exit, but it also uses far less energy. BBSM mode: This mode is also called RTC mode. In this mode, to keep RTC and BBSM logic alive, only the power for the BBSM domain remains on. Off mode: In this mode, all power rails are off. 2 Measure the power consumption of the system in the DSM( Deep Sleep Mode) The use case is based on the Suspend mode, which implies the following: CA55 cluster is OFF • MEDIAMIX is OFF • NICMIX is OFF • WAKEUPMIX is OFF • PLL is OFF • 24 M OSC is OFF PMIC is in STBY mode Download the demo images from website: Download the AN13917SW.zip file, upzip it. Copy the uuu and imx93-11x11-evk-dsm.dtb to demo images path. Download the images to board: .\uuu.exe -b emmc_all .\ imx-boot-imx93-11x11-lpddr4x-evk-sd.bin-flash_singleboot  .\imx-image-full-imx93evk.wic To measure the power consumption of the system in the DSM, the steps are as follows: Boot the Linux image with imx93-11x11-evk-DSM.dtb. System boot up with the default dtb, when system boot up change it to the imx93-11x11-evk-DSM.dtb, using the following commends: setenv fdtfile imx93-11x11-evk-dsm.dtb saveenv boot To put the system into the Suspend (Deep sleep) mode, run the following command: echo mem > /sys/power/state Measure the power and record the results. About the BCU Tool: BCU (Board Remote Control Utilities):BCU is a software specially designed to control boards/platforms that support remote control. It provides functions such as on/off key operation, board reset, setting boot mode, controlling GPIO, and power measurement through the debug cable. ------->Remote Control function: $ sudo ./bcu reset sd [-board=xxx] version bcu_1.0.158-0-gdb0a8e5 Auto recognized the board: imx8dxlevk set reset high successfully set onoff high successfully set ft_reset high successfully ENABLE remote control set sd_pwr high successfully set sd_wp high successfully set sd_cd high successfully set boot mode successfully set bootmode_sel low successfully Set ALL sense resistances to smaller ones rebooting... reset successfully done -------->Power measurement function: $ sudo ./bcu monitor -hz=1 [-board=xxx] Here for the power measurement function support the boards have power measurement function. This is the example for the power measurement for the i.MX93 EVK board: 1\Download the BCU tool Releases · nxp-imx/bcu Download the bcu_1.1.100 to Windows 2\Connect the i.MX93 EVK board to Windows PC 3\Open the teminal in the Windows PC C:\Users \Desktop>bcu.exe monitor -board=imx93evk11b1 -hz=1 Use the bcu.exe monitor -board=imx93evk11b1 -hz=1 Make sure the board version is proper, current board is B1 version, so the board name is imx93evk11b1. 4\Run the command in the PC : For others mode test can refer to the BCU.pdf file: https://github.com/nxp-imx/bcu/releases/download/bcu_1.1.100/BCU.pdf Note: To make sure the board version are proper with the related command: bcu.exe monitor -board=imx93evk11b1 -hz=1 For the i.MX93 SOM B2 version Board can use the above command. If the board version is old, such as use the i.MX93 SOM B, here you need to use the command: bcu.exe monitor -board=imx93evk11 If using the bcu.exe monitor -board=imx93evk11b1 the test result are not for this board, here can use the ./bcu eeprom -w -board=imx93evk11 to write the eeprom for the imx93evk11. Using the bcu eeprom -r -board=imx93evk11 see the present status. If we met the problem as bellow we need to check and write to the eeprom again. Measure the power in the DSM mode on the i.MX93 board with SOMB2(board name with the i.mx93evk11b1): old EVK imx93evk11 use a 20m Ohms sensing resistor new EVK imx93evk11b1 use a 5m Ohms sensing resistor For the the i.MX93 board with SOM B Measure the power in the DSM mode on the i.MX93 board with SOMB2 result, use the small and larger range test: Measure the power in the DSM mode on the i.MX93 board with SOMB result: Using the command bcu.exe monitor -board=imx93evk11 -hz=1 3 Questions from customer a.The diff/patch between imx93-11x11-evk.dts and imx93-11x11-evk-dsm.dts If customer use the Linux kernel version: L6.1.55 version BSP, they need to use the imx93-11x11-evk-dsm.dtb we supply. And if using the newer than it and newest BSP in our website, they do not need to change the dtb to the and imx93-11x11-evk-dsm.dtb, just using the imx93-11x11-evk.dts will be OK, as for the Atf  also add the has_wakeup_irq = true;   And in the default imx93-11x11-evk.dts already support the  linux-imx/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts at lf-6.12.y · nxp-imx/linux-imx · GitHub   So customer and directly use on their products. b. NXP i.MX93 EVK DSM power measurement, the GROUP_SOC_FULL  are some difference from our AN. As different chips may show slight differences in static power consumption(SS TT FF) due to process corner variations.  

based on customer's issue when use PTF pins of imx8ulp as GPIO or gpio hog

Garz & Fricke product SANTARO will be displayed on the Freescale booth during the upcoming embedded world in Nuremberg. SANTARO is using the Freescale iMX6 processor. Single-, dual and quadcore.

$ git log --pretty=oneline --abbrev-commit 6f0c058 Linux 3.7-rc2 198190a Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 aeed41a arm64: fix alignment padding in assembly code 31fd84b use clamp_t in UNAME26 fix 8c1bee6 Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 45bff41 perf python: Properly link with libtraceevent

Q: Does VIN have to be valid before we can talk to the PMIC over i2c? Can a valid voltage on LICELL and VDDIO work instead? The PF0100 datasheet says: ---------------------------------------------- To communicate with I2C, VIN must be valid and VDDIO, to which SDA and SCL are pulled up, must be powered by a 1.7 to 3.6V supply. VIN, or the coin cell voltage must be valid to maintain the contents of the registers. -------------------------------- A: VIN and VDDIO must be valid for communicating to the I2C block. Having LICELL and VDDIO will not work since a portion of the digital circuitry needed for accessing the registers is powered through VIN. This document was generated from the following discussion: Programming PMIC over i2c

Why reset EPDC When TCE underrun occurs repeatedly, EPDC might lock up and the signal to panel continues. There is chance to cause panel damage. The attached patch provides a way to reset EPDC to cut the signal out and recover EPDC from lockup. The patch is based on L4.1.15. As for TCE underrun, QoS patch has obvious improvement. https://community.nxp.com/docs/DOC-343599

Sometimes there is a requirement to make display work in portrait mode when physical panel is in landscap mode. setprop persist.demo.rotationlock true setprop persist.demo.remoterotation portrait The above codes can be set in init.rc to take effect when android boot up.

For more information visit: http://www.silexamerica.com/freescale/index.html Informational video on why Silex Technology is the only manufacturer of Freescale-recommended Wi-Fi solutions for your i.MX 6 Platform.

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