Downloading and building the V4L2 examples V4L2 examples - v0.1 are available at https://github.com/rogeriorps/v4l2-examples To download, just clone the project: $ git clone https://github.com/rogeriorps/v4l2-examples.git Available demos Example1: Display an image coming from camera using V4L2_BUF_TYPE_VIDEO_OVERLAY Example2: Display an image coming from camera using V4L2_BUF_TYPE_VIDEO_OUTPUT Known issues

In the default release the SSI1 doesn't suport double FIFO in audio driver. Attached was the code to support double FIFO with updated DMA script.

If you cannot access the www.youtube.com, you may watch the citrix demo in Youku, the link as fellow: Citrix Receiver for Linux is a software client to access the desktops, applications, and data easily and securely from many types of Linux devices. About Installing Citrix Receiver,please go to Citrix website Receiver The i.MX 6DQ processor incorporates the hardware accelerators Video Processing Unit(VPU) and 3D/2D Graphics Processing Unit. By taking the advantage of i.MX 6DQ hardware accelerators, Freescale integrates H264 hardware decoder to Citrix Receiver for Linux on i.MX6DQ Ubuntu. With accelerated hardware decoding, the computing is offloaded and better performance is achieved. Configuration in the demo: Hardware i.MX6Q: i.MX 6Quad Processors: Quad Core, ARM® Cortex®-A9 Core 1920x1080 HDMI panel Software: Linux kernel 3.0.35 Ubuntu 12.04 hardfloat rootfs Citrix Receiver13.1 with Freescale H264 plug-in

Wir laden Sie zum i.MX 6 Workshop in Mainz recht herzlich ein. Bei diesem Workshop wird Ihnen der Controller von Freescale im Detail erklärt. Neben der Vorstellung der Entwicklungsumgebungen steht der Gedankenaustausch mit den Referenten und Entwicklern ganz weit oben. Melden Sie sich jetzt an! Zielgerichtet aus der Praxis für die Praxis phyFLEX i.MX 6 Workshop Schulungen sind Investitionen, die sich durch Zeitgewinn und sichere Designs in kürzester Zeit amortisiert haben. Sie sichern vorhandenes Wissen und passen Arbeitsweisen an Weiterentwicklungen des Marktes an. Neue Controller mit erweiterten Fähigkeiten und neuen Hardwareansätzen erfordern erweitertes Wissen. Betriebssysteme und moderne Entwicklungsumgebungen bieten andere Arbeitsweisen, die der Komplexität heutiger Projekte gerecht werden. Ihre Weiterbildung ist uns wichtig. Termine: 07.11.2013 in Mainz Zeit: 9:00 Uhr bis 18:00 Uhr Begrüßung unserer Gäste ab 8:30 Uhr in der Robert-Koch-Straße 37 in 55129 Mainz. Workshopinhalt: Agenda Ab 8:30          Empfang in der Robert-Koch- Str. 37, 55129 Mainz 09:00 – 09:15 Begrüßung der Gäste und Vorstellung der Referenten 09:15 – 10:30 Vorstellung des Prozessors, Herr Rodrigue Simonneau, Freescale 10:30 – 10:45 Kaffeepause 10:45 – 11:45 Vorstellung Hardware (Modul & Carrier Board)                         - der i.MX 6 in unseren Produktfamilien                         - verfügbare Features des phyFLEX-i.MX 6 Moduls                        - Applikationsplatine: Welche Schnittstellen stehen schon im Kit zur Verfügung?                        - Mögliche Bestückungsvarianten des Serienmoduls 11:45 – 12:15 Zeit für Fachgespräche mit den Entwicklern 12:15 – 13:00 Mittagspause 13:00 – 14:00 Führung durch die Produktion 14:00 – 15:00 Digital Imaging mit i.MX 6 - Einführung in die Kameraschnittstellen des i.MX 6 - Konzepte zum Anschluss von Kameramodulen - Überblick über das Software-Interface 15:00 – 16:15 Vorstellung der Linux Entwicklungsumgebung bis hin zum Erarbeiten eines Beispiels                       - LiveDVD mit Eclipse                        - Beispiel-Programm unter Eclipse zur Ansteuerung der GPIO Platine              - Grafik Demos mit OpenGL und Mpeg Decoder               - Benchmark zum Anzeigen der Leistung einzelner Cores 16:15 – 16:45       Zeit für Fachgespräche mit den Entwicklern 16:45 – 17:00     Kaffeepause 17:00 – 18:15        Vorstellung Windows Embedded Compact 7              - Welche neuen Features stehen unter WEC7 zur Verfügung?                - Erste Schritte in WEC7 auf der phyFLEX-i.MX6              - Applikations-Debugging über USB Active Sync               - Verwendung der Remote Tools des Plattform Builders 18:15           Zeit für Fachgespräche mit den Entwicklern Am Tag des Workshops besteht die Möglichkeit ein Phytec i.MX 6 Kit (Linux oder WEC7) käuflich zu erwerben. Geben Sie gleich bei Ihrer Anmeldung an, ob an einem Kauf gernerelles Interesse besteht. Nutzen Sie diese Möglichkeit und melden Sie sich gleich zum i.MX 6 Workshop in Mainz an: Anmeldung Für nähere Fragen und Anmeldung steht Ihnen unser Vertriebsteam gerne zur Seite: Telefon: + 49 (0) 6131/ 9221-32 Unsere Produkte zum i.MX 6 finden Sie hier.

In the older code, headphone router is always on, it is not a good choose for low power demand. This patch uses imx_hp_jack_gpio.jack_status_check to instead of w->event. It enables Ext Spk and disables Headphone Jack when Headphone Jack is plug in, it disables Headphone Jack and enables Ext Spk when Headphone is out.

Q: Looking at the datasheet, why a 14.7KOhm pulldown and a 4.7KOhm pullup must be used? When useing 4.7KOhm resistors in series from an MCU to control the boot pins, pull up is ok, but pull down is not. The EIM boot pins only see 4.7KOhm and not 14.7KOhm as recommended in the design guide. How did we determine those resistor values? at boot there is a pull-up of 100KOhm in the pad if I understand well, 4.7KOhm would do the job as well as 14.7K. right? A: 4.7k will work fine for pull-up or pull-down. 10k pull-downs is to limit current drain while allowing use of simple SPST switches to configure boot-up. There are on-chip 100k pull resistors, so this limits max resistor size. This document was generated from the following discussion: EIM boot resistor value

After rework the board, enable two OTG controllers in Linux DTB file and disable VBUS valid comparator when in suspend mode by clear USB_OTGx_PHY_CTL2 bit 16.  Then we get the following power data on suspend mode  Suspend Mode     ****  The page is under internal check ****

Ridgerun SDK for iMX6 based boards now supports the X11 protocol. The server-client based protocol is now supported by our professional SDK using hardware floating point which enables a high performance and provides all the advantages that comes with X.  In the RidgeRun SDK you'll also find complete integration of Qt4.8.5 using an X-based windowing system. We currently support Matchbox and Enlightenment which is a complete desktop environment. Contact RidgeRun for more details at : [email protected] or Please Click -> Contact Us RidgeRun Home Page : www.ridgerun.com RidgeRun iMX6 based solutions : iMX6 Based Solutions

i.MX31 - 3 Stack There are two boot modes for IMX31PDK. In Internal Boot mode, the processor will execute an address from internal memory, and in External Boot mode the processor will execute an address from a external memory properly configured. This modes can be configured setting the values of dip switch SW5-SW10 shown in image below. Debug board. Top view. External Boot from Flash In this mode, the processor will execute an address into a external flash (NAND). If there is a bootloader saved in the right place in flash, it will be executed and the system will start. If there are a kernel image and a root file system saved configured, the operational system will start. The values for the IMX31PDK dip switches programming the boot sequence are show in table below. SW5 SW6 SW7 SW8 SW9 SW10 Internal Boot (programming flash) 0 0 0 0 0 0 External Boot from Flash 0 1 0 0 0 0 Internal Boot The Internal Boot mode enables ATK to communicate with processor and perform the writing of images into flash (bootloader image, kernel image and root file system image).

[中文翻译版] 见附件   原文链接： Add a new shared memory region on Android Auto P9.0.0_GA2.1.0 BSP 

Currently the default i.MX51 wince release doesn't support high capacity MMC card. Attached was the patch of how to enable high capacity MMC card in i.mx51. Original Attachment has been moved to: High-capacity-MMC-support.zip

In L2.6.35_11.09.01_ER BSP Uboot, the MMC driver was updated, but there is issue that when you modified some uboot code, the MMC driver has chance to fail to work. The root cause is that mmc->has_init hasn't been initialized. Sometimes the value will be not zero, then mmc driver will be skipped for initialization. Attached is the patch to fix this issue in L2.6.35_11.09.01_ER BSP Uboot.

Question: Did we tested active PCIe components while the Cortex-A9 was in Sleep Mode (suspend to memory)? Answer: It's a known issue that PCIe can't support suspend/resume. And can't be built in kernel image if the system want suspend/resume. I think PCIe will be active while core is in sleep more. Is it different scenario? No, the pcie core is not active, it is in L2 state after suspend, and it can't resume back to L0 state when system resume is called. So, DO NOT let pcie do suspend operation right now. BTW, the tested device: * INTEL x1 1000M CT network card. * INTEL iwl wifi cards. * x1 pcie to usb3.0 card Yes, this patch had been tested on imx_3.0.35_4.0 release, and would be merged into next 3.0.35 release. TO1.2 is used. We tested the Patch against imx_3.0.35_4.0 release

The patch is based on jb4.3_1.1.1-ga_rc2. Merge some commits from kitkat.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345672 

This tutorial describes the complete procedure for calibrating a touchscreen display using Weston, specifically validated with the DY1212W LVDS panel on the following NXP development platforms: i.MX93‑EVK FRDM‑i.MX95 FRDM‑i.MX8MP While the initial calibration performed by Weston works only temporarily, this guide will walk you through configuring the system so that the calibration becomes persistent across reboots. The steps below include performing the initial calibration, editing Weston’s configuration, creating a calibration helper script, and applying udev rules to store the calibration matrix automatically.   Temporary Touchscreen Calibration To begin, run the following command to perform an initial calibration of your touchscreen: weston-touch-calibrator LVDS-1   After running this command, your display should be correctly calibrated. However, this calibration is not persistent, and you will need to recalibrate after every reboot unless you complete the persistence steps below.   Making the Calibration Persistent Follow the steps below to ensure that calibration settings are preserved across system restarts. Step 1: Edit the Weston Configuration File Open the following file: /etc/xdg/weston/weston.ini Under the [libinput] section, add these lines: [libinput] touchscreen_calibrator=true + calibration_helper=/usr/bin/save-calibration.sh This enables the calibration helper script that will automatically save your settings. Step 2: Create the Calibration Helper Script Create a new script at: /usr/bin/save-calibration.sh   Insert the following content: #!/bin/bash # Store the transformation arguments for the resistive touchscreen as udev rule echo 'SUBSYSTEM=="input", KERNEL=="event[0-9]*", ENV{ID_INPUT_TOUCHSCREEN}=="1", ENV{LIBINPUT_CALIBRATION_MATRIX}="'$2' '$3' '$4' '$5' '$6' '$7'"' >> /etc/udev/rules.d/touchscreen.rules   Make the script executable: chmod 755 /usr/bin/save-calibration.sh   Step 3: Restart Weston and Recalibrate Restart the Weston service: systemctl restart weston   Run the calibration tool again to generate the persistent settings: weston-touch-calibrator LVDS-1 reboot   Conclusion After completing all of the steps above, your touchscreen calibration will now persist across reboots, ensuring a consistent user experience even after powering off the board. This configuration allows the system to automatically store and apply calibration data through a udev rule generated by your helper script. If you encounter any issues or require further assistance, feel free to reach out. Best regards, Chavira

We are pleased to announce that Config Tools for i.MX v25.12 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) DDR tool – Support for detecting multiple boards connected to the host system is added. – Automatic detection and selection of newly connected COM ports is implemented. – A Connection Test option to validate connectivity before running tests on the target is introduced. – i.MX 93 EVK LP4 configuration is added. – Training execution time information for i.MX 95 and i.MX 943 is included in logs. – Bus signal naming in the UI to align with i.MX pin naming conventions is consolidated. – CA bus values for i.MX943 with LPDDR4 are updated. – DRAM density calculation for i.MX 95 and i.MX 943 with LP4/4x is corrected. – Incorrect calculation of number of banks for i.MX 8M with DDR3L is fixed. – CS1_BNDs calculation for i.MX 91 is corrected. SerDes tool – i.MX 943 RFP support is added. System Manager – The ability to export user configuration in the CFG format is added. – Information about atomic resources to the Details view is added. – Generation and configuration of the config_fusa.h file is supported. – Resource and template assignment is improved. – Grayed-out resource assignments for unavailable configuration parameters in the Resources view are implemented. – Validation of configuration and user input is improved. – Problem decorators to the System and Boot view are added. – Design of the Boot and Details view is improved. – 5600 MT/s for i.MX 95 and i.MX 943 with LPDDR5 is enabled. – LP4/4x settings for DDR_SDRAM_ZQ_CNTL for i.MX 95 and i.MX 943 are updated. – Dual-rank configurations for i.MX 91 and i.MX 93 are updated. – LP4/4x configuration to support non-binary densities for i.MX 95 and i.MX 943 is updated. – Support for non-binary aligned LP4 density for i.MX 91 is added. – FRDM board support (LPDDR4X 15x15 at 4000 MT/s) for i.MX 95 is added. – Timing file discrepancies for i.MX 8MN with DDR3L are fixed. – Issue where changing PHY log level did not update generated code is fixed.

based on customer's issue when use PTF pins of imx8ulp as GPIO or gpio hog

  This article is an example for users to change the DDR clock on i.MX6ULL board Environment: Hardware : i.MX6ULL EVK board Concept of MMDC controller clock source on i.MX6ull Consult Chapter 18 Clock Controller Module(CCM) in the I.MX 6ull reference manual. The MMDC clock source is shown in Figure 23.3.3.1:   pengyong_zhang_4-1752116249755.png Figure 23.3.3.1 MMDC Clock Source Figure 23.3.3.1 shows the clock source path diagram of MMDC, which is mainly divided into three parts. 1. CBCMR[PRE_PERIPH2_CLK_SEL] : The pre_periph2 clock selector, which is the pre-selector of periph2_clkd, is controlled by the PRE_PERIPH2_CLK_SEL bit (bit22:21) of the CBCMR register. 2. CBCDR[PERIPH2_CLK_SEL] : periph2_clk clock selector, controlled by the PERIPH2_CLK_SEL bit (bit26) of the CBCDR register,When it is 0, pll2_main_clk is selected as the clock source of periph2_clk. When it is 1, periph2_clk2_clk is selected as the clock source of periph2_clk. 3. CBCDR[FABRIC_MMDC_PODF] : It is a frequency divider. The frequency division value is set by the FABRIC_MMDC_PODF bit (bit5:3) of the CBCDR register. It can be set to 0~7, corresponding to 1~8 frequency divisions respectively. To configure the clock source of the MMDC to 396MHz, it must be set to 1 here, so FABRIC_MMDC_PODF=0. The above is the clock source setting of MMDC. Implementation Step 1 : git clone the uboot code from NXP github web $ git clone https://github.com/nxp-imx/uboot-imx.git Step 2 : Modify the different frequencies of DDR by modifying the following files : uboot-imx/board/freescale/mx6ullevk/imximage.cfg As default BSP code, our DDR run frequency is 400MHz (Actually, it's 396MHz), If you want DDR to boot at 132MHz, we need to configurate the CCM_CBCDR[FABRIC_MMDC_PODF] bit,  from this bit content, we need to set it to 010. The frequency division value is 3 based on 396MHz   pengyong_zhang_8-1752116469293.png Change code as following: DATA 4 0x020c4014 0x00018910, Add this code in imximage.cfg file. Step 3 : Re-compile the uboot and flash the uboot to the board. Result Now, We can see that DDR is running at successfully at 132MHz. Before modification:   pengyong_zhang_6-1752116350468.png After modification:   pengyong_zhang_7-1752116358395.png    

give an example for bring up the imx8mq DP/eDP board based on nxp SW