Documents Imx53-fastboot-example i.MX53 Multimedia Applications Processors I.MX53 QSB Board Get Started IMX53 QSB enable WIFI android I.MX53 QSB Ubuntu Dual Display i.MX53 Quick Start Board IMX53 SABRE AI i.MX53 Start-R Lab Exercise - Prof. Massimo Violante Politecnico of Torino i.MX53 Start-R Lab Exercise - Developing a loadable kernel module to manage GPIOs in i.MX53QSB ConnectCore® i.MX53 / Wi-i.MX53 by Digi International NOVPEK i.MX53 by NovTech

Here are two patchs: Patch 1: 0001-I.MX6-SSI_ASRC_P2P_Capture-for-SabreSD-board-Kernel-.patch Patch 2: 0001-I.MX6-SSI_ASRC_P2P-Capture-for-SebreSD-board.patch Patch 1 is based on patch 2.     memory <-- ASRC_Output FIFO | ASRC_Input FIFO <-- SSI_RX FIFO <-- Audio Codec                                              |           |     ASRC Out clk ASRCK1 <---|           |--->   ASRC In clk None                                              |           |     ASRC OutPut width            |           |       ASRC InPut width and data format     is set by arecord            <---|           |--->   is set by ASRC P2P parameter     parameter                          |           |                                             |           |     support 44100/48000          |           |       support 44100/48000     and S24_LE/S16_LE     <---|           |--->   and S24_LE/S16_LE    You can use:     arecord -Dhw:0,1 -c 2 -f S16_LE/S24_LE -r 44100/48000 XXX.wav     aplay XXX.wav     to test this patch.

Hi All, The new i.MX 6 SL L3.0.35_2.1.0 release is now available on the http://www.freescale.com/site. ·         Files available # Name Description 1 L3.0.35_2.1.0_LINUX_DOCS i.MX   6SoloLite Linux BSP Documentation. Includes Release Notes, Reference Manual,   User guide. API Documentation 2 L3.0.35_2.1.0_LINUX_MMDOCS i.MX 6SoloLite Linux Multimedia Codecs   Documentation. Includes   CODECs Release Notes and User's Guide 3 L3.0.35_2.1.0_ER_SOURCE i.MX   6SoloLite Linux BSP Source Code Files 4 L3.0.35_2.1.0_MM_CODECS i.MX   6SoloLite Linux Multimedia Codecs Sources 5 L3.0.35_2.1.0_AACP_CODECS i.MX   6SoloLite Linux AAC Plus Codec 6 L3.0.35_2.1.0_DEMO_IMAGE i.MX   6SoloLite Linux Binary Demo Files ·         Target HW boards o   i.MX6SL-EVK ·         New features o   Updated thermal equation for i.MX 6SoloLite o   Added Fuse check for all the devices o   Enabled DISPLAY power gating feature on TO1.2 ·         Known issues o   For known issues and limitations please consult the release notes.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345322 

We have validated Toshiba Smart NAND in our i.MX6SX platform, and boot successfully. The results are as below: 1. chip part number: THGBR2G5D1JTA00,  page_size: 16k+64  pages_per_block: 256 2. test platform: i.MX6SX Some information to take care of: 1. The pin assignment of smart nand is different from common raw nand, that is, Nand pin1 must connect to Vcc, pin2 connects to Vss, pin23 connects to VssQ, pin24 connects to VccQ, pin38 connects to VccQ 2. The ECC layout of FCB page itself must be set according to the i.MX6SX RM, otherwise FCB can't be read correctly. 3. EccBlock0EccType and EccBlockNEccType in FCB must be set as 0, and raw data can be put in DBBT and firmware without any ECC check codes.

[中文翻译版] 见附件   原文链接： eIQ Machine Learning Software for i.MX Linux 4.14.y 

Hello Android users Otto has posted on the Element14 community some clear tutorial (accessible following the link below) to build Android from source. RIoTboard: Building Android from Source | element14 I recommend you to start following those steps to properly setup the Android tools. Happy Source Programming Greg

RidgeRun provides a fully featured Embedded Linux Software Development Kit for Freescale iMX6 based applications processors. Freescale iMX6 platform delivers high performance, power efficient applications processors with a robust support network and software portfolio including open source. The complete platform allows for differentiation and rapid development of applications from wireless handsets to other multimedia-enhanced devices. The i.MX6 series processors are a scalable multicore platform that includes single-, dual- and quad-core families based on the ARM® Cortex™-A9 architecture. This architecture is a robust - cross industry and product platform. Whether your product is targeted at consumer electronics, industrial, automotive or security related, this flexible, scalable architecture combined with RidgeRun's easy-to-use SDK's and extension products allows you to concentrate your effort of differentiating features and not product infrastructure. FEATURES Boot loader 2013.07 Linux kernel 3.0.35-4.0.0 Gstreamer-0.10.36 Freescale gst-plugins 3.0.7 Hardware based audio and video codecs SD and NFS file system support Boot from SD3, SD4 or SPI-NOR with an easy installation (Boundary devices boards only) Toolchain to linaro 2012.03 for software floating point and 2013.03 for hardware floating point support For more info please contact: inquiries@ridgerun.com or Please Click -> Contact Us

ESAI module in i.MX6D/I.MX6D/I.MX6DL/I.MX6S supports several RESET funtions: Reset ESAI Core, Reset both Transmitter and Receiver, Reset Transmitter individually, Reset Receiver individually, Reset Transmitter FIFO and Reset Receiver FIFO. Below is a simple diagram for these RESET functions, which shows reset object and related register configurations. 1.Reset ESAI Core After setting ESAI_ECT ERST bit to be 1, ESAI core and configuration registers will be reset, but Transmitter and Recevier FIFOs can't be reset by the operation. 2. Reset both Transmitter and Receiver After setting ESAI_PCRC & ESAI_PRRC to be 0x000, Transmitter and Receiver can both be reset, The RESET is also called "Personal Reset" in it's reference manual. About PCRC & PRRC bits functionality, we can see the table: From the table, ESAI_PCRC=0x000 and ESAI_PRRC=0x000 will make ESAI disconnet external ESAI pins, and ESAI's Tranmitter and Receiver can't communicate with external audio codec.  See ESAI_PCRC and ESAI_PRRC register below: ---ESAI_PCRC register ---ESAI_PRRC register There are 12 bits in each register to contorl "DISCONNECTION" OR "CONNECTION" with ESAI pins. So for normal operations of ESAI, these 2 registers can't be changed. 3.Reset Transmitter & Receiver individually By setting ESAI_TCR[TPR]=1, Transmitter can be reset individually, and not affect Receiver. By setting ESAI_RCR[RPR]=1, Receiver can be reset individually, and not affect Transmitter . In reference manual, the reset is called "personal reset / individual reset", actually they means the same thing: --Reset Transmitter individually. --Reset Receiver individually. 4.Reset Transmitter FIFO and Reset Receiver FIFO ---By setting ESAI_TFCR[TFR]=1, Tranmitter FIFIO can be reset. ---By setting ESAI_RFCR[RFR]=1, Receiver FIFO can be reset. The Reset requires ESAI is operational, which means at least one pin is defined as an ESAI pin. NXP TIC team Weidong Sun

Symptoms   On i.MX8MP, when inputting a 80% duty, 0.4V-1.8V, 3KHz square wave, we observed that the system may hang. We also tested i.MX8MN and i.MX8MM and observed the same phenomenon. In i.MX8MN RM, there's a note in GPC chapter:     We believe that the issue described in this note exists not only in the iMX8MN, but also in the iMX8MP and iMX8MM. Meanwhile, there is not only a problem with power down in this issue, but also a problem with wait mode. Diagnosis   In debugging, we find that avoiding accessing LPCR_A53_AD register in imx_set_cluster_powerdown can fix the issue. So we think that due to frequently power up/down of cores, cores have chances failed to power up. When the IRQ behavior become more complex, because the IRQ is an async event, it will come in any time. if the wait mode is enabled, in some conner case, the GPC internal LPM mode state machine will run into problem, then lead to system failure. Solution   1. A workaround patch that bypass the wait mode setting during the cpuidle.. See the patch attached. 2. Will add the Note about "SCU power down should not be enabled in wait mode" to i.MX8MP and i.MX8MM RM. 3. Will try to identify this issue into errta document, ticket TKT0632147.

Attached patch enable dual display on i.MX51 wince6. It will set DI0 as main display.

                For the SPI NOR booting on fuse steps. 1.      Please boot your PCB on uboot and type below command for fuse boot setting. MX6Q SABRESD-MFG U-Boot > imxotp blow --force 5 0x0a000030 MX6Q SABRESD-MFG U-Boot > imxotp read 5 Reading fuse at index: 0x5 Fuse at (index: 0x5) value: 0xA000030 MX6Q SABRESD-MFG U-Boot > imxotp read 6 Reading fuse at index: 0x6 Fuse at (index: 0x6) value: 0x0 MX6Q SABRESD-MFG U-Boot > imxotp blow --force 6 0x10 Current fuse at (index: 0x6) value: 0x0 Blowing fuse at index: 0x6, value: 0x10 Reloading shadow registers... Operation succeeded fuse at (index: 0x6) value: 0x10 MX6Q SABRESD-MFG U-Boot > imxotp read 6 Reading fuse at index: 0x6 Fuse at (index: 0x6) value: 0x10 MX6Q SABRESD-MFG U-Boot > 2.      Set the boot mode for 00 as Boot from fuses 3.      You could see the SPI clock on scope after re power on.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343802 

In our default release , the eboot logo only can be show on WVGA panel. Attached patch file can let the eboot logo show both on DVI XGA and RGB WVGA panel.

Hello Android users Sagar has posted on the Element14 community three clear tutorials (accessible following the link below) to create an Android application on the RiOTboard. RIoTboard: Part 1: Build an Android app on RIoT... | element14 RIoTboard: Part 2: Build an Android App on RIoT... | element14 RIoTboard: Part 3: Build an Android App on the ... | element14 I recommend you to start following those steps to ensure a proper setup of the Android tools. Happy Programming Greg

In the older code, headphone router is always on, it is not a good choose for low power demand. This patch uses imx_hp_jack_gpio.jack_status_check to instead of w->event. It enables Ext Spk and disables Headphone Jack when Headphone Jack is plug in, it disables Headphone Jack and enables Ext Spk when Headphone is out.

We are pleased to announce that Config Tools for i.MX v25.09 are now available. Downloads & links To download the installer for all platforms, please login to our download site via:  https://www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX Please refer to  Documentation  for installation and quick start guides. For further information about DDR config and validation, please go to this  blog post. Release Notes Full details on the release (features, known issues...) • The Release Notes format is updated from plain text to markdown. • The newly generated configuration includes the default NXP copyright notice and is licensed under the BSD-3-Clause license. • DDR tool – ODT and Driver Strength Updates for LP4/LP5 on i.MX 943 and i.MX 95 – Improved DRAM Configuration for i. MX 9x devices – Multicore support is enabled for DDR tests on i.MX 943 and i.MX 95 – Linux support for the DDR tool – Vref DQ Setting now available in the GUI – Board-agnostic SM Support for i.MX 943 and i.MX 95 – DDR part number entry is supported in the GUI – Enhanced logging from the target application – Stress test repetition option is enabled – Updated ODT shmoo scenario values on i.MX 943 and i.MX 95 – Support for SNPS FW and PHY Init 2024.09 SP2 on i.MX 943 and i.MX 95 – AHAB image update to align with BSP for CES parts on i.MX 943 and i.MX 95 – New configuration support for 15x15 on i.MX 943 – Improved bus configuration for single-channel setups – LP4/LP5 CS signal configuration now exposed in the GUI for i.MX 943 and i.MX 95 • Clocks – Supported input frequency setting • System Manager – Initial version of the tool

Please notice the following patches are only tested in the environment that is listed below. For the environment with other software versions or hardware equipment, some other editing  may be required Environment: i.MX 93 EVK LVDS：LVDS BOE EV121WXM-N10-1850  Software: LF6.1.36 U-boot: 1. Apply '0001-Add-LVDS-driver-and-BOE-12.1-EV121WXM-N10-1850-LVDS-.patch' to enable EV121WXM-N10-1850  in U-boot stage. If other LVDS panel is used here, you will need porting your specific LVDS device in this step. 2. Apply '0002-Modify-u-boot-to-show-logo-seamlessly.patch' to make sure display related models won't be power off, which will help to achieve seamless display. Kernel: 1. Apply '0001-Keep-NXP-logo-until-Weston-is-booted-for-i.MX93-in-L.patch' to make sure LVDS related models won't be init in the booting progress.

There are two ways to enable support for the imx95-19x19-evk board:   1.  Directly replace the flash.bin from the Yocto release. 1). depoly LSDK2512 on imx95-15x15-evk board which is supported in Debian LSDK2512     A:    $ flex-installer -i pf -d /dev/sdX -F     B： $ flex-installer -i auto -m imx95evk -d /dev/sdX   2). Download prebuild flash.bin for imx95-19x19-evk board from Yocto release:     A: download： https://www.nxp.com/webapp/sps/download/license.jsp? colCode=L6.12.20-2.0.0_MX95&appType=file1&DOWNLOAD_ID=null     B： Extract the downloaded file to obtain the flash.bin file: imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_all   3). Overwrite flash.bin     $ sudo umount /dev/sdX; sudo dd if=imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_all of=/dev/sdX bs=1024 seek=32   4). Insert the prepared SD card into the board and power it on. After entering the U-Boot prompt， set the boot command:     => setenv bootcmd "setenv bootargs 'root=/dev/mmcblk1p3 rw rootwait console=ttyLP0,115200 earlycon';ext2load mmc 1:1 0x90400000 Image;ext2load mmc 1:1 0x93000000 imx95-19x19-evk.dtb;booti 0x90400000 - 0x93000000"; saveenv     => reset   The Debian system will start automatically.   2. Build the BSP image using FlexBuild: 1).  clone the Flexbuild source code and apply the patch as attached. 2). build the bsp and boot images:       $ bld bsp -m imx95evk       $ bld boot -m imx95evk or download the pre-built image at: http://sun.ap.freescale.net/images/debian/lsdk2512/firmware_imx95evk_19x19_sdboot.img 3). install the image:       $ ./flex-installer -f firmware_imx95evk_sdboot.img -d /dev/sdX -m imx95evk -b boot_IMX_arm64_lts_6.12.20.tar.zst -r rootfs_lsdk2512_debian_imx95evk.tar.zst 4).  Insert the prepared SD card into the board and power it on. After entering the U-Boot prompt, run the following command to boot board:       u-boot=> bootflow scan -lb

This article describes how to speed-up the Linux boot time on i.MX 6ULZ to under 2s. Software: Linux BSP 6.12.20-2.0.0 Boot device: SD card The attached imx6ulz-fast-boot.tar.gz archive contains a series of patches which reduces the boot time of the i.MX 6ULZ to ~1.9s. What you'll find in the archive: U-Boot patches: Set the BOOTDELAY to 0 in U-Boot Increase the CPU frequency from 396MHz to 792MHz Add quiet to the kernel bootargs, to suppress the kernel's output during boot Kernel patches: Trim down the kernel to create a minimal version Use LZ4 compression type for the kernel image Minimal rootfs based on BusyBox How to? 1. Prepare the Yocto environment according to Section 3, 4, 5 in i.MX Yocto Project User's Guide. Version 6.12.20-2.0.0, for other versions, you may need to make adjustments. 2. Unzip the imx6ulz-fast-boot.tar.gz archive in the sources directory of your Yocto environment just created. cd ~/imx-yocto-bsp/sources tar -xvpzf imx6ulz-fast-boot.tar.gz -C . 3. Remove additional machine features. Add the configuration below in your conf/local.conf: MACHINE_FEATURES:remove = "\ optee \ alsa \ touchscreen screen \ wifi bluetooth \ bcm4339 bcm43455 \ nxp8987-sdio nxpwifi-all-sdio \ rtc qemu-usermode"  4. Build the image. bitbake core-image-busybox The resulted core-image-busybox-imx6ulz-14x14-evk.rootfs.wic should have ~38M. 5. Write the image on an SD card, and boot. It should boot under 2s from reset to prompt. If you are connected to the serial port of the board, press any key continuously to stop in U-Boot.