Question: To eliminate the need for pull-ups AND  pull-downs on the gpio boot override pins to save board space, does anyone know when in the boot rom that the GPIO pins are sampled and whether the internal Pull Downs are already enabled? Is this true for all the GPIO override pins? To just be able to provide an external Pull-up to specify boot options and NOT both pull-up and pull-down option. Can this be done? Answer: The pull-ups and pull-downs are active while POR_B is low (as defined in the datasheet). The pins are sampled on the 2 nd rising edge of RTC_XTALO before the rising edge of POR_B. As a caution, on-chip pull-up/downs are very weak and are primarily intended for controlling the pin (keeping it from logically wiggling) if the pin is not connected at all. If a pin is connected out to a trace, relaying on the on-chip PU/PD alone could be a little risky. Since the PU/PD is weak, it's possible to have noise coupled onto the pin. [Similar to Brett's comment above].

Random Number Generator - RNGA Download rng-tools: http://downloads.sourceforge.net/sourceforge/gkernel/rng-tools-2.tar.gz This tool tests the link between a random number generator hardware and the kernel's PRNG (pseudo-random number generator). ./ltib -m shell LTIB> cd rpm/BUILD/ LTIB> cp ~/hwrandom/rng-tools-2.tar.gz . LTIB> tar zxvf rng-tools-2.tar.gz LTIB> cd rng-tools-2 LTIB> ./configure --host=arm-linux LTIB> make LTIB> sudo cp rngtest /tftpboot/ltib/home/ Restart your board and execute this command in the board's console: $ cat /dev/hwrng | /home/rngtest -c 1000

I have imx53 quick sort board i downloaded u-boot-mx53.bin and uImage to loade that into the board and dowloaded rootfs.ext2.gz in the L2.6.35_11.09.01_ERimages and i did partitions on 1GB memory card and loaded that u-boot-mx53.bin,uImage images on to the 500mb of NTFS filesystem and loaded and rootfs.ext2.gz on to the othe 500mb of ext4 file system the i inserted memorycard in to the board but u-boot logs are not comming what will be the solution

The i.MX21ADS board needs a flash programmer software called iMX21ADS_TOOLKIT or just HAB. This programmer evolved to current ATK. You can download iMX21ADS_TOOLKIT here.  

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-341473 

When I use QMediaPlayer (Qt5.1.1) to play a FHD video, the CPU (imx6dl) usage turns very high and the output is not fluid and also has some frame drop. I found a patch that claims to solve this problem (links below are taking about the same thing) : adding zero-copy-QSGVideoNode for imx6 - Qt by Digia https://www.mail-archive.com/[email protected]/msg08580.html After patch appliance and recompilation of Qt Library and program rebuild, the performance issue remains the same. Does anybody know how to enable this property correctly? Have I missed some points or mandatory steps? Any comment will be appreciated, thanks!

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343715 

MX6X_eMMC_turning_2014.11.11_V2.doc

This document explains how to create a DS-5 project to compile and debug the SDK and OBDS for iMX6 and iMX28 respectively. Attached you can find the .ds file for the iMX28 needed to debug in DS-5.

imx8mm platform on 4.14.78/98 GA Android  LCD MIPI panel or HDMI display may appear some strange color stride .  This is  one patch for this issue. 

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345751 

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-341996 

Q: ”We noticed that the specified risetime of this signal is max 5nS, while the Sable board schematic shows it driven from open collector/drain using only the 100k haulup provided in the chip. This will have risetimes of 10‘s (if not 100‘s!) of ns. The worrying thing is that the latest datasheet update specifically clarifies this rise time spec, so presumably it‘s considered important. Which is right? If the rise time spec needs to be met, we need a small haul up resistor or an active drive. In that case what rail should be used to haul/drive POR_B high?” It appears to be correct, and what is interesting I checked the PFUZE timing in the datasheet ”tr4 Rise time of RESETBMCU - 0.2 ms” Device: i.MX6Q OS: Linux Dev Board: i.MX6Q SDB A: The 5ns rise/fall time requirement does not apply to i.MX6. This was probably carried over from the i.MX53 where it was required. This will be removed from the datasheet but it will likely not be until the September time frame. We're not doing an update to any of the electrical parameters of the datasheet right now.

Documents Imx53-fastboot-example i.MX53 Multimedia Applications Processors I.MX53 QSB Board Get Started IMX53 QSB enable WIFI android I.MX53 QSB Ubuntu Dual Display i.MX53 Quick Start Board IMX53 SABRE AI i.MX53 Start-R Lab Exercise - Prof. Massimo Violante Politecnico of Torino i.MX53 Start-R Lab Exercise - Developing a loadable kernel module to manage GPIOs in i.MX53QSB ConnectCore® i.MX53 / Wi-i.MX53 by Digi International NOVPEK i.MX53 by NovTech

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343521 

Computer On Module • Processor Freescale i.MX287, 454 MHz • RAM 128MB DDR2-400 SDRAM • ROM 128MB NAND Flash • Power supply Single 3.1V to 5.5V • Size 40mmX35mm • Temp.-Range -40°C..85°C Key Features • Two 10/100Mbps Ethernet ports with IEEE1588 support • Two High-Speed USB 2.0 ports • One colour LCD controller • Two CAN interfaces • 4 wire Touchscreen interface • Several peripheral interfaces: UART, SD-CARD, I2C, PWM, Serial Audio, SPI • Power management optimized for long battery life • 3.3V I/O OS Support • Windows Embedded CE 6.0 • Linux 2.6.35 Application：Building control, factory automation, printers and security panels, HMI, industrial control media gateways / accessories, portable medical devices, energy-saving Energy Gateway / Meter For more information, please see Attachment We can provide a complete solution

Hi All, The new i.MX 6 SL L3.0.35_2.1.0 release is now available on the http://www.freescale.com/site. ·         Files available # Name Description 1 L3.0.35_2.1.0_LINUX_DOCS i.MX   6SoloLite Linux BSP Documentation. Includes Release Notes, Reference Manual,   User guide. API Documentation 2 L3.0.35_2.1.0_LINUX_MMDOCS i.MX 6SoloLite Linux Multimedia Codecs   Documentation. Includes   CODECs Release Notes and User's Guide 3 L3.0.35_2.1.0_ER_SOURCE i.MX   6SoloLite Linux BSP Source Code Files 4 L3.0.35_2.1.0_MM_CODECS i.MX   6SoloLite Linux Multimedia Codecs Sources 5 L3.0.35_2.1.0_AACP_CODECS i.MX   6SoloLite Linux AAC Plus Codec 6 L3.0.35_2.1.0_DEMO_IMAGE i.MX   6SoloLite Linux Binary Demo Files ·         Target HW boards o   i.MX6SL-EVK ·         New features o   Updated thermal equation for i.MX 6SoloLite o   Added Fuse check for all the devices o   Enabled DISPLAY power gating feature on TO1.2 ·         Known issues o   For known issues and limitations please consult the release notes.

Dear,   We want to start application program from bootloader, we have below questions: We we use I.MX6UL bootrom start BootLoader， we need use mkimage.sh, compile and generator bin file, then we convert to executable file. If we need use Bootloader run application program,whether application image also need convert by mkimage.sh?  The file which convert by mkimage.sh is compressed file. we do not know its format, how about its start address, how to realize the the address jump, do you have example? Thanks.  

Hello Android users Otto has posted on the Element14 community some clear tutorial (accessible following the link below) to build Android from source. RIoTboard: Building Android from Source | element14 I recommend you to start following those steps to properly setup the Android tools. Happy Source Programming Greg

SW : uboot-imx lf_v2025.04 HW : i.MX 8MP EVK board, Oscilloscope   1. Introduction This guide explains the concept of DDR clock spread spectrum on the i.MX 8MP EVK platform. Note that the official NXP BSP does not enable this feature by default. Additionally, this guide provides an example code patch and verification steps to enable the LPDDR4 clock spread spectrum feature on the NXP i.MX 8MP EVK board.   2. What is Spread Spectrum? Spread Spectrum (SS) is a technique used to reduce electromagnetic interference (EMI) by slightly modulating the clock frequency around its nominal value. Instead of operating at a fixed frequency (e.g., 800 MHz), the clock signal is varied within a small range (e.g., ±0.5%). This modulation spreads the energy of the clock signal over a wider frequency band, reducing the peak energy at any single frequency. In other words, SS does not change the average clock speed significantly, but it helps to distribute the spectral energy, making the system less likely to violate EMI regulations.   3. Why Enable Spread Spectrum on DRAM Clock? Enabling Spread Spectrum on the DRAM clock helps reduce electromagnetic interference (EMI) by slightly modulating the clock frequency, lowering peak emissions and making it easier to meet regulatory standards such as FCC and CE. This approach improves system reliability by minimizing interference with other components, offers a cost-effective alternative to hardware changes like shielding or PCB redesign, and is widely adopted in high-speed interfaces such as DDR, PCIe, and SATA to ensure compliance without additional hardware complexity.   4. Related registers CCM_ANALOG_DRAM_PLL_SSCG_CTRL                             Note :  PLL_MFREQ_CTL[19 : 12] : Value of modulation frequency control The larger the mfr value, the lower the MF value (the slower the modulation); the smaller the mfr value, the higher the MF value. MF : The frequency of spread spectrum modulation is the speed at which the triangular/sawtooth modulated wave travels back and forth once per second, measured in Hz (commonly in the tens of kHz range). The speed of the spread spectrum "jitter" is determined. Usually, around 20–50 kHz is chosen to make the energy "swipe evenly" within the bandwidth of the EMI test receiver, thereby reducing the peak radiation at a certain frequency point. PLL_MRAT_CTL[9 : 4] : Value of modulation rate control The larger mrr is, the larger MR is (the wider the range); similarly, MR is also directly proportional to mfr and inversely proportional to m. MR : Peak-to-peak percentage of spread spectrum (the percentage of the total range of the clock frequency swinging around the center value). For example, MR = 0.5% means that the frequency swings around the center value by a total of 0.5% (if it is center-spread spectrum, it is usually ±0.25%).The MR determines the depth (width) of the spread spectrum. The larger the MR, the wider the spectral energy distribution and the lower the peak value, but it comes at the cost of jitter/timing margin (timing should be carefully selected for DDR, SerDes, etc.). 5. About Uboot code patch. Please refer the attachment patch file. At high DRAM frequency, Enable SS may cause not stable problem. So, in this case, I will choose 2400Mbps data clock run the test. Firstly, we should make sure that our code include the 2400Mbps PLL setting. DRAM data speed is 2400Mbps, the DRAM clock is 1200MHz. So the DDRC PLL clock should set up with 600MHz. For example, refer the below code. static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {     PLL_1443X_RATE(1000000000U, 250, 3, 1, 0),     PLL_1443X_RATE(933000000U, 311, 4, 1, 0),     PLL_1443X_RATE(900000000U, 300, 2, 2, 0),     PLL_1443X_RATE(800000000U, 200, 3, 1, 0),     PLL_1443X_RATE(750000000U, 250, 2, 2, 0),     PLL_1443X_RATE(650000000U, 325, 3, 2, 0),     PLL_1443X_RATE(600000000U, 300, 3, 2, 0), // 2400Mbps     PLL_1443X_RATE(594000000U, 99, 1, 2, 0),     PLL_1443X_RATE(400000000U, 400, 3, 3, 0),     PLL_1443X_RATE(266000000U, 266, 3, 3, 0),     PLL_1443X_RATE(167000000U, 334, 3, 4, 0),     PLL_1443X_RATE(100000000U, 200, 3, 4, 0), }; PLL output calculator formula is : PLL_out = 24MHz*mdiv/pdiv/(2^sdiv) So, 2400MHz * 300 / 3 / 2^2 = 600MHz   6. Test result Non Enable SS Enable SS with 1% MR and Down spread Enable SS with 2% MR and Down spread Enable SS with 2% MR and Center spread