MX7D_DDR3_压力测试应用手册_V1_201611108.doc

This is a tool can generate LPDDR3 script easily for i.MX6SLL.

Platform supported Kinara Ara2: imx95frdm imx8mpfrdm In this article, let's take imx8mpfrdm as example.   1. Create a Debian LSDK2512 release system for SD boot using the command below: $ ./flex-installer -i pf -d /dev/sdX $./flex-installer -b boot_IMX_arm64_lts_6.12.20.tar.zst -f firmware_imx8mpfrdm_sdboot.img -d /dev/sdX -m imx8mpfrdm -r rootfs_lsdk2512_debian_imx8mpevk.tar.zst note: if Debian base rootfs is used, please upgrade to full function Debian rootfs first. 2. Insert SD card on imx8mpfrdm and boot the system. Once the system has completed booting and you reach the kernel prompt: $ date -s "20260101 1100" // set date $ set proxy if needed 3. download rt-sdk-ara2.deb at: https://nxp1.sharepoint.com/:u:/r/teams/ext1081/Shared%20Documents/LF_v6.12.34/Debian%20Packages/r1.3/Package%201/rt-sdk-ara2.deb?csf=1&web=1&e=i4x1zD 4. Get the uiodma.ko kernel module for Debian from NXP. 5. Disable sleep when install package: $ systemctl mask sleep.target suspend.target hibernate.target hybrid-sleep.target 6. Prepare the packages ARA2 needed: $ apt update $ apt install --reinstall -y libc6-dev $ ln -sf /usr/include/aarch64-linux-gnu/sys /usr/include/sys $ apt install -y python3-dev build-essential $ e2fsck -f /dev/mmcblk1p2 7. install Ara2 package: $ dpkg -i rt-sdk-ara2.deb The tail of successful log as follows： ... [ 783.892116] Adding 2097148k swap on /swapfile. Priority:-2 extents:17 across:35913728k SS /swapfile none swap sw 0 0 Swap file of 2G configured and enabled successfully. Enable rt-sdk-ara2.service service... Created symlink '/etc/systemd/system/multi-user.target.wants/rt-sdk-ara2.service' → '/etc/systemd/system/rt-sdk-ara2.service'. rt-sdk-ara2.service has been enabled. To stop the service from starting automatically on boot run: systemctl disable rt-sdk-ara2.service Post-install script completed successfully. 8. overwrite the kernel module: $ cp /root/uiodma.ko /root/kinara/rt_sdk_r1.3/art/linux/drivers/uiodma_cache_management/uiodma.ko $ systemctl unmask sleep.target suspend.target hibernate.target hybrid-sleep.target // re-enable sleep 9. reboot the system： $ reboot You will see the log as bellow: ... [ 57.855988] bash[1492]: +----------+-----------------+ [ 57.856188] bash[1492]: | Product | Current Version | [ 57.856297] bash[1492]: +----------+-----------------+ [ 57.856397] bash[1492]: | firmware | 1.1.2.0 | [ 57.856501] bash[1492]: | proxy | 1.3.0.0 | [ 57.856593] bash[1492]: | sysapi | 1.1.61.0 | [ 57.856695] bash[1492]: +----------+-----------------+ [ 57.856788] bash[1492]: [I:20260109:09:02:44:636750] [DeviceManager] [kinara_main_1479][DeviceManager] [ 57.856894] bash[1492]: +------------+--------------------+ [ 57.857019] bash[1492]: | Product | Supported Versions | [ 57.857124] bash[1492]: +------------+--------------------+ [ 57.857227] bash[1492]: | client_lib | 1.0.0.0 | [ 57.857327] bash[1492]: | client_lib | 1.1.1.0 | [ 57.857419] bash[1492]: | client_lib | 1.1.2.0 | [ 57.857525] bash[1492]: | client_lib | 1.3.0.0 | [ 57.857642] bash[1492]: | cnn_model | 2.0.0.0 | [ 57.857741] bash[1492]: | cnn_model | 2.1.0.0 | [ 57.857833] bash[1492]: | firmware | 0.5.2.0 | [ 57.857931] bash[1492]: | firmware | 1.1.2.0 | [ 57.858030] bash[1492]: | llm_model | 3.0.0.0 | [ 57.858129] bash[1492]: | llm_model | 3.1.0.0 | [ 57.858222] bash[1492]: | pci_driver | 1.0.4.0 | [ 57.858322] bash[1492]: | pci_driver | 1.0.6.6 | [ 57.858421] bash[1492]: | proxy | 0.8.0.0 | [ 57.858533] bash[1492]: | proxy | 0.9.0.0 | [ 57.858633] bash[1492]: | proxy | 1.1.1.0 | [ 57.858732] bash[1492]: | proxy | 1.3.0.0 | [ 57.858823] bash[1492]: +------------+--------------------+ [ 57.858930] bash[1492]: 2026-01-09 09:02:44 - Proxy launched succesfully [ 58.752944] bash[1514]: 2026-01-09 09:02:45 - Hardware bringup is done (1 device(s) configured) and proxy is launched successfully in the background. [ 58.755142] bash[392]: Logs saved in: /root/kinara/rt_sdk_r1.3/saved_logs/rt-sdk-ara2_logs.txt Now, enjoy your AI journey.

Installing U-Boot on i.MX51EVK using BDI3000 Unlike older i.MX processor you don't need to select CONFIG_SKIP_LOWLEVEL_INIT because U-Boot lowlevel for i.MX51 doesn't reconfigure RAM memory. It is configured on DCD table. Copy u-boot.bin to /tftpboot because BDI3000 will load it from there. Connect the serial console cable on your i.MX51EVK board and connect to it using minicom. Connect to your BDI3000 through telnet and execute these commands: FSL-iMX51> load 0x97800000 u-boot.bin Loading u-boot.bin , please wait .... Loading program file passed FSL-iMX51> rm pc 0x97800000 FSL-iMX51> go When you execute the last command (“go”) you will see U-Boot starting on serial console.

Freescale's ARM11™-based i.MX 35 processor family provides the perfect balance of performance, power consumption, connectivity, and media capabilities necessary to drive today's multimedia applications. i.MX35 Family Comparison i.MX Family Comparison Product Information on Freescale.com i.MX351 Multimedia Applications Processor i.MX353 Multimedia Applications Processor i.MX355 Multimedia Applications Processor i.MX356 Multimedia Applications Processor i.MX357 Multimedia Applications Processor Evaluation/Development Boards and Systems IMX35PDK: i.MX35 Product Development Kit (PDK) Embedded Software and Tools Android OS for i.MX Applications Processors i.MX35 Current Software Updates and Releases Additional Resources Develop a Simple OpenVG Application Under Linux: Tutorial i.MX35 PDK i.MX35 PDK Linux Booting SD I.MX35 PDK Board Flashing SD Card i.MX35 PDK Board Flashing NAND i.MX35 PDK NAND Flashing Kernel and Root File System Using RedBoot i.MX35 PDK NAND Creating and Flashing UBIFS image

In traditional file system, the WinCE image is a signal file “NK.NB0”/”NK.BIN”. And when using NAND flash for storage, since it can’t support XIP, the total “NK.NB0” need be copied into RAM before running. The EBOOT will do this copy. In this way, there are two main shortages: Long boot time and big size RAM requirement. If the WinCE image is big (Included more features), these issues will be critical. The BINFS can fix those two issues fine. It gave the chance to use 32MB RAM run 64MB WinCE image, this can cost down the final products. In BINFS file system, the final WinCE image will be divided into multi-BIN files, and only the XIPKERNEL BIN (Less than 7 MB) need be copied into RAM by EBOOT. The files in other BIN will work with demand paging mode. These files will be loaded into RAM only when they need run.

Hello,   recently I'm running CTS test on MX6Q SabreSD to fix some of the issues my customer found, and found that "factory reset" is an important step during the test-environment setup but not mentioned in i.MX CTS test report.   "Factory reset" is need on official CTS page: Setting up CTS | Android Open Source Project     Without factory reset, the CTS test result in "android.core.tests.libcore.package.libcore" package looks like: There are total 8 failed items.     If we run "factory reset" before conduct the CTS test in in "android.core.tests.libcore.package.libcore" package, only 2 failed items found as below:   PS: and those 2 failed items can be waived, according to the test-house of CTS tests. PS1: the test reports of are also attached.       Please do run "factory reset" before CTS test, verified working on 4.2.2 and should also work on the version above according to the pages I found on Google when trying to fix this issue. Unfortunately "factory reset" is not documented in the environment setup process in i.MX CTS test report, you will need this if you are following the steps in i.MX CTS test report.   Best regards, Jim.

Garz & Fricke GmbH - new software releases - Embedded Linux System Yocto

Overview The purpose of this document is to collect general information about PCIe certificaton (Tx only) on i.MX 7Dual SabreSD board. Test Procedure Please refer to "PCIe Certification Guide for i.MX 7Dual" for more details about test procedure. Software Configuration PCIe certificaiton requires PCIe module to keep clocks always on. So software needs to enable "CONFIG_PCI_IMX6_COMPLIANCE_TEST" by default for the certification. Appropriative PCIe reference clock generator is recommended for certification. i.MX differential clock is not compliant with PCIe standard. So external reference clock is recommended for PCIe certification. i.MX 7Dual SabreSD board enables external reference clock by default and  and i.MX 7Dual default BSP has also adopted external reference clock as PCIe clock source by default. Test Report Please see attachment for i.MX 7Dual PCIe certification test report for Tx based on the following configuration: Software Image: L4.1.15_1.2.0_ga internal candidate image with enabling CONFIG_PCI_IMX6_COMPLIANCE_TEST configuration for Kernel image. Hardware: i.MX 7Dual SabreSD board.

The lastest iMX28 WinCE 6.0 BSP "WCE600_MX28_SDK1008" has a UART RX DMA data lost issue. Test case to duplicate the issue: Connect iMX28 UART1 and PC with UART cable, then run some UART test application on iMX28 and PC side, PC can send a file to IMX28, file size should bigger than the default RX DMA buffer size 1024 bytes, then from iMX28 side, there will be data lost. The attached "SERIALAPP.zip" is the updated UART driver code to fix this issue, you can unzip and update it to "wince600\platform\common\src\soc\common_fsl_v2_pdk1_9\serialapp" folder, and rebuild the WinCE image. The followed improvement had been implemented in this update for UART RX DMA: 1. Added DMA recover code.     When UART error happens in DMA mode, the driver will re-initialize the DMA for next transfer.. 2. Set UART DMA timeout interrupt to 5ms. "#define SERIAL_DMA_RX_TIMEOUT      5"     After UART DMA interrupt happens, the IST need copy data from DMA buffer to MDD buffer, so it needs time. The default BSP had set this delay to 31 bits transfer time, this is very short, if the PC send "DMA buffer + 1" bytes to iMX28, after first DMA buffer full interrupt happens, the second DMA timeout interrupt will happen in a short time, this interrupt will be lost, because the driver is still processing the pre-interrupt. 3. Updated MDD code to make sure the buffer send to PDD is always bigger than the RX DMA buffer.     This MDD code modification will only active in DMA mode, so there is no impact for PIO mode. 4. Update UART DMA interrupt handler code.     When UART DMA interrupt happens, set up the next DMA transfer at once, so DMA can continue to receive data with another DMA buffer, the same time the IST will copy data from pre-DMA buffer to MDD buffer.

Hello Linux and i.MX6 users Tushar has posted on the Element14 community some clear tutorials (accessible following the link below) to create a bootable SD-Card from a Linux image. Linux host:             http://www.element14.com/community/community/designcenter/single-board-computers/riotboard/blog/2014/07/31/upgrading-riotboard-with-kernel-31017-linux-host Windows host:      RIoTboard: Upgrading RIoTboard with Kernel 3.10... | element14 Happy SD-Card Programming Greg

In recent months, some i.MX6ULL users try to add google chromium to Linux BSP L4.1.15 managed by yocto project 2.1 (krogoth), but failed.  One of A customers project also encoutered the same issues, their engineers submitted case to us asking for help. Then a compilation test for the customer was done,  there really exist some errors during compilation. The follwing contents show how to compile it and handle issues. ---System Configurations Hardware: notebook, i7 4-cores, 16GB DDR4 Software: windows 7/10, VMware Player 14.0, USB3.1 SSD Step1: # cd ~/fsl-release-bsp # DISTRO=fsl-imx-x11 MACHINE=imx6ull14x14evk source fsl-setup-release.sh -b build-x11 # gedit ./conf/local.conf          Add lines below, just like descriptions of chromium in i.MX_Yocto_User’s_Guide.pdf …… CORE_IMAGE_EXTRA_INSTALL += "chromium libexif" LICENSE_FLAGS_WHITELIST="commercial" …… [Comment] Above methord has been described in i.MX_Yocto_User's_Guide.pdf. # bitbake chromium -c fetch           Begin to download chromium package：                    If you feel it’s the speed of download is too slow, you can copy the following link to explorer, and download the file directly: http://gsdview.appspot.com/chromium-browser-official/chromium-48.0.2548.0.tar.xz Then copy the file to ~/fsl-release-bsp/downloads. And create a.done file by touch command in the directory. # cd ~/fsl-release-bsp/downloads # touch chromium-48.0.2548.0.tar.xz.done          Empty file is OK, not need any contents in the file. Step 2          Begin to compile chromium: # cd ~/fsl-release-bsp/downloads/build-x11 # bitbake chromium -c compile          From the following picture, total tasks are 1636 Errors 1 during compilation Error : ERROR: cups-2.1.3-r0 do_fetch: Fetcher failure: Fetch command failed with exit code 4, output: failed: Connection timed out. Read error (Connection timed out) in headers.   ERROR: cups-2.1.3-r0 do_fetch: Function failed: Fetcher failure for URL: 'https://www.cups.org/software/2.1.3/cups-2.1.3-source.tar.bz2'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /home/weidong/fsl-release-bsp-415-200/build-x11/tmp/work/cortexa7hf-neon-poky-linux-gnueabi/cups/2.1.3-r0/temp/log.do_fetch.33362 ERROR: Task 111 (/home/weidong/fsl-release-bsp-415-200/sources/poky/meta/recipes-extended/cups/cups_2.1.3.bb, do_fetch) failed with exit code '1' Handle it: Download the file through explorer: https://www.cups.org/software/2.1.3/cups-2.1.3-source.tar.bz2 Then copy it to ~/fsl-release-bsp/downloads, and create cups-2.1.3-source.tar.bz2.done Continue: # bitbake chromium -c compile Errors 2 during compilation Handle it : copy the fsimx6ul-chromium.patch to your main yocto directory (same directory were you can find yocto-download). Switch to this directory and apply the patch with the following command: patch -p1 < fsimx6ul-chromium.patch Compile your yocto rootfs again [Comment] The solution is from the link: https://forum.fs-net.de/index.php?thread/4352-yocto-build-chromium-browser/ fsimx6ul-chromium.patchis provided by F&S Support Team Continue: # bitbake chromium -c compile Successfully. Step 3 Compiling full image # bitbake fsl-image-gui          When chromium compilation is done, we can begin to comipile rootfs(fsl-image-gui)          Then no errors occurred. Compiled BSP successfully.   Then we check if chromium has been included in rootfs. # cd ~/fsl-release-bsp/build-x11/tmp/deploy/images/imx6ull14x14evk [Comment] (1) fsl-image-gui-imx6ull14x14evk-20200425220751.rootfs.tar.bz2          The file is rootfs without u-boot/device tree/linux kernel. (2) fsl-image-gui-imx6ull14x14evk-20200425220751.rootfs.sdcard          The file is full image including u-boot/device tree/kernel/rootfs Here is the links among files:          Now we check if rootfs have included chromium, create a temp directory in ~/ and copy rootffs to the temp directory # mkdir ~/temp # cp ./fsl-image-gui-imx6ull14x14evk-20200425220751.rootfs.tar.bz2 ~/temp          Then decompress it. # cd ~/temp # tar -jxvf fsl-image-gui-imx6ull14x14evk-20200425220751.rootfs.tar.bz2 # cd usr/bin/chromium/ # ls Successfully. NXP TIC team Weidog Sun 2020/05/01

This describes how to perform frequency measurements of an external signal by using the Camera Sensor Interface (CSI) of an i.MX21/25/35 processor. Principle: A way to measure the frequency of a digital signal is to count the number of received rising or falling edges during a known amount of time. The CSI embeds a 16-bit frame counter. When programmed in non-gated clock mode, this counter increases at any rising edge on the VSYNC signal. Other signals of this interface could be ignored such: MCLK, PIXEL_CLK, HSYNC, DATA. Software example for the i.MX25: void CSI_init(void){       unsigned int tmp_value = 0;       /* It assumes that the VSYNC I/O is set to CSI mode */       /* Disable IPG_PER_CSI to save power consumption */       *((unsigned int *) CCM_CGR0) &= ~(0x1<<0);       /* HCLK_CSI and IPG_CLK_CSI should be enabled. */       *((unsigned int *) CCM_CGR0) |= (0x1<<18);       *((unsigned int *) CCM_CGR1) |= (0x1<<4);       /* Configuration of CSI_CSICR1 in non-gated clock mode */       tmp_value = 0;       tmp_value |= (1<<8);    // sync FIFO clear       tmp_value |= (1<<30);   // ext vsync enable       *((unsigned int *) CSI_CSICR1) = tmp_value;       // Reset frame counter       *((unsigned int *) CSI_CSICR3) |= (1<<15); } Then, every T seconds, the software has to read the register CSI_CSICR3. The 16-bit size field from bit 16 shows the current value of the frame counter (FRMCNT). This regular or irregular read could be done based on a GPT to have a known time reference. It is easy to calculate the frequency of the signal: Frequency = FRMCNT / T (Hz). At any time, the frame counter can be reset thanks to the bit 15 of the register CSI_CSICR3. NOTES: MCLK does not need to be enabled. The input frequency should not be higher than what can electrically support the VSYNC input. Please, refer to each i.MX datasheet for more information.

Abstract: On the time otp driver initializes, it will check the mac bits of eFuse,  when the value is invalid, generate a random mac, and program  it to eFuse. Environment: i.mx6dl android-4.2.2 kernel-3.0.35 Changes: 1. kernel_imx/arch/arm/mach-mx6/mx6_fec.c ---------------------------------------------------------------- void __init imx6_init_fec(struct fec_platform_data fec_data) {   fec_get_mac_addr(fec_data.mac);   if (!is_valid_ether_addr(fec_data.mac))       fec_data.mac[0] = 0x10; // changed by xxx   if (cpu_is_mx6sl())   imx6sl_add_fec(&fec_data);   else   imx6q_add_fec(&fec_data); } 2. kernel_imx/drivers/char/fsl_otp.c ---------------------------------------------------------------- //add by xxx static void check_otp_mac(void) {   unsigned int index_mac0 = 34;   unsigned int index_mac1 = 35;   u32 value_mac0 = 0;   u32 value_mac1 = 0;   u32 value_random_mac0 = 0;   u32 value_random_mac1 = 0;   char otp_mac[6], random_mac[6];   memset(otp_mac, 0, sizeof(otp_mac));   memset(random_mac, 0, sizeof(random_mac));   mutex_lock(&otp_mutex);   //get   if (otp_read_prepare(otp_data)) {   mutex_unlock(&otp_mutex);   return 0;   }   value_mac0 = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTn(index_mac0));   value_mac1 = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTn(index_mac1));   otp_read_post(otp_data);   mutex_unlock(&otp_mutex);   if(value_mac0 != 0 && value_mac1 != 0)   {   otp_mac[5] = value_mac0 & 0xff;   otp_mac[4] = (value_mac0 >> 😎 & 0xff;   otp_mac[3] = (value_mac0 >> 16) & 0xff;   otp_mac[2] = (value_mac0 >> 24) & 0xff;   otp_mac[1] = value_mac1 & 0xff;   otp_mac[0] = (value_mac1 >> 😎 & 0xff;   }   printk("otp_mac=%pM\n", otp_mac);   //check   if (!is_valid_ether_addr(otp_mac))   {   random_ether_addr(random_mac);   printk("get random mac:%pM\n", random_mac);   //set   value_random_mac0 = 0;   value_random_mac0 = value_random_mac0 | random_mac[2];   value_random_mac0 = (value_random_mac0 << 😎 | random_mac[3];   value_random_mac0 = (value_random_mac0 << 😎 | random_mac[4];   value_random_mac0 = (value_random_mac0 << 😎 | random_mac[5];   value_random_mac1 = 0;   value_random_mac1 = value_random_mac1 | random_mac[0];   value_random_mac1 = (value_random_mac1 << 😎 | random_mac[1];   mutex_lock(&otp_mutex);   if (otp_write_prepare(otp_data)) {   mutex_unlock(&otp_mutex);   return 0;   }   otp_write_bits(index_mac0, value_random_mac0, 0x3e77);   otp_write_bits(index_mac1, value_random_mac1, 0x3e77);   otp_write_post(otp_data);   mutex_unlock(&otp_mutex);   } } //end 3.  kernel_imx/drivers/char/fsl_otp.c ---------------------------------------------------------------- static int __devinit fsl_otp_probe(struct platform_device *pdev) {   ...   retval = sysfs_create_group(otp_kobj, &attr_group);   if (retval)   goto error;   mutex_init(&otp_mutex);   //add by xxx   check_otp_mac();   //end

Q: Can OpenGL/OpenVG work on any of our boards with a 16-bit DDR bus? Here is GPU state dump when run some of the GPU SDK tutorials on their imx6 solo board with a 16-bit DDR bus: Mounting rootfs VFS: Mounted root (nfs filesystem) readonly on device 0:12. Freeing init memory: 156K Starting init GPU[0]: ************************** ***   GPU STATE DUMP   *** **************************   axi      = 0x000000B1   idle     = 0x7FFFFF86     FE not idle     SH not idle     PA not idle     SE not idle     RA not idle   DMA appears to be stuck at this address:     0x1882F230   dmaLow   = 0x08010583   dmaHigh  = 0x80003400   dmaState = 0x00000904     command state       = 4 (PAR_ADR1_ST)     command DMA state   = 1 (CMD_START_ST)     command fetch state = 2 (FET_VALID_ST)     DMA request state   = 0 (REQ_IDLE_ST)     cal state           = 0 (CAL_IDLE_ST)     VE request state    = 0 (VER_IDLE_ST)   RA debug registers:     [0x00] 0x0108C378     [0x01] 0x0042FB12     [0x02] 0x0042FB11     [0x03] 0x0000022C     [0x04] 0x10220033     [0x05] 0x0885C800     [0x06] 0xC054CBFE     [0x07] 0x68100000     [0x08] 0x00000000     [0x09] 0x00000000     [0x0A] 0x00000000     [0x0B] 0x00000000     [0x0C] 0x12344321     [0x0D] 0x12344321     [0x0E] 0x12344321     [0x0F] 0x12344321     signature = 0x12344321 (1 read attempt(s))   TX debug registers:     [0x00] 0x00000000     [0x01] 0x00000000     [0x02] 0x00000000     [0x03] 0x00000000     [0x04] 0x00000000     [0x05] 0x00000000     [0x06] 0x00000000     [0x07] 0x00000000     [0x08] 0x00000000     [0x09] 0x00000000     [0x0A] 0x00000000     [0x0B] 0x00000000     [0x0C] 0x00000000     [0x0D] 0x00000000     [0x0E] 0x00000000     [0x0F] 0x00000000     failed to obtain the signature (read 0x00000000).   FE debug registers:     [0x00] 0x1882F450     [0x01] 0x08010594     [0x02] 0x00000001     [0x03] 0x00000256     [0x04] 0x00080049     [0x05] 0x0000000D     [0x06] 0x00009571     [0x07] 0x00007445     [0x08] 0x00000004     [0x09] 0x00000000     [0x0A] 0x00000000     [0x0B] 0x00000000     [0x0C] 0x00000000     [0x0D] 0xA3105D67     [0x0E] 0x000000D0     [0x0F] 0xBABEF00D     signature = 0xBABEF00D (1 read attempt(s))   PE debug registers:     [0x00] 0x0108C369     [0x01] 0x00000000     [0x02] 0x0108C369     [0x03] 0x00000000     [0x04] 0xA0000000     [0x05] 0xABC00000     [0x06] 0xBC000000     [0x07] 0xCDE00000     [0x08] 0xD04045C0     [0x09] 0x204045C0     [0x0A] 0x0D863084     [0x0B] 0x00000000     [0x0C] 0xBABEF00D     [0x0D] 0xBABEF00D     [0x0E] 0xBABEF00D     [0x0F] 0xBABEF00D     signature = 0xBABEF00D (1 read attempt(s))   DE debug registers:     [0x00] 0x00000000     [0x01] 0x00000000     [0x02] 0x00000000     [0x03] 0x00000000     [0x04] 0x00000000     [0x05] 0x00000000     [0x06] 0x00000000     [0x07] 0x00000000     [0x08] 0x00000000     [0x09] 0x00000000     [0x0A] 0x00000000     [0x0B] 0x00000000     [0x0C] 0x00000000     [0x0D] 0x00000000     [0x0E] 0x00000000     [0x0F] 0x00000000     failed to obtain the signature (read 0x00000000).   SH debug registers:     [0x00] 0x0049AB4C     [0x01] 0x0000000B     [0x02] 0x00000411     [0x03] 0x00020A95     [0x04] 0x00000000     [0x05] 0x000F024E     [0x06] 0x000F424C     [0x07] 0x010BEC30     [0x08] 0x0108C368     [0x09] 0x000020DF     [0x0A] 0x00000693     [0x0B] 0x00000000     [0x0C] 0x00000000     [0x0D] 0x00000000     [0x0E] 0x00000000     [0x0F] 0xDEADBEEF     signature = 0xDEADBEEF (1 read attempt(s))   PA debug registers:     [0x00] 0x640006FE     [0x01] 0x64000000     [0x02] 0x00000810     [0x03] 0x00000690     [0x04] 0x00000230     [0x05] 0x0000022D     [0x06] 0x00000000     [0x07] 0x00000000     [0x08] 0x00000003     [0x09] 0x0000AAAA     [0x0A] 0x0000AAAA     [0x0B] 0x0000AAAA     [0x0C] 0x0000AAAA     [0x0D] 0x0000AAAA     [0x0E] 0x0000AAAA     [0x0F] 0x0000AAAA     signature = 0x0000AAAA (1 read attempt(s))   SE debug registers:     [0x00] 0x00000000     [0x01] 0x00000000     [0x02] 0x00000000     [0x03] 0x00000000     [0x04] 0x00000000     [0x05] 0x00000000     [0x06] 0x00000000     [0x07] 0x00000000     [0x08] 0x00000000     [0x09] 0x00000000     [0x0A] 0x00000000     [0x0B] 0x00000000     [0x0C] 0x00000000     [0x0D] 0x00000000     [0x0E] 0x00000000     [0x0F] 0x00000000     failed to obtain the signature (read 0x00000000).   MC debug registers:     [0x00] 0x00000000     [0x01] 0x00000000     [0x02] 0x00000000     [0x03] 0x00000000     [0x04] 0x12345678     [0x05] 0x12345678     [0x06] 0x12345678     [0x07] 0x12345678     [0x08] 0x12345678     [0x09] 0x12345678     [0x0A] 0x12345678     [0x0B] 0x12345678     [0x0C] 0x12345678     [0x0D] 0x12345678     [0x0E] 0x12345678     [0x0F] 0x12345678     signature = 0x12345678 (1 read attempt(s))   HI debug registers:     [0x00] 0x0000F719     [0x01] 0x19C020C8     [0x02] 0x1EBC2426     [0x03] 0xAAAAAAAA     [0x04] 0xAAAAAAAA     [0x05] 0xAAAAAAAA     [0x06] 0xAAAAAAAA     [0x07] 0xAAAAAAAA     [0x08] 0xAAAAAAAA     [0x09] 0xAAAAAAAA     [0x0A] 0xAAAAAAAA     [0x0B] 0xAAAAAAAA     [0x0C] 0xAAAAAAAA     [0x0D] 0xAAAAAAAA     [0x0E] 0xAAAAAAAA     [0x0F] 0xAAAAAAAA     signature = 0xAAAAAAAA (1 read attempt(s))   Other Registers:     [0x0040] 0x00924A66     [0x0044] 0x06F47370     [0x004C] 0x06F47370     [0x0050] 0x00DE8E6E     [0x0054] 0x00DE8E6E     [0x0058] 0x00924A66     [0x005C] 0x001254D6     [0x0060] 0x001254D6     [0x043C] 0x00000000     [0x0440] 0x00000000     [0x0444] 0x00000000     [0x0414] 0x3C000000 [<8003b21c>] (unwind_backtrace+0x0/0xfc) from [<80308114>] (_DumpGPUState+0x4ec/0x6b4) [<80308114>] (_DumpGPUState+0x4ec/0x6b4) from [<80308324>] (gckOS_Broadcast+0x38/0xe8) [<80308324>] (gckOS_Broadcast+0x38/0xe8) from [<80311008>] (gckEVENT_GetEvent+0x184/0x1b4) [<80311008>] (gckEVENT_GetEvent+0x184/0x1b4) from [<80311294>] (gckEVENT_Submit+0x8c/0x328) [<80311294>] (gckEVENT_Submit+0x8c/0x328) from [<8030dedc>] (gckCOMMAND_Commit+0x4d4/0xa28) [<8030dedc>] (gckCOMMAND_Commit+0x4d4/0xa28) from [<8030c1d0>] (gckKERNEL_Dispatch+0x4b4/0x112c) [<8030c1d0>] (gckKERNEL_Dispatch+0x4b4/0x112c) from [<80306580>] (drv_ioctl+0x108/0x250) [<80306580>] (drv_ioctl+0x108/0x250) from [<800ed704>] (do_vfs_ioctl+0x80/0x5e0) [<800ed704>] (do_vfs_ioctl+0x80/0x5e0) from [<800edc9c>] (sys_ioctl+0x38/0x60) [<800edc9c>] (sys_ioctl+0x38/0x60) from [<80035580>] (ret_fast_syscall+0x0/0x30) A: This GPU driver stack dump indicates GPU stuck when VDDPU_CAP was under spec values (1.2V) so GPU was not correctly powered. Was fixed by adjusting PMU_REG_CORE[REG1_TARG]. AFAIK, GPU drivers have some DDR bank configuration, so you may see a different problem though.

Creating an image A kernel image and a root file system can be created using LTIB, or compiling the kernel and setting the correct set of files. Create a root file system image from a set of files converting the files to a jffs2 file system. For this, install the package mtd-tools. In Ubuntu type apt-get install mtd-tools For making an root file system for flash, use the jffs2 file system like: mkfs.jffs2 -r rootfs -e 0x40000 -s 0x800 -n -o rootfs.jffs2 Where rootfs/ is the original set of file for the file system and rootfs.jffs2 is the output image file. Flashing Some connection errors can be avoided by Configuring RedBoot. The process below uses TFTP to copy the files between host and target. Copy the kernel image and the root file system image to the TFTP dir. For example, in All Boards LTIB dir, type sudo cp ./rootfs/boot/zImage /tftpboot sudo cp rootfs.jffs2 /tftpboot/ Where /tftpboot is the dir configured for TFTP The next steps are performed in a Minicom session, and happens on the board. Formatting the flash: fis init Flashing kernel Load kernel image (zImage) using the command below. Remember to modify the host IP address: load -r -b 0x100000 /tftpboot/zImage -h 10.29.244.99 The address 0x100000 is used as a temporary location Create the kernel fis create -f 0x100000 kernel Flashing root file system Load root file system image (rootfs.jffs2) to the temporary address. Remember to modify the host IP address: load -r -b 0x100000 /tftpboot/rootfs.jffs2 -h 10.29.244.99 Create the root file system in the right address (0x600000, for i.MX35 PDK) fis create -f 0x600000 root You can now load your kernel in the flash by typing: fis load kernel To know if the root file system written in the flash was correctly saved, execute the NFS file system and mount the flash. For load the the root file system by NFS, type: exec -b 0x100000 -l 0x200000 -c "noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=10.29.244.99:/tftpboot/ltib init=/linuxrc ip=10.29.241.6:10.29.244.99" Wait the system go up, then mount the flash at /mnt. Reminde that the flash has a jffs2 file system. mount -t jffs2 /dev/mtdblock8 /mnt ls /mnt List the /mnt contents. The output must be the right file system. Modifying the initial script Reset the board and press CTRL-C. Type fc to modify the configurations and insert the initialization script. RedBoot> fc Run script at boot: true Boot script: Enter script, terminate with empty line >> fis load kernel >> exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock8 rw rootfstype=jffs2 ip=dhcp" >> Boot script timeout (1000ms resolution): 1 Use BOOTP for network configuration: false Gateway IP address: 10.29.241.254 Local IP address: 10.29.241.6 Local IP address mask: 255.255.254.0 Default server IP address: 10.29.244.99 Board specifics: 0 Console baud rate: 115200 Set eth0 network hardware address [MAC]: false GDB connection port: 9000 Force console for special debug messages: false Network debug at boot time: false Update RedBoot non-volatile configuration - continue (y/n)? y ... Read from 0x07ee0000-0x07eff000 at 0x00080000: . ... Erase from 0x00080000-0x000a0000: . ... Program from 0x07ee0000-0x07f00000 at 0x00080000: . RedBoot> Remember to save the configuration in the flash by typing y Reset the system. To certify that the board is loading the system from flash, remove the Ethernet cable.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-342174 

The Linux L4.9.51 and SDKv2.3 for i.MX 8MQuad(mScale850D) RFP(GA) release files are now available. Linux on IMX_SW web page, Overview -> BSP Updates and Releases ->Linux L4.9.51 for i.MX 8MQuad GA. SDK on https://mcuxpresso.nxp.com/ web page.   Files available: Linux: # Name Description 1 fsl-yocto-L4.9.51_mx8mq-ga.tar.gz L4.9.51 i.MX 8MQuad GA Linux BSP Documentation. Includes Release Notes, User Guide. 2 L4.9.51-ga_images_mx8mq.tar.gz Linux Binary Demo files for i.MX 8MQuad EVK 3 L4.9.51_8mq-ga_mfg-tools.tar.gz Manufacturing Toolkit for Linux L4.9.51 i.MX8MQuad GA 4 L4.9.51_8mq-ga_gpu-tools.tar.gz VivanteVTK file for L4.9.51 i.MX8MQuad GA 5 imx-aacpcodec-4.3.4.tar.gz AAC Plus Codec for L4.9.51 of iMX 8MQuad GA   SDK:   On https://mcuxpresso.nxp.com/, click the Select Development Board to customize the SDK based on your configuration then download the SDK package. CMSIS pack is also supported.   Target board: i.MX 8MQuad EVK   What’s New/Features: Please consult the Release Notes.   Known issues For known issues and more details please consult the Release Notes.   More information on changes of Yocto, see: README: https://source.codeaurora.org/external/imx/imx-manifest/tree/README?h=imx-linux-morty ChangeLog: https://source.codeaurora.org/external/imx/imx-manifest/tree/ChangeLog?h=imx-linux-morty  

First download and install imx31_ads_20071008-rel5b-ltib.iso. Download and extract u-boot-1.3.3.tar.bz2. Place toolchain on PATH: $ export PATH="$PATH:/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/" Export the CROSS_COMPILE name to U-Boot $ export CROSS_COMPILE=arm-none-linux-gnueabi- Enter in the u-boot-1.3.3 directory. Create configuration to i.MX31ADS board: $ make mx31ads_config Compile U-Boot to selected board: $ make If compilation goes fine you will see the u-boot.bin on current directory.

The Android O8.1.0_2.0.0 GA (4.14.98 kernel) is now available on IMX software landing page. Overview -> i.MX BSP Updates and Releases -> Android -> Android O8.1.0_2.0.0   Files available:   # Name Description 1 android_o8.1.0_2.0.0-GA_docs.zip Android O8.1.0_2.0.0  Documentation 2 imx-o8.1.0_2.0.0-ga.tar.gz i.MX Android Automotive proprietary source code for Android O8.1.0_2.0.0 3 android_o8.1.0_2.0.0-ga_image_8qmek.tar.gz Prebuilt images with NXP extended features for the i.MX8QMax and 8QXPlus MEK   Supported boards: i.MX 8QuadMax MEK i.MX 8QuadXPlus MEK   Features and Known issues For features and known issues, please consult the Release Notes in detail.  ============================================================= The Android O8.1.0_2.1.0_AUTO GA (4.14.98 kernel) is now available on IMX software landing page. Overview -> i.MX BSP Updates and Releases -> Android AUTO-> Android O8.1.0_2.1.0_AUTO   Files available:   # Name Description 1 android_o8.1.0_2.1.0-auto-GA_docs.zip Android O8.1.0_2.1.0_AUTO Documentation 2 imx-o8.1.0_2.1.0-auto-ga.tar.gz i.MX Android Automotive proprietary source code for Android O8.1.0_2.1.0_AUTO 3 android_o8.1.0_2.1.0-auto-ga_image_8qmek.tar.gz Prebuilt images with NXP extended features with the EVS function enabled in the Cortex-M4 CPU core for the i.MX 8QuadMax/8QuadXPlus MEK 4 android_o8.1.0_2.1.0-auto-ga_image_8qmek2.tar.gz Prebuilt images with NXP extended features for the i.MX8QMax and 8QXPlus MEK, without the EVS in M4 Core. Supported boards: i.MX 8QuadMax MEK i.MX 8QuadXPlus MEK   Features and Known issues For features and known issues, please consult the Release Notes in detail.