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Android CTS Verifier The Compatibility Test Suite Verifier is a supplement to the Compatibility Test Suite. The main difference lies in that the verifier is developed for tests that cannot run on their own so they require user input in order to be tested. These tests would include the audio quality, the touchscreen, accelerometer, camera, etc. There is no “best verifier option”, one CTS complements the other. In this document we will focus on how to perform the Verifier test. Requirements: A PC with the Android SDK installed. Your “Device Under Test” (your development board) Optional >> A second android device with compatible Wifi and Bluetooth Setup Steps: Install de Android SDK on your PC Download the appropriate CTS Verifier APK. The list of APK’s can be found here: https://source.android.com/compatibility/downloads.html Make sure that your Device Under Test has its system date and time set correctly. Install the CTS Verifier APK on the Device Under Test* For more information regarding ADB commands, follow this link: https://community.freescale.com/docs/DOC-102514 Initialization: After the setup is done, you should see the application installed: You will see the list of available tests for manual verification: Video Link : 4502 For each test, you will see detailed instructions to run it, and a “pass” and “fail” buttons. Video Link : 4530 Once you run each test, you will have the posibility to choose the outcome. (in some cases, pass/fail outcome will be determined automatically). The list of tests (for CTS Verifier 5.1_r2) is: Camera: FOV Calibration, Formats, ITS, Intents, Orientation, Video. Car: Car Dock Test Clock: Alarms and Timers Test Device Administration: Policy serialization test, screen lock test. Features: Hardware/Software feature summary Hardware: USB Accessory Test Job Scheduler: Charging constraints, connectivity constraints, idle mode constraints. Location: Battery saving mode test, location mode off test Managed provisioning: BYOD managed provisioning, device owner provisioning Networking: Bluetooth test, Wi-Fi direct test Notifications: CA Cert notification, CA Cert notificacion on boot, notification attention management, notification listener, notificacion package priority Other: Data backup, screen pinning, widget framework Projection: Projection cube, projection multitouch, projection offscreen, projection scrolling, projection video playback, projection widget Security: Keyguard password verification, SUID file scanner. Sensors: Accelerometer mearument, CTS Sensor batching, CTS Sensor integration, CTS sensor test, CTS single sensor test, magnetic field measurement, sensor batching. Streaming: Streaming video quality verifier. Exporting test results: Tap the “save disk” icon. A pop-up will show the path of the report that was created. Video Link : 4531 With the board connected to the PC through USB, pull the report using ADB: To download all reports run : adb pull /mnt/sdcard/ctsVerifierReports/ .
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FRDM-A-S32K344: Secure Encrypted Ethernet Demo Secure Encrypted Ethernet Communication using FRDM-A-S32K344  Find the code in Application Code Hub as Secure Encrypted Ethernet End Nodes This project implements a configurable secure encrypted Ethernet communication node that can operate in three different modes—Transmit (TX), Receive (RX) and Intruder —selected at build time using compile‑time macros. Depending on which macro is enabled during compilation, the firmware conditionally includes only the logic required for that mode. /* Macro for NODE selection: Select TX_BOARD, RX_BOARD or INTRUDER_BOARD and * flash its corresponding profile */ #define TX_BOARD (1u) /* TX_BOARD is selected */ #define RX_BOARD (0u) #define INTRUDER_BOARD (0u) TX Node Mode (TX_BOARD) - In this mode, the device encrypts an image and transmits Ethernet frames when the transmission button is pressed. If the encrypt button is pressed, the Ethernet frames will contain the encrypted image. If the encrypt button is not pressed, the Ethernet frames will contain the base image. RX Node Mode (RX_BOARD) - The device listens for incoming Ethernet frames and processes the data to display the received image in the LCD display. When the encrypt button is pressed the decryption is enabled. Intruder Node Mode (INTRUDER_BOARD) - The device listens for incoming Ethernet frames and processes the data to display the received image in the LCD display. Intruder does not have access to decryption. This project has the option to define if the on-board push buttons are used or external user push buttons connected to PTE24 and PTE25. /* Macro for BUTTON selection: Select INTERNAL_BUTTONS or EXTERNAL_BUTTONS and * flash its corresponding profile.*/ #define INTERNAL_BUTTONS (1u) // SW2 = Encryption, SW3 = Transmission #define EXTERNAL_BUTTONS (0u) // PTE24 = Encryption, PTE25 = Transmission   Application Description The application runs on an NXP S32K344 MCU and demonstrates a complete image encryption, transmission, reception, and optional encryption pipeline. The code encrypts an image using the HSE, transmits it over Ethernet, receives encrypted data, decrypts it using HSE, and displays it. The summarized functionality is the next: LCD Display Handling: Initializes an LCD via LPSPI1 and displays an embedded bitmap image AES-128 Encryption/Decryption (ECB mode): Uses Crypto_43_HSE AUTOSAR Crypto Driver, offloads all crypto operations to the Hardware Security Engine (HSE), splits an image into 64‑byte blocks, encrypts each block with AES‑128 ECB Ethernet Transmission (GMAC): Encapsulates encrypted image data into Ethernet frames, Sends frames over GMAC0 and receives incoming frames and reconstructs the encrypted image User Interaction via Buttons: SW3 starts transmission and SW2 grants encryption   Algorithm The main function initialize all pin routing, peripherals and LCD over SPI. Performs setup for Crypto Driver and HSE by loading a key and mark it as valid. (TX) The image stored as a bitmap in ImageDataAuto[] is split into blocks of 64 bytes in order to perform the encryption and store the encrypted output in EncryptedImage[] for secure Ethernet transmission. (TX) Ethernet frame is built manually and is broken into frames of 1024 bytes. (TX) Transmission starts when the transmit button is pressed. When all image data is sent then the transmission resets. (RX) Incoming Ethernet frames are processed in the emac_rx_callback(…) where the payload bytes are extracted and appended into the EncryptedImage[] array. (RX) Once all the image bytes arrives a flag is activated to show the image in the infinite loop. (Intruder) The intruder board can sniff the image sent as long as the Encrypted Button is not pressed. (Intruder) If the Encrypted Button is pressed, intruder board will receive the encrypted array and not be able to decrypt. Crypto Driver and HSE This project makes extensive use of the AUTOSAR Crypto Stack, specifically the Crypto_43_HSE driver and the HSE embedded hardware module as the accelerator performing all AES operations. Some of the key functions and features to understand are: Initialization of HSE Key Catalog: This configures the RAM and NVM key catalogs where the HSE stores key metadata. RetVal = Crypto_43_HSE_Exts_FormatKeyCatalogs(); Loading AES-128 Key into the HSE: The key is transferred into the HSEs secure storage. Crypto_43_HSE_KeyElementSet(APP_AES128_KEY_ID,KEY_MATERIAL_ELEMENT_ID_U32, App_au8Aes128EcbKey_1, APP_AES128_KEY_SIZE); Key Validation: Makes the key available to subsequent crypto jobs. Crypto_43_HSE_KeySetValid(APP_AES128_KEY_ID); AES-128 ECB Job Execution: The CPU does not perform AES operations. The request is passed to the HSE firmware, which executes AES‑128 ECB using its hardware crypto accelerators. Encryption and decryption are performed using their corresponding jobs: Crypto_43_HSE_ProcessJob(APP_SYMMETRIC_CDO_ID, &App_JobAes128EcbEncrypt); Crypto_43_HSE_ProcessJob(APP_SYMMETRIC_CDO_ID, &App_JobAes128EcbDecrypt); HSE-compatible non-cacheable buffers: HSE accesses memory via DMA and cannot read cache-only memory regions. The code places all data buffers exchanged with HSE in special sections defined by: #define CRYPTO_43_HSE_START_SEC_VAR_INIT_8_NO_CACHEABLE Boards: FRDM-A-S32K344 Categories: Communication, Security Peripherals: Siul2, Crypto 43 HSE, ETH 43 GMAC Toolchains: S32 Design Studio IDE 1. Software and Tools 1.1 FRDM Automotive Bundle for S32K3 The demo was developed using the FRDM Automotive Bundle for S32K3. To download and install the complete software and tools ecosystem, use the following link: S32K3 FRDM Automotive Board Installation Package. 1.2 Security Real-Time Drivers Crypto As the application uses cryptography and the Hardware Security Engine (HSE) peripheral, it is necessary to download the Security Real-time drivers Crypto 7.0.0 QLP02 and the S32K344 HSE Standard Firmware to the bundle by following the next steps: Click on the Software Library tab. Select S32K3 checkbox in the Devices tab to filter the results. Type Security Real-Time Drivers Crypto in the search bar and click in the checkbox to select it. Confirm that the version is 7.0.0_QLP02. Type S32K344 HSE Standard Firmware in the search bar and click in the checkbox to select it. Confirm that the version is RTM 0.2.55.0. Click on Generate Bundle Installer button and confirm that the package contains all the drivers as shown. 2. Hardware 2.1 Required Hardware Personal Computer Type-C USB cable Switch Gigabit Ethernet GS108 3 * Ethernet cable 3 * 2.8" TFT touch shield for Arduino 3 * FRDM-A-S32K344 2.2 Debugger Connector Connect the PEmicro debugger to the Cortex Debug connector Connect debugger USB to PC Power the FRDM-A-S32K344 using the USB-C cable or connect USB C cable directly to the board for power supply and debug capabilities 3. Setup 3.1 Import the Project into S32 Design Studio IDE Open S32 Design Studio IDE, in the Dashboard Panel, choose Import project from Application Code Hub. Found the demo you need by searching the name directly. Open the project, click the GitHub link, S32 Design Studio IDE will automatically retrieve project attributes then click Next>. Select main branch and then click Next>. Select your local path for the repo in Destination->Directory: window. The S32 Design Studio IDE will clone the repo into this path, click Next>. Select Import existing Eclipse projects then click Next>. Select the project in this repo (only one project in this repo) then click Finish. 3.2 Connect Hardware Before connecting the display to the board it is necessary to solder 3 SMD pads to enable SPI transmission. The pads correspond to SI, SO and SCK marked in the silkscreen as 11, 12 and 13 respectivelly (yellow circle in the image). To connect the display to the board, follow the next image to make sure the pins in the board marked by red coincide with the pins in the display marked by red. 3.3 Generating, Building and Running the Example Import the HSE using FRDM-A-S32K344 project from Application Code Hub following the steps above. In Project Explorer, right-click the project and select Update Code and Build Project and then go to Debug. The project must be executed twice in order to enable the HSE in the board.Note: This is a mandatory step to compile the Secure Encrypted Ethernet Communication project. In Project Explorer, right-click the project and select Update Code and Build Project. This will generate the configuration (Pins, Clocks, Peripherals), update the source code and build the project using the active configuration (e.g. Debug_FLASH). Make sure the build completes successfully and the *.elf file is generated without errors. Press Yes in the SDK Component Management pop-up window to continue. If a error appears related to the NXP GCC 10.2 not installed, right click on it and select Quick Fix. Note: This is a mandatory step to compile the Secure Encrypted Ethernet Communication project. To generate the other executables, the macros must be modified to use the other node mode. In the app_cfg.h file within the src folder. Change the macro definition from:  #define TX_BOARD (1u)  to  #define TX_BOARD (0u)  and  #define RX_BOARD (0u)  to  #define RX_BOARD (1u) . To set the intruder, repeat previous steps but set  TX_BOARD  and  RX_BOARD  to  (0u)  and  INTRUDER_BOARD  to  (1u)  in the macro definition for the intruder board. Then clean project and build again to generate the RX node executable. Go to Debug and select Debug Configurations. Select GDB PEMicro Interface Debugging: Use the controls to control the program flow. Note: The GDB PEMicro Interface Debugging configuration uses default ports 6224 and 7224. In example are provided 2 debug configurations, one with default ports and another one with custom ports to support debugging of 2 boards simultaneously on the same PC. You must change the  C/C++ Application  path in the debug configuration to point to the generated *.elf file, one for TX node and one for RX node. In one launch configuration, select one board (for example USB1) and in the second launch configuration, select the other board (for example USB2). 4. Results When one board is connected as transmitter, one as receiver and other as intruder, using three ETH cables to the Switch, the image on the transmitter board will appear in the display, on the receiver and intruder board, the image will appear when the transmit button is pressed in the transmitter. If the encrypt button is pressed in both transmitter and receiver, the image will show complete but encrypted in the intruder. (function() { var wrapper = document.getElementById('lia-vid-6390689216112w960h540r430'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos) Questions regarding the content/correctness of this example can be entered as Issues within this GitHub repository or directly in the commentary section. Warning: For more general technical questions regarding NXP Microcontrollers and the difference in expected functionality, enter your questions on the NXP Community Forum This project implements a configurable secure encrypted Ethernet communication node with the transmission of a large data image. FRDM-Training MCU
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如何禁用 QSPI 1 上的 MGC 访问控制? 我正在努力使用自定义驱动程序让 QSPI 在 S32E2 评估板上运行。我正在使用 JTAG 加载代码并耗尽内存,因为我们正在从 EMMC 启动切换到从 QSPI 启动。评估板将 QSPI 闪存连接到 QSPI1 B。我在写入某些寄存器(主要是 SFAR)时遇到了问题。SFAR 似乎受 MGC 保护,因此我想通过清除第 31 位(GVLD)来禁用访问控制。 但是,根据参考手册,只能由总线主机 0x1F 访问 MGC,这是 HSE 核心。看起来 QPSI0 有一种以 HSE_QSPI0_DAT0 为形式的旁路机制,它允许更改可以访问 QSPI0 上这些寄存器的总线主机,但我一直找不到 QSPI1 的等效机制。 谁能帮帮我? Re: How do you disable MGC access control on QSPI 1? 你好,@AdamH_work、 感谢您联系恩智浦技术支持。关于您的问题,我需要一些时间来寻找访问您提到的寄存器的正确方法。 现在,我建议你看看我们在 S32ZE RTD 2.0.1 中提供的 qspi_ip_example_s32z2xx_r52 或 memacc_example_s32e2xx_r52 示例项目,尽管它使用了 RTD,但它可以让你了解在 S32Z/E 系列中使用 QSP I 所需的步骤。 谢谢! Re: How do you disable MGC access control on QSPI 1? 你好,@AdamH_work、 对不起,我的回复晚了。 另请查看第 65.1.6 节 QuadsPi_0 与网络安全寄存器之间的相互作用中的表格 [第 3349 页,S32Z2 参考手册,第 5 修订版,2025-01-28],第 121.2.1. 5 节 QuadsPi_0 数据 0(HSE_QSPI 0_DAT0)[第 6674 页]。在表的第一行中,它说明了如何配置可以访问MGC寄存器的主ID,具体取决于HSE_QSPI0_DAT0的值 。 请告诉我您是否解决了这个问题 Re: How do you disable MGC access control on QSPI 1? 我已经看到了这部分内容,但它似乎只涉及 QuadSPI 0,而我正试图在 QuadSPI 1 上实现这一点。 在此期间,我想出了如何对 MDAD 和 FRAD 寄存器进行编程,以允许所有访问通过,而且 SFAR 似乎在我启动 IP 命令时被填入,但现在它卡在忙状态,所以我可能不需要禁用 MGC 中的所有功能。 Re: How do you disable MGC access control on QSPI 1? 你好,@AdamH_work、 很抱歉造成您的困惑。现在,我的理解是,你们克服了最初的问题,对吗? 要检查发送 IP 命令的最佳流程,请查看示例项目MemAcc_Example_S32E2XX_R52,特别是请查看函数Qspi_Ip_StatusType Qspi_Ip_IpCommand(),以及静态 Qspi_Ip_StatusType Qspi_Ip_InitReset ()和Qspi_Ip_StatusType Qspi_Ip_RunCommand ()如何调用该函数。 如果您有更多问题,请告诉我。 Re: How do you disable MGC access control on QSPI 1? 在设置 MDAD/FRAD 和 LUT 编程后,我现在可以启动 IP 命令了。 作为闪存通信的第一步,我正在尝试在我的 S32E288-975EVB 评估板上读取美光 MT25QL256ABA8E12 的串行闪存发现参数。我已经在插槽 8 中设置了以下 LUT 序列: CMD PAD1 0x5A ADDR PAD1 24 DUMMY PAD1 8 读取 PAD1 16 停止 PAD1 0 似乎是启动了序列,但又陷入了无限繁忙状态。 SFAR 设置为 0x100000000(配置的起始地址),IPCR 设置为 0x08000008(插槽 8,8 字节)。我将 BUFXCR 寄存器设置所有大小均为 0,缓冲区 3 除外,我已经为所有主服务器设置了缓冲区 3(值 0x80004000)。星期五,我能够用示波器探测CS0/D0/D1引脚,我看到启动IP命令时CS处于钳位状态,但从未取消过钳位。命令和地址似乎已发送,随后是哑周期,然后 D1 进入活动状态,响应数据。 但是,它似乎从未完成读取,只是不停地将数据时钟输入,D1 上显示出重复模式,因为(我猜测)闪存芯片在其 SFDP 缓冲区中循环往复。 当我暂停执行时,我看到了这个: 我不知道是什么原因导致读取无法完成。 我阅读了数据手册中有关 QSPI 读取的部分,但没有找到任何可以解释这种行为的内容。 我尝试降低时钟(从比特时序来看,最初似乎在 100MHz 左右,但后来我在 CGM 中添加了一个 /10 分频器,它减慢了 D1 的比特模式,但没有改变繁忙的行为)。 Re: How do you disable MGC access control on QSPI 1? 你好,@AdamH_work、 根据我在内存数据表中看到的信息,SFDP (0x5A) 并非 "正常 "操作,它要求控制器故意停止通信流: 这也可以解释为什么读取的信息总是不完整。在我看来,QSPI 外围设备是正常工作的,至少它在通信,所以目前的问题可能是操作类型。您能否尝试更简单的操作?例如,您可以在我提到的示例中找到以下 LUT 序列、 MemCfg_0_SPI3ByteAddress_paInitOperations_0和 MemCfg_0_SPI3ByteAddress_paLutOperations_0在Qspi_Ip_Cfg.c 中、关于初始化操作,请查看 Qspi_Ip.c 中的 Qspi_Ip_InitOperation()。 如果您能执行另一项操作,并显示出不同的行为,请告诉我 谢谢! Re: How do you disable MGC access control on QSPI 1? 问题最终出在我没有正确设置 DLL 上。 我按照 S32DS 示例完成了 DLL 旁路模式初始化序列,并在我的代码中重新实现了它,现在它能正确完成读取操作。 下一个挑战是写入操作,但这个问题可以标记为已解决。
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Getting Started with FRDM-A-S32K312 Using Model-Based Design Toolbox (MBDT) Table of Contents 1. Introduction 2. Requirements 2.1 Software Required 2.2 Hardware Required 3. NXP Account Login 4. Installation 4.1 PEmicro Driver Installation 4.2 FreeMASTER Installation 4.3 MATLAB® Installation 4.4 MATLAB® Add-Ons Installation 4.5 MBDT for S32K3 v1.8.0 Installation 5. Running a Demo from the MBDT examples for S32K3 6. Running a Motor Control Demo using MBDT 1. Introduction This article aims to help new users prepare and install the necessary software and hardware to use the FRDM Automotive S32K312 with the latest  Model-Based Design Toolbox for S32K3 version 1.8.0. Note: These steps can also be followed with any NXP Evaluation Board from the supported list referenced in the toolbox documentation. S32K312MINI‑EVB Renamed to FRDM‑A‑S32K312: Now part of the FRDM Automotive Ecosystem under its new name, the board keeps the same hardware and adds full ecosystem compatibility for flexible, scalable development.     2.1 Software Required MATLAB® R2023b or later, with following Add-ons: AUTOSAR Blockset Embedded Coder Support Package for ARM Cortex-M Processors Motor Control Blockset NXP_Support_Package_S32K3 Stateflow NXP Model-Based Design Toolbox for S32K3 version 1.8.0 FreeMASTER Run-Time Debugging Tool PEmicro Hardware Interface Drivers   2.2 Hardware Required FRDM-A-S32K312 Development Board MCSPTE1AK344 Motor Control Kit, which includes: Sunrise motor  DEVKIT-MOTORGD  12V power supply USB Type-C cable   3. NXP Account Login Open Software Licensing: Support, make sure you are logged into your NXP Account, and select: Click on My NXP Account. Select Software Licensing and Support. Then click on View accounts: These steps will ensure that you are properly authenticated with your NXP Account before proceeding with step 4.5 MBDT for S32K3 v1.8.0 Installation. Keep the page opened for login to persist.   4. Installation Note: Before proceeding, make sure you have full access to your PC or Laptop. Some installers require local admin rights. Contact your IT department to assist you with installation. 4.1 PEmicro driver Installation After downloading  PEmicro Hardware Interface Drivers Open the installer package and select default Destination Folder: Click on Install and then wait to finish successfully. Connect the USB cable to your PC and the FRDM Automotive S32K312 board: Open Device Manager to check OpenSDA and the COM port number. OpenSDA - CDC Serial Port → note this COM port number Note: The COM port number may differ on your system.   4.2 FreeMASTER Installation Download the  FreeMASTER Run-Time Debugging Tool: Open the installer FMASTERSW32.exe Click Next, then select all available products: Use the default installation path: "C:\NXP\FreeMASTER 3.2" Wait for the installation to complete.   4.3 MATLAB® Installation First, check whether MATLAB® R2023b or later is already installed. If so, you can skip this section. For this tutorial, MATLAB® R2025b is downloaded from MathWorks®: Download the matlab_R2025b_Windows.exe (246 MB) file. A MathWorks® Account login is required. After signing in, select the installation directory, default is C:\Program Files\MATLAB\R2025b For minimum requirements, install the following Products: MATLAB® Simulink® AUTOSAR Blockset Embedded Coder MATLAB® Coder Motor Control Blockset Simulink® Coder Stateflow By default Select All is enabled during install: Wait for the installation to finish. After installation, open MATLAB® and change the default Add-ons path to a shorter path such as: "C:\MathWorks".   4.4 MATLAB® Add-Ons Installation Open Add-On Explorer and install: Embedded Coder Support Package for ARM Cortex-M Processors NXP Support Package for S32K3 (NXP_Support_Package_S32K3)   4.5 MBDT for S32K3 v1.8.0 Installation After installing the support package, run the following command in MATLAB®: sp_s32k3.nxp.setup(); Select version 1.8.0, the installer will check prerequisites: If any toolboxes are missing, install them before continuing. Click Download to proceed. The Download button opens the Software Terms and Conditions dialog; if the page is not properly loading, follow the steps in 3. NXP Account Login. After reading, click I Agree. Download the SW32_MBDT_S32K3_1.8.0_D2512.mltbx file (approx. 1.6GB): Once the download completes, browse the location of SW32_MBDT_S32K3_1.8.0_D2512.zip file: Click Install to proceed, and accept the license agreement. After a few minutes, the dialog will display: Installation successfully completed! Click Next. Select an option such as Open S32K3 Root Folder. MATLAB®’s current folder will change to the root of the toolbox. Click Finish to close the installer. The current folder in MATLAB® is now "C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3":   5. Running a Demo from the MBDT examples for S32K3 Navigate to:  "C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3\S32K3_Examples\demos\s32k3xx_uart_leds_s32ct" Open the model s32k3xx_uart_leds_s32ct.mdl. Click on Hardware Settings: Go to Hardware board Settings → Hardware → Select Configuration Project Template: For the FRDM-A-S32K312 select Custom: S32K312MINI-EVB S32 Config Tool A Warning Dialog will appear, click OK. Wait for the configuration update to complete. Click on Apply and close the Configuration Parameters window. Press Build, Deploy & Start (CTRL+B) in order to generate the code: After the build completes successfully, the executable is downloaded to the board. Open a terminal application and connect to the board's COM Port at 115200 Baud: Pressing r, g, or b on the keyboard toggles the corresponding RGB LED on the board.   6. Running a Motor Control Demo using MBDT Navigate to "C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3\S32K3_Examples\mc\PMSM" Open the folder s32k312_mc_pmsm_2sh_s32ct Open the model s32k312_mc_pmsm_2sh_s32ct.mdl: Press Build, Deploy & Start (CTRL+B) in order to generate the code. After the executable file is downloaded Disconnect the FRDM-A-S32K312 board from the PC. Insert the DEVKIT-MOTORGD on top of the FRDM-A-S32K312 ensuring proper pin alignment. Plug-in the 12V power supply to the DEVKIT-MOTORGD. Reconnect the USB Type-C cable to the FRDM-A-S32K312.    The RGB LED, User Buttons are on top side, Reset Button is on the left side, while the 12V power, Motor Phases and USB Type-C are on the right side.    Open FreeMASTER s32k312_mc_pmsm_2sh_s32ct.pmpx Press GO button to connect at 115200 baud. In the App Control Tab, press On and set Speed Required to 1000 RPM: Apply a small mechanical load to the motor (friction force to the motor shaft) and observe the iABC currents. Conclusion These steps conclude the Getting started with FRDM Automotive S32K312 using Model Based Design Toolbox guide. For more details, refer to: s32k312_mc_pmsm_2sh_s32ct_example_readme.html The corresponding example_readme.html for the selected model. Thank you for your time, Stefan V.
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FTF_Austin_FTF-ACC-F1276_2015.pptx This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings. This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings. General Re: FTF_Austin_FTF-ACC-F1276_2015.pptx Hi Andrew Robertson I wanted to check to see if you had your final file. I need to do one last review and then convert it to PDF to include it on the FTF App and public community page. Please help to upload this by selecting "Edit" under Actions as soon as possible. Thanks! Re: FTF_Austin_FTF-ACC-F1276_2015.pptx I have loaded the Marcom reviewed version to this link to help document the review cycle. Here are comments after the Marcom review: I have approved this presentation after making minor changes to punctuation. I have other concerns to highlight: Slide 4 says: FMCW operation is independent of the speed or direction of travel of the target high precision. Andrew, is “target high precision” correct? No Summary and Conclusion section exists in this presentation. Andrew, please add a summary/conclusion and upload the final version based on the attached. Hi Andrew Robertson Please take Brian and John's notes into consideration when finalizing your presentation. Please make sure to use the latest version when making any changes. Once you have finalized your presentation please upload the final file here by selecting "Edit" under Actions and click Publish at the bottom of the page no later than Monday, June 15th. Please help to select the Category "4. Final Version - Ready for PDF and Web" when this final version is posted so I know to pull your file for PDF conversion. Re: FTF_Austin_FTF-ACC-F1276_2015.pptx Adding Deactivated user since he will be helping review this file for Lisa Bradley Re: FTF_Austin_FTF-ACC-F1276_2015.pptx Hi andrewrobertson​ I am reviewing a bunch of FTF presentations.  A few comments on yours.... Are you intending to put something after your summary and conclusions?  Can you...   Your closing thoughts, perhaps some URL's like freescale.com/adas or similiar The abstract refers to BOM cost advantages but I don't really see that in the slides (maybe slide 27) but it's a very small reference.  Just wondering if you should call it out more since it was important enough to mention in the abstract. Renee Fortenberry Re: FTF_Austin_FTF-ACC-F1276_2015.pptx Hi Lisa, I just wanted to make sure you were tagged to this file. It is ready for your review. Please let Andy know when you will be pulling the file in case he has additional changes he would like to make before your review. Lisa Bradley Re: FTF_Austin_FTF-ACC-F1276_2015.pptx PPT expert has completed the presentation review. The latest version is posted and ready for Marcom review @Lisa Bradley
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QorIQ Layerscape LS2085/88マルチコア通信プロセッサ、ネットワーキングの未来を支援 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> EUF-NET-T1743 - QorIQ LS2085/88は、汎用性の高いLayerscape 2デバイスです。GPP レイヤーには、8 つの A57/A72 ARM® コアが含まれています。APPレイヤーには、AIOP、PME、DCE、およびSECエンジンが含まれています。WRPPレイヤーには、WRIOP、SATA、およびPCIeエンジンが含まれています。このプレゼンテーションでは、QorIQ LS2085/88プロセッサのさまざまなコンポーネントとターゲットの使用例の概要を説明します。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> EUF-NET-T1743 - QorIQ LS2085/88は、汎用性の高いLayerscape 2デバイスです。GPP レイヤーには、8 つの A57/A72 ARM® コアが含まれています。APPレイヤーには、AIOP、PME、DCE、およびSECエンジンが含まれています。WRPPレイヤーには、WRIOP、SATA、およびPCIeエンジンが含まれています。このプレゼンテーションでは、QorIQ LS2085/88プロセッサのさまざまなコンポーネントとターゲットの使用例の概要を説明します。
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PTN3460, PTN3460I FAQs Q1: Why DisplayPort to LVDS adapter? DPRX-LVDS is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion and transmits processed stream in LVDS format. NXP offers two eDP-LVDS devices: 1. PTN3460 is commercial grade, 0 – 70 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 25 MHz to 112 MHz. 2. PTN3460I is industrial grade, -40 – 85 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 6 MHz to 112 MHz. Q2. How to configure eDP-LVDS device?   The eDP-LVDS has embedded microcontroller and on-chip Non-Volatile Memory (NVM) to allow for flexibility in firmware updates. Both PTN3460 and PTN3460I have a built in configuration table in internal 1K SRAM, which allows users to program seven EDID and 128 configuration registers through M/S I2C-bus. Please follow the programming guides below for these devices. 1. AN11128 – Programming Guide for PTN3460 2. AN11606 – Programming Guide for PTN3460I Q3. What is maximum resolution DP-LVDS can support? The available bandwidth over a 2-lane HBR DisplayPort v1.4 link limits pixel clock rate support to: 1. 1-lane DP with single LVDS bus supports 800x600 @ 60 Hz display, 40 MHz pixel clock. 2. 1-lane DP with dual LVDS bus supports 1366x768 @ 60 Hz display, 85.5 MHz pixel clock. 3. 2-lane DP with single LVDS bus operation up to 112 mega pixel per second – supports 1440x900 @ 60 Hz resolution display. 4. 2-lane DP with dual LVDS bus operation up to 224 mega pixel per second – supports 1920x1200 @ 60 Hz resolution display. Q4. How to update the FW? FW for eDP-LVDS devices can be updated by the following methods: 1. Flash over AUX (FoA) – This is an executable window utility that can only run under Windows OS. FW is updated through DP AUX channel. AN11133 – PTN3460 FoA utility user’s guide. 2. Flash over DOS (FoD) – This is an executable DOS utility that can run under DOS without OS. FW is updated through M/S I2C bus. 3. Flash over I2C – FW is updated through external I2C device that is plugged in a M/S I2C header. Q5. How to check the FW version? FW version can be read out with DPCD utility that runs under Windows OS. Please follow DPCD Tool User Manual V1.0. Q6. How many DP lanes supported in NXP DP to LVDS bridge device? NXP DP to LVDS bridge device supports 2 lanes HBR/RBR. Q7. What does HBR/RBR mean? HBR means “High Bit Rate”, it runs 2.7 Gbit/s. RBR means “Reduced Bit Rate”, it runs 1.62 Gbit/s. Q8. What is DP AUX channel? DP AUX channel is used for communication channel between DP source and DP sink device. Q9. What is DP source device? DP source device is DP signal transmitter. Q10. What is DP sink device? DP sink device is DP signal receiver.
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KW43 Knowledge Hub The KW43 product family is a low-power, secure, single-chip wireless MCU that integrates a high performance, Bluetooth Low Energy, Bluetooth Channel Sounding, EdgeLock Secure Accelerators, and various MCU peripherals targeted for Automotive applications. The KW43 family utilizes an Arm® Cortex®-M33 core (Armv8-M architecture) running up to 96 MHz for customer applications. The family includes memory configurations of up to 1.5MB flash and 256 KB SRAM across all listed part numbers. All devices in the family integrate a state-of-the-art, scalable security architecture including Arm’s TrustZone®-M, a resource domain controller and an isolated EdgeLock Secure Accelerators supporting hardware cryptographic accelerators, random number generators and key generation, storage, and management along with secure debug. All members of the KW43 family are designed to be compliant to a SESIP Level 3 certification following the Arm PSA Level 3 profile. KW43 uses dual Arm Core Cortex-M33 (‘CM33’) and supports multiple interfaces and security features. One is for application and system use and other is for radio link layer and both cores share a common flash of 1.5 MB. The devices include a full certified Bluetooth LE 6.x controller stack with support for up to 10 simultaneous connections in any controller/peripheral combination. The multiprotocol radio subsystem integrated in the KW43 Family is energy efficient and is designed for Wi-Fi coexistence. The radio is supported with tested software stacks for Bluetooth Low Energy for standalone and hosted applications to enable a range of Automotive, IoT and industrial applications. There is also software and hardware support for 2.4 GHz proprietary protocols. To address ranging requirements, the Localization Engine (LCE) is integrated into the system for enhanced localization performance. The KW43 series is supported by the MCUXpresso Developer Experience to optimize, ease and help accelerate embedded system development. Early access program The KW43 is in pre-production, developers can get started today with the KW45/KW47, which is pin and software compatible.   you can request access contacting NXP sales team - Pascal Bernard (pascal.bernard@nxp.com) Join KW47 early access program here: KW43 Early Access Training Bluetooth Low energy 6.0 NXP Introduction Interested in Bluetooth technology? Bluetooth® Low Energy Primer – Essential reading for understanding BLE fundamentals. Bluetooth® Specifications – Full list of standards, protocols, and technical documents. Awards and Recognition - Every year, the Bluetooth Special Interest Group (SIG) celebrates the hard work and commitment of working groups, committee members, and contributors who have been recognized by their peers as making a difference in advancing Bluetooth technology.  2024: Channel Sounding 2025: Channel sounding amplitude-based attack resilience, LE test mode enhancements and Ranging profile and service.  Bluetooth Feature Overview Bluetooth_5.0_Feature_Overview  Bluetooth_5.1_Feature_Overview  Bluetooth_5.2_Feature_Overview Bluetooth_5.3_Feature_Overview Bluetooth_5.4_Feature_Overview Bluetooth_6_Feature_Overview Bluetooth_6.1_Feature_Overview Bluetooth_6.2_Feature_Overview Bluetooth_6.3_Feature_Overview RF Switch Comparison Absorptive/Reflective Standards Comparison ETSI / FCC / ARIB requirements BLE Channel Sounding  - Overview BLE Channel Sounding - RF Hardware BLE Channel Sounding - ANSYS Modeling Tools  BLE Channel Sounding - Antenna Prototypes Validation Measurements Equipment Wireless Equipment: This article provides the links to the Equipment that helps to the project development  Useful Links How to import and run demo examples with MCUXpresso for Visual Studio Code: This article gives information on how to import and run demo examples from the new SDK with ARM GCC toolchain, in MCUXpresso for Visual Studio Code. [MCUXSDK] How to use GitHub SDK for KW4x, MCXW7x, MCXW2x - NXP Community this community post provides step by step how to use GitHub SDK [MCUXSDK] GitHub SDK - Documentation for Bluetooth LE platforms - NXP Community this community post provides the documentation for BLE platforms.  How to use the HCI_bb on Kinetis family products and get access to the DTM mode:  This article is presenting two parts: How to flash the HCI_bb binary into the Kinetis product. Perform RF measurement using the R&S CMW270 BLE HCI Application to set transmitter/receiver test commands: This article provides the steps to show how user could send serial commands to the device. Bluetooth LE HCI Black Box Quick Start Guide: This article describes a simple process for enabling the user controls the radio through serial commands. Support If you have questions regarding KW45/KW47, please leave your question in our Wireless MCU Community! here  
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MCX A146VFT MCX A146VFT is not available for download on the official website. MCXA Re: MCX A146VFT Hello @jubilation The page I see when I click on it is not quite the same as yours, on my side I need to manually enter the model number and then click Request to apply, not in the form of a drop down option like in your screenshot. I've tried to submit the request and have received it now. I'll send it to you later via private case. BR Celeste Re: MCX A146VFT There is no download option for VFT packages on this page Re: MCX A146VFT Hello @Jubilee. Thank you for your post. package information for the MCXA146VFT can be found at SOT619-28: HVQFN48 | NXP Semiconductors. If I have misunderstood you and you are asking for other information, please let me know. Have a nice life. BR Celeste
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Imx95 verdin EVK、Aquantia10gbps 接口在 udp 上的速度限制为 1.2gbps 你好 我正在尝试通过两个 Imx95 verdin EVK A1 Silicon 版本板的 Aquantia 10 Gbps 接口在它们之间建立通信。两块板均运行 Debian 12(linux 内核 6.12.3),使用恩智浦安装程序(aquantia-firmware-utility/aq_api_2_9_7 at master 的 aquantia-firmware-utility/aq_api_2_9_7)正确安装了 aquantia10 G 固件(aqr-g4_v5.6.d-aqr_Marvell_noswap_xfi_id44834_ver2068.cld)aquantia-固件实用程序·GitHub)。它们使用 Cat6a 以太网电缆进行物理连接。 当我使用 iperf3 进行性能测试时,即使指定的目标带宽为 7 Gbps,我也能获得约 5 Gbps 的 TCP 带宽和 1.2 Gbps 的 UDP 带宽,损耗率为 0% : # TCP 在第一块板上测试 iperf3-s # iperf3-c < Server_IP >-t 30 # 在第二块板上测试 iperf3-s # # UDP 测试 iperf3 -s iperf3 -c -u -b 7G -t 30 当我尝试使用 ip link set dev enp1s0 mtu 9000 激活巨型帧时,却得到一个错误提示,说我超出了限制(10Gbps 接口不接受巨型帧,这很奇怪)。 我还尝试增加 UDP 缓冲区的大小,但得到的是相同的位帧 当我在两侧运行 iperf3 时,CPU 负载不超过 40% 为了达到最大吞吐量(接近 10 Gbps),是否需要应用特定的 n 配置或安装额外的工具?Aquantia FW 版本是否良好?Linux 内核版本?FW 安装程序版本? 有人尝试在该目标机上使用 10Gbps 接口吗? 此致, Abdelmonaem Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 您好, 感谢您的反馈, 应用您的配置: cpufreq-set -g performance sysctl -w net.core.rmem_max=26214400 sysctl -w net.core.wmem_max=26214400 sysctl -w net.core.netdev_max_backlog=250000 sysctl -w net.ipv4.tcp_rmem='409687380 16777216' sysctl -w net.ipv4.tcp_wmem='409665536 16777216' 现在,我在发射端仅使用 iperf 而不是 iperf3,就能达到 10Gbps 的速度,有时甚至能达到 8,8 或 9,8Gbps 的速度,而在接收端,我只能达到 5.59Gbps 的速度,丢失帧数为 36% ,您能帮助解决这个问题吗? Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 1.尝试在两个系统上配置以下设置: cpufreq-set -g performance sysctl -w net.core.rmem_max=26214400 sysctl -w net.core.wmem_max=26214400 sysctl -w net.core.netdev_max_backlog=250000 sysctl -w net.ipv4.tcp_rmem='409687380 16777216' sysctl -w net.ipv4.tcp_wmem='409665536 16777216' 2。如果可能的话,使用不同的参考系统作为 iperf 服务器(例如英特尔至强) 3. iperf3 本身对每个测试流都是单线程的,请尝试使用 -P 选项: ,例如iperf3 -c -u -b 10G -t 30 -P 6 (6 条流) 4.检查正向和反向液流 (-R) iperf3 -c 192.168.1.1 -t 10 -b 10G -u -R Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 它将是一个小版本升级到 6.12.49 顺便提一下,您可能还需要考虑 DPDK 或 AF_XDP,以获得更好的吞吐量? Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp => TCP 与 UDP 的发送性能对比 使用 iperf3 发送 TCP 数据包时,每个 TCP 数据包为 128KB,数据包将被 ENETC 硬件的 LSO 功能分片。因此,你会看到更高的 TCP 传输性能。 iperf3 在创建 UDP 套接字时没有启用 UDP_SEGMENT。因此: -每个 UDP 数据包的大小约为 MTU(约 1500 字节)。 - 在数据量相同的情况下,UDP 需要比 TCP 发送更多的数据包。 更多数据包→更多内核处理→与带 LSO 的 TCP 相比性能降低。 => 为什么 TCP 的接收比发送低很多? - 在 Linux 内核中,TX 和 RX 路径并不对称,因此内核中每个 RX 数据包和每个 TX 数据包的处理时间是不同的。 - RSC 在内核中默认未启用;我们需要禁用 TCP 时间戳,这样 ENETC 的 RSC 才能正常工作。目前,i.MX95 的 RSC 默认为禁用。 a) 启用 i.MX95 的 RSC(接收端): ethtool -K eth1 large-receive-offload on b) 禁用 TCP 时间戳(发送端): sysctl -w net.ipv4.tcp_timestamps=0 sysctl -p /etc/sysctl.conf 启用 RSC 后,接收端的 TCP 性能将会提高。 此外,您还可以尝试使用巨型帧来获得更高的吞吐量。(希望你运行的是最新版本)。 # 将两侧的 MTU 更改为 9000 ip link set dev eth1 mtu 9000 # 更改以太网驱动程序中的 RX 缓冲区长度。 ethtool -G eth1 rx-buf-len 16384 在多数据流模式下,我们可以看到 8 到 10 Gbps 的 UDP RX/TX。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 你好, ,我目前只对 UDP 感兴趣,对 TCP 不感兴趣,而且我认为卸载 机制不适用于 UDP ,我试图通过将 mtu 设置为 9000 来激活巨型帧,但我收到了一个错误,提示我超出了 1500 的限制(我使用的内核版本是 6.12.3)。 问候, Abdelmonaem Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 好吧,我试试看,然后告诉你我得到了什么, 你能精确地指出 LF-Q4 的 Linux 内核版本吗?正如我告诉你的那样,我现在使用的是 6.12.3,我不能升级到更高版本,因为我的硅片版本是 A1,我需要知道我是否必须升级到 B0 版本。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp RSC 设置还能提高 UDP 性能。 ENETC 中巨型帧的更改/修复将在两周后发布的 LF-Q4 版本中发布。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 使用 iperf 时,我的速度可以达到 10Gbps,有时甚至可以达到 9.8Bps;在并行数据流中,只有一个数据流的速度可以达到 5Gbps,但最大的问题是 Udp,在单个数据流中,我的速度可以达到 2Gbps,没有丢帧现象;但在并行数据流中,我的速度可以达到 5.5Gbps,丢帧率为 42% 。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 我不认为 AF_XDP 或 DPDK 有助于将 46% 的丢失减少到 0% ,我还验证了 IRQ 亲和性,我可以看到 10G 接口上有 6 个 IRQ,每个 IRQ 都影响到一个 CPU,而且在测试过程中我没有看到任何 CPU 负载问题,1 个 CPU 的最大 CPU 负载为 40% 、我仍然不明白为什么总是丢帧,也许是因为使用的内核版本不支持巨型帧, ,您是否在您的系统(NXP)中对 10G 接口进行了性能测试,我认为您应该在您的系统中进行测试,看看是否存在与我相同的问题。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp AF_XDP 或 DPDK 不使用内核网络协议栈。 DPDK 专门有一个不同的驱动程序,只能在用户空间工作。它针对网络和数据包处理进行了高度优化。 它可以为所有 IP 数据包提供真正的快速性能。 您可以登录 第 10 章:https://www.nxp.com/docs/en/reference-manual/RM00293.pdf Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 此测试是在哪个硅修订版 A1 还是 B0 上进行的? 您是否确认用于此测试 6.12.49 的内核版本仅适用于 B0 或者可能适用于 A1?? 我在你的电路板支持包交付中看不到这个内核版本,最后一个是 6.12.34 https://www.nxp.com/pages/alpha-beta-bsps-for-microprocessors:IMXPRERELEASES Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 新的内核树和变更可从以下网址获取: https://github.com/nxp-imx/linux-imx/commits/lf-6.12.49-2.2.0 较新的 LF 版本中已取消对 A1 的支持。 您有以下选项 1。只需独立编译内核,仅在版本中替换内核即可。(可能有效) 2。请您的营销联系人将您的板替换为 B0,这样您就可以发布 LF-Q4'2025 版本。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 我不明白这几行的意思: Single UDP Stream send (1500 MTU): 2 Gbps(在单数据流中,MTU 为 1500 的 tx 速率似乎为 2Gbps) Multi UDP Stream send (1500 MTU).10Gbps(在多数据流中,MTU 为 1500 的 tx 速率似乎为 10Gbps):10Gbps(在多数据流中使用 MTU 1500 发送时,速率为 10Gbps) 单 UDP 数据流发送(MTU 为 9000):8.2 Gbps(在单数据流中,使用 MTU 900 的 tx 速率为 8.2 Gbps) 接收单 UDP 数据流(MTU 为 9000):3.9 Gbps(在多数据流中,使用 MTU 1500 的 tx 速率为 10Gbps):3.9Gbps(在单数据流中使用 MTU 为 9000 的接收端,速度为 3.9Gbps) 多 UDP 数据流接收(MTU 为 9000):10Gbps(在多数据流中,使用 MTU 9000 的 Rx 速率为 2Gbps) 我没有看到: 单 UDP 数据流接收(1500 MTU) 多 UDP 数据流接收(1500 MTU) Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 好的,我明白了,但为了确保万无一失,您能否在接收端 MTU = 1500 的情况下进行测试,我想知道您在这个新版本上的测试结果是否与我相同,另外,我看到您在测试中将发送端设置为 1500,接收端设置为 9000,但这并没有改变任何情况,就好像您在两端都设置为 1500,如果您需要测试巨型帧,您需要在两端都设置为 9000,请使用以下配置重新进行测试: 1- RX/TX,MTU = 1500,两端均为单声道和多声道流 2- RX/TX,MTU = 9000,两端均为单声道和多声道流 谢谢您的帮助。 Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 是的,结果就是这样检验出来的。 所有情况下,双方的 MTU 都相同(都是 1500 或都是 9000) Re: Imx95 verdin EVK, Aquantia10gbps interface limited on 1.2gbps on udp 见附件、 请注意,我也是在 A1 SOC 上运行的。 UBOOT 日志:- U-Boot 2025.04-g8c1de2e1deca(May 09 2025 - 15:29:26 +0000) CPU:1800MHz 时的 i.MX95 rev1.1 CPU:30 摄氏度时的汽车温度等级(-40 摄氏度至 125 摄氏度) LM 启动原因:sw,起源:2,错误:1 LM 关机原因:sw,起源:2,错误:1 型号:恩智浦 i.MX95 19X19 板 动态随机存取存储器(DRAM):15.8GiB --- SM 日志 >$ info SM 版本 = 版本 633,Commit c37b26da SM Config = mx95evk,mSel=0 板 = i.MX95 EVK,attr=0x00000000 硅 = i.MX95 A1 启动模式 = 普通 引导设备 = MMC1 启动阶段 = primary 启动集 = 1 ECID = 0x6E5F04BA0000000500041D0899123F81 PMIC 0 (0x08) = 0x20,0x09,0x10,0x00,0x01 PMIC 1 (0x2A) = 0x54,0x22,0x00,0x0B PMIC 2 (0x29) = 0x55,0x22,0x00,0x0A 编译器 = gcc 14.2.1 20241119
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S32k358 获得燃烧 您好, 请说明在与 AFE 通信时导致 MCD 损坏或烧毁的原因。 Re: S32k358 Getting Burn 你好@arun464、 在与外部模拟前端 (AFE) 通信时,MCU(例如 S32K358)可能损坏或出现故障的潜在原因有以下几种: 电压等级不匹配 如果 AFE 使用的逻辑电平(如 5 V)与 MCU 使用的逻辑电平(通常为 3.3 V)不同,则直接连接而不进行适当的电平转换可能会导致 MCU 引脚电压过高。 电源顺序不正确 如果 AFE 比 MCU 先上电(反之亦然),信号线可能会浮动或驱动意外电压,从而导致闩锁或损坏。 接地问题 较差的接地基准或接地回路会在设备之间产生电压差,从而导致通信线路上的电流涌动。 ESD 或 EMI 事件 缺乏适当的 ESD 保护或屏蔽会导致瞬态电压损坏 MCU I/O。 短路或接线错误 不正确的引脚映射或装配过程中的意外短路会导致永久性损坏。 I/O 线路电流过大 相互驱动输出(总线争用)或不正确的上拉/下拉配置会给引脚带来压力。 为了帮助我们进一步分析,请您分享一下: MCU-AFE 接口示意图(包括电源轨和信号线)。 AFE 部件号和使用的通信协议(SPI、I²C 等)。 故障发生前的任何观察条件(如开机期间、负载情况下)。 这将使我们能够提供更具体的保护和设计改进建议。 顺祝商祺! 帕维尔
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HOB Quick Start Guide What is HOB? Hob is a graphical user interface for BitBake. Its primary goal is to enable a user to perform common tasks more easily. It basically runs the Bitbake commands on the background while showing a Graphic User Interface. Hob may not work correctly with Daisy metadata as it is getting deprecated in favor of a new web based interface for Yocto under the name Toaster. Here is what you can do with the current version of Hob on the Freescale Community BSP and BSP Release. - Build images - Edit existing image recipes - Create your own image recipes Note: HOB will write the local.conf file and make modifications which may conflict with baking images outside of HOB. In this case you may need to re-run the environment initialization in order to restore the local.conf file. Starting HOB Once the environment has been initialized (using the setup-environment script on the Freescale Community BSP or the fsl-setup-release on the Freescale BSP Release) use the command below. $ hob & The GUI should then appear: You may then select the MACHINE for which you will build and the Layers of your project. HOB  will take and updated the local.conf and bblayers.conf values so the desired BSP layers will already be selected and available MACHINES on these layers will appear on the drop down menu. Once these options are set HOB will parse the recipes and create a dependency tree in order to show available images for that MACHINE. Image File System Types Advance configuration options include image file system types. Please note that HOB does not support the sdcard format so if it is needed it has to be added manually on the local.conf file and then run bitbake outside of HOB. As HOB changed the local.conf file even if the sdcard format was originally available it may be rewrite and no longer available until the following line is added to local.conf. IMAGE_FSTYPES="tar.bz2 ext3 sdcard" Recipes screen On the recipes screen we can see the recipes included on the image and available recipes, then also package groups. Time to bake! After these configurations you may either build the packages using HOB interface or run Bitbake outside of HOB. (In case you wish to have your image on the sdcard format please see the earlier image types clarification) The resulting image will be stored on /tmp/deploy/images/ You may also save your image recipe with the selected customizations. Re: HOB Quick Start Guide Please submit any questions or issues related to this document as a discussion in the community.
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S32K358 HSE 固件不稳定 您好, 我们在安全启动配置方面遇到了问题。 1.将 BOOT_SEQ 设置为 1 后,0x400000 处的值为 1,FSR 正常报告 0x0B600000 2。安装 SMR 并 RESET 后,我附上了调试器和 BOOT_SEQ 返回 0 和 FSR 报告 0x00000000 这是异常 我执行脚本是为了进行 HSE 握手并 RESET 目标板 2/3 次,FSR 值为 0x0f600000 这很正常。 这意味着 HSE 仍然存在,并在工作,但不稳定 有什么原因吗? Re: S32K358 HSE firmware unstable 我发现在配置SMR之后,必须使用功能RESET而不是破坏性RESET。更改为功能 RESET 后,HSE 固件运行良好。 我们可以结束这个话题了。 https://community.nxp.com/t5/S32K/s32k3-hse-basic-secure-boot-protect-problem/m-p/1943667 Re: S32K358 HSE firmware unstable 感谢您对我的支持。 Re: S32K358 HSE firmware unstable 您能否与分配给您的恩智浦 FAE 讨论这个问题?或在此创建新票据: https://support.nxp.com/s/?language=en_US ......并将其转发给他们。谢谢。 Re: S32K358 HSE firmware unstable 您好, 我们的应用程序不会将 BOOT_SEQ 改为 0。 我们确实在多个板上进行了测试,但只有 1/2 个板出现了这个问题。 下面是 GPR 寄存器的值 GSR 值为 0 Re: S32K358 HSE firmware unstable 你好@HaiHoangSoftware 如果即使在 RESET 后大约 1 秒后,FSR 寄存器仍保持 0x00000000,则表示 HSE 固件根本没有启动。在 GSR 注册表中可以看到什么?是否设置了第 0 位?在 HSE GPR 寄存器 0x4039_C028 中可以看到什么? HSE FW 或 SBAF 不应该这样做。你的申请不是改变了这一点吗? 问候, Lukas
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AMMCLIB COS_FLT wave fault Hi,  I've encountered a very strange problem. When using the Simulink model of the AMMCLIB library, the output of the floating-point cosine function has spikes. Why is this? I can use the sin function and the cos function in the Simulink standard library normally.I hope to get your help. matlab version : 2025a AMMCLIB version: 1.1.22 回复: AMMCLIB COS_FLT wave fault The input can be -pi ~pi ,I think.
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i.MX RT1170 DVFS Demo Dynamic voltage and frequency scaling (DVFS) is a power management technique that allows dynamically reducing power consumption of a CPU by dynamically scaling down supply voltage and CPU frequency. Because the internal DCDC of the i.MX RT1170 cannot cover the needed maximum current requirement at the junction temperature of 125 °C, the DVFS technique can be used to reduce current drain for compatibility with the internal DCDC. Lowering the processor frequency dynamically can help reduce the chip input current demand and ensure that the chip can continue to work at the junction temperature of 125 °C. The demo is attached. Only IAR and armgcc versions are enabled. The corresponding Application Note can be downloaded in the below link. https://www.nxp.com/docs/en/application-note/AN13267.pdf
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i.MX8M plus、チャネル B のシングル チャネル DDR i.MX8M plus でチャネル B にのみ接続されたシングル チャネル LPDDR4 16 ビットを使用することは可能ですか? A が B にコネクテッドされ、B が A にコネクテッドされているデザインがありますが、単一チャネルの LPDDR4 に交換した場合、このデザインは機能しますか? i.MX 8M | i.MX 8M ミニ | i.MX 8M ナノ Re: i.MX8M plus, single channel ddr on channel B こんにちは@johan_carlsson 、 NXP サポートにお問い合わせいただきありがとうございます。 iMX8MP ハードウェア設計ガイド、iMX8MP データシート、および iMX8MP リファレンス・マニュアルに基づいています。 いいえ。NXP は、i.MX 8M Plus のチャネル B にのみ接続されたシングルチャネル LPDDR4 (16 ビット) 設計を文書化も検証もしていません。ドキュメントおよびリファレンス デザインで想定されている単一チャネル構成は、チャネル A にあります。 A <-> B が交差するデザイン (A が B に配線され、B が A に配線される) はサポートされていません。 よろしくお願いいたします。 チャビラ Re: i.MX8M plus, single channel ddr on channel B こんにちは、チャビラさん。これについては確かですか? TRMはこう言っています、 SO、DqLnSel レジスタを変更すると (バイト レーン / スライスごとに) A から B に変更できるようになるのではないでしょうか。 Re: i.MX8M plus, single channel ddr on channel B こんにちは@dav1さん、 ここでいくつかの誤解に気づきました。 リファレンスマニュアルによると: 「1 バイト内で PHY dq から DRAM dq へのマッピング (スウィズル) をサポートします… dbyte ごとに… DqLnSel のバイト セット内の各レジスタには一意の値が必要です…」 つまり、PHY を使用すると、単一の 8 ビット スライス (dbyte) 内でボード レベルのビット間のスクランブルを元に戻すことができるということです。たとえば、PHY レーン 3 が同じ dbyte 内の DRAM DQ0 にルーティングする場合、その dbyte に対して Dq0LnSel = 3 を設定します。これにより、スウィズルが論理的に元に戻された後、MRR バイナリ カウンターなどが正しい値を返すようになります。 Re: i.MX8M plus, single channel ddr on channel B こんにちは@dav1 、 現時点では、この構成は検証されておらず、可能になるとは予想されていません。 テストを試みることはできますが、これは RAM PHY の目的の機能の範囲外であるため、信頼性の高い動作は期待できないことに注意してください。 よろしくお願いします、 チャビラ Re: i.MX8M plus, single channel ddr on channel B この回避策を実行することは可能でしょうか - DDRを2チャネルとして設定する - AとBにまたがってインターリーブしないように設定する - Bセクションのみを有効として定義する Re: i.MX8M plus, single channel ddr on channel B 私の回答に何か誤りがありましたら、ご指摘ください。もし、何も問題がなく、この投稿が前回と同様に再度削除されたら、これを Facebook に投稿します。 しかし、RPA ツールがなぜスワップを実行できるのかを示します。 MX8M_Plus_LPDDR4_RPA_v10.xlsx https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8MPlus-m865S-DDR-レジスタ-プログラミング-エイド-RPA/ta-p/1235352 Re: i.MX8M plus, single channel ddr on channel B 試してみましたか?         Re: i.MX8M plus, single channel ddr on channel B @dav1スワップの問題が発生すると、テーブルが赤くなり、警告が表示されます。ただし、チャネル A とチャネル B が入れ替わると、この RPA ツールは緑色のまま表示され、対応するレジスタも変更されます。 したがって、可能性は 2 つしかありません。 RPA ツールが間違っています。 リファレンスマニュアルが間違っています。 2 つのうち 1 つは真実である必要があります。これは、 @Chaviraが明確に/回答する必要があることです。
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Probes Not Found Error when attempting to connect to FRDM46lz board Probes not found error M4 Pro Macbook Sequoia 15.6 while attempting to connect to FRDM46lz board in MCUXpresso. Fellow students with Macs have not encountered this issue. Have been working hard with university staff but not found a solution. Have already attempted plugging into difference ports, restarting device, changing privacy settings, creating a new project, and uninstalling and reinstalling MCUXpresso, among other things. Help would be greatly appreciated, thank you! Re: Probes Not Found Error when attempting to connect to FRDM46lz board Hello @ottofhalb , Thanks for your post. Please open Device Manager and check whether the serial port has been successfully enumerated. In addition, have you ever tried to update the OpenSDA? OpenSDA Serial and Debug Adapter | NXP Semiconductors You may refer to attached "Updating the OpenSDA Firmware.pdf". Hope it helps. BR Celeste
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s32k3 eMIOS IMPモード こんにちは、 現在、s32k3 マイクロの eMIOS IPM モードを使用して入力信号周波数を読み取ろうとしています。ステータス レジスタが測定値をキャプチャしたことを通知するまで待機した後、最初に A レジスタを読み取り、次に B レジスタを読み取り、両方のケース (通常のケースとオーバーフローのケース) の周期計算を実行します。ただし、計算では信号の周期ではなく、「High 時間」または「Low 時間」のいずれかが得られます。IPM モードでは、周期ではなく、高/低デューティ サイクルが提供されるようです。これを理解するための考えはありますか?制御レジスタが正しいモードを使用していることを確認しました。 よろしくお願いします。 Re: s32k3 eMIOS IMP Mode @VaneBこんにちは、 私も同様の問題に直面しています。周波数を測定するために EMIOS をどのように構成すればよいかなどの構成を共有していただけますか。 Re: s32k3 eMIOS IMP Mode こんにちは@jfranklin 可能であれば、設定を共有していただけますか? Re: s32k3 eMIOS IMP Mode こんにちは。これは当社独自のソフトウェアです。私たちの目標は、提供されている GUI を使用しないことです。基本的には、周波数入力の周期を読み取ろうとしているだけです。IPM モードでは立ち上がりエッジのみ、または立ち下がりエッジのみで更新されるはずですが、立ち上がりと立ち下がりの両方で更新されているようです。 Re: s32k3 eMIOS IMP Mode こんにちは@jfranklin RTD コントローラまたはカスタム ソフトウェアを使用していますか?あなたのアプリケーションについてさらに詳しい情報を教えていただけますか? BR、ヴェインB
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MathWorks: Complimentary software and hardware support Hello Freescale Cup Teams,   MathWorks is pleased to support the 2015 Freescale Cup EMEA Competition! Take advantage of our: Complimentary Access to MATLAB & Simulink Your team is eligible for an offer of Complimentary Software Licenses. Your team leader or faculty advisor should review and complete the Student Competition Software Request Form http://www.mathworks.com/academia/student-competitions/software/Freescale_Cup_Offer%20of%20Complimentary%20Software%20License(s).pdf to take advantage of our software offer.   Deploy your Simulink models directly to the Freedom board and shield MathWorks is offering hardware support for the Freescale Cup hardware (FRDM-KL25Z, FRDM-MC-SHLD).  Find all relevant information on http://www.mathworks.com/hardware-support/frdm-kl25z.html and install your the package without additional fees. For more information visit the hardware support page http://www.mathworks.de/hardware-support/ and the MakerZone http://makerzone.mathworks.com/ .   Interactive tutorials There are a total of five tutorials, narrated by specialists from MathWorks that include interactive exercises to reinforce learning on our dedicated webpage: http://www.mathworks.de/academia/student-competitions/freescale-cup/ .   Technical support Send an email to freescalecup@mathworks.com .   We are looking forward to working with you and wish you all the best.    Best regards, The MathWorks Student Competition Program  
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S32DS v3.6.6 S32K5 development package missing pins in package view for S32K566_437BGA In the S32DS Configuration Tool for the Pins, the S32K566_437BGA view is missing a number of pins in the package view. Is this my installation or a general issue?  Is there a plan to fix that? Re: S32DS v3.6.6 S32K5 development package missing pins in package view for S32K566_437BGA Hello @DirkEtzler , I hope this email finds you well. I am writing to you in regard to a product currently in your possession – an NPI (New Product Introduction) which has not been officially launched yet. Please be advised that customers who have been granted early access to such products have assigned their field engineers. Your designated field engineer should serve as your primary support channel for any issues, concerns or queries you may have about this product. Our online support team will be opening a wider range of support for this product once it has been officially released. Until then, they will not be equipped to provide the desired assistance. We appreciate your understanding in this matter and look forward to further enhance our partnership with you. Should you have any questions, please feel free to connect with your field engineer, or contact my team and me directly. Thank you for your understanding. Best regards, Pavel
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