如何将 i.MX93 Cortex-M33 板和 SDK 导入 MCUXpresso IDE？ 📌 背景： 我想开始使用 MCUXpresso IDE 在 i.MX93 Cortex-M33 (MCIMX93-EVK) 板上进行开发。我已经从恩智浦网站下载了SDK ZIP，但我无法成功导入板或使用其示例。 🛠️ 我做了什么？ 从 mcuxpresso.nxp.com 下载 SDK ZIP： SDK_25_03_00_MCIMX93-EVK.zip 已打开MCUXpresso 集成开发环境（版本：请在此注明） 去了 已安装的 SDK> Import → 选择 ZIP 文件 SDK 出现在集成开发环境的已安装 SDK 下。 但是，当我进入 “导入SDK示例” 时，没有任何显示，或者我无法创建导入的项目的版本。 ❓ 我的问题： 将 i.MX93 Cortex-M33 板和 SDK 导入 MCUXpresso IDE 的正确和完整程序是什么，这样我就可以： 查看支持的板 访问演示/示例应用程序（如 hello_world） 无错误地版本和调试项目 🔍 其他说明： 我的目标是 i.MX93 的Cortex-M33 内核 我只想使用MCUXpresso 集成开发环境（而不是 IAR 或 VS Code）。 🧪 预期成果： 能够使用 MCUXpresso IDE 在 MCIMX93-EVK 板上导入和版本 cm33_core0 的 hello_world 或 led_blinky 等示例项目。 如果需要其他工具或配置，请告诉我。预先表示感谢！ i.MX93EVK#i.mx93 cortex-m33i.MX93#MCUXpressoIDE ##MCUXpressoSDK Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 你好@Manjunathb 我目前也在使用i.MX93 Cortex-M33。我安装了 MCUXpresso 集成开发环境，但在将 SDK 压缩文件下放到已安装的 SDK 视图时遇到了错误（根据指南）。 了解到您也在研究相同的 M33 核心，您是否介意与我们分享任何信息以及您目前的进展情况？我还应该为 VS 代码使用 MCUXpresso 吗？ 如果您能分享一些关于如何开始 M33 开发的指南或程序，我将不胜感激。谢谢。 Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 你好 Chavira， 我目前正在使用 i.MX93 Cortex-M33 内核，我知道这款设备不支持 MCUXpresso IDE，但推荐使用适用于 VS Code 的 MCUXpresso IDE。 我已经安装了：适用于 VS Code 扩展 的 mcuxPresso i.MX93 SDK 包 ARM GCC 工具链 而且我正在使用 J-Link 调试器。 请就以下几点为我提供指导： 如何将 i.MX93 Cortex-M33 SDK 正确导入 VS 代码？SDK 文件应放在哪里，扩展程序如何检测它们？ 如何创建或打开 Cortex-M33 演示或模板项目（如 hello_world 或 led_blinky）？ 如何配置版本设置（编译器、链接器路径等），以便使用 MCUXpresso VS Code 环境成功编译？ 使用 J-Link 探头或 remoteproc（如果使用 Linux）闪存和调试已编译应用程序的正确方法是什么？ 在使用 MCUXpresso for VS Code 时，是否有 i.MX93 特有的已知限制或额外步骤？ 如果能提供完整的分步说明或相关文档链接，我将不胜感激。预先感谢您的支持！ 最崇高的敬意， Manjunath Badiger Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 好的 👍 感谢您的回复 Re: How to Import i.MX93 Cortex-M33 Board and SDK into MCUXpresso IDE? 嗨，@Manjunathb！ 感谢您联系恩智浦支持中心！ 遗憾的是，MCUXpresso IDE 与这种情况不兼容。不过，您也可以使用 MCUXpresso for VS Code，它支持并提供类似的功能。 致以最崇高的敬意， Chavira

使用 J-Link 与 MIMXRT1170-EVKB 注意：有关类似的 EVK，请参阅： 使用 J-Link 与 MIMXRT1060-EVKB 或 MIMXRT1040-EVK 使用 J-Link 与 MIMXRT1060-EVK 或 MIMXRT1064-EVK 使用 J-Link 与 MIMXRT1160-EVK 或 MIMXRT1170-EVK 本文介绍了在该 EVK 上使用 J-Link 调试探针的详细方法。有两种方式：将板载 MCU-Link 调试探针更新为 Segger J-Link 固件，或将外部 J-Link 调试探针连接到 EVK。使用板载调试电路可免去对额外调试探针的需求。本文将详细介绍上述任一 J-Link 方式的使用步骤。 MIMXRT1170-EVKB jumper locationsMIMXRT1170-EVKB 跳线位置 使用外部 J-Link 调试探针 Segger 提供多种J-Link 探针选项。要使用这些探针配合这些 EVK，请按以下配置设置 EVK： 在JP5上安装一个跳线，以断开 SWD 信号与板载调试电路的连接。默认情况下，此跳线处于断开状态。 为EVK供电：默认选项是将电源连接到桶形插孔J43，并将电源开关SW5设置为开启位置 (3-6)。当EVK正常供电时，SW5旁边的绿色LED D16将会亮起。 将 J-Link 探头连接到 J1，20 针双排 0.1 英寸排针。 使用板载 MCU-Link 搭配 J-Link 固件 安装 MCU-Link 安装程序以获取驱动程序和固件更新工具 断开 EVK 上的所有 USB 连接线 为EVK供电：默认选项是将电源连接到桶形插孔J43，并将电源开关SW5设置为开启位置 (3-6)。当EVK正常供电时，SW5旁边的绿色LED D16将会亮起。 在 JP3 处安装跳线以强制 MCU-Link 进入 ISP 模式 将 USB 电缆连接到 J86，连接到 MCU-Link 调试器 转到 MCU-Link 软件包安装中的脚本目录，并双击运行 program_JLINK.cmd (Windows) 或 program_JLINK (Linux/MacOS) 脚本。按照屏幕上的说明操作。在 Windows 中，此脚本通常安装在 C:\nxp\MCU-LINK_installer_3.122\scripts\program_JLINK.cmd。 拔下 J86 处的 USB 线缆 移除 JP3 处的跳线 将 USB 线缆重新连接到 J86。现在，MCU-Link 调试器应以 J-Link 模式启动。 移除跳线 JP5，以连接来自 MCU-Link 调试器的 SWD 信号。默认情况下，此跳线处于断开状态。

PTN3460, PTN3460I FAQs Q1: Why DisplayPort to LVDS adapter? DPRX-LVDS is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion and transmits processed stream in LVDS format. NXP offers two eDP-LVDS devices: 1. PTN3460 is commercial grade, 0 – 70 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 25 MHz to 112 MHz. 2. PTN3460I is industrial grade, -40 – 85 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 6 MHz to 112 MHz. Q2. How to configure eDP-LVDS device?   The eDP-LVDS has embedded microcontroller and on-chip Non-Volatile Memory (NVM) to allow for flexibility in firmware updates. Both PTN3460 and PTN3460I have a built in configuration table in internal 1K SRAM, which allows users to program seven EDID and 128 configuration registers through M/S I2C-bus. Please follow the programming guides below for these devices. 1. AN11128 – Programming Guide for PTN3460 2. AN11606 – Programming Guide for PTN3460I Q3. What is maximum resolution DP-LVDS can support? The available bandwidth over a 2-lane HBR DisplayPort v1.4 link limits pixel clock rate support to: 1. 1-lane DP with single LVDS bus supports 800x600 @ 60 Hz display, 40 MHz pixel clock. 2. 1-lane DP with dual LVDS bus supports 1366x768 @ 60 Hz display, 85.5 MHz pixel clock. 3. 2-lane DP with single LVDS bus operation up to 112 mega pixel per second – supports 1440x900 @ 60 Hz resolution display. 4. 2-lane DP with dual LVDS bus operation up to 224 mega pixel per second – supports 1920x1200 @ 60 Hz resolution display. Q4. How to update the FW? FW for eDP-LVDS devices can be updated by the following methods: 1. Flash over AUX (FoA) – This is an executable window utility that can only run under Windows OS. FW is updated through DP AUX channel. AN11133 – PTN3460 FoA utility user’s guide. 2. Flash over DOS (FoD) – This is an executable DOS utility that can run under DOS without OS. FW is updated through M/S I2C bus. 3. Flash over I2C – FW is updated through external I2C device that is plugged in a M/S I2C header. Q5. How to check the FW version? FW version can be read out with DPCD utility that runs under Windows OS. Please follow DPCD Tool User Manual V1.0. Q6. How many DP lanes supported in NXP DP to LVDS bridge device? NXP DP to LVDS bridge device supports 2 lanes HBR/RBR. Q7. What does HBR/RBR mean? HBR means “High Bit Rate”, it runs 2.7 Gbit/s. RBR means “Reduced Bit Rate”, it runs 1.62 Gbit/s. Q8. What is DP AUX channel? DP AUX channel is used for communication channel between DP source and DP sink device. Q9. What is DP source device? DP source device is DP signal transmitter. Q10. What is DP sink device? DP sink device is DP signal receiver.

OV5640 Interfacing with i.MX RT1170 (Without Display) Image Capture and Streaming to Desktop Hello, I am using the i.MX RT1170-EVKB board, and my goal is to capture images from the OV5640 camera and view either the captured image or a live video stream on my desktop PC without using an LCD display. I have tried the MIPI CSI SDK examples and was able to capture image data in RAW format. However, I am facing several issues. The captured output is in RAW format, and I could not find any documentation explaining how to properly convert or view these images. The captured images appear to have incorrect colors or filter-like artifacts, making it difficult to verify whether the camera output is correct. I could not find any official documentation, application notes, or video tutorials describing the complete workflow for capturing images from the OV5640 and viewing them on a desktop PC. There is no clear reference explaining how to stream the camera output over Ethernet or USB without using the onboard display. I also tried the sd_jpeg example, but I encountered multiple problems. During integration, the project reported missing JPEG library configuration files such as jconfig.h. After resolving some build issues, I continued to encounter compilation and integration errors while combining the JPEG encoder with the MIPI CSI camera example. I was unable to generate a valid JPEG image from the captured camera frame. My objective is to: Interface the OV5640 camera with the i.MX RT1170-EVKB board without using an LCD display. Capture images and transfer them to my desktop PC for viewing. Stream live video from the camera to my desktop PC over Ethernet, if supported. I would appreciate your guidance on the following questions: Is there an official SDK example or reference project for this use case? Is there any documentation explaining the complete image capture pipeline from the OV5640 through MIPI CSI, memory, JPEG or RAW processing, and Ethernet or USB transfer to a desktop PC? Is live streaming over Ethernet supported on the RT1170-EVKB? If yes, could you recommend the appropriate SDK example or middleware? Are there any known issues with the sd jpeg example or any additional configuration steps required to integrate it with the MIPI CSI camera examples? Any guidance, documentation, or reference projects would be greatly appreciated. Thank you for your support. Re: OV5640 Interfacing with i.MX RT1170 (Without Display) Image Capture and Streaming to Desktop HI @Sureshk123, We don't have an official example project or reference design for your application. That said, from my understanding, I would recommend you tackle the complete application as follows: Camera capture path (OV5640 > MIPI CSI > cameraBuffer) This part we do have an example application, which are the aforementioned MIPI CSI SDK examples. Keep in mind that, as per ERR051248: "Video Mux Controller (VIDEO_MUX), raw data and YUV422 (10 bit) formats to the MIPI_CSI2 block are not supported." Using the parallel CSI is an optional workaround, either that or a video decoder. Once you have the adequate data on your cameraBuffer, you can integrate example projects from our SDK based on USB or lwIP to transport this data to your PC. I would recommend looking into JPEG encoding only after the buffer is known to work. BR, Edwin.

Building AI/ML Devices at the Edge? Start with FRDM From smart sensing and anomaly detection to computer vision, voice recognition, and multimodal GenAI—AI/ML use cases are rapidly moving onto the device. But if you're an engineer getting started, the real questions usually are: What hardware products should I use? What NXP tools actually work for embedded AI applications? Do I need the cloud for anything? Let’s break it down ! Why Edge AI is important? Running AI models directly on-device enables: Real-time decisions (low latency) Better security Offline operation (no cloud dependency) Optimized power consumption That’s exactly where the FRDM development platform comes in Quick Positioning: From MCU to Edge AI Processor Category Boards AI Capability Level Typical Use Case MCU (Low Power Edge ML) FRDM-MCXA156 + ⭐ sensor AI, TinyML MCU + Neural Acceleration FRDM-MCXN947 ++ ⭐⭐ Edge AI with vision/audio, TinyML Application Processor (Entry Edge AI) FRDM-IMX93 +++ ⭐⭐⭐ HMI + AI inference High-Performance Edge AI FRDM-IMX8MPLUS ++++ ⭐⭐⭐⭐ Vision AI, Advanced HMI Next-Gen AI + Safety FRDM-IMX95 / PRO +++++ ⭐⭐⭐⭐⭐ Gen AI, Advanced Edge Computing AI/ML applications can run on general-purpose hardware, but leveraging dedicated hardware acceleration significantly improves performance, enables faster results, and reduces power consumption. Below is a reference list of FRDM development boards that support AI/ML applications, helping you choose the right platform based on your target use case   Board Positioning AI Acceleration Hardware Capabilities (AI-relevant) Best For FRDM-MCXA156 Entry-level MCU (TinyML)  No NPU (CPU-only) Sensors via Expansion headers (Arduino, MikroBUS, Pmod) Parallel display support Sensor ML Anomaly detection Basic TinyML FRDM-MCXN947 MCU with neural acceleration NPU Parallel camera interface (basic) Parallel display Audio (PDM/I2S) Voice AI  Low-res vision Object classification Anomaly Detection FRDM-IMX93 Entry Edge AI MPU NPU  MIPI CSI camera Display (MIPI DSI/LVDS) Audio + connectivity Smart HMI Light vision AI Edge gateways FRDM-IMX8MPLUS Advanced Multimedia + Edge AI platform NPU Multi-camera (MIPI CSI) High-res display (HDMI/DSI)  Audio DSP Connectivity (Wi-Fi, BLE, Ethernet) Some PCIe expansion Computer vision Object detection Industrial AI FRDM-IMX95 Next-gen AI + real-time MPU Next-gen NPU + heterogeneous compute Multi-camera pipelines Advanced HMI Industrial connectivity M.2 expansion(Up to 1 AI accelerators) Robotics Industrial AI Safety applications FRDM-IMX95-PRO Full-featured AI dev platform High-performance NPU + scalable AI (Ara240 Discrete NPU)  Multi-camera Advanced display M.2 expansion (Up to 2 AI accelerators) Advanced AI prototyping Gen AI Edge servers Edge computing  Software and tools for ML/AI applications   GoPoint GoPoint accelerates AI/ML evaluation on FRDM platforms powered by i.MX application processors by providing a ready-to-use, graphical environment with pre-integrated demos. Developers can quickly run applications such as image classification, object detection, and voice recognition directly on the hardware without complex setup. These demos are already optimized for available compute resources—including CPU, GPU, DSP, and NPU—allowing users to immediately visualize performance and understand how AI workloads map to the system. This makes GoPoint an ideal starting point for exploring edge AI capabilities and validating use cases before moving into full application development. Application Code Hub (ACH) Application Code Hub complements rapid evaluation tools by offering a centralized repository of reusable, production-oriented software examples for FRDM boards. It provides full application projects, source code, and documentation that developers can directly import into MCUXpresso IDE or VS Code. With filtering based on use case—such as vision AI, audio processing, or anomaly detection, ACH enables developers to quickly find and customize reference implementations. This helps bridge the gap between proof-of-concept and real product development, significantly reducing development time while enabling scalable AI/ML application design. Application Code Hub Guide eIQ Time Series Studio (TSS) eIQ Time Series Studio is purpose-built for developing AI models based on sensor and time-series data, making it highly relevant for FRDM-based edge intelligence applications. It provides a guided workflow for data collection, labeling, model training, and validation, all optimized for MCU-class devices. Developers can easily transform raw sensor data—such as vibration, motion, or environmental signals—into deployable machine learning models for use cases like predictive maintenance, anomaly detection, and condition monitoring. With built-in analytics and seamless deployment to FRDM boards, TSS simplifies the path from data to intelligent behavior on the edge. eIQ AI/ML Software Environment The eIQ software environment is the foundation that enables AI/ML development across the entire FRDM ecosystem, providing an end-to-end workflow from model creation to on-device inference. It supports importing and optimizing models from popular frameworks such as TensorFlow, PyTorch, and ONNX, and integrates tightly with MCUXpresso and Linux-based environments. eIQ includes tools for model optimization—such as quantization and pruning—as well as runtime engines designed for efficient execution on CPUs, DSPs, and NPUs. By combining these capabilities with hardware acceleration available on FRDM boards, eIQ allows developers to build, deploy, and run real-time AI applications directly on embedded devices with minimal reliance on cloud computing. eIQ Training Curriculum FQA What is an NPU ? A Neural Processing Unit (NPU) in the FRDM platform is a dedicated hardware accelerator integrated into certain microcontrollers (such as the MCX-N family) that is specifically designed to execute machine learning and neural network workloads efficiently. Unlike general-purpose CPUs, the NPU is optimized for the mathematical operations used in AI models, enabling significantly faster inference—up to tens of times higher throughput—while consuming less power. In FRDM boards, the NPU works alongside the CPU and DSP to offload complex AI computations, allowing real-time processing for applications such as image recognition, voice detection, and sensor-based anomaly detection directly on the device. Combined with NXP’s eIQ® software environment, the NPU becomes the core execution engine that transforms FRDM platforms into efficient, low-power edge AI systems capable of running intelligent applications without relying on the cloud What is a Discrete NPU? A Discrete Neural Processing Unit (DNPU) is a standalone AI accelerator designed specifically to execute machine learning and neural network workloads efficiently. Unlike integrated NPUs that are built into a processor, a DNPU exists as a separate chip or module that can be added to a system. It offloads compute-intensive AI operations, such as matrix multiplications and deep learning inference from the main CPU or GPU, delivering significantly higher performance and better energy efficiency. This makes DNPUs ideal for advanced edge AI applications like computer vision, generative AI, and real-time multimodal processing. How do I use Ara modules (DNPU) with FRDM boards? Ara modules, based on NXP’s DNPU technology, can be used with compatible FRDM boards to extend AI processing capabilities. On supported i.MX-based FRDM platforms such as FRDM-IMX95 or FRDM-IMX95-PRO—developers can connect Ara modules (e.g., Ara240) through the M.2 expansion interface. Once connected, the Ara module works alongside the main processor to offload complex AI workloads, enabling faster inference, lower latency, and improved power efficiency. Using the eIQ® AI software environment, developers can prototype and validate models on FRDM, then scale performance by enabling Ara acceleration, creating a seamless path from development to high-performance edge AI deployment. From TinyML to advanced edge AI and GenAI, discover how to build intelligent systems directly on-device with FRDM, no cloud dependency required. FRDM-IMX8 FRDM-IMX8MP FRDM-IMX9 FRDM-MCXN i.MX Application Processors MCU

VLM Edge Studio VLM Edge Studio In this post, I want to share a quick walkthrough of VLM Edge Studio, an NXP launcher application designed to interact with supported Vision-Language Models running locally on FRDM i.MX platforms with Ara240 DNPU acceleration. VLM Edge Studio provides a Qt/QML-based GUI for model selection, prompt input, and visual interaction with locally running VLMs at the edge. It communicates with the Ara240 Runtime SDK through the eIQ AAF Connector using a REST-based interface and streaming token responses.   Key Features Local Vision-Language Model inference on supported i.MX platforms Ara240 DNPU acceleration GUI-based model selection and prompt input Streaming token output Integration with eIQ AAF Connector and Ara240 Runtime SDK Support for camera-based visual input using a USB-C HD camera   Supported Model Qwen2.5-VL-7B-Instruct-Ara240 This model is provided as an Ara240-compatible model.dvm file and is intended for local execution on the target platform.   Basic Installation After making sure the Ara240 Runtime SDK is installed on the target board, copy the Debian package: scp vlm-edge-studio.deb root@ : Install it with: dpkg -i vlm-edge-studio.deb The installation may take a few minutes because the model needs to be extracted during setup.   Running VLM Edge Studio Start the application with: run_vlm_edge_studio Before launching, make sure the Ara240 runtime service is running: systemctl status rt-sdk-ara2.service --no-pager -l Once the GUI appears, click LOAD to load the model. After the model is ready, enter a prompt and submit it to interact with the VLM locally on the i.MX platform.   Walkthrough Video In the attached video, I show how to launch VLM Edge Studio, load the supported Vision-Language Model, submit a prompt, and interact with the model running locally with Ara240 DNPU acceleration. (function() { var wrapper = document.getElementById('lia-vid-6396694743112w960h540r549'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos) Summary VLM Edge Studio is a useful tool for evaluating local Vision-Language Model inference on NXP i.MX platforms using Ara240 DNPU acceleration. It provides a simple workflow for loading the model, entering prompts, and interacting with visual-language AI directly at the edge.   Link VLM Edge Studio repository ARA2-M2-16G-GT ARA240 Hands-On Training

LLM Edge Studio LLM Edge Studio In this post, I want to share a quick walkthrough of LLM Edge Studio, an NXP launcher application designed to test supported Large Language Models running locally on i.MX platforms with Ara240 DNPU acceleration. LLM Edge Studio provides a simple GUI to select a model, load it, enter prompts, and interact with an LLM directly at the edge. It communicates with the Ara240 Runtime SDK through the eIQ AAF Connector, using a REST-based interface for prompt submission and streaming token responses.   Key Features Local LLM inference on supported i.MX platforms Ara240 DNPU acceleration GUI-based model selection and prompt input Streaming token output Integration with eIQ AAF Connector and Ara240 Runtime SDK Support for prebuilt Debian package installation or building from source   Supported Models Qwen2.5-coder-1.5B Qwen2.5-7B-Instruct These models are provided as Ara240-compatible model.dvm files and are intended for local execution on the target platform.   Basic Installation After making sure the Ara240 Runtime SDK is installed on the target board, copy the Debian package: scp llm-edge-studio.deb root@ : Install it with: dpkg -i llm-edge-studio.deb The installation may take a few minutes because the required models are downloaded during setup.   Running LLM Edge Studio Start the application with: run_llm_edge_studio Before launching, make sure the Ara240 runtime service is running: systemctl status rt-sdk-ara2.service --no-pager -l Once the GUI appears, click LOAD to load the selected model. After the model is ready, enter a prompt and submit it to start interacting with the LLM.   Walkthrough Video In the attached video, I show how to launch LLM Edge Studio, load a supported model, submit a prompt, and view the generated response running locally on the i.MX platform with Ara240 DNPU acceleration. (function() { var wrapper = document.getElementById('lia-vid-6396693184112w960h540r329'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos)   Summary LLM Edge Studio is a useful tool for quickly evaluating local LLM inference on NXP i.MX platforms using Ara240 DNPU acceleration. It provides a simple workflow for model loading, prompt testing, and observing token streaming directly at the edge. Link LLM Edge Studio repository: https://github.com/nxp-imx-support/llm-edge-studio ARA2-M2-16G-GT ARA240 Hands-On Training

PN7161 同时移除标签时的 NFC 发现阻塞问题 我正在使用 PN7161 芯片识别 NFC 卡。 当我同时标记 MIFARE Classic 卡和智能手机的 NFC 时，然后同时移除它们，函数NxpNci_WaitForDiscoveryNotification 就会被阻止。 打印 " WAITING FOR 设备 DISCOVERY " 后，程序无法继续打印 " test_1 "。 我使用的是 SW6705。 /////////////////////////////////////////////////////////////// /* 开始探索 */ 如果(::NxpNci_StartDiscovery(RW_DiscoveryTechnologies, sizeof(RW_DiscoveryTechnologies)) != NFC_SUCCESS) { LOG_ERR("无法开始发现"); 返回; } 虽然(_nfcRfMode == NFC_RF_MODE_RW) { LOG_INF( " 等待设备发现 "); /* 等待，直到发现对等设备 */ 而(::NxpNci_WaitForDiscoveryNotification(&RfInterface) != NFC_SUCCESS) { 日志文件("test_1"); 如果(_nfcRfMode != NFC_RF_MODE_RW) { ::NxpNci_StopDiscovery(); 日志文件("模式已更改，退出 RW 模式"); 返回; } } 如果((RfInterface.ModeTech & MODE_MASK) == MODE_POLL) { ////////////////////////////////////////////////////////////////////////////// 以下是出现问题时显示的 NCI 信息。之后，即使将卡靠近，也无法识别。只有在关闭电源并重新打开后，才能再次识别该卡。 [00:03:24.623,321] Iso14443_4Handler: === ISO14443-4 Scenario Complete === NCI>> 2f 11 00 NCI<< 4f 11 01 00 [00:03:25.265,533] NfcManager：CARD REMOVED NCI>> 21 06 01 00 NCI<< 6f 11 01 00 NCI<< 41 06 01 00 NCI>> 21 03 07 03 00 01 01 06 01 NCI<< 61 06 02 00 00 NCI>> 21 03 07 03 00 01 01 06 01 NCI<< 41 03 01 00 [00:03:25.288,543] nfcManager：等待设备发现 NCI < < 41 03 01 a0 NCI < < 60 07 01 a1 a1 NCI < > 21 06 01 03 NCI < < 41 06 01 00 NCI < < 61 06 02 03 00 NC I < < 61 03 0f 01 80 00 0a 04 00 04 aa 4e 46 0e 0e 01 08 00 02 NC I < < 61 03 0f 02 00 04 00 04 08 c0 b9 fa 01 20 00 02 02 02 02 04 00 04 04 08 c0 fa 01 20 00 01 //////////////////////////////////////////////////////////////////////////// 是否有人遇到过这个问题，或者是否有建议的方法来处理同时删除标签的问题，以避免在发现通知功能中阻塞？ Re: PN7161 NFC Discovery Blocking Issue with Simultaneous Tag Removal 你好@Jaden_jung 希望你一切顺利。 能否请您提供有关设置的更多详细信息？您使用的主机平台是什么？你使用的智能手机是iOS设备，还是安卓设备？ 我使用 SW6705 Rev 1.2（使用未修改的 LPC55S6x RW 演示）、OM27160、LPCXpresso55S69 并同时移除 Pixel 3 和 MIFARE Classic，都无法重现这种行为。您能否使用 PN7160 开发套件 (OM27160) 重现这种行为？ Eduardo。 Re: PN7161 NFC Discovery Blocking Issue with Simultaneous Tag Removal 照片显示了症状再现时的电流值。据怀疑，即使在取出卡之后，系统仍无法恢复到轮询状态。 capture_260324.png Re: PN7161 NFC Discovery Blocking Issue with Simultaneous Tag Removal 主机是 nrf52840，手机是安卓手机。(Samsung Galaxy s25 和 flip) 同时访问两张 MIFARE 经典卡时没有问题。 将 OM27160 板与树莓派搭配使用（使用 linux_libnfc-nci）时没有问题。 定义 REMOVE_P2P_SUPPORT 可以解决问题。 出现问题时，它是否按照下面的流程工作？ 0. at 946line if (Answer[1] == 0x05) // true { pRfIntf->Interface = Answer[4]; // = 0x02 = INTF_ISODEP pRfIntf->Protocol = Answer[5]; // = 0x04 = PROT_ISODEP ...... NCI<< 61 05 19 01 02 04 01 ff 01 0c 0b 64 c6 b2 a3 00 00 00 80 81 71 01 00 00 02 01 00 1.在 WaitForDiscoveryNotification 处分支（第 962-963 行）： 在未定义 REMOVE_P2P_SUPPORT 时执行分支。 NCI>> 21 06 01 03 (NxpNci_HostTransceive) NCI<< 41 06 01 00 (NxpNci_WaitForReception) 2.从 do-while 循环退出： 收到以下通知后，循环终止（第 966 行）： NCI<< 61 06 02 03 00（成功退出循环） 3.多张卡片检测（找到 2 张卡片）： 该设备可识别野外两个目标： 目标 1：61 03 0f 01 80 00 0a 04 00 04 aa 4e 46 0e 0e 01 08 00 02 目标 2：61 03 0f 02 04 00 0a 04 00 04 04 08 c0 b9 fa 01 20 00 02 02 02 04 04 08 c0 b9 fa 01 20 00 01 4.处理条件分支：（第 986 行） 由于接收到的响应与条件不符（Answer[0] == 0x61&& Answer[1] == 0x05），逻辑会跳转到 if (AnswerSize != 0) 块。 5.第 989 行的潜在阻塞： 在第 989 行，条件 while(Answer != 0) 似乎总是为真，导致潜在的无限循环或阻塞状态。这似乎是启用 P2P 支持时系统挂起的根本原因。

RT685: SDK 25.12 に HASHCRYPT アクセラレーションがない こんにちは、 最近、SDK 25.12 にアップデートしたところ、TLS 復号化率が半分に低下していることに気付きました。 mbedTLS v3.x は、 fsl_hashcryptハードウェア機能を使用して高速化されなくなりました。 以下は、以前の SDK 25.09 を使用してmbedtls_ssl_readを呼び出すコールスタックです。ご覧のとおり、最終的にはHASHCRYPT_AES_EncryptEcbが使用されます。 hashcrypt_aes_one_block_aligned() at fsl_hashcrypt.c:437 hashcrypt_aes_one_block() at fsl_hashcrypt.c:581 HASHCRYPT_AES_EncryptEcb() at fsl_hashcrypt.c:1,284 mbedtls_internal_aes_encrypt() at aes_alt.c:1,959 mbedtls_aes_crypt_ecb() at aes_alt.c:1,323 aes_crypt_ecb_wrap() at cipher_wrap.c:114 mbedtls_cipher_update() at cipher.c:521 mbedtls_gcm_update() at gcm.c:358 mbedtls_gcm_crypt_and_tag() at gcm.c:456 mbedtls_gcm_auth_decrypt() at gcm.c:491 mbedtls_cipher_aead_decrypt() at cipher.c:1,407 mbedtls_cipher_auth_decrypt_ext() at cipher.c:1,613 mbedtls_ssl_decrypt_buf() at ssl_msg.c:1,242 ssl_prepare_record_content() at ssl_msg.c:3,667 ssl_get_next_record() at ssl_msg.c:4,551 mbedtls_ssl_read_record() at ssl_msg.c:3,817 mbedtls_ssl_read() at ssl_msg.c:5,237 <...more frames...> MBEDTLS_USE_PSA_CRYPTOが定義された SDK 25.12 のコールスタックを以下に示します。このバージョンでは、 mbedtls_internal_aes_encryptはすべて C コードで、ハードウェアアクセラレーションは使用されていません。 mbedtls_internal_aes_encrypt() at aes.c:894 mbedtls_aes_crypt_ecb() at aes.c:1,062 aes_crypt_ecb_wrap() at cipher_wrap.c:166 mbedtls_cipher_update() at cipher.c:611 gcm_mask() at gcm.c:546 mbedtls_gcm_update() at gcm.c:641 mbedtls_gcm_crypt_and_tag() at gcm.c:726 mbedtls_gcm_auth_decrypt() at gcm.c:753 mbedtls_psa_aead_decrypt() at psa_crypto_aead.c:270 psa_driver_wrapper_aead_decrypt() at psa_crypto_driver_wrappers.h:4,114 psa_aead_decrypt() at psa_crypto.c:5,023 mbedtls_ssl_decrypt_buf() at ssl_msg.c:1,625 ssl_prepare_record_content() at ssl_msg.c:4,093 ssl_get_next_record() at ssl_msg.c:5,068 mbedtls_ssl_read_record() at ssl_msg.c:4,323 mbedtls_ssl_read() at ssl_msg.c:5,983 <...more frames...> 以下は、 MBEDTLS_USE_PSA_CRYPTOが定義されていない SDK 25.12 のコールスタックです。このバージョンでは、 mbedtls_internal_aes_encryptはすべて C コードであり、HW アクセラレーションはなく、PSA は使用されません。 mbedtls_internal_aes_encrypt() at aes.c:899 mbedtls_aes_crypt_ecb() at aes.c:1,062 aes_crypt_ecb_wrap() at cipher_wrap.c:166 mbedtls_cipher_update() at cipher.c:611 gcm_mask() at gcm.c:546 mbedtls_gcm_update() at gcm.c:628 mbedtls_gcm_crypt_and_tag() at gcm.c:726 mbedtls_gcm_auth_decrypt() at gcm.c:753 mbedtls_cipher_aead_decrypt() at cipher.c:1,528 mbedtls_cipher_auth_decrypt_ext() at cipher.c:1,674 mbedtls_ssl_decrypt_buf() at ssl_msg.c:1,639 ssl_prepare_record_content() at ssl_msg.c:4,093 ssl_get_next_record() at ssl_msg.c:5,068 mbedtls_ssl_read_record() at ssl_msg.c:4,323 mbedtls_ssl_read() at ssl_msg.c:5,983 <...more frames...> RT685 HASHCRYPT ハードウェア アクセラレーションを mbedTLS に復元する予定はありますか?特定の PSA Crypto ドライバーが実装されていないようです。 よろしくお願いします。 Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは、エドウィン。 移行ガイドを確認しました。ただし、このバージョンの SDK では、PSA なしの mbedTLS 2.x または mbedTLS 3.x がどのようにハードウェア アクセラレーションされるかはわかりません。aes_alt.c が削除され、HASHCRYPT 機能は PSA ドライバでのみサポートされるようになりました。 SDK 25.12 ではアプリですべてが動作し、接続には間違いなく TLS 1.3 を使用したいと考えていますが、現状ではパフォーマンスが大幅に低下します。 これについては引き続き調査していきます。例の 1 つを変更して、パフォーマンスの低下を再現できるかどうかを確認します。 よろしくお願いいたします。 アミルカル Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは、エドウィン。 EVKで問題を再現しました。2つのサンプルに、200回の反復処理のループを追加して修正しました。 mbedtls_gcm_self_test RTC クロックを使用して全体の実行時間を計測しました。 evkmimxrt685_mbedtls_selftest_cm33 SDK 25.09からテストを実行しました 1087ミリ秒 このコールスタックでは: HASHCRYPT_AES_EncryptEcb() at fsl_hashcrypt.c:1,260 mbedtls_internal_aes_encrypt() at aes_alt.c:1,959 mbedtls_aes_crypt_ecb() at aes_alt.c:1,323 aes_crypt_ecb_wrap() at cipher_wrap.c:114 mbedtls_cipher_update() at cipher.c:521 mbedtls_gcm_starts() at gcm.c:294 mbedtls_gcm_crypt_and_tag() at gcm.c:452 mbedtls_gcm_self_test() at gcm.c:826 evkmimxrt685_mbedtls3x_psatest_cm33 SDK 25.12からテストを実行しました 8990ミリ秒 このコールスタックでは: mbedtls_internal_aes_encrypt() at aes.c:896 mbedtls_aes_crypt_ecb() at aes.c:1,062 aes_crypt_ecb_wrap() at cipher_wrap.c:166 mbedtls_cipher_update() at cipher.c:611 mbedtls_gcm_starts() at gcm.c:441 mbedtls_gcm_crypt_and_tag() at gcm.c:718 mbedtls_gcm_self_test() at gcm.c:1,075   evkmimxrt685_mbedtls3x_psatest_cm33 SDK 25.12以降 MBEDTLS_PSA_ACCEL_KEY_TYPE_AES 定義されたテストを実行した 8744ミリ秒 このコールスタックでは: HASHCRYPT_AES_EncryptEcb() at fsl_hashcrypt.c:1,255 hashcrypt_cipher_encrypt() at mcux_psa_hashcrypt_common_cipher.c:187 psa_driver_wrapper_cipher_encrypt() at psa_crypto_driver_wrappers.h:2,353 psa_cipher_encrypt() at psa_crypto.c:4,766 mbedtls_block_cipher_encrypt() at block_cipher.c:177 mbedtls_gcm_starts() at gcm.c:439 mbedtls_gcm_crypt_and_tag() at gcm.c:718 mbedtls_gcm_self_test() at gcm.c:1,075 例の変更点の要点は次のとおりです。 BOARD_InitHardware(); test_rtc_init(); psa_crypto_init(); uint64_t ms_start = test_rtc_get_msecs(); for (int i = 0; i < 200; ++i) { PRINTF("test iteration %d\r\n", i+1); mbedtls_gcm_self_test(0); } uint64_t ms_end = test_rtc_get_msecs(); PRINTF("test time = %ums\r\n", (unsigned)(ms_end - ms_start)); ...ここで、 test_rtc_get_msecs は、1 秒未満の精度を使用して現在の RTC 時刻を返します。 ご覧のとおり、新しい SDK で GCM/AES を暗号化すると、速度が約 8 倍低下します。 ご希望であれば、修正したサンプルを添付することもできます。 よろしくお願いいたします。 アミルカル Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは@hrc-amilcar 、 この質問にご辛抱いただきありがとうございます。社内チームからの返答を受け取りましたので、以下をご覧ください。 コールスタックから、従来の mbedtls_xxx 暗号 API を使用していることがわかります。実際、HW アクセラレーションではありません。mbedTLS3.xCrypto 用の新しい API が導入されました。これは PSA です。mbedtls/docs/psa-transition.md は v3.6.5 · Mbed-TLS/mbedtls · GitHub で高速化されています。レガシー暗号 API は MbedTLS4.x でさらに削除されます。 RT600 用の SDK で psa_crypto_examples を確認したところ、 PSA_CRYPTO_DRIVER_HASHCRYPT が定義されているため、暗号ドライバー ラッパーが暗号計算を HW にオフロードできるようになり、HASHCRYPT HW アクセラレーションがデフォルトで有効になっています。一方、MbedTLS3.x+ はより複雑で、PSA API 仕様に準拠しているため、一部のユースケースでは実際にパフォーマンスが低下する可能性があります。TLS の場合、この IP は bignum アクセラレーションのみをサポートし、HW IP がアルゴリズム全体を実装することを期待する PSA API との互換性があまりないため、むしろ非対称暗号化 (CASPER HW IP) がパフォーマンスのボトルネックになると予想されます。少なくとも一部の ECC 操作 (署名、検証) を高速化するために最善を尽くしましたが、ECDHE キー交換中の keygen などの他の操作では速度が低下する可能性があります。 ここで、パフォーマンス測定に PSA API を使用して、PSA_CRYPTO_DRIVER_HASHCRYPT が定義され、コール スタックがそれを使用していることを確認できるとよいでしょう。参考までに: Hashcrypt は AES-GCM アクセラレーションをネイティブに提供していないため、HW IP の実際のメリットを確認するには、AES-CBC または AES-CTR をベンチマークすることをお勧めします。 BR、 エドウィン。 Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは@hrc-amilcar 、 mbedTLS 2.x (PSA なし) から mbedTLS 3.x (PSA あり) に移行すると、次の理由によりパフォーマンスが低下する可能性があります。 PSAドライバインターフェースはまだ部分的にしか実装されていません。そのため、ドライバ作成に必要な成果物や、ドライバをMbed TLSに統合する方法は、高速化対象となる操作によって異なります。( https://mcuxpresso.nxp.com/mcuxsdk/latest/html/middleware/mbedtls3x/docs/psa-driver-example-and-guide.html) 現時点では、2.xから3.xへの適切な移行方法に関するガイドラインに従うことをお勧めしています: Mbed TLS 2.xからMbed TLS 3.0への移行 — MCUXpresso SDKドキュメント PSA APIへの適切な移行ガイド： PSA APIへの移行 - MCUXpresso SDKドキュメント ご不便をおかけして申し訳ございません。 BR、 エドウィン。 Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは@hrc-amilcar 、 SDK をアップデートした後に何か変更を加えましたか？SDK のサンプルコードでも同様の現象が見られますか？スタンドアロン IDE を使用していますか、それとも VS Code 拡張機能を使用していますか? BR、 エドウィン。 Re: RT685: SDK 25.12 no HASHCRYPT acceleration mbedTLS設定ファイルに MBEDTLS_PSA_ACCEL_KEY_TYPE_AES を 定義したのです が、HASHCRYPTまで呼び出されるようになりました。しかし、mbedtls_ssl_readの読み取り速度がさらに遅くなっています。他に定義が不足しているのか、PSAレイヤーが余分なオーバーヘッドを加えているのか、疑問に思っています。   TLS ソケット経由で WiFi から 4KB パケットをダウンロードする速度: SDK 25.09: 205KB/秒 (PSAなし、ksdkポートファイルありのmbedTLS 2.x) SDK 25.12: 138KB/秒 (MBEDTLS_PSA_ACCEL_KEY_TYPE_AES なし) SDK 25.12: 125KB/秒 (MBEDTLS_PSA_ACCEL_KEY_TYPE_AES 使用時) MBEDTLS_PSA_ACCEL_KEY_TYPE_AES を使用した新しいコールスタックは次のとおりです。 HASHCRYPT_AES_EncryptEcb() at fsl_hashcrypt.c:1,255 hashcrypt_cipher_encrypt() at mcux_psa_hashcrypt_common_cipher.c:203 psa_driver_wrapper_cipher_encrypt() at psa_crypto_driver_wrappers.h:2,353 psa_cipher_encrypt() at psa_crypto.c:4,766 mbedtls_block_cipher_encrypt() at block_cipher.c:177 gcm_mask() at gcm.c:543 mbedtls_gcm_update() at gcm.c:628 mbedtls_gcm_crypt_and_tag() at gcm.c:726 mbedtls_gcm_auth_decrypt() at gcm.c:753 mbedtls_psa_aead_decrypt() at psa_crypto_aead.c:270 psa_driver_wrapper_aead_decrypt() at psa_crypto_driver_wrappers.h:4,114 psa_aead_decrypt() at psa_crypto.c:5,023 mbedtls_ssl_decrypt_buf() at ssl_msg.c:1,625 ssl_prepare_record_content() at ssl_msg.c:4,093 ssl_get_next_record() at ssl_msg.c:5,068 mbedtls_ssl_read_record() at ssl_msg.c:4,323 mbedtls_ssl_read() at ssl_msg.c:5,983 <...more frames...> Re: RT685: SDK 25.12 no HASHCRYPT acceleration こんにちは@EdwinHz 、 MCUXpresso IDEを使用しています。 SDK を更新した後、追加の変更はありません。 SDK を更新するときは、「SDK マネジメント」→「SDK コンポーネントの更新」を再実行して、新しい更新されたファイルを取得します。 次に.cprojectを比較します同様の機能が有効になっているサンプルの1つに構成を変更します（例：evkmimxrt685_wifi_wpa_supplicant_cm33) PSA_CRYPTO_DRIVER_CASPER=1 PSA_CRYPTO_DRIVER_HASHCRYPT=1 CONFIG_WPA_SUPP_CRYPTO_MBEDTLS_PSA=1 等... メインの mbedTLS 構成ヘッダーとしてデフォルトのmcux_mbedtls_config.h を使用し、 evkmimxrt685_wifi_wpa_supplicant_cm33の例のwpa_supp_mbedtls_config.hとほぼ同じ独自のユーザー構成ファイルを使用しています。 mbedtls3x_examples を試して、どのように動作するか確認します。おそらく、いくつかの定義が欠落しているのでしょう。 コードをステップ実行しているときに、 gcm 操作を高速化するために、おそらくMBEDTLS_BLOCK_CIPHER_C を定義する必要があることに気付きました。 ヘッダーmbedtls3x/include/mbedtls/config_adjust_legacy_crypto.hがこれに関係しているようですが、何らかの理由でそのマクロが定義されません。 Re: RT685: SDK 25.12 no HASHCRYPT acceleration 他人の利益のために... mbedTLS 3.xのmbedtls_xorは、一度に4バイトのデータをループして呼び出しているようです。 mbedtls_get_unaligned_uint32 そして mbedtls_put_unaligned_uint32 どちらも単一の uint32 に対して memcpy を使用します。 mbedTLS の作者たちは、一度に 4 バイトの XOR ブロックを計算する (剰余ループを使用) ことでパフォーマンスの向上を試みていることは承知していますが、memcpy の完全な呼び出しによって、実際にはコードの速度が低下しています。 逆アセンブリを調査した結果、プロジェクトが -fno-builtin でコンパイルされており、小さな memcpy がコンパイラによってインライン化されないことが判明しました。 このオプションを削除すると、AES-GCM 操作に使用されていない HASHCRYPT ハードウェアのパフォーマンス損失の多くが回復しました。SO、私が投稿した例では、実行時間が 8600 ミリ秒から 2100 ミリ秒に短縮されました。mbedTLS 2.x + ksdk alt (1087 ミリ秒) のレベルには達していません。しかし、復元されたパフォーマンスは十分良好です。 -アミルカル

RTD- Need support for using Wdg(watchdog )driver for saf9000 RTD driver version (R23-11 v1.0.0) We are from the Quantum rfp team, working for the SAF9000 chip. We are trying to use RTD's-Wdg (watchdog) driver and see some issues like wdg calls trying to suspend all interrupts and then resuming interrupts.This is affecting some of the features. So wanted some support to help identify root cause/proper usage of wdg and fix the issues we are facing. Could you please support. Current RTD Configuration we are trying to use are attached (wdg and platform xdm files): wdg- in enable direct service mode. using below calls:  For initialization:  Wdg_43_Instance0_Init((Wdg_ConfigType*)NULL_PTR); //since using post build variant   For toggle/feeding watchdog regularly we are using: Wdg_43_Instance0_SetMode(WDGIF_FAST_MODE); Let me know in direct service mode the calls to be used to initialize and feed watch dog are correct or not? Will any of these calls disturb any other interrupt, causing us other functionality issues? RTD Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 Thanks Cuong. To start with we started using indirect servicing, but since we were using GptChannelConfiguration_0 for some other timer purpose already, we could not use the same in wdg configuration for "Wdg External Trigger Counter  " . We tried defining  GptChannelConfiguration_1 in addition and tried to use it for "Wdg External Trigger Counter  " in wdg tresos configuration, but it was not allowing it for some reasons(was getting red cross mark). That is when we switched to direct mode. As per your suggestion i will try using   function Wdg_43_Instance0_Service function. If problem persists then i will again try to use indirect servicing, and for configuration problem, i will approach you. Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 Hi @renukasc  I see that you used SetMode to feeding watchdog is wrong. With direct service: use Wdg_43_Instance0_Service function With indirect service: use Wdg_43_Instance0_SetTriggerCondition function. Please check our example in Wdg module to refer how we use Wdg_43_Instance0_SetTriggerCondition  Path: \plugins\Wdg_TS_T40D34M50I0R0\examples Furthermore: Wdg_43_Instance0_Init((Wdg_ConfigType*)NULL_PTR) -> Using with Precompile, not Post-built Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 i could try using Wdg_43_Instance0_Service. Watchdog functionality fine as said before.If not fed , watchdog isr is triggering as expected.But problem is when watchdog apis are used,i could see it affecting all our other functinalities.Looks like it is affecting interrupts. Could you please provide one WDT example application, that has timer and other ISR like UART in which WDT is not affecting these ISRs using direct service mode .   Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 One more update, as indicated earlier when wachdog calls are used in our app, looks like other interrupts like timer(gpt) are not getting served, we dont get isrs triggering for this any more. Tried changing priority of the interrupts,not helping. Also tried commenting OsIf_SuspendAllInterrupts(), OsIf_ResumeAllInterrupts()  in /RTD/eclipse/plugins/Rte_TS_T40D94M10I0R0/src/SchM_Wdg.c . This is also not helping. Could you please provide one WDT example application, that has timer and other ISR like UART in which WDT is not affecting these ISRs using direct service mode.   Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 Below is the flow when WDG service is called:  Wdg_43_Instance0_Service()   → Wdg_ChannelService(WDG_IPW_INSTANCE0)       → Wdg_Ipw_Service(Instance)           → Swt_Ip_Service(Instance)               → SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09();   // This can call OsIf_SuspendAllInterrupts()               → ...               → SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09();    // This can call OsIf_ResumeAllInterrupts() So, If you call Wdg_43_Instance0_Service and in your RTE, the definition of SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09 and SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09 are call OsIf_SuspendAllInterrupts/OsIf_ResumeAllInterrupts then yes it could affect to interrupt. However, after call this function, the interrupt should be back to normal.  Do you mean that even exit this function Wdg_43_Instance0_Service, interrupts still cannot be triggered? Can you share me how do you implemented OsIf_SuspendAllInterrupts(), OsIf_ResumeAllInterrupts()  in your project?   Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 @renukasc  When "Development Error Detection" is enabled, Wdg APIs use Wdg_ChannelValidateGlobalCall and Wdg_ChannelEndValidateGlobalCall. These functions use SchM_Enter/Exit_Wdg_WDG_EXCLUSIVE_AREA_06 and SchM_Enter/Exit_Wdg_WDG_EXCLUSIVE_AREA_07. Please verify in your SchM implementation how SuspendAllInterrupts and ResumeAllInterrupts behave. In particular: after ResumeAllInterrupts is called, do all interrupts return to their normal state? Re: RTD- Need support for using Wdg(watchdog )driver for saf9000 what we finally observed when debugged is the normal timer interrupt will stop and will not resume if Wdg_43_Instance0_Init and Wdg_43_Instance0_Service calls are made with tresos configuration "Development Error Detection " is set. When we disabled 'Development Error Detection ' in tresos, we observe that other interrupts are fine when enabled with wdg calls.  

i.MX RT1064：在 GPIO_AD_B1_09 上启用 FlexPWM 的问题 我正在使用 i.MX RT1064，并尝试在以下引脚上生成 PWM 信号。尽管通过 MCUXpresso SDK 配置了 IOMUX 并初始化了 FlexPWM 模块，但我在引脚上看不到任何输出。 GPIO_AD_B1_09：配置为 ALT1 (FLEXPWM4_PWM1_A) 当前设置： 我正在按照 SDK 中的示例——exkmimxrt1064_pwm 作为设置 PWM 的参考。 我使用标准的 50% 占空比进行测试。 问题 RT1064 上的这些特定引脚是否存在已知的内部冲突？ 对于GPIO_AD_B1_09，是否需要特定的焊盘属性（DSE、速度）来覆盖默认的 USDHC 功能？ 另外，我想在 GPIO_SD_B1_04 和 GPIO_AD_B1_05 上启用 PWM，但在 FlexPWM 下看不到这些引脚，有没有办法在这些引脚上也启用 PWM？ 感谢您的帮助。 i.MX RT106x Re: i.MX RT1064: Issues enabling FlexPWM on GPIO_AD_B1_09 您好 ，对于 GPIO_AD_B1_09，请确保 IOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT = IOMUXC_FLEXPWM4_PWMA1_SELECT_INPUT_GPIO_AD_B1_09_ALT1; 已被设置（值为 0x00000001），否则输出将被 GPIO_EMC_02（默认值）取代。 确保驱动设置 IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B1_09 设置为启用驱动强度，因为将其设置为 0 不会启用输出驱动。 GPIO_SD_B1_04 和 GPIO_AD_B1_05 没有柔性定时器功能： 在此查看 1064 引脚复用器电子表格： https://www.utasker.com/iMX/iMXRT1064/iMX_RT_1064.xls Regards Mark Re: i.MX RT1064: Issues enabling FlexPWM on GPIO_AD_B1_09 你好@shreya1、 你使用的是自定义板还是 EVK？我知道您是根据示例代码将引脚初始化为 PWM，但您修改了示例代码的哪些具体部分？此外，还可以让 ConfigTools 将 GPIO_AD_B1_09 引脚配置为 PWM，甚至整个 PWM 模块。 BR, Edwin. Re: i.MX RT1064: Issues enabling FlexPWM on GPIO_AD_B1_09 嗨 @EdwinHz， 我使用的是自定义板，从示例代码中我根据自己的密码更改了 PWM 编号、子模块和通道。我尝试了另一种方法，也使用了外设工具，让它来管理整个配置，但我没有看到任何输出。 你好@mjbcswitzerland， ，我确保完成了你提到的两项设置，但仍然看不到任何输出。我确定引脚已被路由，因为在将其配置为 GPIO 时，我看到了切换。 Re: i.MX RT1064: Issues enabling FlexPWM on GPIO_AD_B1_09 你好@shreya1、 感谢您的澄清。如果你能分享代码，我可以看一看，以便更好地理解初始化，更好地确定问题是与软件还是硬件有关。 BR, Edwin.

FRDM-IMXRT1186 I want to use FRDM-IMXRT1186. Application 1 > Board Should work with Internal 1.5MB RAM and with External QSPI Flash. A> Ethernet 1 MII port (Named with Label ECAT0) can be configured with TCP/IP MODBUS Master ?  B> Ethernet 2 MII port (Named with Label ECAT1) can be configured with ETHERCAT Master ? Application 2 > Board Should work with Internal 1.5MB RAM and with External QSPI Flash. Arduino & MC Interface connector. A> Ethernet 1 MII port (Named with Label ECAT0) & Ethernet 2 MII port (Named with Label ECAT1) can be used for Ethercat Slave & Arduino & MC Interface connector Analog/Digital GPIO ? Re: FRDM-IMXRT1186 Hi @sarikaautomations , Thanks for your interest in NXP MIMXRT series! 1. A: It's recommend using J56A/J56B (RGMII ports for ETH0/ETH2) for TCP/IP/Modbus communication. Using J57A (ECAT0 port) is not advised. B: No. The RT1180 integrates ESC, not an ECAT master. 2. Yes, this is supported. For more detailed information, please refer to this guide: UM12450: FRDM-IMXRT1186 Board User Manual Best regards, Gavin

MPXV5050GC6U <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> - 该部件是否可以清洗（使用无铅、可水洗的焊料）？ 压力传感器 Re: MPXV5050GC6U <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 谢谢。我也是这么想的，但想核实一下。 Re: MPXV5050GC6U <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨，辛迪、 任何进入传感器压力开口的清洁剂都可能对设备产生不利影响。因此，绝对建议使用卡普顿胶带密封部件上的检修孔。也可以在清洗前用盖子堵住部件。 此致， 托马斯 PS： I如果我的回答有助于解决您的问题，请标记为"正确" 或 "有帮助"。谢谢。

TPMS お客様向けの NDA を取得できますか? <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> NXP様 私はNXPの代理店であるZLGのメンバーです。Anjia は現在バス TPMS を開発中であり、詳細な情報が必要です (FXTH871511DT1 REG #: R691261)。NDAの申請を手伝っていただけますか？ Anjiaの情報は次のとおりです。 公司名（中文）： 佛山市安驾科技有限公司 会社名：FoShan Angel Technology Co,.Ltd. 公司地址（中文）：广东省佛山市南海区獅山镇北园中路王氏车灯西门装配车间2楼 住所：中国広東省仏山市南海区石山鎮北園中路王石ランプ西門組立工場2階 連絡先担当者：陈琼霓（Chen Qiongni） 職種： ソフトウェアエンジニア 電話：13727457848 企業メールボックス：[email protected] プロジェクト: バスTPMS ありがとう！ よろしくお願いします オーウェン 圧力センサ

Probes Not Found Error when attempting to connect to FRDM46lz board Probes not found error M4 Pro Macbook Sequoia 15.6 while attempting to connect to FRDM46lz board in MCUXpresso. Fellow students with Macs have not encountered this issue. Have been working hard with university staff but not found a solution. Have already attempted plugging into difference ports, restarting device, changing privacy settings, creating a new project, and uninstalling and reinstalling MCUXpresso, among other things. Help would be greatly appreciated, thank you! Screenshot 2026-01-22 at 6.51.16 PM.png Screenshot 2026-01-23 at 5.37.17 PM.png Re: Probes Not Found Error when attempting to connect to FRDM46lz board Hello @ottofhalb , Thanks for your post. Please open Device Manager and check whether the serial port has been successfully enumerated. In addition, have you ever tried to update the OpenSDA? OpenSDA Serial and Debug Adapter | NXP Semiconductors You may refer to attached "Updating the OpenSDA Firmware.pdf". Hope it helps. BR Celeste

FLEXIO_CTRL[DBGE] 的含义是什么？ DBGE 上的参考手册措辞有点短 "在调试模式下启用 FLEXIO 操作" 如果禁用它并调试代码会发生什么？ 试图弄清楚在使用 FLEXIO 和调试 FLEXIO 驱动程序时，哪些调试操作是安全的。 我想，让调试器在接收模式下读取 SHIFTBUFn 或任何其他具有读取副作用的硬件寄存器都是不安全的，即使在调试器中不小心碰了一下也不行。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 你好，@Henrik-Wires 如果"Enable FLEXIO operation in debug mode" 被禁用，当调试器停止 CPU 时，FLEXIO 模块也会停止。冻结所有 FIexIO 活动，直到执行恢复。 下面的主题也讨论了这个问题：这是否意味着 flexio 无法在调试模式下工作？ BR、VaneB Re: What is the meaning of FLEXIO_CTRL[DBGE] 你好，@Henrik-Wires 正如 S32K3 参考手册中所述，当设置了相应的 SHIFTSTAT [SSF] 标志时，必须只读取 ShiftBufn 寄存器。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 这是否也意味着，如果禁用 DBGE，使用调试器访问 FLEXIO 寄存器也是安全的，或者使用调试器读取 SHIFTBUFn 会扰乱移位状态标志 SHIFTSTAT[SSF] ？ Re: What is the meaning of FLEXIO_CTRL[DBGE] 能否以某种方式阻止 S32DS 尝试访问寄存器？只有短暂访问 SHIFTBUFn 的指针，调试器才会通过清除 SHIFTSTAT[SSF]来访问该值，从而扰乱 FLEXIO 状态。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 你好，@Henrik-Wires 能否请您说明一下这将用于什么目的，或者您想实现什么样的分析？ Re: What is the meaning of FLEXIO_CTRL[DBGE] 你好，@Henrik-Wires 集成开发环境本身不会阻止对寄存器的访问。这种保护可以通过 MPU 或 XRDC 来实现；不过，我认为这种方法与您想要实现的目标是一致的。 相反，你可以监测何时设置 SHIFTSTAT [SSF]，然后验证相应的 ShiftBufn 寄存器是否包含预期值。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 我正在探索、编写和调试一个定制的低级 FLEXIO 驱动程序。 调试时出现了奇怪的结果，我怀疑是由于 S32DS 在通过驱动程序步进时获取 SHIFTBUFn 寄存器的值，干扰了 SHIFTSTAT[SSF] 状态，导致事件丢失。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 该驱动程序显然会监测 SHIFTSTAT 并相应地访问 ShiftBufn。 我的问题是，使用 S32DS 跳过驱动程序代码可能会触发信号对 SHIFTSTAT 的调试读取，这似乎会干扰该寄存器中的状态。例如，当鼠标指向 SHIFTSTAT 指针时。 如果我小心避免用调试器接触任何此类指针，那么驱动程序就能正常工作。 我曾希望禁用 DBGE 可以让调试器访问 SHIFTSTAT，而不会干扰 **bleep**FSTAT 寄存器的状态，但从你的回复来看，情况并非如此。 Re: What is the meaning of FLEXIO_CTRL[DBGE] 你好，@Henrik-Wires 禁用 DBGE 位并不能防止调试器干扰 SHIFTSTAT 等寄存器，因为 DBGE 并不控制调试读取行为。相反，DBGE 可控制外设是否在内核停止运行时继续运行。

如何禁用 QSPI 1 上的 MGC 访问控制？ 我正在努力使用自定义驱动程序让 QSPI 在 S32E2 评估板上运行。我正在使用 JTAG 加载代码并耗尽内存，因为我们正在从 EMMC 启动切换到从 QSPI 启动。评估板将 QSPI 闪存连接到 QSPI1 B。我在写入某些寄存器（主要是 SFAR）时遇到了问题。SFAR 似乎受 MGC 保护，因此我想通过清除第 31 位（GVLD）来禁用访问控制。 但是，根据参考手册，只能由总线主机 0x1F 访问 MGC，这是 HSE 核心。看起来 QPSI0 有一种以 HSE_QSPI0_DAT0 为形式的旁路机制，它允许更改可以访问 QSPI0 上这些寄存器的总线主机，但我一直找不到 QSPI1 的等效机制。 谁能帮帮我？ Re: How do you disable MGC access control on QSPI 1? 你好，@AdamH_work、 感谢您联系恩智浦技术支持。关于您的问题，我需要一些时间来寻找访问您提到的寄存器的正确方法。 现在，我建议你看看我们在 S32ZE RTD 2.0.1 中提供的 qspi_ip_example_s32z2xx_r52 或 memacc_example_s32e2xx_r52 示例项目，尽管它使用了 RTD，但它可以让你了解在 S32Z/E 系列中使用 QSP I 所需的步骤。 谢谢！ Re: How do you disable MGC access control on QSPI 1? 你好，@AdamH_work、 对不起，我的回复晚了。 另请查看第 65.1.6 节 QuadsPi_0 与网络安全寄存器之间的相互作用中的表格 [第 3349 页，S32Z2 参考手册，第 5 修订版，2025-01-28]，第 121.2.1. 5 节 QuadsPi_0 数据 0（HSE_QSPI 0_DAT0）[第 6674 页]。在表的第一行中，它说明了如何配置可以访问MGC寄存器的主ID，具体取决于HSE_QSPI0_DAT0的值 。 请告诉我您是否解决了这个问题 Re: How do you disable MGC access control on QSPI 1? 我已经看到了这部分内容，但它似乎只涉及 QuadSPI 0，而我正试图在 QuadSPI 1 上实现这一点。 在此期间，我想出了如何对 MDAD 和 FRAD 寄存器进行编程，以允许所有访问通过，而且 SFAR 似乎在我启动 IP 命令时被填入，但现在它卡在忙状态，所以我可能不需要禁用 MGC 中的所有功能。 Re: How do you disable MGC access control on QSPI 1? 你好，@AdamH_work、 很抱歉造成您的困惑。现在，我的理解是，你们克服了最初的问题，对吗？ 要检查发送 IP 命令的最佳流程，请查看示例项目MemAcc_Example_S32E2XX_R52，特别是请查看函数Qspi_Ip_StatusType Qspi_Ip_IpCommand()，以及静态 Qspi_Ip_StatusType Qspi_Ip_InitReset ()和Qspi_Ip_StatusType Qspi_Ip_RunCommand ()如何调用该函数。 如果您有更多问题，请告诉我。 Re: How do you disable MGC access control on QSPI 1? 在设置 MDAD/FRAD 和 LUT 编程后，我现在可以启动 IP 命令了。 作为闪存通信的第一步，我正在尝试在我的 S32E288-975EVB 评估板上读取美光 MT25QL256ABA8E12 的串行闪存发现参数。我已经在插槽 8 中设置了以下 LUT 序列： CMD PAD1 0x5A ADDR PAD1 24 DUMMY PAD1 8 读取 PAD1 16 停止 PAD1 0 似乎是启动了序列，但又陷入了无限繁忙状态。 SFAR 设置为 0x100000000（配置的起始地址），IPCR 设置为 0x08000008（插槽 8，8 字节）。我将 BUFXCR 寄存器设置所有大小均为 0，缓冲区 3 除外，我已经为所有主服务器设置了缓冲区 3（值 0x80004000）。星期五，我能够用示波器探测CS0/D0/D1引脚，我看到启动IP命令时CS处于钳位状态，但从未取消过钳位。命令和地址似乎已发送，随后是哑周期，然后 D1 进入活动状态，响应数据。 但是，它似乎从未完成读取，只是不停地将数据时钟输入，D1 上显示出重复模式，因为（我猜测）闪存芯片在其 SFDP 缓冲区中循环往复。 当我暂停执行时，我看到了这个： AdamH_work_0-1769442418001.png 我不知道是什么原因导致读取无法完成。 我阅读了数据手册中有关 QSPI 读取的部分，但没有找到任何可以解释这种行为的内容。 我尝试降低时钟（从比特时序来看，最初似乎在 100MHz 左右，但后来我在 CGM 中添加了一个 /10 分频器，它减慢了 D1 的比特模式，但没有改变繁忙的行为）。 Re: How do you disable MGC access control on QSPI 1? 你好，@AdamH_work、 根据我在内存数据表中看到的信息，SFDP (0x5A) 并非 "正常 "操作，它要求控制器故意停止通信流： alejandro_e_0-1769482047806.png 这也可以解释为什么读取的信息总是不完整。在我看来，QSPI 外围设备是正常工作的，至少它在通信，所以目前的问题可能是操作类型。您能否尝试更简单的操作？例如，您可以在我提到的示例中找到以下 LUT 序列、 MemCfg_0_SPI3ByteAddress_paInitOperations_0和 MemCfg_0_SPI3ByteAddress_paLutOperations_0在Qspi_Ip_Cfg.c 中、关于初始化操作，请查看 Qspi_Ip.c 中的 Qspi_Ip_InitOperation()。 如果您能执行另一项操作，并显示出不同的行为，请告诉我 谢谢！ Re: How do you disable MGC access control on QSPI 1? 问题最终出在我没有正确设置 DLL 上。 我按照 S32DS 示例完成了 DLL 旁路模式初始化序列，并在我的代码中重新实现了它，现在它能正确完成读取操作。 下一个挑战是写入操作，但这个问题可以标记为已解决。

s32k3 eMIOS IMP 模式 你好、 我目前正试图在 s32k3 微型计算机上使用 eMIOS IPM 模式读取输入信号频率。在等待状态寄存器告诉我它已捕获测量值后，我先读取 A 寄存器，然后读取 B 寄存器，并对两种情况（正常情况和溢出情况）执行周期计算。但是，计算结果给出的是"High Time" 或"Low time" ，而不是信号的周期。看来IPM模式给我的是高/低占空比，而不是周期。有什么好办法解决这个问题吗？我已确认控制寄存器使用了正确的模式。 谢谢！ Re: s32k3 eMIOS IMP Mode @VaneB你好， ，我也遇到了类似的问题，你能分享一下我如何配置 EMIOS 来测量频率吗？ Re: s32k3 eMIOS IMP Mode 你好@jfranklin 如果可能的话，能否与我们分享一下您的配置？ Re: s32k3 eMIOS IMP Mode 你好，这是我们自己的软件。我们的目标是不使用提供的图形界面。基本上，我只是想读取频率输入的周期。尽管 IPM 模式应该只在上升沿或下降沿更新，但它似乎在上升沿和下降沿都更新。 Re: s32k3 eMIOS IMP Mode 你好@jfranklin 您使用的是 RTD 控制器还是定制软件？能否提供有关您申请的更多信息？ BR、VaneB

Getting Started with FRDM-A-S32K312 Using Model-Based Design Toolbox (MBDT) Table of Contents 1. Introduction 2. Requirements 2.1 Software Required 2.2 Hardware Required 3. NXP Account Login 4. Installation 4.1 PEmicro Driver Installation 4.2 FreeMASTER Installation 4.3 MATLAB® Installation 4.4 MATLAB® Add-Ons Installation 4.5 MBDT for S32K3 v1.8.0 Installation 5. Running a Demo from the MBDT Examples for S32K3 6. Running a Motor Control Demo using MBDT 7. Conclusion 1. Introduction This article aims to help new users prepare and install the necessary software and hardware to use the FRDM Automotive S32K312 with the latest  Model-Based Design Toolbox for S32K3 version 1.8.0. Note: These steps can also be followed with any NXP Evaluation Board from the supported list referenced in the toolbox documentation. S32K312MINI‑EVB Renamed to FRDM‑A‑S32K312: Now part of the FRDM Automotive Ecosystem under its new name, the board keeps the same hardware and adds full ecosystem compatibility for flexible, scalable development. FRDM-A-S32K312-Details.png     2. Requirements   2.1 Software Required MATLAB® R2023b or later, with the following Add-ons: AUTOSAR Blockset Embedded Coder Support Package for ARM Cortex-M Processors Motor Control Blockset NXP_Support_Package_S32K3 Stateflow NXP Model-Based Design Toolbox for S32K3 version 1.8.0 FreeMASTER Run-Time Debugging Tool PEmicro Hardware Interface Drivers   2.2 Hardware Required FRDM-A-S32K312 Development Board MCSPTE1AK344 Motor Control Kit, which includes: Sunrise motor  DEVKIT-MOTORGD  12V power supply USB Type-C cable   3. NXP Account Login Open Software Licensing: Support, make sure you are logged into your NXP Account, and select: Click on My NXP Account. Select Software Licensing and Support. stefanvlad_4-1766413667183.png Then click on View accounts: stefanvlad_5-1766413890382.png These steps will ensure that you are properly authenticated with your NXP Account before proceeding with step 4.5 MBDT for S32K3 v1.8.0 Installation. Keep the page open for the login to persist.   4. Installation Note: Before proceeding, make sure you have full access to your PC or Laptop. Some installers require local admin rights. Contact your IT department to assist you with installation. 4.1 PEmicro Driver Installation After downloading the PEmicro Hardware Interface Drivers: Open the installer package and select the default Destination Folder: stefanvlad_1-1766419738640.png Click on Install and then wait for it to finish successfully. Connect the USB cable to your PC and the FRDM Automotive S32K312 board: FRDM-A-S32K312-Connect.png Open Device Manager to check OpenSDA and the COM port number. OpenSDA - CDC Serial Port → note this COM port number: stefanvlad_2-1766420223283.png Note: The COM port number may differ on your system.   4.2 FreeMASTER Installation Download the  FreeMASTER Run-Time Debugging Tool: stefanvlad_3-1766420635579.png Open the installer FMASTERSW32.exe Click Next, then select all available products: stefanvlad_3-1766483372281.png Use the default installation path: C:\NXP\FreeMASTER 3.2 stefanvlad_5-1766483553297.png Wait for the installation to complete.   4.3 MATLAB® Installation First, check whether MATLAB® R2023b or later is already installed. If so, you can skip this section. For this tutorial, MATLAB® R2025b is downloaded from MathWorks®: stefanvlad_1-1765986670126.png Download the matlab_R2025b_Windows.exe (246 MB) file. A MathWorks® Account login is required. stefanvlad_0-1765989175448.png After signing in, select the installation directory; the default is C:\Program Files\MATLAB\R2025b For minimum requirements, install the following products: MATLAB® Simulink® AUTOSAR Blockset Embedded Coder MATLAB® Coder Motor Control Blockset Simulink® Coder Stateflow By default, Select All is enabled during install: stefanvlad_1-1765989395916.png Wait for the installation to finish. stefanvlad_0-1765990977949.png After installation, open MATLAB® and change the default Add-ons path to a shorter path such as C:\MathWorks . stefanvlad_0-1766410047823.png   4.4 MATLAB® Add-Ons Installation Open Add-On Explorer and install: Embedded Coder Support Package for ARM Cortex-M Processors stefanvlad_0-1766412311420.png NXP Support Package for S32K3 (NXP_Support_Package_S32K3) stefanvlad_0-1766411567825.png   4.5 MBDT for S32K3 v1.8.0 Installation After installing the support package, run the following command in MATLAB®: sp_s32k3.nxp.setup(); stefanvlad_0-1766413223525.png Select version 1.8.0; the installer will check prerequisites: stefanvlad_1-1766413310659.png If any toolboxes are missing, install them before continuing. Click Download to proceed. stefanvlad_2-1766413441318.png The Download button opens the Software Terms and Conditions dialog; if the page is not loading properly, follow the steps in 3. NXP Account Login. stefanvlad_6-1766414096051.png After reading, click I Agree. Download the SW32_MBDT_S32K3_1.8.0_D2512.mltbx file (approx. 1.6 GB): stefanvlad_7-1766414190914.png Once the download completes, browse to the location of the SW32_MBDT_S32K3_1.8.0_D2512.zip file: stefanvlad_0-1766414656239.png Click Install to proceed and accept the license agreement. stefanvlad_1-1766414793231.png After a few minutes, the dialog will display: Installation successfully completed! Click Next. stefanvlad_0-1766415122676.png Select an option such as Open S32K3 Root Folder. stefanvlad_1-1766415182502.png MATLAB®'s current folder will change to the root of the toolbox. stefanvlad_2-1766415288611.png Click Finish to close the installer. The current folder in MATLAB® is now C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3 : stefanvlad_3-1766415419643.png   5. Running a Demo from the MBDT Examples for S32K3 Navigate to C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3\S32K3_Examples\demos\s32k3xx_uart_leds_s32ct Open the model s32k3xx_uart_leds_s32ct.mdl . stefanvlad_4-1766415657531.png Click on Hardware Settings: stefanvlad_0-1766419685798.png Go to Hardware Board Settings → Hardware → Select Configuration Project Template: stefanvlad_0-1766421790798.png For the FRDM-A-S32K312 select Custom: S32K312MINI-EVB S32 Config Tool. A Warning Dialog will appear; click OK. stefanvlad_2-1766421922797.png Wait for the configuration update to complete. stefanvlad_3-1766421986052.png Click on Apply and close the Configuration Parameters window. Press Build, Deploy & Start (CTRL+B) to generate the code: stefanvlad_4-1766422124406.png After the build completes successfully, the executable is downloaded to the board. stefanvlad_0-1766482772353.png Open a terminal application and connect to the board's COM port at 115200 baud: stefanvlad_1-1766483002529.png Pressing r, g, or b on the keyboard toggles the corresponding RGB LED on the board.   6. Running a Motor Control Demo using MBDT Navigate to C:\MathWorks\Toolboxes\NXP_MBDToolbox_S32K3\S32K3_Examples\mc\PMSM Open the folder s32k312_mc_pmsm_2sh_s32ct : stefanvlad_0-1766489966607.png Open the model s32k312_mc_pmsm_2sh_s32ct.mdl : stefanvlad_1-1766494271242.png Press Build, Deploy & Start (CTRL+B) to generate the code. After the executable file is downloaded to the board: Disconnect the FRDM-A-S32K312 board from the PC. Insert the DEVKIT-MOTORGD on top of the FRDM-A-S32K312, ensuring proper pin alignment. Plug in the 12V power supply to the DEVKIT-MOTORGD. Reconnect the USB Type-C cable to the FRDM-A-S32K312.  K312_MC_KIT.png The RGB LED and User Buttons are on the top side, the Reset Button is on the left side, while the 12V power, Motor Phases, and USB Type-C are on the right side.  K312_MC_KIT_TOP_A.JPG   Open FreeMASTER s32k312_mc_pmsm_2sh_s32ct.pmpx : stefanvlad_4-1766495406118.png Press GO to connect at 115200 baud. In the App Control tab, press On and set Speed Required to 1000 RPM: stefanvlad_5-1766495532076.png Apply a small mechanical load to the motor (friction force to the motor shaft) and observe the iABC currents. stefanvlad_6-1766495622758.png Here is a short video with the steps above explained: (function() { var wrapper = document.getElementById('lia-vid-6397308123112w960h540r525'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos)   7. Conclusion These steps conclude the Getting Started with FRDM Automotive S32K312 using the Model-Based Design Toolbox guide. For more details, refer to: s32k312_mc_pmsm_2sh_s32ct_example_readme.html The corresponding example_readme.html for the selected model. Thank you for your time, Stefan V.

S32 Design Studio debug watch register? How  to watch the register change or not, in S32 Design Studio? Re: S32 Design Studio debug watch register? kxliu_0-1767943509829.png Hello, my S32DS Peripheral Registers  why is the right-click option grayed out in my interface Re: S32 Design Studio debug watch register? Thank your very much. Re: S32 Design Studio debug watch register? Hello, Which S32 Design Studio are you using and which version? What NXP device are you developing your application for? The answer to your question may vary some depending on the answers to these questions. Also, we have many HOWTO articles for each of our S32 Design Studio editions. Please check the articles posted to this community as the topics covered may help to answer your questions. Best Regards, Mike Re: S32 Design Studio debug watch register?  Can you tell me how to download the program to MCU  with  S32 Design Studio ,    and  how to make sure download is successful ? Thanks. Re: S32 Design Studio debug watch register? Hello, To setup the watch register, first start a debug session, then go to the Peripherals view and right-click on the desired register and select 'Watch Registers(s)'. Next, go to the Watch registers view and see the values change within the register as you step through the code. image.png Best Regards, Mike