i.M X 8 M Plus: N P U, ISP, V P U and D S P Disabled by U-Boot Despite Device Tree Enabled Hello, We are bringing up (N P U)-based image inference on a custom (i .M X 8 M) Plus board, but the (N P U) is not used at runtime. Our investigation shows that U-Boot disables the (N P U) node at boot based on the (S o C) fuses, even though our device tree enables it. We would like to confirm whether this (S o C) has a functional (N P U) and, if not, which (i. M X 8 M) Plus variant it is. 5. Questions 1. Based on this behaviour, the fuse value and the ( S o C) serial above, can you s part variant? 2. Are the (N P U) , ISP and (V P U ) physically disabled by fuses on this device? 3. If so, is there any supported method to enable the (N P U) on this part? We as fuses are one-time programmable and enforced in hardware. Please confirm. 4. Which bits in the fuse value above mark the (N P U ), ISP, (V P U ) and (D S P ) as disabled, and do they match what U-Boot reports? 5. If the current (S o C) has no (N P U 😞 please confirm that provides N P U drop-in replacement on our layout (same package and pin-out Attached: the recompiled live device tree (live d ts ), the full U-Boot environmental_model logs Thank you in advance. I am currently using an R F NM i . M X 8 M Plus Q u a d L i t e (M I M X 8 M L 4), where the N P U/V I P S I appears to be disabled by the S o C e Fuse configuration, and enabling it through the device tree does not work. I am planning to purchase a D E B IX Model A Standard for N P U-based image inference. Could you please confirm that the Standard model uses an N P U-enabled i . M X 8 M Plus (e.g., M I M X 8 M L 😎 and provide the relevant documentation confirming N P U availability and the differences from the Lite variant? Best regards, 7 Darter i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Linux Yocto Project Re: i.M X 8 M Plus: N P U, ISP, V P U and D S P Disabled by U-Boot Despite Device Tree Enabled Please refer to the datasheet. https://docs.nxp.com/bundle/IMX8MPIEC/page/topics/ordering_information.html
Part differentiator description
The MIMX8ML4 (QuadLite) variant does not include NPU, ISP, VPU.
The MIMX8ML8 variant includes NPU, ISP, VPU.
Therefore, if your current device is MIMX8ML4, enabling the NPU node in the device tree will not enable NPU functionality.
For the DEBIX Model A Standard, please verify the exact i.MX 8M Plus used on the board and confirm that it is an NPU-enabled variant.
Thanks.
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