经常有客户在使用LPC55S69的过程中遇到读 Flash进入异常HardFault中断的现象。如果在Flash Mass Erase之后从未对Flash扇区进行过写操作，直接用指针通过AHB读Flash地址会导致程序跳入HardFault 中断而无法继续正常运行。 原因    刚出厂的LPC55Sxx FLASH处于全零的全擦除状态，没有设置ECC。当芯片通过LinkServer 和MCUXpresso IDE建立连接时，先擦除要下载代码用到的扇区，再把代码下载到对应位置，并对相应存储区的ECC值同时进行更新。代码以外的区域仍然是无ECC设置的擦除状态。 当LPC55Sxx 通过AHB总线直接读取Flash内存区域时（例如，mytemp = *(uint32_t*)0x4000）要对Flash ECC进行校验。这一指令对于读有效代码区是没有问题的， 因为这一区域的ECC在下载代码时早已设置好。但是一旦读取没有代码的扇区，由于没有检测到正确的ECC，导致Flash读取失败，并跳转到下图中的HardFault_Handler()异常中断：   我们在Sector Erase后通过AHB读取Flash内存内容，也会遇到同样的HardFault异常跳转，出问题的原因都是一样的。 解决方法 针对这一问题我们有如下两种解决方法： 先执行Flash写操作，再读取Flash 与Flash 擦除操作不同，执行Flash写操作后对应的ECC值也同步更新。这样，ECC校验通过后，通过下面的代码就可以对Flash直接进行AHB读取。 volatile uint32_t mytemp; …… mytemp = *(uint32_t*)0x1000;//read memory content 0x1000 to mytemp 请注意：0x1000必须是一个已经写过的地址。 如果Flash的某个扇区处于被擦除的状态，我们只需要在通过AHB总线读取内存区域之前对该区域执行写操作，这样ECC校验位更新正确后，就可以正常读Flash。 Flash的写操作可以参考MCUXpresso SDK自带的flashiap例程，函数FLASH_Program。   使用Flash控制指令读取Flash区内容 使用Flash控制指令进行读操作不会导致硬件错误（请参阅UM11126 “Command listing (CMD)”章节）。这是用户手册中推荐的读Flash正确打开方式。 请注意：CPU只有在频率低于100MHz时，才能进行Flash操作（读，写，擦除，校验，等等），当CPU频率超过100MHz时是不能实现上述操作的。 目前，官方没有提供上用控制指令读取Flash内容的例程，因此需要您根据下面步骤创建自己的读Flash程序。 开发环境： IDE: MCUXpresso IDE v11.1.0 SDK MCUXpresso SDK v2.7.0 步骤： 在MCUXpresso IDE中导入一个基础例程，如led_blinky 在下图所述选项中添加iap组件   选择iap1,点击OK   点击完OK之后，fsl_iap_ffr.h, fsl_iap.c, fsl_iap.h文件将自动添加到工程中   在source文件夹中添加附件中的memory.h和memory.c文件   4) 使用Flash 控制指令时，需要在源文件中添加memory.h, fsl_iap.h   5) 调用memory初始化和memory读取函数   6）调试，单步执行（step over）到memory_read()，查看结果  

Recently I found some customers have a bit of problem when porting project from one MCU to another, so this article using simple steps demonstrates how to change MCU with MCUXpresso. There is also a video demonstrated the detail steps in attachment. Pay attention, as MCUXpresso User Guide says: All projects are associated with a particular MCU at creation time. The target MCU determines the project memory layout, startup code, LinkServer flash driver, libraries, supporting sources,launch configuration options etc. etc. so changing a project’s associated MCU should not be undertaken unless you have a total grasp of the consequence of this change. Therefore rather than changing a project’s associated MCU, it is strongly recommended that instead a new project is generated for the desired MCU and this new project is edited as required. However, on occasion it may be expedient to reset a project’s MCU (and associated SDK) and this can be achieved as follows. For example, changing lpc55s69 to lpc55s06, we need install SDKs for lpc55s69 and lpc55s06 before all the below steps. 1 - Change MCU & Package 1.1 – Change MCU Right click “MCU” under Project tree, choose “Edit MCU” Uncheck ”Preserve memory configuration”(it is checked by default)->choose LPC55S06->there is a warning, choose Yes. We can see the Memory details changed to lpc55s06, then click ”Apply and close”. 1.2 – Change Package 2 - Change Compiler Definitions In Properties view->Settings->MCU Compiler ->Preprocessor, change the definition for CPU from LPC55S69JBD100 to LPC55S06JBD64 as below: 3 – Change/add SDK driver for LPC55s06 Selected project, then click ”Manage SDK components”, choose the drivers our application used, for example, clock, power, usart. Click “OK”, then click “Yes” to update. Delete LPC55S69 device related files: Add “system_LPC55S06.c” and “system_LPC55S06.h” files: 4 - Change startup file. Delete LPC55s69 startup files, add “startup_lpc55s06.c”, we can find the startup file in any SDK demo. 5 - Change board related files. Refer to our own new board, change files under “board” folder, for example pins, uart number, here directly copy from SDK demo for LPCxpresso55s06 board. 6 - Test the project  function with new board Build project until no compile error, download and run it, result as below.        

Symptoms Many LPC55 users experienced connection failure when using ISP USB0 for firmware update. In practice, we don’t suggest user updating firmware via ISP USB0 for LPC55(S)6x/ 2x,LPC55(S)1x/0x parts. Diagnosis LPC55 USB0 is Full Speed USB port. The default setting of CMPA turns off the USB0 port. Some users may reconfigure CMPA to enable ISP USB0 in order to use ISP USB0 BOOT, but this is not recommended in practice. LPC55 ISP USB0 uses internal FRO as clock source. According to LPC55 data sheet, the FRO accuracy is only +-2%, while the FS USB data rate tolerance specification is +-2500ppm(+-0.25%). Obviously, the LPC55 FRO spec can’t meet the USB0 clock accuracy requirement. See below extraction from NXP manuals. Fig 1. The accuracy of FRO ( Extracted from LPC55S69 Datasheet )   Fig 2. The accuracy requirement of USB FS( Extracted from TN00063 )  Some users may wonder why USB0 can use internal FRO as clock source in the user application?  Whenever internal clock source FRO is used as USB0 clock source, we must calibrate FRO in source code for communication. That’s to say, trim FRO to an accurate frequency. We can see FRO trim in many MCUXPressoSDK USB demos. When using FRO as the USB0 clock source, in order to ensure the USB0 clock accuracy, we must use the USB0 SOF frame synchronization to calibrate the FRO in order to ensure the accuracy of FS USB clock source (reference design of TN00063, TN00063-LPC5500 Crystal-less USB Solution). Unfortunately, the BOOT ROM of LPC55 does not support USB SOF calibrating FRO. As a result, even if we enable ISP USB0, the FRO clock drift can still cause USB0 communication failure under non-room temperature conditions. Solution Since ISP USB0 is not recommended for firmware update, the user manual no longer announces the enablement bit of ISP USB0 in CMPA. If you need to use USB0 for firmware update, we recommend using ISP USB1 (High Speed USB), because USB1 uses accurate external clock source which can ensure the ISP USB1 working stable. In addition, the communication protocol of ISPUSB complies with BLHOST specification. For details, see:  blhost User's Guide - NXP  

Previously, I wrote two articles about LPC55xx AHB read ( How to fix AHB Read HardFault Error) and LPC55xx FLASH alignment (Why FLASH Program cannot Success? ). In this article, we will go on investigating LPC55xx erased memory state. For most of NXP MCU, the erased FLASH state is 0xFF. Writing action is to change 1 to 0. However for LPC55, when we perform mass erase or section erase, we see the related memory turns to all 0 in MCUXpresso IDE debugger Memory view. This all-0-erased-status confuses many LPC55 beginners. Is this real memory state? The answer is yes, IDE debugger display is correct. LPC55xx FLASH uses 0x00 as erased value, which is opposite to most of the other FLASH devices which use 0xFF as erased value) There is no way to verify the erased FLASH state with code in runtime. NXP enhanced LPC55xx FLASH with ECC added. This means that there is now a functional block between the read entity (for example the CPU) and the FLASH itself. When erasing, both the erased FLASH and its ECC are set as 0. The reading can’t be successful if the erased memory and its ECC don’t match. Thus we can’t read memory in erased state. AHB read hardfault error is produced if do so.  Because of ECC mechanism, you can't read FLASH until you have written to it. see  How to fix AHB Read HardFault Error The User's Manual mentions the reading and writing operation in UM11126 chapter 5.7.13: When writing, parity is automatically computed and stored alongside user data. When reading, data and parity are used to reconstruct correct data, even in the case of a 1-bit error. When reading an erased location, an uncorrectable error is flagged. Use the “blank check” command to test for successful erase. The LinkServer debug in MCUXpresso IDE takes some precautions to avoid this problem while programming the FLASH before starting a debug session. That’s the reason we can see erased memory state in debugger memory view window, Admittedly, this is something not really pre-eminent in the documentation. The only reference we could spot is in UM11126. See below: “ The selected pages are checked for the erased condition (all 0 including parity)”   Thanks for the valuable comment from Radu Theodor Lazarescu.

MCUXpresso SDK for LPC55xx uses FLASH API to implement FLASH drivers. Some user may meet issue when executes FLASH program code, for instance: status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 8); After execution this code, nothing changed in the destination address, but error code 101 returns: This error code looks new, as it doesn’t commonly exist in other older LPCs. If we check FLASH driver status code from UM, code 101 means FLASH_Alignment Error: Alignment error Ah ha? ! Go back to the definition of FLASH_Program, status_t FLASH_Program(flash_config_t *config, uint32_t start, uint32_t *src, uint32_t lengthInBytes); New user often overlooks the UM description of this API “the required start and the lengthInBytes must be page size aligned”. That’s to say, to execute FLASH_Program function, both start address and the length must be 512 bytes-aligned. So if we modify status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 8); To status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 512); FLASH_Program can be successful.   ！！NOTE: In old version of SDK2.6.x, the description of FLASH_Program says the start address and length are word-aligned which is not correct. The new SDK2.7.0 has fixed the typo.  Keep in mind: Even you want to program 1 word, the lengInBytes is still 512 aligned, as same as destAdrss! PS. I always recommend my customer to check FLASH driver status code when meet problem with FLASH API. We can find it in UM11126, Chapter 9, FLASH API. I extract here for your quickly browse:   Happy Programming

The documentation discusses how to generate phase-shift PWM signals based on SCTimer/PWM module, the code is developed based on MCUXpresso IDE version 10.3 and LPCXpresso5411x board. The LPC family has SCTimer/PWM module and CTimer modules, both of them can generate PWM signals, but only the SCTimer/PWM module  can generate phase-shift PWM signals. In the code, only the match registers are used to generate events, I/O signals are not used.  The match0 register is set up as (SystemCoreClock/100), which determines the PWM signal frequency. The the match1 register is set up as 0x00, which generate event1. The the match2 register is set up as (SystemCoreClock/100)/2;, which generate event2. The duty cycle is (SystemCoreClock/100)/2-0x00= (SystemCoreClock/100)/2, which is 50% duty cycle, the cycle time is (SystemCoreClock/100). The event1 sets the SCT0_OUT1, event2 clears the SCT0_OUT1, so SCT0_OUT1 has 50% duty cycle. The the match3 register is set up as (SystemCoreClock/100)/4;, which generate even3. The the match4 register is set up as 3*(SystemCoreClock/100)/4, which generate event4. The duty cycle is 3*(SystemCoreClock/100)/4  -  (SystemCoreClock/100)/4= (SystemCoreClock/100)/2, which is 50% duty cycle. The event3 sets the SCT0_OUT2, event4 clears the SCT0_OUT2, so SCT0_OUT2 has 50% duty cycle. The phase shift is (SystemCoreClock/100)/4 - 0x00= (SystemCoreClock/100)/4, which corresponds 90 degree phase shift. PWM initilization code: //The SCT0_OUT1 can output PWM signal with 50 duty cycle from PIO0_8 pin //The SCT_OUT2 can output PWM signal with 50 duty cycle fron PIO0_9 pin //The SCT0_OUT1 and SCT0_OUT2 PWM signal has 90 degree phase shift. void SCT0_PWM(void) {     SYSCON->AHBCLKCTRL[1]|=(1<<2); //SET SCT0 bit     SCT0->CONFIG = (1 << 0) | (1 << 17); // unified 32-bit timer, auto limit     SCT0->SCTMATCHREL[0] = SystemCoreClock/100; // match 0 @ 100 Hz = 10 msec     SCT0->EVENT[0].STATE = 0xFFFFFFFF; // event 0 happens in all states     //set event1     SCT0->SCTMATCHREL[1]=0x00;     SCT0->EVENT[1].STATE = 0xFFFFFFFF; // event 1 happens in all states     SCT0->EVENT[1].CTRL = (1 << 12)|(1<<0); // match 1 condition only     //set event2     SCT0->SCTMATCHREL[2]=(SystemCoreClock/100)/2;     SCT0->EVENT[2].STATE = 0xFFFFFFFF; // event 2 happens in all states     SCT0->EVENT[2].CTRL = (1 << 12)|(2<<0); // match 2 condition only     //set event3     SCT0->SCTMATCHREL[3]=(SystemCoreClock/100)/4;     SCT0->EVENT[3].STATE = 0xFFFFFFFF; // event 3 happens in all states     SCT0->EVENT[3].CTRL = (1 << 12)|(3<<0); // match 3 condition only     //set event4     SCT0->SCTMATCHREL[4]=3*(SystemCoreClock/100)/4;     SCT0->EVENT[4].STATE = 0xFFFFFFFF; // event 4 happens in all states     SCT0->EVENT[4].CTRL = (1 << 12)|(4<<0); // match 4 condition only     //PWM output1 signal     SCT0->OUT[1].SET = (1 << 1); // event 1 will set SCT1_OUT0     SCT0->OUT[1].CLR = (1 << 2); // event 2 will clear SCT1_OUT0     SCT0->RES |= (3 << 2); // output 0 toggles on conflict     //PWM output2 signal     SCT0->OUT[2].SET = (1 << 3); // event 3 will set SCT1_OUT0     SCT0->OUT[2].CLR = (1 << 4); // event 4 will clear SCT1_OUT0     SCT0->RES = (3 << 4); // output 0 toggles on conflict     //PWM start     SCT0->CTRL &= ~(1 << 2); // unhalt by clearing bit 2 of the CTRL } Pin initialization code: //PIO0_8 PIO0_8 FC2_RXD_SDA_MOSI SCT0_OUT1 CTIMER0_MAT3 //PIO0_9 PIO0_9 FC2_TXD_SCL_MISO SCT0_OUT2 CTIMER3_CAP0 - FC3_CTS_SDA_SSEL0 void SCTimerPinInit(void) {     //Enable the     SCTimer clock     SYSCON->AHBCLKCTRL[0]|=(1<<13); //set IOCON bit     //SCTimer pin assignment     IOCON->PIO[0][8]=0x182;     IOCON->PIO[0][9]=0x182;     IOCON->PIO[0][10]=0x182; } Main Code: #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC54114_cm4.h" void SCT0_Init(void); void SCTimerPinInit(void); void P1_9_GPIO(void); void SCT0_PWM(void); int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals();     printf("Hello World\n");    // SCT0_Init();    // P1_9_GPIO();     SCTimerPinInit();     SCT0_PWM();     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;     }     return 0 ; } The Yellow channel is PIO0_8 pin output signal, which is SCT0_OUT1 PWM output signal. The Bule channel is PIO0_9 pin output signal, which is SCT0_OUT2 PWM output signal.

This document was made to explain how to regain control of any LPC EVK on brick mode without using an external debugger. Explore the simple way. In some cases, this method forms well and is the easy way, open your IDE and select your project.   At this point you may have a debugger configuration of your last debug session, so, you have similar icons to the image. Open the tab below and select erase. Depending on your debugger configuration you need to select the same icons below. Note: In some cases will be necessary to put your MCU in ISP. And that’s all, could try if the MCU is out the brick mode.   Introduction First, you need to install these tools on your PC. LPCScrypt [LPCScrypt v2.1.2 | NXP Semiconductors]. J-Link Commander. [J-Link Commander (segger.com)]. To understand this document, we need to know that every EVK [Evaluation Kit] can be divided into 2 parts. The debugger on the board Link2 and the target LPC55sXX. Figure 1. Link2 Green square, LPC55sXX Red square This document will describe two methods that must be done in the order mentioned because we will see how to update the firmware of the debugger to use the same board for a self-recovery, this step is necessary for the tool J-Link Commander to recognize the debugger as a Segger probe, then when the update is done the second step should be to enter ISP mode to do a mass erase of the target to get out of the brick mode. Link2 The Link 2 (LPC4370) debugger on the board probe can be configured to support various development tools and IDEs using a variety of different downloadable firmware images. Available firmware images include: J-Link by Segger. LinkServer. By default, the EVK board has the firmware LinkServer on the LPC4322 (dependent on your board), for this proposal we will see how to change to J-Link On-Board. DFU The EVK needs to be prepared to receive this firmware on the debugger, to do that we need to put the board on DFU [Device Firmware Update]. On the schematic need to find the DFU jumper to put on the board, the image below is an example of different EVKs check Figure 2.   Figure 2. DFU from different boards. Then connect it to the PC. Note: The firmware update is completely reversible. LPCScrypt Once installed on the PC we need to locate these files of the installation. Root example: C:\nxp\LPCScrypt\scripts When you have the board on DFU, connecting the USB Llink2 to the PC and then RUN the Scrypt (program_JLINK) in CMD check Figure 3. Press any key to continue… Figure 3. Flash firmware of J-Link in DFU mode. Successfully done, at this moment the EVK has the firmware of J-Link Segger. Review the Figure 4. Figure 4. The firmware was flashed successfully. Remove the USB cable to remove the DFU jumper with the board unpowered. ISP Brief of ISP (In System Programming) this method is used to recover a part programmed with a corrupted image which is not detectable by ROM. So, to enter this mode the user needs to put a jumper in the ISP header pins, search for this in the schematic, then connect to the PC and check Figure 5.     Figure 5. ISP image examples from different boards. J-LINK Commander Open the software and if the communication is right the message will appear J-Link via USB… OK check Figure 6. Figure 6. The EVK is now communicating to the tool J-Link Commander. Commands To start the communication needs to send the command “connect”. Then the tool shows your last target (if you use it) and use the next command “?” to change the target review Figure 7. Figure 7. Review the target. In the new popup window in the green area, you need to put the name of the target, take care you do not put the debugger check Figure 8. Figure 8. In the green area, you need to put the matricula of the MCU target. Example [LPC55s16 or LPC55s69] depending of your target check Figure 9. Figure 9. If the tool supports the MCU will show below the red square. In the next selections the tool is asking for the interface of communication, the communication of the EVK is SWD, and for that write “S” as SWD. On speed, only click enter without entry. Then this will appear before the connection check Figure 10. Figure 10. The communication is Done. Then use the command “erase” like the Figure 11. Figure 11. The tool indicate the erase is done. Finally disconnect the USB and remove the ISP jumper, then open the IDE and test the blinky led example, or if you wanted you could use the BLHOST. Flashing the MCU using  BLHOST. At this step you could able to use the IDE or use BLHOST. You could install SPSDK if you wanted [Installation Guide — SPSDK documentation]. In ISP mode… blhost -p COMxx  get-property 1 Figure 12. The first command is to check the communication. blhost -p COMxx flash-erase-all Figure 13. Do a mass erase. blhost -p COMxx write-memory 0 C:\root_example\Debug\led_blinky.bin Figure 14. The flashing was done. Remove the ISP jumper and reset your device. Common error LPCScrypt If the message appears “Nothing to boot”, need to be sure the board is connected to the PC with the DFU mode in LINK 2 check Figure 16. Figure 16. The red square is an example of an error communication. J-Link Commander If a similar message appears, “Cannot connect to target”, need to put the target in ISP mode, and return to the first steps with J-Link commander check Figure 18. Figure 18. Show how the communication is not done.

  Background LPC55(S)XX and MCX series products support updating firmware (ELF, HEX, BIN or SREC/S19) in ISP mode, including USB, UART, SPI, and I2C  connection interfaces.  There was no official host software tool supporting SPI-ISP and I2C-ISP before, so it was difficult for customers to update firmware files through I2C and SPI in ISP mode. Now NXP has launched MCUXpresso Secure Provisioning Tool(SEC or SPT), a graphical interface tool that makes it easy to connect through the four ISP interfaces. Based on the SEC, this article takes LPCXpresso55S69 as an example to introduce the methods of updating firmware in four modes: USB-ISP, UART-ISP, SPI-ISP and I2C-ISP.   Preparation （1）Software MCUXpresso Secure Provisioning Tool is a graphical user interface tool, which is mainly used for security configuration. When  MCU is in the ISP mode, you can use this tool to connect and communicate, it support all interfaces of  ISP. LPC55(s)xx series include four ISP download interfaces: USB, UART, SPI, and I2C. This article is based on this to introduce. （2）Hardware LPCXpresso55S69-evk development board (chip version is 1B)   Steps Make chip into ISP mode before  using SEC tool connect. When power-on, BOOT ROM determines whether enter the ISP mode, based on the CMPA configuration in bit DEFAULT_ISP_MODE and ISP pin status. As shown in  following tables：     Keep the default value of EFAULT_ISP_MODE to “000”, and enter the ISP mode by pulling down the ISP pin PIO0_5. The first valid probe message on USART, I2C, SPI or USB locks in that interface. On LPCXpresso55S69 development board, connect the ISP interface cable (USB\UART\SPI\I2C), press and hold the ISP button, power on,  it will  enter ISP mode.   3.1 USB HID ISP mode （1）In LPC55(s)xx, HS-USB is default USB-ISP port, LPCxpresso55s69-evk uses P9 port, use USB cable to connect P9 and PC. （2）Press and hold  ISP button, reset board, entered ISP-USB mode. （3）Configure MCUXpresso Secure Provisioning Tool: select USB connection mode, test connection. First, click "File->New Workspace", open the option to create a new workspace, and select the processor model you are using.     Then, click "Target->Connection" to open the connection configuration.   In configuration, select USB interface, click “Test Connection” button, if the result shows " ok", connected successfully.   （4）Select the source file in "Source executable image". This tool can build plaint image, signed image, and encrypted image. You can configure it according to your own requirements. For example, use a plain image file "lpcxpresso55s69_gpio_led_output.hex", this file is a binary file generated from MCUXpresso IDE under the SDK example. Click the "Build image" button, ensure that the compilation was successful.     （5）Download the image file Choose “Write Image” view, in “Image path” select the image generated by the previous step, then click  “Write Image” button.   If download  successfully, the following picture will be displayed:     3.2 UART ISP mode （1）LPC55(s)xx  use UART0 as UART-ISP interface, you can use USB cable to connect P6 of LPCxpresso55s69-evk and PC, or use USB-UART convertor to connect UART0 TX/RX and PC. （2）Enter ISP mode, refer to 3.1. （3）Configure MCUXpresso Secure Provisioning Tool, refer to 3.1, select UART connection mode, and perform connection test.   Step 4 and step 5 are the same as 3.1.   3.3 SPI ISP mode (1) LPC55(s) 2x/6x currently includes two versions, 0A and 1B, which can be checked from the chip mask. The 0A version supports SPI3 and HS_SPI ISP interface, and the 1B version only supports HS_SPI ISP interface. This article uses version 1B for the experiment. Both SPI and I2C use LIBUSB interface, LPC-LINK2 and MCU-LINK pro support this function interface, so as long as there is LPC-LINK2 or MCU-LINK pro, SPI-ISP and SEC tool connection can be realized. Special reminder: LPC-link2 and MCU-LINK pro must be updated to CMSIS-DAP debugging interface, J-link does not support this function. In the LPCxpresso55s69-evk development board, SPI3 is connected to LPC-LINK2 by default, and HS_SPI is not connected, so  an external connection is required, connect SCK, MOSI, MISO, and SSEL1 of HS_SPI to the corresponding positions of LPC-link2. For details, please refer to the lpc55xx manual and the development board schematic. It can also be connected according to the figure below. The connection of the development board is shown in the below picture   (2) Connect the USB cable to the P6 port. (3) Enter ISP mode, refer to 3.1. (4) Configure MCUXpresso Secure Provisioning Tool, refer to 3.1, select the SPI connection mode, and perform a connection test.   Step 5 and step 6 are the same as 3.1.   3.4 I2C ISP mode The I2C-ISP mode is the same as SPI, with the help of the LIBUSB interface, that is, the LPC-link2 on the development board. Special reminder: LPC-link2 and MCU-LINK pro must be updated to CMSIS-DAP debugging interface, J-link does not support this function. (1)  Connect the USB cable to the P6 port. (2)  LPC55(s)6x/2x uses I2C1, and LPCxpresso55s69-evk development board has already connected I2C1 and LPC-LINK2, no need additional connection. (3)  Enter ISP mode, refer to 3.1. (4) Configure the MCUXpresso Secure Provisioning Tool, refer to 3.1, select the I2C connection mode, and perform a connection test.   Step 5 and step 6 are the same as 3.1.   Summary (1) All ISP interfaces (USB/UART/SPI/I2C) are supported by MCUXpresso Secure Provisioning Tool. (2) LPC-link2/MCU-LINK pro must be configured as CMSIS-DAP debug probe. (3) Check the chip version and make sure use the correct SPI port. (4) Make sure that the usb  cable interface is connected correctly and must enter the ISP mode before testing the connection.      

1. Background When an embedded device is being upgraded, due to external factors such as power outage and forced interruption, the new firmware can‘t be written completely into flash, which causes problems when the system is started. Or if the image file is damaged during device is currently running, the system will break down and the device cannot run. To solve these problems, you can use the dual image, which ensures that at least one image file can be started and works properly at any time. If anything goes wrong, the bootloader detects and uses the alternate image file. 2. Principle LPC5536 ROM supports the dual image boot for internal flash, that means, in the flash region, two boot images can be placed there; ROM decides to boot which image based on the image version, boot the one with the newer image version first, if fail, boot the older one. During power-on and startup, the ROM first detects the location and size of the relocated image file in the CMPA, and then detects the version number of the two images. Therefore, when the dual image is used,  mainly need configure the relocation address and version number of the image files. The internal flash boot flow for dual image is as follows:   2.1 Relocating Image File The LPC5536 internal flash supports remapping. When set the remap offset, Internal FLASH memory AHB access will change the access address adding the offset as the below figure shows. For example, when the offset is set to 128K(0x20000), the access to 0x0 will be remapped to 0x20000. Via this IP feature, ROM can implement a dual image boot with two images. The offset and the remap size of the image is set in CMPA region by the user. This is an illustration of two image files stored in internal FLASH. The offset and remap size of the second image is set by the user in the CMPA area to let ROM know the location of the second image.   2.2 Configuring Image Version The image version is the image header offset 0x24; bit 10 shows whether the image contains the image version for not; if bit10 is 0, that means the image has no image version; ROM will take the image version as 0.   3、Implementation 3.1 Configuring CMPA 1) Configure Data Values in the CMPA Use blhost to write the modified bin file to CMPA to configure the image1 offset and remap size. The procedure is as follows: First, open an all “0” cmpa.bin and change the data at 0x3E23C to 0x20000, as shown in the figure below:   Then, modify the remap size. The data at address 0x3E238 is changed to 0x1d800, as shown in the following figure:   Modify and save, rename as cmpa_new.bin, save as \blhost_2.6.7\blhost_2.6.7\bin\win. 2) Download cmpa_new.bin Blhost 2.6.7 is a command-line tool, that use it to program cmpa_new.bin. Check whether the communication between blhost and development board is successfully. Firstly, check the port number for connecting between development board and computer from  device manager.   Secondly, short 3 and 4 of jumper J43 on lpc55s36-evk to enable ISP boot. Thirdly, press the reset key to reset board, input connection test command “blhost-p com12 -- get-property 1” Check whether communication is normal. If connection is successful, the message will be displayed as below:   Program modified bin file into CMPA. Write CMPA by using command “blhost-pcom12 -- write-memory 0x3e200 cmpa_new.bin”as shown below:   Read back CMPA data after writing. To confirm the accuracy of the data, run command “blhost-pcom12 -- read-memory 0x3e200 512” to view the configured CMPA data, as shown in the following figure:   3.2 Setting Dual Image Version To observe experimental effect, Image0 function is the RED light on LPC5536-evk development blinking, Image1 function is BLUDE light blinking. In Image0 project, set version number to 1, in Image1 set version number to 2: Open the project of red light blinking and change the header file to 0x10400 at offset 0x24.   Open the project of blue light blinking and change the header file to 0x20400 at offset 0x24.   3.3 Remap Flash For users, LPC5536JBD100 has a total of 246K internal flash available, so Image0 is assigned to the address range 0x00000-0x1FFFF and Image1 is assigned to the address range 0x20000-0x3D7ff. If using MCUXpresso ID, the Settings are as follows: Right-click Selected Project -> choose Properties ->MCU settings, set the Location (start address) and Size, click  Apply button when finished. The red light blinking project are modified as follows:    The blue light blinking project modified as follows:   Re-compile the project.  3.4 Functional Testing Test application is two lighting projects, namely red light blinking and blue light blinking. The red light blinking is image0, version 1, and the blue light blinking is image1, version 2. Therefore, if test result is blue light blinking, dual image function works successfully.. Download Images: Using GUI Flash Tool in MCUXpresso IDE, download two image files to the development board:   Open, and the following view pops up. Select download File in "File to program", then click run button, image will be downloaded to flash.   When the download is complete, click OK.   Download another image in the same way. Note that "mass erase" cannot be checked when programing the second image. If you use other tools to program, also should disable the same function as "mass erase", avoid erasing the first image file. Test result： After downloading the program and reset, the blue light blinking. Further test: Change the version number of red light blinking project to 3, that is, modify 0x10400 to 0x30400. Then downloading the image file again. The red light blinking. 4、Summary Dual image function increases the security for boot and firmware update of embedded devices. It is necessary to pay attention to the way of setting image offset, remapping size and configuring image version in the CMPA area when using it, and also pay attention to the flash configuration in the two projects.   Attachment is test application project.

The ADC of LPC55xx supports scan mode, in scan mode, once ADC triggering (either hardware or software) can convert multiple analog channels. The document gives an example that the CTImer2 module triggers ADC and ADC converts two analog channels for each triggering. The doc introduces the CTimer configuration, ADC triggering control register configuration, and ADC Command buffer chain and ADC result reading , in this way, the CTimer can trigger ADC, the ADC can convert multiple channels. The example and the doc are attached. The Example is developed based on SDK example lpcxpresso55s69_lpcadc_interrupt example, the tools is MCUXprsso IDE ver11.7, the SDK package is SDK_2.x_LPCXpresso55S69 ver2.11.1  

In some early LPC products, such as LPC11xx, LPC17xx, LPC18xx, LPC40xx, LPC43xx, LPC8xx, etc, CRP is used to utilize code protection. CRP has three different security levels: Figure 1 shows the security levels of CRP1, CRP2, and CRP3. Figure 1 The LPC55 series (LPC55(S)0x, 1x,2x, and 6x) uses Secure boot and Protected Flash Region (PFR) configuration instead of CRP for security protection. The part number with S (eg. LPC55S) supports Secure boot, for instance, LPC55S28 and LPC55S06. However, non-S series products, such as LPC5506, LPC5528,  can only utilize code protection by configuring FPR related fields. CRP2 is the most commonly used protection level. With CRP2, SWD access is blocked, so users can not read, write, or erase Flash via SWD or ISP. In addition, users cannot erase part of Flash to modify existing code. Once in CRP2 mode, Flash can only be recovered by Mass Erase Flash, which effectively prevents attacker from reading and modifying the Flash code. Unfortunately, the LPC5500 device such as LPC55(S)0x, 1x,2x,6x doesn't have exactly the same functional mechanism as the CRP2, which is questioned by many users. However, if we need to achieve the same functionality as CRP2, we can configure CMPA to disable ISP and SWD debugging port. 1.   Disable ISP Customer Manufacturing/Factory Configuration Area (CMPA) is part of the PFR, Configure BOOT_CFG to select whether the ISP mode is enabled. Table 1 shows the field table starting with 9E40 word address in CMPA. ISP control domains have been marked in red (as shown in Table 1). Table 2 shows the mode selection of ISP domains, 111 is ISP disabled. If the ISP mode is disabled, set BOOT_CFG to 0b1110000. Word Address（HEX） Byte Address Field Description 6 5 4 3 2 1 0 9E40 9E400 BOOT_CFG Default ISP mode 0 0 0 0 9E404 SPI_FLASH_CFG 0 0 0 0 0 0 0 9E408 USB_ID USB Vendor ID 9E40C SDIO_CFG 0 0 0 0 0 0 0 9E41 9E410 CC_SOCU_PIN ISP_CMD_EN MCM33_DBGEN 0 0 0 0 0 9E414 CC_SOCU_DFLT ISP_CMD_EN MCM33_DBGEN TAPEN SPIDEN SPNIDEN DBGEN NIDEN Table 1 Default ISP mode Bit 【6：4】 Auto ISP 000 USB_HID_MSC 001 UART ISP 010 SPI Slave ISP 011 I2C slave ISP 100 Disable ISP 111 Table 2 2.   Disable SWD The DCFG_CC_SOCU is a configuration that specifies debug access restrictions per debug domain. These access restrictions are also referred as constraint attributes in this section. The debug subsystem is sub-divided into multiple debug domains to allow finer access control. Figure 2 shows debug domains and their corresponding control bit position in DCFG_CC_SOCU. Logically, DCFG_CC_SOCU has two components: SOCU_PIN and SOCU_DFLT. The SOCU_PIN and SOCU_DFLT registers are used together to define SWD debug access for the module. Which is logically composed of two components: SOCU_PIN: A bitmask that specifies which debug domains are predetermined by device configuration. SOCU_DFLT: Provides the final access level for those bits that the SOCU_PIN field indicated are predetermined by device configuration. In another words, set the corresponding bit of SOCU_PIN and SOCU_DFLT register to 1 at the same time to enable the module. This module is disabled by setting the corresponding bits of the SOCU_PIN and SOCU_DFLT registers to 0 simultaneously. See Figure 2. Figure 2 Note that the default value of CC_SOCU_PIN and CC_SOCU_DFLT in LPC55 PFR are all zeros. Therefore, in this case, although SOCU_PIN and SOCU_DFLT are both 0, the bit reverse rule is not met (Figure 3 below). Therefore, all debugging permissions are enabled by default when CC_SOCU_PIN and CC_SOCU_DFLT are all 0. Figure 3 Note: the distinction between CC_SOCU_PIN(CC_SOCU_DFLT) and SOCU_PIN(SOCU_DFLT). The former with CC_ includes the reverse bit of the latter. For example, if SOCU_PIN and SOCU_DFLT are set to all zeros and the reverse bit is set to 1, all SWD modules are disabled. Figure 4 3. Implementation The following uses LPC5506 as an example to configure the CMPA field: 3.1  Disable ISP and SWD Figure 5 Keep the default CMPA values except for the two highlighted in red in Figure 5. 1) Set BOOT_CFG to 0x70 to disable ISP. 2) Set all SOCU_PIN and SOCU_DFLT to 0, and set all reverse bits to 1. That is, disable all debug accessing subdomains. 3.2 Enable ISP and SWD Figure 6 Keep the default CMPA values except for the two highlighted in red in Figure 6. 1) Set BOOT_CFG to 0x00 to enable Auto ISP. 2) Restore the default values of DCFG_CC_SOCU, that is, CC_SOCU_PIN and CC_SOCU_DFLT to all zeros. in this case, all debug permissions are restored (turned on) because the rule of bit reversal is not met (see Part 2 of this article). 3.3 Code Implementation Enable or disable the SWD and ISP functions by serial command (1 or 0). Figure 7 The demo code is attached. This routine has been tested on the LPCXpresso55S06 development board. NOTE：     As system security requirements and the attack surface evolves, it is important for customers to understand the types of attacks (especially advanced physical attacks) which NXP does not claim to protect against, or strongly mitigate, so that appropriate mitigation can be taken by the customer at the system level if necessary.  

The minimum saturation current spec of Inductor is 300mA in the LPC55xx internal DC/DC converter, why is it 300mA, what is the actual current flowing through the inductor? 1)This is internal DC/DC converter block diagram for LPC55xx, on the LX pin, the 4.7uH inductor and 22uF capacitor are required, the FB pin is the detected pin to sense the output voltage, the DC/DC converter provide about 1.1V power for the VDD_PMU power supply pin. Let's discuss the current flowing through the inductor L1 via LX pin   2)compute the actual current flowing the inductor The above circuit is the illustrating block diagram, the control regulation uses PWM signal to control the MOSFET, but the high time of the PWM signal is constant for each PWM cycle, in other words, the on-time of the MOSFET is constant, for the LPC55S69 internal DC/DC converter, the on-time Δt is 0.52us, which means that the interval of MOSFET turning-on time is 0.52us. Assume that the VDC_IN is 3.3V, the output voltage of the DC/DC converter is 1.1V, the constant high time of the PWM signal is 0.52uS. when the MOSFET is on, the capacitor will be charged.   The above figure is the waveform tested on the LX pin of LPC55S68 on the LPC55S69-EVK board, you can measure via scope that the high time of the yellow PWM signal is 0.52uS, during which the MOSFET turns on, the capacitor is charged. The inductor works in DCM mode(discontinuous current mode)   The incremental current flowing the inductor during the MOSFET turns on: ΔI= (VDC_IN-VDC_OUT)* Δt/L=(3.3V-1.1V)*0.52*10**(-6)/4.7*10**(-6)=243mA.   3)The actual flowing current through the inductor is about 250mA for each PWM cycle, so when you select the inductor, the saturation current spec must be greater than actual current, the minimum required saturation current spec for the 4.7uH inductor is 300mA, when you select inductor for the DC/DC converter, you should select the inductor with 300mA or above saturation current .

Contents     Introduction to OPAMP. ........................................1     Usage of LPC5536-OPAMP. ................................2 2.1 Follower OPAMP. .................................................2 2.2 Non-inverting OPAMP. .........................................3 2.3 Differential OPAMP. ..............................................3     Test Preparation of LPC5536-EVK. ......................4     Test Result ............................................................5 4.1      Follower Test ....................................................6 4.2      Non-inverting Test ............................................7 4.2.1 Error Analysis. ...................................................7 4.2.2 Gain Error and Output Offset Error ...................8 4.2.3 OPAMP Output Error .........................................9 4.4 Differential Test ...................................................10     Conclusion. .........................................................11   The Article shows the OPAMP performance test that the precision of LPC5536-OPAMP matches the description in the product data sheet. The gain error is less than 5%, and the input offset voltage is less than 5mV, which can meet the presicion need to a certain extent. It is worth mentioning that the output error of LPC5536-OPAMP is very small at low magnification. For example, the full-range error is just single-digit mV at the magnifications of 2X and 5X in non-inverting mode. For scenarios requiring higher precision, users can connect the external high-precision resistors to achieve higher output precision.  The article includes detailed test steps and EVK board settings. For detail, see attached article.  

Because the LPC55S69 has PowerQuad, in SDK example code, the FFT/FIR/IIR and the other DSP function are implemented by the Powerquad module instead of the Cortex-CM33 core.  This is the Powerquad example to implement the DSP function:'   But if customers want to use CMSIS-DSP to implement the DSP function based on Cortex-CM33 instead of Powerquad module, customers can not import SDK example, he has to create a new project, this is the procedures: 1)Create a new project by clicking New->Create a new C/C++ Project   2)select the processor like LPC55S69 3)In the following menu,click CMSIS Driver, and check the CMSIS_DSP_Library and CMSIS_DSP_Library_Source You have to click the Driver which can select your peripherals driver you will use.    3)as the following screenshot, after completion, you can see the CMSIS-DSP source code and library have included in the project    

  需求： 客户需要对Image文件做出完整性检测，利用IDE固有功能添加这类信息简便且可靠，以往有类似的link提到了这些配置，对于LPC55系列，需要做一些更新。 CRC Checksum Generation with MCUXpresso IDE - NXP Community Solution 基于MCUX环境 下载 SRecord http://srecord.sourceforge.net/ srec_cat.exe是下载后我们主要使用的工具，通过为其添加一个系统变量名，将SRecord目录加入系统路径     重启MCUX IDE之后可以在工程配置中看到该变量：       创建一个脚本文件crc_add.txt，放在debug目录下，用于填充app后的flash空余位置为0xFF, 并后续生成CRC32值并放置0x00037FFC位置。最终生成的srec文件为包含所有内容的image。           # srec_cat command file to add the CRC and produce application file to be flashed # Usage: srec_cat @filename #first: create CRC checksum lpcxpresso55s06_hello_world_image_length_MCUX.srec # input file #-fill 0xFF 0x00000000 0x00038000 # fill blank code area with 0xff from 0x00000000 to 0x00038000 (0x00038000是把LPC55S06的末尾地址稍往前提，实际因为0x0003D7FF） -fill 0xFF 0x00000000 0x00037FFC #填充0-0x37FFC区间的未用地址为0xff -crop 0x00000000 0x00037FFC # just keep code area for CRC calculation below , 保留这段区间的内容，排除除此范围内的其他数据 #-CRC16_Big_Endian 0x00037FFE -CCITT # calculate big endian CCITT CRC16 at given address.， 为以上空间数据计算CRC16，并放置在0x00037FFE地址，2字节 -CRC32_Little_Endian 0x00037FFC -CCITT #CRC32 -crop 0x00037FFC 0x00038000 # keep the CRC itself #second: add application file lpcxpresso55s06_hello_world_image_length_MCUX.srec # input file -fill 0xFF 0x00000000 0x00037FFC # fill code area with 0xff -crop 0x00000000 0x00037FFC #-crop 0x10000000 0x10000170 0x10000172 0x10010000 #keep all except CRC #finally, produce the output file -Output # produce output lpcxpresso55s06_hello_world_image_length_MCUX_crc.srec      创建一个crc_file_convert.txt文件，也放在debug目录下，用于将上一步生成的最终image的srec文件转换为bin文件，用于生成或者比对 # srec_cat command file to add the CRC and produce application file to be flashed # Usage: srec_cat @filename #third: create bin file lpcxpresso55s06_hello_world_image_length_MCUX_crc.srec -o lpcxpresso55s06_hello_world_image_length_MCUX_crc.bin -binary 在IDE的Post build栏目添加如下命令：     arm-none-eabi-size "${BuildArtifactFileName}"   默认自带的统计image size功能 arm-none-eabi-objcopy -v -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin"    将image转成bin文件，用于后续使用和比对 arm-none-eabi-objcopy -v -O srec "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.srec" & srec_cat.exe @CRC_add.txt 填充image，计算CRC32，整合成新的srec image srec_cat.exe @CRC_file_convert.txt  将上一步得到的srec image转化为bin文件，用于后续使用和比对   《hello_world_image_length_MCUX》例程会自行统计应用程序的CRC32值，并于IDE产生的CRC32值做比对   这里需要注意的是，由于MCUX IDE是借助于外部工具来填充flash和计算CRC32，所以默认IDE调试和下载选择afx文件并不包含这些信息。当校验程序开始运行，会发生： 读写未写入的flash，对于LPC55系列会发生hardfault CRC32值并不存在 所以测试这个程序需要单独下载包含所有的srec文件或者bin文件，而不是默认的afx文件。      

1    introduction The doc demonstrates how to use MRT(Multi-rate Timer) module to implement the delay function, the delay time is programmable. The MRT has a One-shot stall mode, with the mode, while the MRT channel counter counts down, the core stalls until the MRT channel counter reaches to zero. After the MRT channel counter reaches to zero, the MRT channel becomes idle, the core continues to work.   2 delay function description Sometimes, it is expected that there is a programmable delay between two instructions, for example Instruction 1 Delay Instruction 2 In general, the delay function can be implemented by forcing the core to execute __asm(“NOP”) instructions This code is like: Void delay(uint32_t interval) {        Uint32_t counter;        Counter=ConvertTimeToCounter(interval);        For(uint32_t i=0; i<counter); i++)        {        __asm(“nop”)        } }   The macro convertTimeToCounter is used to convert a time to a number of loop   1.   MRT feature The MRT module of LPC family provides a unique feature called One-shot stall mode, because the test is based on LPC55S69-EVK board, so I referred to the section 27.5.3 One-shot stall mode in UM11126.pdf. The MRT does not have external pad.   One-shot stall mode: Bus stall mode can be used when a short delay is need between two software controlled events, or when a delay is expected before software can continue. Since in this mode there are no bus transactions while the MRT is counting down, the CPU core stalls, consumes a minimum amount of power during that time until the MRT counter reaches to zero. Therefore the One-shot stall mode of MRT can make core stall during the MRT counting down process, the delay function can be implemented.   3 MRT clock source and delay time For the LPC55S69, the clock source of MRT module is the AHB Bus clock, which is the same as the core clock. For the LPC55S69 example, there is the code to set up the core clock void BOARD_InitBootClocks(void) {     BOARD_BootClockPLL150M(); } So the  MRT clock frequency is 150MHz.       The delay time is a time, but the MRT is a counter, so the delay time must be converted to the counter value. The counter value is dependent on the MRT clock frequency. The MRT clock source is AHB bus clock, or the core clock. The LPC55S69 core clock frequency is 150Mhz, so we can define #define MRT_CLOCK_FREQUENCY 150MHz If the required delay time is delay_time variable in second unit, the required MRT counter value is   MRT counter value=delay_time/(MRT clock cycle time)=delay_time* MRT_CLOCK_FREQUENCY.   For example, assume the required delay_time is 1mS or 1*10**(-3)  Second, the corresponding counter value is 1*(10**-3)*150*(10**6)=150 000   The MRT delay time restriction. The MRT counter register is 24 bits, the maximum counter value is 2**24= 16,777,216, the maximum delay time is 16777216/(150*10**6)=0.111848 S or 111 mS.     3 source code description MRT delay function source code is based on SDK package SDK_2_11_1_LPCXpresso55S69.zip, the tools is MCUXpresso IDE v11.5.0. The example is run on LPC55S69-EVK The example uses MRT to delay 100mS(0.1 Second), after the delay, a LED is toggled The MRT counter value is 0.1S*150*(10**6)=15 000 000   For the mrt_init() api function, it initializes the MRT and set the MRT channel0 in OneShotStall mode. Once the core executes the line MRT_StartTimer(MRT0, kMRT_Channel_0, 15000000); the MRT channel0 counter will count down from 15000000, during the counting process the Cortex-M33 will stall. After the counter reach to ZERO, the core finishes the stalling mode and continues to execute the next line, the MRT channel0 counter will be in idle mode.       /**  * @file    LPC55S69_Project_mrt_stall.c  * @brief   Application entry point.  */ #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC55S69_cm33_core0.h" #include "fsl_debug_console.h" #include "fsl_mrt.h" #include "fsl_iocon.h"   /* TODO: insert other include files here. */ #define BOARD_LED_PORT BOARD_LED_BLUE_GPIO_PORT #define BOARD_LED_PIN  BOARD_LED_BLUE_GPIO_PIN /* TODO: insert other definitions and declarations here. */ void mrt_init(void); /*  * @brief   Application entry point.  */ int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals(); #ifndef BOARD_INIT_DEBUG_CONSOLE_PERIPHERAL     /* Init FSL debug console. */     BOARD_InitDebugConsole(); #endif     mrt_init();     PRINTF("Hello World\n");     for(;;)     {     MRT_StartTimer(MRT0, kMRT_Channel_0, 15000000);     GPIO_PortToggle(GPIO, BOARD_LED_PORT, 1u << BOARD_LED_PIN);     __asm("nop");       }     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;         /* 'Dummy' NOP to allow source level single stepping of             tight while() loop */         __asm volatile ("nop");     }     return 0 ; }   uint32_t mrt_clock; mrt_config_t mrtConfig; void mrt_init(void) {           /* mrtConfig.enableMultiTask = false; */         MRT_GetDefaultConfig(&mrtConfig);           /* Init mrt module */         MRT_Init(MRT0, &mrtConfig);           /* Setup Channel 0 to be repeated */         MRT_SetupChannelMode(MRT0, kMRT_Channel_0, kMRT_OneShotStallMode);           //MRT_StartTimer(MRT0, kMRT_Channel_0,  15000000);   }       }                                                                                                              When the above code is running, user can see the blue LED toggles on the LPC55S69-EVK board. Connecting the PIO1_4 pin signal ( the pin 5 of P18 connector) on LPC55S69-EVK, the PIO1_4 signal toggling frequency is 5Hz, the cycle time is 200mS, so the delay is 100mS.      

The document describes how to use DMA triggering mode to transfer data between memory and peripheral. In detail, the CTimer0_match0 is configured to generate matching event with programmable period, the CTimer0 matching event triggers DMA, the DMA transfer data between a variable in memory and GPIO Toggling register(the GPIO is connected to a LED), so user can see the LED toggling. The DMA Ping-Pong modes are used, so user can observe different LED toggles. The Example code is developed on SDK package, run on LPC55S69-EVK, the tools is MCUXpresso ver11.5.  

The power measurement board includes eight measurement channels which support for eight programmable gain amplifiers(LTC6915) and two ADC converters(AD7175). The measurement board measures the voltage drop across sampling resistor, and send to the ADC after the voltage drop is processed by amplifier and make it available via SPI. Microcontroller LPC55S69 collects the data from the measurement circuit and send it to the host computer via USB VCOM port. The MCU can control the gain value of programmable gain amplifiers by SPI when different power circuit are measured. The host computer connects to the power measurement board through the USB virtual serial port, the MCU initializes and configures the measurement unit by SPI, and starts to measure the inside current and monitor the voltage. MCU adjust the gain parameter and then transmit current and voltage data to MCU by SPI, then MCU transmits the data to the host computer for processing and display through the virtual serial port. The voltage drop of the measured circuit to be measured is firstly amplified by the programmable amplifier LTC6915, and MCU monitor the state which whether the data is abnormal at the same time. R0 is the sampling resistor, LTC6915 is a selectable programmable amplifier, the gain can be set to 14 kinds, PGA gain parameter is adjusted when the current changes. ADC7175 is the 24-bit high-precision ADC, which is more advantageous in the application of small current measurement. When the MCU switches the low power mode to the normal mode, and the LTC6915 will reduce the gain value by SPI. The power measurement board provides easy connection method by two-wires cable. For example, the MIMXRT1180EVK and MIMXRT1020EVK are connected with power measurement board. The USB virtual COM is used for data transfer, and display by PMT(power management tool) or other PC GUI, the measurement power data include current, voltage and power. There are more detailed descriptions in the attachment.

Recently, customers reported that the number of PWM generated by SCTimer module was inconsistent between LPC55s06 user manual and data sheet. There are many kinds of PWM generation formats, so the maximum number of PWM generated by SCTimer is also different. I think the user manual and data sheet are not very clear, so this paper makes a specific analysis. It mainly depends on SCTimer resources, such as the number of events and output channels. For all LPC series, the mechanism of SCTimer generating PWM is the same. Therefore, this paper takes LPC55s6 as an example. LPC55s06 user manual: The SCTimer/PWM supports: – Eight inputs. – Ten outputs. – Sixteen match/capture registers. – Sixteen events. – Thirty two states. According to the different control modes of generating PWM wave, this paper is divided into single-edge PWM control, dual-edge PWM control and center-aligned PWM control. 1. Single-edge PWM control The figure below shows two single-edge control PWM waves with different duty cycles and the same PWM cycle length.   It can be seen from the above figure that the two PWM waves require three events: when the counter reaches 41, 65 and 100 respectively. Because of the same PWM cycle length, all PWM outputs need only one period event. Summary: The cycle length of all PWM waves are the same, so only one period event is required. The duty cycles of each PWM are different, and each PWM requires an event. The SCTimer of LPC55s06 has 16 events, one is used as PWM period event, and there are 15 left. Theoretically, 15 channels of PWM can be generated. However, LPC55s06 has only 10 outputs, so it can generate up to 10 single-edge control PWM waves. 2. Dual-edge PWM control The figure below shows three Dual-edge control PWM waves with different duty cycles and the same PWM cycle length.   It can be seen from the above figure that the three PWM waves require seven events: when the counter reaches 1, 27, 41, 53, 65, 78, 100.  Summary: PWM cycle length control needs one event, and each PWM duty cycle needs two events to trigger. The SCTimer of LPC55s06 has 16 events, one as PWM frequency event, and the remaining 15, so it can generate up to 7 dual-edge control PWM waves. 3. Center-aligned PWM control Center-aligned PWM control is a special case of dual-edge PWM control. The figure below shows two center-aligned PWM waves with different duty cycles and the same PWM duty length.   It can be seen from the above figure that the two center-aligned PWM waves need three events in total, which are the PWM cycle length and the duty cycle trigger of the two PWM waves. Because the left and right are symmetrical, only one event is needed to control the duty cycle of one PWM. Summary: All PWM have the same cycle length, so an event is required. The duty cycle of each PWM circuit is different, but the left and right are symmetrical, and an event trigger is required for each circuit. The SCTimer of LPC55s06 has 16 events, one is used as PWM cycle length, and there are 15 left. Theoretically, 15 channels of PWM can be generated, but LPC55s06 has only 10 outputs, so it can generate up to 10 channels of unilateral control PWM wave. Summary:   Maximum number of PWM generated by LPC55s6 SCTimer: Single-edge PWM control: 10 Dual-edge PWM control: 7 Center-aligned control: 10   The number of SCTimer events and output channels is different with different chips, but the analysis method is the same. Customers can analyze whether the SCTimer in a certain chip meets the requirements.

1. General Jointly developed by NXP and Embedded Artists, the MCU-Link Pro is a fully featured debug probe that can be used with MCUXpresso IDE and 3rd party IDEs that support CMSIS-DAP and/or J-Link protocols. MCU-Link Pro is based on NXP’s MCU-Link architecture, found in the MCU-Link low cost debug probe and on board evaluation boards, and runs the same firmware as all these implementations. In addition to SWD debug, SWO profiling and a USB to UART bridge features (VCOM) found in the base MCU-Link, the Pro model adds a J-Link LITE firmware option, energy measurement, analog signal monitor, USB to SPI and I2C bridging capability and an on-board LPC804 for peripheral emulation. MCU-Link Pro is based on the dual Arm® Cortex-M33® core LPC55S69 microcontroller, and features a high speed USB interface, providing high performance debug at low cost. The USB bridging feature is supported by the free LIBUSBSIO host library from NXP. MCU-Link Pro is compatible with Windows 10, MacOS and Linux. The product comes with the necessary firmware installed, with free utilities provided to enable future firmware updates from NXP to be installed. MCU-Link Pro kit provides all parts that need to be used. Kit Contains MCU-Link Pro debug probe 10 pin to 10 pin Cortex debug cable 10 pin to 20 pin Cortex debug cable Digital port / analog input adapter cable Spare jumpers 2. MCU-Link Pro Overview MCU-Link Pro has complete functions. This article mainly introduces the usage and precautions of several basic functions, including SWD debugging, UART (VCOM) and energy measurement. The following figure is the reference diagram of MCU Link Pro, covering all functions, and the highlighted part is the function used in this article.   2.1 SWD debug As a debugger, the most basic function of MCU Link Pro is debugging, and now commonly used is SWD debug. When you get the development board, you can see that there are three SWD interfaces on it. Only J7 is the SWD interface to debug target board. It is on the opposite side of the USB interface to facilitate the connection and debugging of the target board. The other two interfaces J3 and J11 are SWD interfaces of LPC55s69 and LPC804 respectively. Another important function of this debugger is that it can supply power to the target board. The use method is to connect J6 with jumper, and 1.8V and 3.3V power supply can be selected through J5. The specific connection is shown in the figure below: - Connect the SWD interface of J7 and target board with debug line. - J6 connecting jumper cap (supplying power to target board).  The USB cable connects J1 and the computer, so you can debug with MCUXpresso IDE or other IDEs. CMSIS-DAP and J-Link debugging protocols are supported. For how to update the debugger firmware, please refer to:https://www.nxp.com/document/guide/getting-started-with-the-mcu-link-pro:GS-MCU-LINK-PRO   2.2 UART (VCOM) Usage In the development and debug stage, users often need to print information through the serial port. Using MCU Link Pro, without additional hardware, directly connect the TX and Rx of target UART with the Rx / TX of UART of MCU Link Pro. Through the VCOM function, you can print information from the USB port to the serial port assistant at the PC end. The specific connection is shown in the figure below: - J19-8 (purple line) connects UART TX of target board - J19-9 (gray line) connects the UART RX of the target board - J19-1 (GND) connect GND of target board - J14 disconnected - J6 plug in the jumper cap (supply power to the target board)   2.3 Energy measurement The MCU Link Pro board contains a circuit that can measure the current or voltage of the target board, and it can be calibrated automatically every time it is powered on without manual intervention. There are two maximum measurement ranges for energy measurement. If the data is higher than the maximum range, the measurement result is inaccurate. The two maximum measurement ranges are as follows, which need to be configured with J16, J17 and J18.   Energy measurement needs to be used with MCUXpresso IDE, and the results are displayed in the IDE interface. Use J9 port on the board. The specific connection is shown in the figure below: - J9-1 connects the power supply end of the target board. - J9-3 connects the chip ends of the target board. - J9-2 connects the GND of the target board For details on how to use the MCU Xpress IDE interface, please refer to：<MCUXpresso_IDE_Energy_Measurement.pdf> 3. Test result The test results are as follows: