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i.MX Processors Knowledge Base

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Overview This purpose of this document is to introduce how to support recovery mode for POR reboot event based on MX6 Android R13.4.1. Background If you boot Android R13.4.1 on MX6 SabreSD board, the reboot reason is Watchdog. But if the reboot reason is changed from Watchdog to POR, the recovery mode is failed to enter after factory reset. In R13.4.1, the bit 8 of SRC_GPR10 is used as the persistent bit of recovery mode. This bit is expected to be kept after reboot so that U-boot can use this bit to distinguish what mode should enter. However all SRC registers will be reset on POR sequence according to i.MX6DQRM Section 59.4.1.2.3 IPP_RESET_B (POR). So when the reboot reason is POR, the persistent bit of recovery mode is cleared even if the software set it before reboot. It causes the bootloader won't enter recovery mode after reboot. Software Changes According to i.MX6DQRM, the SNVS_LP General Purpose Register provides a 32 bit read write register, which can be used by any application for retaining 32 bit data during a power-down mode. So to support recovery mode for POR event, the SNVS_LP register can be used to store the persistent bit of recovery mode. The following changes are reqiured to apply (See patches.tar.gz) Apply for Uboot patch bootable/bootloader/uboot-imx/0001-ENGR00235817-mx6-use-SNVS-LPGPR-register-to-store-bo.patch. diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 257c930..bd47130 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -1146,14 +1146,14 @@ int check_and_clean_recovery_flag(void) {   int flag_set = 0;   u32 reg; - reg = readl(SRC_BASE_ADDR + SRC_GPR10); + reg = readl(SNVS_BASE_ADDR + SNVS_LPGPR);   flag_set = !!(reg & ANDROID_RECOVERY_BOOT);   /* clean it in case looping infinite here.... */   if (flag_set) {    reg &= ~ANDROID_RECOVERY_BOOT; -  writel(reg, SRC_BASE_ADDR + SRC_GPR10); +  writel(reg, SNVS_BASE_ADDR + SNVS_LPGPR);   }   return flag_set; @@ -1168,14 +1168,15 @@ int fastboot_check_and_clean_flag(void) {   int flag_set = 0;   u32 reg; - reg = readl(SRC_BASE_ADDR + SRC_GPR10); + + reg = readl(SNVS_BASE_ADDR + SNVS_LPGPR);   flag_set = !!(reg & ANDROID_FASTBOOT_BOOT);   /* clean it in case looping infinite here.... */   if (flag_set) {    reg &= ~ANDROID_FASTBOOT_BOOT; -  writel(reg, SRC_BASE_ADDR + SRC_GPR10); +  writel(reg, SNVS_BASE_ADDR + SNVS_LPGPR);   }   return flag_set; diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h index efb90c2..45381e2 100644 --- a/include/asm-arm/arch-mx6/mx6.h +++ b/include/asm-arm/arch-mx6/mx6.h @@ -732,6 +732,8 @@ #define SRC_GPR9  0x40 #define SRC_GPR10  0x44 +#define SNVS_LPGPR              0x68 + /* Get Board ID */ #define board_is_rev(system_rev, rev) (((system_rev & 0x0F00) == rev) ? 1 : 0) #define chip_is_type(system_rev, rev) \ Apply for kernel patch kernel_imx/0001-ENGR00235817-mx6-use-SNVS-LPGPR-register-to-store-bo.patch diff --git a/arch/arm/mach-mx6/system.c b/arch/arm/mach-mx6/system.c index 6d24f22..61649c5 100644 --- a/arch/arm/mach-mx6/system.c +++ b/arch/arm/mach-mx6/system.c @@ -563,7 +563,7 @@ void mxc_clear_mfgmode(void) #endif #ifdef CONFIG_MXC_REBOOT_ANDROID_CMD -/* This function will set a bit on SRC_GPR10[7-8] bits to enter +/* This function will set a bit on SNVS_LPGPR[7-8] bits to enter   * special boot mode.  These bits will not clear by watchdog reset, so   * it can be checked by bootloader to choose enter different mode.*/ @@ -574,18 +574,18 @@ void do_switch_recovery(void) {   u32 reg; - reg = __raw_readl(SRC_BASE_ADDR + SRC_GPR10); + reg = __raw_readl(MX6Q_SNVS_BASE_ADDR + SNVS_LPGPR);   reg |= ANDROID_RECOVERY_BOOT; - __raw_writel(reg, SRC_BASE_ADDR + SRC_GPR10); + __raw_writel(reg, MX6Q_SNVS_BASE_ADDR + SNVS_LPGPR); } void do_switch_fastboot(void) {   u32 reg; - reg = __raw_readl(SRC_BASE_ADDR + SRC_GPR10); + reg = __raw_readl(MX6Q_SNVS_BASE_ADDR + SNVS_LPGPR);   reg |= ANDROID_FASTBOOT_BOOT; - __raw_writel(reg, SRC_BASE_ADDR + SRC_GPR10); + __raw_writel(reg, MX6Q_SNVS_BASE_ADDR + SNVS_LPGPR); } #endif diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h index 48b04b1..bb22de0 100644 --- a/arch/arm/plat-mxc/include/mach/mx6.h +++ b/arch/arm/plat-mxc/include/mach/mx6.h @@ -302,6 +302,8 @@ #define SRC_GPR9   0x40 #define SRC_GPR10   0x44 +#define SNVS_LPGPR   0x68 + /* GPC offsets */ #define MXC_GPC_CNTR_OFFSET  0x0
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There are two format system image(ext4): raw and sparse. The raw image is  larger, you can mount it to ext4 directly(mount -t ext4 system.img system). The sparse image is supported lp5.0, it is a bit smaller. The below part will take IMX7D SDB board as example. You can change the setting according your platform hardware.   1 generate sparse image   In Lollipop 5.0 and 5.1, both raw image and sparse image will be generated by default. sparse system image is located in: out/target/product/sabresd_7d/system_sparse.img raw system image is located in:out/target/product/sabresd_7d/system.img Below are the steps used in android build system to generate system.img build out sparse image(-s means the building system image is sparse)           make_ext4fs -s -T -1 -S out/target/product/sabresd_7d/root/file_contexts -l 374476800 -a system           out/target/product/sabresd_7d/obj/PACKAGING/systemimage_intermediates/system.img out/target/product/sabresd_7d/system transform sparse image to raw image           simg2img out/target/product/sabresd_7d/system_sparse.img out/target/product/sabresd_7d/system.img   2 burn sparse image to sd/emmc      There are two ways to program the sparse image into android boot storage Transform the sparse image into raw image in host Linux PC. And use the commands dd commands to program the raw image into the boot storage. Program the sparse image with MFG Tool in i.MX Android release package.                Steps: copy system_sparse.img to files/android/sabresd/. copy simg2img binary (in simg2img.zip) to files/android/. You also need update mfgtools-without-rootfs.tar\mfgtools\Profiles\Linux\OS Firmware\ucl2.xml        diff --git a/Profiles/Linux/OS Firmware/ucl2.xml b/Profiles/Linux/OS Firmware/ucl2.xml      index 3b15ddd..3c3d2ae 100755      --- a/Profiles/Linux/OS Firmware/ucl2.xml      +++ b/Profiles/Linux/OS Firmware/ucl2.xml        @@ -621,8 +621,12 @@              <CMD state="Updater" type="push" body="$ mkfs.ext4 /dev/mmcblk%mmc%p6">Formatting cache partition</CMD>                <CMD state="Updater" type="push" body="$ mkfs.ext4 /dev/mmcblk%mmc%p7">Formatting device partition</CMD>      -       <CMD state="Updater" type="push" body="pipe dd of=/dev/mmcblk%mmc%p5 bs=512" file="files/android/sabresd/system.img">Sending and writting system.img</CMD>      -      +       <CMD state="Updater" type="push" body="send" file="files/android/simg2img" ifdev="MX7D">Sending simg2img</CMD>      +       <CMD state="Updater" type="push" body="$ cp $FILE /tmp/simg2img ">cp simg2img</CMD>      +       <CMD state="Updater" type="push" body="$ chmod  777 /tmp/simg2img ">chmod 777</CMD>      +       <CMD state="Updater" type="push" body="$  mount -o remount,size=512M rootfs /">change size of tmpfs</CMD>      +       <CMD state="Updater" type="push" body="send" file="files/android/sabresd/system_sparse.img" ifdev="MX7D">Sending system_sparse.img</CMD>      +       <CMD state="Updater" type="push" body="$ /tmp/simg2img $FILE /dev/mmcblk%mmc%p5">Sending and writting system_sparse.img</CMD>              <!-- Write userdata.img is optional, for some customer this is needed, but it's optional. -->              <!-- Also, userdata.img will have android unit test, you can use this to do some auto test. -->              <!--    <CMD state="Updater" type="push" onError="ignore" body="pipe dd of=/dev/mmcblk0p7" file="file/android/userdate.img"> Sending userdata.   3 Support sparse image in uboot(v2014.04)      Cheery-pick sparse image related patches. Use write_sparse_image to burn sparse system image.      For detail information, Please check the attached file(uboot(v2014.04)which support sparseimage.zip )        The step of apply these patches: cd myandroid/bootable/bootloader/uboot-imx/ copy uboot(v2014.04) which support sparseimage.zip to myandroid/bootable/bootloader/uboot-imx/         unzip uboot(v2014.04) which support sparseimage.zip git am 0001-add-header-for-Android-sparse-image-format.patch         git am 0002-add-code-to-handle-Android-sparse-image-format.patch         git am 0003-update-code-which-handles-Android-sparse-image-forma.patch         git am 0004-cleanup-code-which-handles-the-Android-sparse-image-.patch         git am 0005-implement-the-Android-sparse-image-format.patch         git am 0006-aboot-fix-block-addressing-for-don-t-care-chunk-type.patch         git am 0007-MA-6732-Add-sparse-image-flash-support-for-uboot-s-f.patch            The page will keep updating.   Reference:      How to enable userdata.img and cache.img in lollipop
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Network File System (NFS)      Setting the host          1 - Install NFS Service on host typing:        $sudo apt-get install nfs-kernel-server          2 - Create symbolic link to ltib/rootfs        $sudo ln -s <ltib instalation folder>/rootfs /tftpboot/rootfs          3 - Setup exports typing:        $sudo gedit /etc/exports          and add the following line:        /tftpboot/rootfs/ *(rw,no_root_squash,no_subtree_check,async)          4 - Restart the NFS server:        $sudo /etc/init.d/nfs-kernel-server restart          Now the host is ready to use NFS      Setting Target Linux Image to use NFS          1. Run LTIB configuration by typing: $cd <ltib instalation folder>          $./ltib -c          2 . On first page menu, go to "Target Image Generation -> Options"       3. Select the option NFS only and exit LTIB configuration to compile with the new configuration.          4. LTIB should start new compiling and create a new Linux image on /<ltib instalation folder>/rootfs/boot/zImage          5. Copy the created image on /<ltib instalation folder>/rootfs/boot/zImage to /tftpboot/zImage          6. The system is ready to run with NFS. The root file system on target will be located on host on /<ltib instalation folder>/rootfs/         
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If anyone else has been frustrated by the lack of RT1050 support or is new to NXP products, the MCU On Eclipse blog has been a great help.  For example, see the MCUXpresso IDE V10.1.0 with i.MX RT1052 Crossover Processor article for a very clear overview/quickstart on getting the MIMXRT1050-EVK up and running. This document was generated from the following discussion: RT1050 Developer Resource
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Setting up your machine Exporting variables Edit your ~/.bashrc and add these 2 lines export ARCH=arm export CROSS_COMPILE=/opt/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- To build and debug android you will need to install some packages and services in the host machine,this how-to assumes that you are using Ubuntu 9.04 or greater. Installing packages sudo apt-get install nfs-kernel-server patch g++ rpm zlib1g-dev m4 bison libncurses5-dev gettext build-essential tcl intltool libxml2-dev minicom tftpd  xinetd For a complete list, depending on system type, refer to Installing required packages Set serial port Setting TFTP Setting NFS Compile Android Download the SDK from our internal repository cd /opt wget http://android.maxtrack.com.br/imx-android-r6.tar.gz tar xvfz imx-android-r6.tar.gz cd imx-android-r6/code tar xzvf R6.tar.gz cd ~ mkdir myandroid cd myandroid curl http://android.git.kernel.org/repo > ./repo chmod a+x ./repo ./repo init -u git://android.git.kernel.org/platform/manifest.git -b donut * If you are behind a firewall or proxy try this one:./repo init -u http://android.git.kernel.org/platform/manifest.git -b donut cp /opt/imx-android-r6/code/R6/default.xml .repo/manifests/default.xml ./repo sync Preparing cross compiling tools cd /opt/imx-android-r6/tool tar xzvf gcc-4.1.2-glibc-2.5-nptl-3.tar.gz -C /opt export ARCH=arm export CROSS_COMPILE=/opt/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- Download the kernel source git clone git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-2.6.28.y.git kernel_imx Download U-Boot cd bootable/bootloader git clone git://git.denx.de/u-boot.git uboot-imx       Patching the environment Previously we decompressed the SDK at "/opt/imx-android-r6/code/R6" there we can find all the patches needed to iMX51 cd ~/myandroid . /opt/imx-android-r6/code/R6/and_patch.sh c_patch /opt/imx-android-r6/code/R6 imx_R6 Build Uboot cd ~/myandroid/bootable/bootloader/uboot-imx make mx51_bbg_android_config make Build Android cd ~/myandroid make PRODUCT-imx51_BBG-eng 2>&1 | tee build_imx51_BBG_android.log For i.MX51 BBG build, it will generate the compiled environment under myandroid/out/target/product/imx51_BBG. These 4 folders can be used to create your Android file system for NFS mounting, i.e., "root/" -> "/", "system/" -> "/system", "data/" -> "/data" root/ : root file system (including init, init.rc, etc). Will be mounted at "/" system/:  Android system binary/libraries. Will be mounted at "/system" data/: Android data area. Will be mounted at "/data" recovery/: root file system when booting in "recovery" mode. Not directly used. Image files to use with SD cards ramdisk.img: Ramdisk image generated from "root/". Not directly used. system.img: EXT3 image generated from "system/". Can be programmed to "SYSTEM" partition on SD card with "dd" userdata.img: EXT3 image generated from "data/". recovery.img: EXT3 image generated from "recovery/". Can be programmed to "RECOVERY" partition on SD card with "dd" Build uRamdisk Assuming that you had already built uboot, "mkimage" was generated under myandroid//bootable/bootloader/uboot-imx/tools/ cd ~/myandroid/out/target/product/imx51_BBG ~/myandroid/bootable/bootloader/uboot-imx/tools/mkimage -A arm -O linux -T ramdisk -C none -a 0x90308000 -n "Android Root Filesystem" -d ./ramdisk.img ./uramdisk.img Build Kernel Image If you want to run Android via NFS or from SD, you can build kernel with default configuration now: cd ~/myandroid/kernel_imx       make imx51_android_defconfig      make uImage After compiling the image can be found at ~/myandroid/kernel_imx/arch/arm/boot/uImage. Since we are using Uboot we will need to do this step: cd myandroid/kernel_imx/arch/arm/boot ~/myandroid/bootable/bootloader/uboot-imx/tools/mkimage -A arm -O linux -T kernel -C none -a 0x90008000 -e 0x90008000 -n "Android Linux Kernel" -d ./zImage ./uImage Boot FS from SDcard Partioning the SD Card Insert your SD card/cardreader to the Linux PC (you need root privileges for programming SD), you can use dmesg to check the SD device, in our how-to we will consider that the sdcard is detected as /dev/sdb, so be careful to not mess up your own file system. To boot the entire FS from SDcard you must follow this partition schema: File:Pt.png To achieve this, we are going to use fdisk to create the partition table: # sudo fdisk /dev/sdb Device contains neither a valid DOS partition table, nor Sun, SGI or OSF disklabel Building a new DOS disklabel with disk identifier 0x1787490d. Changes will remain in memory only, until you decide to write them. After that, of course, the previous content won't be recoverable. Warning: invalid flag 0x0000 of partition table 4 will be corrected by w(rite) Listing the partition talbe (in our example the SDcard does not have a partition schema): Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytesDisk identifier: 0x1787490d    Device Boot      Start         End      Blocks   Id  System If you have any previous partition, please delete it using the "d" command. Pay attention that each sdcard block has 3872768 bytes (this size usually changes for each type of sdcard) so the first step is to jump at least 8 MB to store uboot, kernel and ramdisk ( as shown in the partition schema ) With that advice in mind, create a 10 MB primary partition that will store the media (/sdcards): Command (m for help): nCommand action    e   extended    p   primary partition (1-4) pPartition number (1-4): 1First cylinder (1-1023, default 1): +8MLast cylinder, +cylinders or +size{K,M,G} (2-1023, default 1023): +10M List the partition table to check if the partition was correctly created: Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d     Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128   83  Linux Note that the first partition does not start in the first cylinder; the first cylinder and the second one will store uboot, kernel and ramdisk. Now we need to change the partition label to vfat: Command (m for help): tSelected partition 1 Hex code (type L to list codes): bChanged system type of partition 1 to b (W95 FAT32) Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d     Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128    b  W95 FAT32 Create another 80 MB primary partition with 80 MB storage capacity; this partition will store the system's files. This partition must start in the cylinder that follows the last cylinder of the former partition. Command (m for help): nCommand action    e   extended    p   primary partition (1-4) p Partition number (1-4): 2First cylinder (1-1023, default 1): 6Last cylinder, +cylinders or +size{K,M,G} (6-1023, default 1023): +80M Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d    Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128    b  W95 FAT32 /dev/sdb2               6          28       86986   83  Linux Now you must create an extended partition big enough to store other 2 logic partitions ( DATA partition with 20 MegaBytes and CACHE partition with 10 MB): Command (m for help): nCommand action    e   extended    p   primary partition (1-4) ePartition number (1-4): 3First cylinder (1-1023, default 1): 29Last cylinder, +cylinders or +size{K,M,G} (29-1023, default 1023): +30M Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d     Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128    b  W95 FAT32 /dev/sdb2               6          28       86986   83  Linux /dev/sdb3              29          37       34038    5  Extended Now create the logic partitions: Command (m for help): nCommand action    l   logical (5 or over)    p   primary partition (1-4) lFirst cylinder (29-37, default 29): Using default value 29 Last cylinder, +cylinders or +size{K,M,G} (29-37, default 37): +20M Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d     Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128    b  W95 FAT32 /dev/sdb2               6          28       86986   83  Linux /dev/sdb3              29          37       34038    5  Extended /dev/sdb5              29          34       22661   83  Linux Command (m for help): nCommand action    l   logical (5 or over)    p   primary partition (1-4) lFirst cylinder (35-37, default 35): Using default value 35 Last cylinder, +cylinders or +size{K,M,G} (35-37, default 37): Using default value 37 At last, you must create a primary partition to store the /recovery: Command (m for help): nCommand action    l   logical (5 or over)    p   primary partition (1-4) pSelected partition 4 First cylinder (1-1023, default 1): 38 Last cylinder, +cylinders or +size{K,M,G} (38-1023, default 1023): +10M Command (m for help): p Disk /dev/sdb: 3965 MB, 3965190144 bytes 122 heads, 62 sectors/track, 1023 cylinders Units = cylinders of 7564 * 512 = 3872768 bytes Disk identifier: 0x1787490d     Device Boot      Start         End      Blocks   Id  System /dev/sdb1               2           5       15128    b  W95 FAT32 /dev/sdb2               6          28       86986   83  Linux /dev/sdb3              29          37       34038    5  Extended /dev/sdb4              38          41       15128   83  Linux /dev/sdb5              29          34       22661   83  Linux /dev/sdb6              35          37       11315   83  Linux Saving the partition table: Command (m for help): wThe partition table has been altered! Calling ioctl() to re-read partition table. WARNING: Re-reading the partition table failed with error 16: Device or resource busy. The kernel still uses the old table. The new table will be used at the next reboot. WARNING: If you have created or modified any DOS 6.x partitions, please see the fdisk manual page for additional information. Syncing disks. Now you are ready to start flashing the SDcard: Flashing SDcard Flashing Uboot cd ~/myandroid/bootable/bootloader/uboot-imx sudo dd if=your_bootloader_binfile of=/dev/sdb bs=1K seek=1 Usually we use this no-padding uboot image in SD card, i.e. program this no-padding uboot image into 1KB offset of SD card so that we will NOT overwrite the MBR (including partition table) within 1st 512B on SD card. Formatting the SD Do not copy and paste the commands; wait for the complete output. sudo mkfs.vfat /dev/sdb1 sudo mkfs.ext3 /dev/sdb2 sudo mkfs.ext3 /dev/sdb4 sudo mkfs.ext3 /dev/sdb5 sudo mkfs.ext3 /dev/sdb6 Flashing Kernel cd ~/myandroid/kernel_imx/arch/arm/boot sudo dd if=uImage of=/dev/sdb bs=1M seek=1 Flashing FS cd ~/myandroid/out/target/product/imx51_BBG sudo dd if=uramdisk.img of=/dev/sdb bs=4M seek=1 sudo dd if=system.img of=/dev/sdb2  (Program system.img into SYSTEM partition which will be mounted as "/system") sudo dd if=recovery.img of=/dev/sdb4 (Program recovery.img into RECOVERY partition which will mounted as "/" in recovery mode) Configure Uboot After inserting the SD card in the board (the slot is located at the inferior portion of the board), plugging in the serial cable and start a configured minicom session, you should turn on the iMX51 board and see in your console something like this: U-Boot 2009.08-00046-gf91e287 (Jan 18 2010 - 12:32:32) CPU:   Freescale i.MX51 family 2.5V at 400 MHz mx51 pll1: 800MHz mx51 pll2: 665MHz mx51 pll3: 216MHz ipg clock     : 66500000Hz ipg per clock : 665000000Hz uart clock    : 66500000Hz cspi clock    : 54000000Hz Board: MX51 BABBAGE 3.0 [POR] Boot Device: MMC DRAM:  512 MB MMC:   FSL_ESDHC: 0 In:    serial Out:   serial Err:   serial Press home + power to enter recovery mode ... Net:   FEC0 [PRIME] Hit any key to stop autoboot:  0 BBG U-Boot > Copy and paste these configurations, line by line: setenv bootcmd 'run bootcmd_SD1 bootcmd_SD2' setenv bootcmd_SD1 'run bootargs_base bootargs_android bootargs_SD' setenv bootcmd_SD2 'mmc read 0 ${loadaddr} 0x800 0x1280;mmc read 0 ${rd_loadaddr} 0x2000 0x258;bootm ${loadaddr} ${rd_loadaddr}' setenv bootargs_base 'setenv bootargs console=ttymxc0,115200' setenv bootargs_SD 'setenv bootargs ${bootargs}' setenv bootargs_android 'setenv bootargs ${bootargs} init=/init androidboot.console=ttymxc0 wvga calibration' setenv loadaddr 0x90800000 setenv rd_loadaddr 0x90B00000 saveenv Reboot the board: reset Additional Resources All Board Android ADB All Board Android Getevent All Board Android logcat All Board Android Without Ramdisk All Boards Debugging Android [Android] Fatal exception happens when preview size does not match video snapshot size Android Data Partition Encryption on i.MX6 Android GDB for Native Code Android Graphic UI with GPU hardware acceleration Android HTML5 Video Android Memory Usage Tool: Procrank Build Android 4.0 ICS under Ubuntu 11.10 Build Linphone Android for i.MX6 How to find the crash point: Android Native crash How to debug memory leakage in media server in Android How to Enable LDO Bypass Based on i.MX6 Android ICS How to Enable PCIe WiFi into i.MX6 Android Release? How to Install Android on SD Card How to play a file with 2 audio tracks: DTS &amp; AC3 on i.MX6/Android How to play a media file/stream from console in Android How to port new audio codec into Android.docx How to Print Function Caller Stack in Android Log File How to Support New WiFi Card in Android How to Use Proxy to Access Network in Android i.MX6 Android 13.4.1.03 Patch Release i.MX6 Android R13.4.1.04 patch release i.MX6 D/Q and i.MX6 DL/S Android JB4.2.2_1.0.0-GA release iMX6QD How to Add 24-bit LVDS Support in Android i.MX6 Android R13.4-GA.03 patch release IoT Solutions: Cloud Connector for Android Memory Management on i.MX6 Android New Android SD Card Demo Image for the i.MX6Q SABRE Board for Smart Devices New Android SD Card Demo Image for the i.MX6Q SABRE Platform for Smart Devices Sabre-l Setup Memo Video - Bye-Bye Standby Power - Ubiquitous QuickBoot with Android on NetWalker Video - Efika MX Smartbook Android Flash
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THE CONTENTS •Background Knowledge −Kernel Introduction −Linux Kernel Directory Structure of the Source Code •Kernel Loading Procedure −Linux OS Boot Process −First Stage of Loading Sequence(Assembly Language) −Second Stage of Loading Sequence(C Language)
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This is a tool can generate a DDR3 script easily for i.MX53 and only need input several parameters based on using DDR datasheet and system architecture. Please find i.Mx6DQSDL DDR3 Script Aid through below link. i.Mx6DQSDL DDR3 Script Aid Please find i.Mx6DQSDL LPDDR2 Script Aid through below link. i.Mx6DQSDL LPDDR2 Script Aid Please find i.Mx6SL LPDDR2 Script Aid through below link. i.Mx6SL LPDDR2 Script Aid Any questions are welcome!
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Issue: kernel panic when repeating plug/unplug USB device(e.g. USB flash disk) in Linux 4.1.15 The issue is in kernel BLOCK DEVICE, this is not a hardware related issue(happens to all devices running L4.1.15 or L4.4.x), please refer to following link on kernel.org for more details and fixes: blockdev kernel regression (bugzilla 173031) - Patchwork 
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The System Controller Unit (SCU) is in charge of controlling several features related to power management of the whole system. The user gets access to the following features through the System Controller Firmware: Powering up/down the system,resources and partitions Configuring resource clocks Reset controls Configuring wake-up sources This document will cover the more commonly used features, for details on the full capabilities of the API please refer to the API document for your device. Resource Power Control The SCU is in charge of managing power control to the resources (peripherals) in the SoC. Attempting to access a resource on the OFF state will result in a bus error or a hang All resources are organized within several subsystems, subsystems group together resources with common functionality. Subsystems are independent of each other and have their own PLLs and power domains, this allows modular control of clocks and power to the resources. The System Controller Unit has a dedicated I2C channel to interact with the PMIC, this allows dynamic control of some power sources for resources like the GPUs and Cortex-A cores. The SCU can enable/disable the LDO that supplies power to the GPU for instance and also turn on/off the internal power domains. The mapping of PMIC supplies and resources happens on the board.c (included in the SCFW Porting kit) and it is part of the porting process of the SCFW to new boards. The function board_get_pmic_info is where the mapping of resources to supplies happen, see: /*--------------------------------------------------------------------------*/ /* Get the pmic ids and switchers connected to SS. */ /*--------------------------------------------------------------------------*/ static void board_get_pmic_info(sc_sub_t ss,pmic_id_t *pmic_id, uint32_t *pmic_reg, uint8_t *num_regs) { /* Map SS/PD to PMIC switch */ switch (ss) { case SC_SUBSYS_A53 : pmic_init(); {/* PF8100_dual Card */ pmic_id[0] = PMIC_0_ADDR; pmic_reg[0] = PF8100_SW5; *num_regs = 1U; } break; case SC_SUBSYS_A72 : pmic_init(); {/* PF8100_dual Card */ pmic_id[0] = PMIC_0_ADDR; pmic_reg[0] = PF8100_SW3; pmic_id[1] = PMIC_0_ADDR; pmic_reg[1] = PF8100_SW4; *num_regs = 2U; } break; case SC_SUBSYS_GPU_0 : pmic_init(); {/* PF8100_dual Card */ pmic_id[0] = PMIC_1_ADDR; pmic_reg[0] = PF8100_SW1; pmic_id[1] = PMIC_1_ADDR; pmic_reg[1] = PF8100_SW2; *num_regs = 2U; } break; case SC_SUBSYS_GPU_1 : pmic_init(); {/* PF8100_dual Card */ pmic_id[0] = PMIC_1_ADDR; pmic_reg[0] = PF8100_SW3; pmic_id[1] = PMIC_1_ADDR; pmic_reg[1] = PF8100_SW4; *num_regs = 2U; } break; default : ; /* Intentional empty default */ break; } }‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Only some subsystems have their own dedicated external power supplies, in the example above A cores and GPUs are the only ones with a dedicated external power supplies. Most of the other subsystems are powered from the main power supply and power gating happens internally, each subsystem contains different power domains that can be turned on/off to manage power consumption. The SCFW API used to power on/off resources is the following: sc_err_t sc_pm_set_resource_power_mode (sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode)‍‍‍‍‍ Where: ipc - is the interprocessor communication channel used to communicate with the SCU (obtained by calling sc_ipc_open). resource - is the resource that will have the power mode change mode - is the power mode to change to The available power mode options are the following: Power mode Voltage Clocks SC_PM_PW_MODE_OFF OFF All clocks off SC_PM_PW_MODE_STBY ON All clocks off SC_PM_PW_MODE_LP ON PLLs off resource running from XTAL SC_PM_PW_MODE_ON ON PLLs on In order to be able to access a resource it must be at least on SC_PM_PW_MODE_LP mode, since that mode has the resource voltage on and the clock is supplied by the 24MHz crystal. For more details please refer to the SCFW API document. Clocks Configuration As in the power management case, clocks are also organized in a distributed manner within the device. Each subsystem has it's own PLLs and all of them are clocked by the 24MHz crystal. The number of PLLs in each subsystem varies between all subsystems. To see how many PLLs are within a subsystem please refer to the datasheet of the device you are interested on. For instance on the datasheet of the i.MX8QXP on table 16 in Chapter 4.3.1: It can be seen that the GPU subsystem contains two PLLs, the ADMA subsystem contains 4 PLLs, Display Controller 3, etc... The SCFW API used to configure a clock is the following: sc_err_t sc_pm_set_clock_rate ( sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clock_rate_t ∗ rate )‍‍‍‍‍ Where: ipc - is the interprocessor communication channel used to communicate with the SCU (obtained by calling sc_ipc_open). resource - is the resource that will have the clock rate change clk - is the clock to set the rate to (each resource can have different clocks associated with it for instance the GPU resource has a clock associated for its shader and another for the GPU, this parameter is used to identify the clock) rate - this contains the desired clock rate, the SCFW will try to match the provided rate if not possible it will then set the closest possible value and return the value that was actually configured. To identify the clk that needs to be passed, please refer to the SCFW API chapter called "Clock List" That chapter contains a table with all the different clocks that are configurable by the SCFW, in the case of the GPUs for instance to select the rate for the Shader or GPU, either the SC_PM_CLK_MISC or SC_PM_CLK_PER options would have to be selected. Set=Y indicates the clock/PLL is not shared and the rate can be set via sc_pm_set_clock_rate(). Enable=Y indicates the clock is not auto gated and must be enabled via sc_pm_clock_enable(). As an example the following snippet configures the GPU_0 shader clock: sc_clock_rate_t shader_clk=700000000; // 700 MHz sc_pm_set_clock_rate(ipc, SC_R_GPU_0_PID0, SC_PM_CLK_MISC, &shader_clk);‍‍ System Controller Firmware 101 
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Hi All, The new i.MX 6 SL L3.0.35_2.1.0 release is now available on the http://www.freescale.com/site. ·         Files available # Name Description 1 L3.0.35_2.1.0_LINUX_DOCS i.MX   6SoloLite Linux BSP Documentation. Includes Release Notes, Reference Manual,   User guide. API Documentation 2 L3.0.35_2.1.0_LINUX_MMDOCS i.MX 6SoloLite Linux Multimedia Codecs   Documentation. Includes   CODECs Release Notes and User's Guide 3 L3.0.35_2.1.0_ER_SOURCE i.MX   6SoloLite Linux BSP Source Code Files 4 L3.0.35_2.1.0_MM_CODECS i.MX   6SoloLite Linux Multimedia Codecs Sources 5 L3.0.35_2.1.0_AACP_CODECS i.MX   6SoloLite Linux AAC Plus Codec 6 L3.0.35_2.1.0_DEMO_IMAGE i.MX   6SoloLite Linux Binary Demo Files ·         Target HW boards o   i.MX6SL-EVK ·         New features o   Updated thermal equation for i.MX 6SoloLite o   Added Fuse check for all the devices o   Enabled DISPLAY power gating feature on TO1.2 ·         Known issues o   For known issues and limitations please consult the release notes.
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  IMX6 S/DL for consumer has both PXP and IPU. Automotive and Industrial versions doesn't have PXP. As IMX6 also has IPU, the Linux framebuffer driver uses IPU and not PXP. Note : “pxp_v4l2_test.out” from unit_tests was made for processors (i.MX6 SL), that have only PXP and its framebuffer driver applies PXP to accelerate image processing. “pxp_v4l2_test.out” should not be used with i.MX6 S/DL. To test PXP device with i.MX6 S/DL users have to try “pxp_test.out”.
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19-iMX_Serial_Download_Protocol.py zip file
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Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. These are detailed programming aids for the registers associated with DRAM initialization (LPDDR3 and LPDDR2). The last work sheet tab in the tool formats the register settings for use with the ARM DS5 debugger. It can also be used with the windows executable for the DDR Stress Test (note the removal of debugger specific commands in this tab). These programming aids were developed for internal NXP validation boards.   This tool serves as an aid to assist with programming the DDR interface of the i.MX 7ULP and is based on the DDR initialization scripts developed for NXP boards and no guarantees are made by this tool.   The following are some general notes regarding this tool: The default configuration for the tool is to enable bank interleaving. Refer to the "How To Use" tab in the tool as a starting point to use this tool. The tool can be configured for one of the two memory types supported by the i.MX 7ULP.  Nevertheless, two separate programming aids are provided based on the DRAM type: LPDDR3 and LPDDR2.  Therefore, you may use the tool pre-configured for your desired memory type as a starting point. Some of the CCM programming at the beginning of the DRAM initialization script (in the "DStream .ds file" tab) were automatically generated and in very few cases may involve writing to reserved bits, however, these writes to reserved bits are simply ignored. Note that in the "DStream .ds file" tab there are DS5 debugger specific commands that should be commented out or removed when using the DRAM initialization for non-debugger specific applications (like when porting to bootloaders). This tool may be updated on an as-needed basis for bug fixes or future improvements.  There is no schedule for aforementioned maintenance. For questions or additional assistance using this tool, please contact your local sales or FAE.
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Quaestion: What does exactly the RNG_TRIM after burning the SRK hash table? There is no such thing on the former i.MX HAB procedure. What would a random generator stuff bring here? Additionnally, there is the possibility to lock the SRK shadow register via an OTP bit. Is it recommeneded to lock it? if not, is it really possible to change the SRK hash value by modofying the shadow register value before performing the SRK hash key check in a HAB boot process? One last question: the PKI requires the user to enter a certificate lifetime. Does that really mean that openssl will refuse generating new signatures once the certificates lifetime is expired? Answer: 1. The intent of the of the RNG_TRIM fuses is for Freescale to essentially extendthe amount of time the RNG4 in CAAM has to generate entropy.  The longer this period the more likely it is that RNG4 will generate entropy that will pass its internal statistical tests.  The reason for the fuses is HAB (in the Closed configuration only) instantiates the RNG by default and needs some external indication on how to progran the RNG4 in CAAM to ensure the internal HW statistical tests will pass.  This was to allow the RNG to be useable by application code after execution has left the ROM.  However this requires that the RNG_TRIM fuse value be fully characterized across numerous conditions temperature, voltage etc.  This effort is still on going.  For customers performing secure boot (in Closed configuration) we recommend they follow Section 6.3 of http://cache.freescale.com/files/32bit/doc/app_note/AN4581.pdf.  In this case the RNG4 can be instantiated by CAAM driver code which can be easily changed if required. 2. Yes, once the SRK hash is provisioned to the SRK_HASH field it is recommended to blow the corresponding SRK_LOCK fuse.  If the SRK_LOCK fuse is not blown then additional fuses in the SRK_HASH field can be blown.  This will cause devices in the closed configuration to fail to boot.  i.e. "bricking" the device. 3. Please see https://community.freescale.com/message/334186#334186 for the answer to your question on the certificate validity period.
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When a board is brought up and  the ddr test by link of "https://community.nxp.com/docs/DOC-96412' hashttps://community.nxp.com/docs/DOC-96412' hashttps://community.freescale.com/docs/DOC-96412' hashttps://community.nxp.com/docs/DOC-96412' has been verified, some of boards will have pfd issue(ERR006282). It is suggested that below method could be used to check the issue.The detail steps are: As boards may have no jtag port, the internal usdhc4 root clock out needs to be remapped. When “CUP not initialized” issue has been seen and in download mode, DDR test tools can be used with the script to remap clock output. Please check the attached for test script and the empty the binary. Put the two files to DDR stress test tool folder “DDR_Stress_Tester\binary\”. The attached ddr-stress-test-mx6dq.bin is an empty file. Please backup the original file first. After eMMC boot failed and in download mode, run command “DDR_Stress_Tester.exe -t mx6x -df test.inc” on PC side. There is no clock output on GPIO19. For normal test, please erase the eMMC chip and boot the board. It will also fail to boot and run into download mode. After run “DDR_Stress_Tester.exe -t mx6x -df test.inc” , clock can be measured from GPIO19 if no PDF issue happens. Below is  the details: The script file. wait = on A: Config GPIO19(ENET_ RST_ PHY_B) as CLKO1 setmem /32 0x020E0254 = 0x3    // Config GPIO19(ENET_ RST_ PHY_B) as CLKO1      On your board, it is R112 for the test point. B: enabled, CKO1 output drives cko2 clock, divide by 5, usdhc4_clk_root setmem /32 0x020C4060 = 0x01820101  // CKO2 enabled, CKO1 output drives cko2 clock, divide by 5, usdhc4_clk_root Hex 0 1 8 2 0 1 0 1 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Binary 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 And for the normal boot, erase the emmc, and reboot to enter the download mode. There will be no signal output but high voltage on R112. After the script runs, 40Mhz clock will be seen. For the boot fail case, there will be no signal output but high voltage on R112 and 40Mhz clock will be pulled to low. 1: CKO2 enabled 2: divide by 5 3 usdhc4_clk_root 4: CKO1 output drives cko2 clock 5
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The Android O8.0.0_1.4.0 for i.MX 7ULP RFP(GA) release is now available on IMX_SW web page. Overview -> BSP Updates and Releases -> Android O8.1.0 for i.MX 7ULP GA.   Files available:   # Name Description 1 android_o8.1.0_1.4.0_7ulp-ga_docs.tar.gz Android O8.1.0_1.4.0 for 7ULP GA Documentation 2 imx-o8.1.0_1.4.0_7ulp-ga.tar.gz i.MX Android proprietary source code for Android O8.1.0_1.4.0_7ULP_GA 3 android_o8.1.0_1.4.0_7ulp-ga_image_7ulpevk.tar.gz Prebuilt images with NXP extended features for the i.MX7ULP EVK board 4 android_o8.1.0_1.4.0_7ulp-ga_tools.tar.gz Manufacturing Toolkit and VivanteVTK for Android O8.1.0_1.4.0_7ULP_GA 5 fsl_aacp_dec_O8.1.0-7ULP_GA.tar.gz AAC Plus Codec for  O8.1.0_1.4.0_7ULP_GA   Target boards: i.MX 7ULP EVK   Features and Known issues For features and known issues, please consult the Release Notes in detail.#
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This is a How-To documentation for OpenCL on i.MX6 using LTIB, there are all necessary steps and sample code to create,  build and run a HelloWorld application.
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Question: On i.MX6 DQ, the ON_TIME and DEBOUNCE bit fields of the SNVS_LPCR register are not readable.  Also in the preliminary (i.MX61) specs bits 31-15 are reserved.  Are ON_TIME and DEBOUNCE bit fields actually in this register for i.MX 6DQ and are these bits writable but not readable? Answer: This is a document issue which will be fixed in the next version of the RM.  The register diagram should read as follows:
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When streaming, if you want to play a streaming URL, it can be inconvenient if the browser cannot recognize the URL as a media stream and downloads the content rather than using Gallery to play it. To create this kind of media streaming, you need to write an apk to use VideoView to play the URL/media stream from the console. Here is the command of how to play a media file or network stream from console. Gingerbread am start -n com.cooliris.media/com.cooliris.media.MovieView -d "<URL>"       The URL can be file position or network stream URL, such as: you can play a local file by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "/mnt/sdcard/test.mp4" You can also play a http stream by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "http://v.iask.com/v_play_ipad.php?vid=76710932" Or play a rtsp stream by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "rtsp://10.0.2.1:554/stream" ICS am start -n com.android.gallery3d/com.android.gallery3d.app.MovieActivity -d "<URL>"        The URL has the same definition of Gingerbread.
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  IMX6 SL boot process is described in Chapter 8 (System Boot) of the Reference Manual. Shortly, the loading boot data from boot SD card is performed in two stages : first read IVT, DCD, then read executable code, using the Boot Data Structure.    At first, boot ROM copies 4K byte (containing IVT and DCD ) from sector 0 of the boot SD card to internal buffer in OCRAM, located in reserved area (0x00900000 - 0x00907000). This area must not be used by user application.   Then, “after checking the Image Vector Table header value (0xD1) from Program Image, the ROM code performs a DCD check. After successful DCD extraction, the ROM code extracts from Boot Data Structure the destination pointer and length of image to be copied to RAM device from where code execution occurs”.   The IVT contains field entry - absolute address of the first instruction to execute from the image.   Note : according to Figure 8-3 (Internal ROM and RAM memory map), only OCRAM Free Area (68KB) from 0x00907000 till 0x00918000 may be used by user’s application.   The attachment contains SD-bootable example.
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