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This doc show how to use i.MX8QXP Display Controller GammaCor unit to tune gamma. HW: i.MX8QXP MEK board, HDMI monitor SW: i.MX Linux 4.14.98_2.2.0 BSP release, patch in this doc 1.Introduce gamma The gamma, gamma correction, gamma encoding, gamma compression , these words all related one kind operation , see wiki page of it: The device used for image capture/print/display follow this power-law. For example the camera captured image , to view this image on display device as good as original captured image : gamma encoding when camera saved sensor data to image file,  and  gamma decoding when that image file display on your PC LCD monitor. That is : 2. i.MX8QXP Display Controller Gamma Correction Unit The Gamma Correction unit position is located between Frame Gen unit and TCon unit.   More detail see below contents from i.MX8QXP RM: So GammaCor unit could be used as adjust display gamma , or brightness or contrast. To used it, need follow the steps at RM 15.9.2.4.4.8.3.   Something need to note: You need program 33 sample point value into the register, these sample point value range is from 0 to 1023. Note, first write is start sample point value , then the other is delta value: current sample point minus previous sample point value. You can use GammaCor unit on any channel of R/G/B. If you use normalized function f(x), the following formula should be used to clut[i = 0..32] = round( f(i * 32 / 1023) * 1023) 3. i.MX8QXP Linux device driver patch and test code Apply attached  patch 8qxp_dpu_gammacor_4.14.98_2.2.0.diff on Linux kernel. In the kernel patch, function dpu_gammacor_update, I choose not calculate delta value between each sample pint , let user space application calculate delta value and passed to kernel. Apply 8qxp-dpu-gammacor-modetst.diff on libdrm-imx, to get test application which is based on modetest.  Test app will read one greyscale image file 720P.rgb, put it under same folder of test application , calculate sample point value by pow function  , and calling drmModeCrtcSetGamma to pass related value to kernel,  next loop will change sample point value, and will see that greyscale image will changed on HDMI monitor. After system boot up, run below cmd to check result of test application systemctl stop weston ./gamma_show_rgba.out -P 29@32:1280x720@AB24 Reference: a>https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM b>https://www.nxp.com/webapp/Download?colCode=L4.14.98_2.2.0_MX8QXP&appType=license c> https://source.codeaurora.org/external/imx/libdrm-imx/ d> https://en.wikipedia.org/wiki/Gamma_correction
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Debugging with Eclipse and GDB on Linux user space This is a good open-source choice to debug i.MX processors. The integration of popular tools like Eclipse and GDB offers a good and stable connection between host and target. The first step is to install the tools on host. Click here to get instructions of how to install the tools. Let's debug a ready hello world program into the ltib. To extract the hello world package, type on ltib directory: $./ltib -m prep -p helloworld Change the code of hello.c to: #include <stdio.h> int main(int argc, char** argv) {     int i;     for (i = 0; i < 100; ++ i)     {         printf(“Welcome to GDB ! %d /n”, i);     }     return 0; } Change the Makefile to add debug symbols Change the two following lines from: CFLAGS = -Wall CXXFLAGS = -Wall To: CFLAGS = -Wall -g CXXFLAGS = -Wall -g Build and deploy the new source-code: $./ltib –p helloworld –m scbuild $./ltib –p helloworld –m scdeploy Configuring the Target On target, gdbserver needs to be run to perform debug. The gdbserver command has the following structure: gdbserver ip_host:port /full/path/app/app_name If gdbserver is not installed on target, select gdb package on ltib configuration. In this example our host has the 192.168.16.35 IP address and our HelloWorld application is located at /usr/bin/hello on the target board. Execute the gdbserver: gdbserver 192.168.16.35:10000 /usr/bin/hello You can use other port number as long as you use the same number when configuring the Eclipse. Setting a GDB Debug Session on Eclipse Now we will configure Eclipse C/C++ to start a GDB session with our remote i.MX board. We will need to know which is the target board’s IP address. To get your target’s IP address: /sbin/ifconfig In our example the target board has the 192.168.16.36 IP address. Open-up Eclipse and choose the C/C++ perspective. We will import the HelloWorld executable built by LTIB. Go to the menu File -> Import You will see the “Import” screen. Select “C/C++ Executable” option. Hit the “Next” button. Eclipse automaticaly creates a new project when whe use the “Import” option. In the next screen, select the “Search Directory” option and hit the “Browse” button. This session is incomplete and is being edited...
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Test digital zoom with ipu for camera preview.   Board :sarbre-sd (imx6dq) BSP   : android 13.4ga In the above flow, one frame buffer is processed in four steps at camera preview. Add the step to change the frame buffer before step 4 , the added step which  zoom one preview frame.   The figure below shows the crop function of ipu lib, we use this function scale the frame.   Test result: preview zoom levle 0:   preview zoom level max:     When taking pictures with 5M pixels and the zoom is over level 1, the picture size is not 2592x1944 but 2016x1512. The underlying reason for it is that ipu crop function only supports the 2048x2048 maximum output .   Thumbnails of test result :  
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Installation, patching and building the SDK The i.MX 6 Series Platform SDK v1.1.0 does not enable neither the MMU nor L1/L2 Caches (depending on the benchmark you are running, enabling these yield much better numbers), so there is a need to patch the code to enable these. Please download the SDK from the Freescale portal and the patch attached on this document, then follow these instructions: $ tar zxvf imx6_platform_sdk_v1.1.0.tgz $ cd iMX6_Platform_SDK $ patch -p1 < 0001-add-L2-cache-enable-to-mx6-SDK-1.1.0.patch $ export PATH=$PATH:<toolchain_install_path>/bin $ ./tools/build_sdk For more help, please look at the README.pdf and documents inside the doc folder.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345644 
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Q: How to setup camera under Android? helping a customer (RTX) debug some issues with camera. They're using i.MX 6Solo and Android 13.4-GA on custom hardware. They added a new camera driver which seems to work when using small console capture program (no gui, no preview), so the route from camera to /dev/video0 seems to work. However, when they try to use camera from Android, entire system freezes. They located the crash to following line in ipu_common.c which basically enables camera CSI0: ipu_cm_write(ipu, reg | IPU_CONF_CSI0_EN, IPU_CONF); While investigating IPU setup, we noticed that CPMEM setup for IDMAC channel 0 is "off": ch 0 word 0 - 00000000 25800000 00000000 E0000000 00077C4F ch 0 word 1 - 01B086B0 00394EC0 0087C000 00009FC0 0000027F As seen from above, EBA0 points to 0x0D843580 and EBA1 to 0x0E53B000, which is in EIM memory space, not DDR memory space, which probably causes issues. We're not sure what could be causing this as camera driver doesn't provide any such address and mostly just handles communication to camera chip. But something gets off in Android framework and we could use any hints about what to look for. A: You can reference to the "i.MXAndroidR13.4GAAdvancedUserGuide.html" "3 Camera&Video Recorder customization" for how to change the camera in Android. Another thing needs be checked is the camera sensor driver, you can reference to "kernel_imx\drivers\media\video\mxc\capture\ov5642.c", "static struct v4l2_int_ioctl_desc ov5642_ioctl_desc", did you implemented the same v4l2_int_ioctl_desc functions? Customer HW is set up so that DDR memory space starts at 0x80000000. This causes problems in myandroid/hardware/imx/mx6/libcamera/CamerHAL.cpp when obtaining buffer addresses where camera should store data. GPU will only return OFFSET into 2GB memory space it can address, so it will return an address below 0x80000000. This needs to be adjusted before passing onto V4L2 when starting capturing.
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Overview The first in the series, the i.MX53 Quick Start board is a low cost development platform. Integrated with an ARM® CortexTM-A8 1 GHz processor, the Quick Start board includes a display controller, hardware-accelerated graphics, 1080p video decode and 720p encode as well as numerous connectivity options ideally suited for applications such as human machine interface in embedded consumer, industrial and medical markets. Go to http://www.freescale.com/iMXQuickStart and visit the official Quick Start Board page Hardware Features Processor • i.MX53 1 GHz ARM Cortex-A8 Processor • Power management IC • 1 GB DDR3 memory Display • LVDS connector • VGA connector • Parallel LCD add-on card (via expansion connector) • HDMI add-on card (via expansion connector) Audio • SPDIF output via HDMI add-on card • Freescale SGTL5000 audio codec • Microphone jack • Headphone jack Expansion Connector • Enables parallel LCD or HDMI output • Camera CSI port signals • I2C, SSI, SPI signals Connectivity • Full-size SD/MMC card slot • microSD card slot • 7-pin SATA data connector • 10/100 Base-T Ethernet port • Two High-Speed USB host ports • Micro USB device port Debug • JTAG connector • DB-9 UART port Miscellaneous • 3” x 3” 8-layer PCB • 3-axis Freescale accelerometer (MMA8450QT) • 2A, 5V power supply Tutorials, Training Materials and Documentation Android i.MX 53 QSB Enable WiFi Android i.MX 53 QSB Android Recovery Mode Linux i.MX 53 QSB Board Get Started i.MX 53 QSB Ubuntu Dual Display Running Dual Display on i.MX53QSB   
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In order to run the QT5 demos on i.MX6 you should follow the instructions on this link: Building QT for i.MX6 Some of the demos on the release such as  /examples/opengl/hellogl_es2,  consist of a group of multiple widgets appearing on the screen. Normally these demos should work OK in a windowed environment such as Wayland or X11. In the case of Linux only environment, the plugin that draws to the screen is called EGLFS. This plugin has the restriction that it only supports one single widget at a time on the screen surface. Then demos such as hellogl_es2 are *not intended* to work along with this plugin, and it will never work. The errors found when using EGLFS consist on: These issues can be seen in the Qt OpenGL examples.  "hellogl_es2" and "2dpaint" seem to display one rendered frame and then break --   "hellogl_es2" shows the QT word and bubbles, and the GUI is hidden, while  "2dpaint" just shows the openGL version without label. It seems that when including  a QGLWidget on a form, the QGLWidget would work OK, but the rest of the form would not appear. I couldn't click any buttons or do anything.   Along with these problems I would also see one or more of these error messages in the output:   * This plugin does not support setParent!   * This plugin does not support propagateSizeHints()   * QOpenGLContext::swapBuffers() called with non-opengl surface However other demos such as hellowindow work well with EGLFS because they are single widget.  Also all demos created with qtquick will work OK since all visual QML items are rendered as a single widget using the scene graph, a low-level, high-performance rendering stack, closely tied to OpenGL. This is better explained here: Qt5 QPainter vs. QML &amp; Scene Graph.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-343761 
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This ppt provides a tutorial about how to add 24bit LVDS support in Android for iMX6QD.
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<analytics uacct="UA-5520491-1" /> How to enable WIFI support for i.MX53 QSB Android After applying every QSB patch, enable WiFi support according to your hardware. Android R4 can be downloaded from Adeneo´s website. AR6102  Change file device/fsl/imx53_loco/BoardConfig.mk -BOARD_WLAN_CHIP_AR6102  := false +BOARD_WLAN_CHIP_AR6102  := true AR6003  Change file device/fsl/imx53_loco/BoardConfig.mk -BOARD_WLAN_CHIP_AR6003  := false +BOARD_WLAN_CHIP_AR6003  := true After complete build ar6000.ko will be created under /system/etc/modules To turn WIFI on, go to Settings > Wireless & network s > Wi-Fi Error message case  In case logcat shows the following error message: E/WifiHW  ( 2086): Cannot access "/data/misc/wifi/wpa_supplicant.conf":Permission denied Reconfigure nfs server file /etc/default/nfs-kernel-server delete this line:   RPCMOUNTDOPT=--manage-gids
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i.MX6X Core Board HW User Guide.pdf
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This post describes the setup detail for installing Ubuntu based distro in any i.Mx6x NXP Boards. Details are described on: 1. Select your board, Setting the host, Download and compile uboot , dtb and and the Kernel version on your board. 2. Installing the Ubuntu core, Lubuntu graphics desktop version and/or Build your own Ubuntu rootfs with debootstrap. 3. Modify rootfs and Installing needed packages 4. Setting with SD image. 5. Setting Ubuntu on target 6. Adding GPU acceleration 1: Select your board, Setting the host, Download and compile uboot , dtb and and the Kernel version on your board. Supported NXP HW boards: i.MX 6QuadPlus SABRE-SD Board and Platform i.MX 6Quad SABRE-SD Board and Platform i.MX 6DualLite SABRE-SD Board i.MX 6Quad SABRE-AI Board i.MX 6DualLite SABRE-AI Board i.MX 6SoloX SABRE-SD Board i.MX 6SoloX SABRE-AI Board Install host dependences (version tested 14.04): $ sudo apt-get install gparted git build-essential libncurses5 wget u-boot-tools zlib1g-dev ncurses-dev \ cmake libc-dev-armhf-cross pkg-config-arm-linux-gnueabihf build-essential checkinstall cmake \ pkg-config lzop libc6 libstdc++6 debootstrap qemu-user-static binfmt-support Download the compiler toolchain and extract it: $ cd ~/ $ wget -c https://releases.linaro.org/14.09/components/toolchain/binaries/gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux.tar.xz $ tar xf gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux.tar.xz Create general variable environments: $ export target=mx6q (e.g. processor: mx6sx, mx6d, mx6dl,etc) $ export board=sabresd (e.g. sabresd, sabreauto) $ export ARCH=arm $ export CROSS_COMPILE=../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- $ unset LDFLAGS Download u-boot At the release of this document, latest uboot version was imx_3.14.52, it should work with other version as well, so please check the proper version for your board: $ cd ~/ $ wget –c http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/snapshot/uboot-imx-rel_imx_3.14.52_1.1.0_ga.tar.gz $ tar -xf uboot-imx-rel_imx_3.14.52_1.1.0_ga.tar.gz $ cd uboot-imx-rel_imx_3.14.52_1.1.0_ga $ make $targetboard_config    # e.g. mx6qsabresd_config $ make Linux Kernel, Firmware, headers, modules and DTS files $ cd ~/ $ wget –c http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/snapshot/linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga.tar.gz $ tar xf linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga.tar.gz $ cd linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga $ make imx_v7_defconfig $ make menuconfig $ make -j4 zImage modules dtbs $ cd ~/ move your image to binary folder: $ sudo cp –v uboot-imx-rel_imx_3.14.52_1.1.0_ga/u-boot.imx binary/ $ sudo cp –v linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga/arch/arm/boot/zImage binary/ $ sudo cp –v linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga/arch/arm/boot/dts/i$target-$board.dtb binary/ Now you have the bootloader, device tree and kernel image of your board ready, let’s create the rootfs. 2: Installing the Ubuntu core, Lubuntu graphics desktop version and/or Build your own Ubuntu rootfs with debootstrap. Installing ubuntu core: $ cd ~/ $ sudo mkdir –p core /media/rootfs /media/kernel $ wget –c http://cdimage.ubuntu.com/ubuntu-core/releases/14.04/release/ubuntu-core-14.04.4-core-armhf.tar.gz $ sudo tar –xf ubuntu-core-14.04.4-core-armhf.tar.gz –C core $ sudo cp -vr core/* /media/rootfs $ cd linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga $ sudo make modules_install firmware_install INSTALL_MOD_PATH=/media/rootfs/ ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- $ sudo make ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- headers_install INSTALL_HDR_PATH=/media/rootfs/usr Now you should have your ubuntu rootfs on /media/rootfs folder. and you can pass to part 3 of this post. Installing ubuntu Linaro LXDE: $ cd ~/ $ sudo mkdir –p core /media/rootfs /media/kernel $ wget https://releases.linaro.org/14.10/ubuntu/trusty-images/alip/linaro-trusty-alip-20141024-684.tar.gz $ sudo tar -xf linaro-trusty-alip-20141024-684.tar.gz –C core $ sudo mv core/binary/* core/ $ sudo rm –rf core/binary $ sudo cp -vr core/* /media/rootfs $ cd linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga $ sudo make modules_install firmware_install INSTALL_MOD_PATH=/media/rootfs/ ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- $ sudo make ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- headers_install INSTALL_HDR_PATH=/media/rootfs/usr Now you should have your ubuntu rootfs on /media/rootfs folder. and you can pass to part 3 of this post. Installing with debootstrap $ cd ~/ $ target=rootfs $ distro=trusty $ sudo debootstrap --arch=armhf --foreign --include=ubuntu-keyring,apt-transport-https,ca-certificates,openssl $distro "$target" http://ports.ubuntu.com $ sudo cp /usr/bin/qemu-arm-static $target/usr/bin $ sudo cp /etc/resolv.conf $target/etc Now have a minimal Ubuntu rootfs - chroot to it and perform the 2nd stage install: $ sudo chroot $target  //Now we are in chroot # distro=trusty # export LC_ALL=C LANGUAGE=C LANG=C # /debootstrap/debootstrap --second-stage Edit the sources.list repositories # cat <<EOT > /etc/apt/sources.list deb http://ports.ubuntu.com/ubuntu-ports/ $distro main restricted universe multiverse deb http://ports.ubuntu.com/ubuntu-ports/ $distro-updates main restricted universe multiverse deb http://ports.ubuntu.com/ubuntu-ports/ $distro-security main restricted universe multiverse EOT # apt-key adv --recv-keys --keyserver keyserver.ubuntu.com 40976EAF437D05B5 # apt-key adv --recv-keys --keyserver keyserver.ubuntu.com 3B4FE6ACC0B21F32 # apt-get update # apt -y -f install # apt-get upgrade # apt-get install nano Now you should be able to login without password, then use passwd command to set one. If you like to add custom users: # passwd root # adduser <myuser> # usermod -a -G tty myuser # usermod -a -G dialout, adm, sudo, dip, plugdev myuser # visudo Under the line that looks like: root ALL=(ALL:ALL) ALL add the following (change user with your actual username) <myuser> ALL=(ALL) ALL your rootfs is ready, exit chroot # exit $ sudo rm $target/etc/resolv.conf $ sudo rm $target/usr/bin/qemu-arm-static $ sudo mv rootfs/* /media/rootfs $ cd linux-2.6-imx-rel_imx_3.14.52_1.1.0_ga $ sudo make modules_install firmware_install INSTALL_MOD_PATH=/media/rootfs/ ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- $ sudo make ARCH=arm CROSS_COMPILE=../../gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf- headers_install INSTALL_HDR_PATH=/media/rootfs/usr Now you should have your ubuntu rootfs on /media/root. 3: Modify Rootfs and Install needed packages Edit and verify the sources.list repositories $ cd /media/rootfs $ sudo cat <<EOT > etc/apt/sources.list deb http://ports.ubuntu.com/ubuntu-ports/ trusty main restricted universe multiverse deb http://ports.ubuntu.com/ubuntu-ports/ trusty-updates main restricted universe multiverse deb http://ports.ubuntu.com/ubuntu-ports/ trusty-security main restricted universe multiverse EOT Edit networks interfaces and append in the existing file: $ sudo nano etc/network/interfaces auto lo iface lo inet loopback auto eth0 iface eth0 inet dhcp If you require Serial Console, remove and include an additional line at the end of the file for  ttymxc0 output as below, $ sudo nano etc/init/tty1.conf exec /sbin/getty -8 38400 tty1 exec /sbin/getty -L 115200 ttymxc0 If you like to change the localhostname: $ sudo nano etc/hostname and change to “your name” e.g. imx6Q. Set the date and time clock and update $ sudo nano /etc/rc.local  Add this: if [ `date +"%Y"` -eq "1970" ]; then                     date --set="2016-04-01" fi exit 0 (optional for Linaro rootfs) Edit passwd and remove the x in root and linaro lines $ sudo nano etc/passwd root:x:0:0:root:/root:/bin/bash linaro:x:0:0.. and change like this:                                   root::0:0:root:/root:/bin/bash linaro:::0:.. Now you are ready to program your sd image. 4: Setup microSD/SD card For these instructions, we are assuming: DISK=/dev/sdg on your HOST, cat /proc/partitions is very useful for determining the device id. $ cd ~/ $ export DISK=/dev/sdg Erase microSD/SD card: $ sudo dd if=/dev/zero of=${DISK} bs=1M count=10 Install Bootloader $ cd binary/ $ sudo dd if=u-boot.imx of=${DISK} bs=512 seek=2 $ sync Create Partition layout: $ cd ~/ $ sudo fdisk ${DISK} steps:        d ///delete all partitions currently on sd n // create new partition p // Primary partition 1 // partition number 1 2048 //default +1G // n // created 2d parition p 2 default default 1 // firts B // to be fat32 W // write partiotions $ sudo mkfs.vfat ${DISK}1 $ sudo mkfs.ext3  ${DISK}2 Mount ext3 SD partition to /media/rootfs: $ sudo mount ${DISK1} /media/kernel_target $ sudo mount ${DISK}2 /media/rootfs_target Copy Files on the SD. $ cd ~/ $ sudo cp –v binary/ i$target-$board.dtb /media/kernel_target $ sudo cp –v binary/zImage /media/kernel_target $ sudo mv /media/rootfs/* /media/rootfs_target Remove SD: $ sync $ sudo umount /media/kernel_target $ sudo umount /media/rootfs_target Boot the target, in console you should be login as root. root@imx6QSabreSD:~# 5: Setting Ubuntu on target Note: If you have issues with sudo on user UID, need to logout and log as root: imx6Q login: root Welcome to Ubuntu 14.04.4 LTS (GNU/Linux 3.14.52 armv7l) root@imx6Q:~# chown root:root /usr/bin/sudo root@imx6Q:~# chmod 4755 /usr/bin/sudo root@imx6Q:~# exit Login with <user $> or root # # apt-get update # apt-get –f install # apt-get install locales dialog wget # dpkg-reconfigure locales # apt-get upgrade Optional – install some useful packages: # apt-get install openssh-server can-utils usbutils build-essential automake autoconf libtool Get and Install the BSP packages (EULA required) # cd /home/user # mkdir –p vpu_pack # cd vpu_pack # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//firmware-imx-5.3.bin # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-vpu-5.4.32.bin # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//libfslcodec-4.0.8.bin # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-lib-5.1.tar.gz # chmod +x * # ./firmware-imx-5.3.bin --auto-accept --force # mkdir –p /lib/firmware/vpu # cp -ravf firmware-imx-5.3/firmware/* /lib/firmware/ # ./imx-vpu-5.4.32.bin --auto-accept --force # cd imx-vpu-* # make PLATFORM=IMX6Q all # make install # tar -xf imx-lib-5.1.tar.gz # cd  imx-lib-5.1/ # make -j1 PLATFORM="IMX6Q" # make PLATFORM="IMX6Q" install # cd .. # ./libfslcodec-4.0.8 --auto-accept –force # cd libfslcodec-* # ./autogent.sh --prefix=/usr --enable-fhw --enable-vpu # make # make install # mv /usr/lib/imx-mm/video-codec/* /usr/lib # mv /usr/lib/imx-mm/audio-codec/* /usr/lib # rm –rf /usr/lib/imx-mm/ # cd .. # mkdir –p gpu_pack # cd gpu_pack # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-gpu-viv-5.0.11.p7.4-hfp.bin # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//xserver-xorg-video-imx-viv-5.0.11.p7.4.tar.gz # chmod +x * # ./imx-gpu-viv-5.0.11.p7.4-hfp –-auto-accept -–force # cd imx-gpu* # cp g2d/usr/include/* /usr/include/ # cp -d g2d/usr/lib/* /usr/lib/ # cp -Pr gpu-core/usr/* /usr # optional: install demos # cp -r gpu-demos/opt / # optional: install gpu tools # cp -axr gpu-tools/gmem-info/usr/bin/* /usr/bin/ # cd .. Installing gstreamer-imx, IPU, VPU and GPU support: Install build deps, gstreamer1.x, this step could take some time (~350MB): # apt-get install python pkg-config git gstreamer1.0-x gstreamer1.0-tools gstreamer1.0-plugins-good gstreamer1.0-plugins-bad gstreamer1.0-alsa libgstreamer1.0-dev libgstreamer-plugins-base1.0-dev libgstreamer-plugins-good1.0-dev g++-multilib # git clone git://github.com/Freescale/gstreamer-imx.git # cd gstreamer-imx # ln –s /usr/lib/arm-linux-gnueabihf/gstreamer-1.0/ /usr/lib/gstreamer-1.0 # ./waf configure --prefix=/usr --kernel-headers=/include # ./waf # ./waf install # cd ../../ (optional) Install libimxvpuapi library: This library provides a community based open-source API to the NXP imx-vpu library (the low-level IMX6 VPU interface). # git clone git://github.com/Freescale/libimxvpuapi.git # cd libimxvpu* # ./waf configure –-prefix=/usr # ./waf # ./waf install # cd .. note './waf install' installs artifacts to its prefix + /lib/gstreamer-1.0 but they need to be installed to /usr/lib/arm-linux-gnueabihf/gstreamer-1.0 which is why we created a symlink above before installing note g2d lib required to build G2D note that x11 library is required to build EGL sink with Vivante direct textures (only needed for X11 support) note that libfslaudiocodec is required to build audio plugins Now you are ready to test gstreamer 6: Add GPU HW Acceleration for X11 NOTE: The original version of these build instructions can be found in the Gateworks wiki . Many thanks to them for writing this! IMX6 IPU, VPU, and GPU support via GStreamer and Gstreamer-imx plugins. Many of the pieces needed (firmware and source-code) are from NXP and not freely redistributable thus must be downloaded from their mirror and extracted from a shell script that forces you to read and agree to their End User License Agreement (EULA). The following instructions can be used on top of the debootstrap and should work on other sources of Ubuntu or other Linux distributions root filesystems as well You can easily add X11 support to a base image created with the debootstrap instructions above by adding a few package groups. You will need the following: X11 server - ie Xorg Display Manager - this controls the login to the X session Window Manager - manages window position, re-sizing, decorations, etc for X clients If in any case you have installed the Linaro LXDE rootfs, it includes the Xorg X11 server, the lxdm Display Manager, the openbox Window Manager, and others useful user applications including the Chromium browser, if you do not install linaro lxde and want to install it please do: this step could take some time (~650MB)   # apt-get install xinit lxde lxterminal lxappearance lxrandr lxshortcut lxinput xinit  xserver-xorg-dev mesa-utils mesa-utils-extra Notes: you will need to add a non-root user with adduser for Chromium browser to work. You may choose to set up auto-login for that user by editing /etc/lxdm/default.conf and setting the autologin property in the base section at the beginning of the config file. /etc/xdg/lubuntu/lxdm/lxdm.conf This document takes as based kernel version 3.14.52v, vivante 5.0.11p7.4 correspond to the kernel version used. you should check the BSP release notes in order to know which xserver and Vivante GPU files need to be downloaded from the NXP repos. $ sudo nano /etc/lxdm/default.conf    [base]    autologin=user To add hardware GPU acceleration to X11 you need to add some libraries and drivers provided by Freescale from the imx-gpu-viv package. This requires signing Freescales End User License Agreement (EULA). This package provides the following: libg2d - a documented low-level API to the GPU (used by things like libimxvpuapi for gstreamer-imx and the gpu-core drivers) gpu-core - provides all the various OpenGL libs (libGL, libGLESv1_CM, libGLESv1_CL, libGLESv2, libGLSLC, libCLC, libEGL, libGAL, libOpenCL, ls libOpenVG) typically provided by the mesa project. Note that several versions of libEGL/libGAL/libGLESv2/libVIVANTE are provided for different backend rendering systems: dfb, fb, wl, x11. # cd gpu_pack #cd imx-gpu-* # cp gpu-core/usr/lib/dri/vivante_dri.so /usr/lib/xorg/modules/drivers/ # chmod 644 /usr/lib/xorg/modules/drivers/vivante_dri.so # rm /usr/lib/arm-linux-gnueabihf/mesa/libGL.so* # rm /usr/lib/arm-linux-gnueabihf/mesa-egl/libEGL.so* # rm /usr/lib/arm-linux-gnueabihf/mesa-egl/libGLESv2.so* # rm /usr/lib/arm-linux-gnueabihf/mesa-egl/libOpenVG.so* # cd ../../ # cd gpu-pack # wget http://www.nxp.com/lgfiles/NMG/MAD/YOCTO//xserver-xorg-video-imx-viv-5.0.11.p7.4.tar.gz # tar –xf xserver* # cd xserver-org-video-imx* #looks lik have to made #git init # ./fastbuild.sh  BUILD_HARD_VFP=1 XSERVER_GREATER_THAN_13=1 # cd.. # cd kernel-modu* # make Switch to gpu-core x11 backend: # backend=x11 # ln -sf libEGL-${backend}.so /usr/lib/libEGL.so # ln -sf libEGL-${backend}.so /usr/lib/libEGL.so.1 # ln -sf libEGL-${backend}.so /usr/lib/libEGL.so.1.0 # ln -sf libGAL-${backend}.so /usr/lib/libGAL.so # ln -sf libGLESv2-${backend}.so /usr/lib/libGLESv2.so # ln -sf libGLESv2-${backend}.so /usr/lib/libGLESv2.so.2 # ln -sf libGLESv2-${backend}.so /usr/lib/libGLESv2.so.2.0.0 # ln -sf libVIVANTE-${backend}.so /usr/lib/libVIVANTE.so # ln -sf libGAL_egl.dri.so /usr/lib/libGAL_egl.so # for i in egl glesv1_cm glesv2 vg; do         cp /usr/lib/pkgconfig/${i}_${backend}.pc/usr/lib/pkgconfig/${i}.pc     done #rm /usr/lib/*-dfb.so /usr/lib/*-fb.so /usr/lib/*-wl.so (Optional in case you deploy your kernel version with GPU as module) make vivante kernel module (GPU kernel driver) load on boot: # echo vivante >> /etc/modules # nano /etc/udev/rules.d/10-imx.rules KERNEL=="galcore",  MODE="0660", GROUP="video" KERNEL=="mxc_asrc",  MODE="0666" Create an xorg.conf configured for the Vivante fbdev driver: # nano /etc/X11/xorg.conf Section "Device"     Identifier "i.MX Accelerated Framebuffer Device"     Driver "vivante"     Option "fbdev" "/dev/fb0"     Option "vivante_fbdev" "/dev/fb0"     Option "HWcursor" "false" EndSection Section "ServerFlags"     Option "BlankTime"  "0"     Option "StandbyTime"  "0"     Option "SuspendTime"  "0"     Option "OffTime"  "0" EndSection # cd .. Make sure the files copied into the correct places. If all compiled and copied, you should now see a bunch of new libraries in /usr/lib! Congratulations! After you finish you can reboot your system and start playing. Testing Gstreamer examples: show gstreamer-imx plugins: # gst-inspect-1.0 | grep imx imxvpu:  imxvpuenc_mjpeg: Freescale VPU motion JPEG video encoder imxvpu:  imxvpuenc_mpeg4: Freescale VPU MPEG-4 video encoder imxvpu:  imxvpuenc_h264: Freescale VPU h.264 video encoder imxvpu:  imxvpuenc_h263: Freescale VPU h.263 video encoder imxvpu:  imxvpudec: Freescale VPU video decoder imxv4l2videosrc:  imxv4l2videosrc: V4L2 CSI Video Source imxg2d:  imxg2dcompositor: Freescale G2D video compositor imxg2d:  imxg2dvideotransform: Freescale G2D video transform imxg2d:  imxg2dvideosink: Freescale G2D video sink imxipu:  imxipucompositor: Freescale IPU video compositor imxipu:  imxipuvideosink: Freescale IPU video sink imxipu:  imxipuvideotransform: Freescale IPU video transform imxpxp:  imxpxpvideotransform: Freescale PxP video transform imxpxp:  imxpxpvideosink: Freescale PxP video sink imxipuvideosink: # gst-launch-1.0 videotestsrc ! imxipuvideosink imxg2dvideosink: # gst-launch-1.0 videotestsrc ! imxg2dvideosink The imxeglvivsink allows hardware accelerated display to a window on the X11 host # export DISPLAY=:0.0 # gst-launch-1.0 videotestsrc ! imxeglvivsink To test if you have graphics support you can run any glmark2 and/or mesa-utils or can run example of the next route: # cd /opt/viv_samples/vdk/ # ./tutorial1                                                                      //any example root@imx6Q:~# glxgears -info GL_RENDERER   = Vivante GC2000 GL_VERSION    = 2.1 2.0.1 GL_VENDOR     = Vivante Corporation GL_EXTENSIONS = WGL_ARB_extensions_string WGL_EXT_extensions_string WGL_EXT_swap_control GL_EXT_texture_env_add GL_ARB_multitexture GL_ARB_multisample GL_ARB_texture_env_add GL_ARB_texture_compression GL_ARB_texture_env_combine GL_ARB_depth_texture GL_ARB_window_pos …. 1606 frames in 5.0 seconds = 321.130 FPS 1650 frames in 5.0 seconds = 329.834 FPS L_RENDERER   = Vivante GC2000 GL_VERSION    = 2.1 2.0.1 GL_VENDOR     = Vivante Corporation1629 frames in 5.0 seconds = 325.644 FPS 1621 frames in 5.0 seconds = 324.072 FPS 1650 frames in 5.0 seconds = 329.806 FPS 1651 frames in 5.0 seconds = 330.079 FPS
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Fast GPU Image Processing in the i.MX 6x by Guillermo Hernandez, Freescale Introduction Color tracking is useful as a base for complex image processing use cases, like determining what parts of an image belong to skin is very important for face detection or hand gesture applications. In this example we will present a method that is robust enough to take some noise and blur, and different lighting conditions thanks to the use of OpenGL ES 2.0 shaders running in the i.MX 6X  multimedia processor. Prerequisites This how-to assumes that the reader is an experienced i.mx developer and is familiar with the tools and techniques around this technology, also this paper assumes the reader has intermediate graphics knowledge and experience such as the RGBA structure of pictures and video frames and programming OpenGL based applications, as we will not dig in the details of the basic setup. Scope Within this paper, we will see how to implement a very fast color tracking application that uses the GPU instead of the CPU using OpenGL ES 2.0 shaders. Step 1: Gather all the components For this example we will use: 1.      i.MX6q ARD platform 2.      Linux ER5 3.      Oneric rootfs with ER5 release packages 4.      Open CV 2.0.0 source Step 2: building everything you need Refer to ER5 User´s Guide and Release notes on how to build and boot the board with the Ubuntu Oneric rootfs. After you are done, you will need to build the Open CV 2.0.0 source in the board, or you could add it to the ltib and have it built for you. NOTE: We will be using open CV only for convenience purposes, we will not use any if its advanced math or image processing  features (because everything happens on the CPU and that is what we are trying to avoid), but rather to have an easy way of grabbing and managing  frames from the USB camera. Step 3: Application setup Make sure that at this point you have a basic OpenGL Es 2.0 application running, a simple plane with a texture mapped to it should be enough to start. (Please refer to Freescale GPU examples). Step 4: OpenCV auxiliary code The basic idea of the workflow is as follows: a)      Get the live feed from the USB camera using openCV function cvCapture() and store into IplImage structure. b)      Create an OpenGL  texture that reads the IplImage buffer every frame and map it to a plane in OpenGL ES 2.0. c)      Use the Fragment Shader to perform fast image processing calculations, in this example we will examine the Sobel Filter and Binary Images that are the foundations for many complex Image Processing algorithms. d)      If necessary, perform multi-pass rendering to chain several image processing shaders  and get an end result. First we must import our openCV relevant headers: #include "opencv/cv.h" #include "opencv/cxcore.h" #include "opencv/cvaux.h" #include "opencv/highgui.h" Then we should define a texture size, for this example we will be using 320x240, but this can be easily changed to 640 x 480 #define TEXTURE_W 320 #define TEXTURE_H 240 We need to create an OpenCV capture device to enable its V4L camera and get the live feed: CvCapture *capture; capture = cvCreateCameraCapture (0); cvSetCaptureProperty (capture, CV_CAP_PROP_FRAME_WIDTH,  TEXTURE_W); cvSetCaptureProperty (capture, CV_CAP_PROP_FRAME_HEIGHT, TEXTURE_H); Note: when we are done, remember to close the camera stream: cvReleaseCapture (&capture); OpenCV has a very convenient structure used for storing pixel arrays (a.k.a. images) called IplImage IplImage *bgr_img1; IplImage *frame1; bgr_img1 = cvCreateImage (cvSize (TEXTURE_W, TEXTURE_H), 8, 4); OpenCV has a very convenient function for capturing a frame from the camera and storing it into a IplImage frame2 = cvQueryFrame(capture2); Then we will want to separate the camera capture process from the pos-processing filters and final rendering; hence, we should create a thread to exclusively handle the camera: #include <pthread.h> pthread_t camera_thread1; pthread_create (&camera_thread1, NULL, UpdateTextureFromCamera1,(void *)&thread_id); Your UpdateTextureFromCamera() function should be something like this: void *UpdateTextureFromCamera2 (void *ptr) {       while(1)       {             frame2 = cvQueryFrame(capture);             //cvFlip (frame2, frame2, 1);  // mirrored image             cvCvtColor(frame2, bgr_img2, CV_BGR2BGRA);       }       return NULL;    } Finally, the rendering loop should be something like this: while (! window->Kbhit ())       {                         tt = (double)cvGetTickCount();             Render ();             tt = (double)cvGetTickCount() - tt;             value = tt/(cvGetTickFrequency()*1000.);             printf( "\ntime = %gms --- %.2lf FPS", value, 1000.0 / value);             //key = cvWaitKey (30);       }       Step 5: Map the camera image to a GL Texture As you can see, you need a Render function call every frame, this white paper will not cover in detail the basic OpenGL  or EGL setup of the application, but we would rather focus on the ES 2.0 shaders. GLuint _texture; GLeglImageOES g_imgHandle; IplImage *_texture_data; The function to map the texture from our stored pixels in IplImage is quite simple: we just need to get the image data, that is basically a pixel array void GLCVPlane::PlaneSetTex (IplImage *texture_data) {       cvCvtColor (texture_data, _texture_data, CV_BGR2RGB);       glBindTexture(GL_TEXTURE_2D, _texture);       glTexImage2D (GL_TEXTURE_2D, 0, GL_RGB, _texture_w, _texture_h, 0, GL_RGB, GL_UNSIGNED_BYTE, _texture_data->imageData); } This function should be called inside our render loop: void Render (void) {   glClearColor (0.0f, 0.0f, 0.0f, 0.0f);   glClear (GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);   PlaneSetTex(bgr_img1); } At this point the OpenGL texture is ready to be used as a sampler in our Fragment Shader  mapped to a 3D plane Lastly,  when you are ready to draw your plane with the texture in it: // Set the shader program glUseProgram (_shader_program); … // Binds this texture handle so we can load the data into it /* Select Our Texture */ glActiveTexture(GL_TEXTURE0); //Select eglImage glEGLImageTargetTexture2DOES(GL_TEXTURE_2D, g_imgHandle); glDrawArrays (GL_TRIANGLES, 0, 6); Step 6: Use the GPU to do Image Processing First we need to make sure we have the correct Vertex Shader and Fragment shader, we will  focus only in the Fragment Shader, this is where we will process our image from the camera. Below you will find the most simple fragment shader, this one only colors pixels from the sample texture const char *planefrag_shader_src =       "#ifdef GL_FRAGMENT_PRECISION_HIGH                    \n"       "  precision highp float;                            \n"       "#else                                          \n"       "  precision mediump float;                    \n"       "#endif                                        \n"       "                                              \n"       "uniform sampler2D s_texture;                  \n"       "varying  vec3      g_vVSColor;                      \n"       "varying  vec2 g_vVSTexCoord;                        \n"       "                                              \n"       "void main()                                    \n"       "{                                              \n"       "    gl_FragColor = texture2D(s_texture,g_vVSTexCoord);    \n"       "}                                              \n"; Binary Image The most Simple Image Filter is the Binary Image, this one converts a source image to a black/white output, to decide if a color should be black or white we need a threshold,  everything below that threshold will be black, and any color above should be white.               The shader code is as follows: const char* g_strRGBtoBlackWhiteShader =     #ifdef GL_FRAGMENT_PRECISION_HIGH                            precision highp float;                            #else                                            precision mediump float;                          #endif                                            varying  vec2 g_vVSTexCoord;                  uniform sampler2D s_texture;                    uniform float threshold;                                                                        void main() {                                    vec3 current_Color = texture2D(s_texture,g_vVSTexCoord).xyz;         float luminance = dot (vec3(0.299,0.587,0.114),current_Color);         if(luminance>threshold)                      \n"             gl_FragColor = vec4(1.0);                \n"           else                                  \n"                          gl_FragColor = vec4(0.0);                \n"       }                                        \n"; You can notice that the main operation is to get a luminance value of the pixel, in order to achieve that we have to multiply a known vector (obtained empirically) by the current pixel, then we simply compare that luminance value with a threshold. Anything below that threshold will be black, and anything above that threshold will be considered a white pixel. SOBEL Operator Sobel is a very common filter, since it is used as a foundation for many complex Image Processing processes, particularly in edge detection algorithms. The sobel operator is based in convolutions, the convolution is made of a particular mask, often called a kernel (on common therms, usually a 3x3 matrix). The sobel operator calculates the gradient of the image at each pixel, so it tells us how it changes from the pixels surrounding the current pixel , meaning how it increases or decreases (darker to brighter values).           The shader is a bit long, since several operations must be performed, we shall discuss each of its parts below: First we need to get the texture coordinates from the Vertex Shader: const char* plane_sobel_filter_shader_src = #ifdef GL_FRAGMENT_PRECISION_HIGH                    precision highp float;                          #else                                    precision mediump float;                        #endif                                          varying  vec2 g_vVSTexCoord;                  uniform sampler2D s_texture;                    Then we should define our kernel, as stated before, a 3x3 matrix should be enough, and the following values have been tested with good results: mat3 kernel1 = mat3 (-1.0, -2.0, -1.0,                                          0.0, 0.0, 0.0,                                              1.0, 2.0, 1.0);    We also need a convenient way to convert to grayscale, since we only need grayscale information for the Sobel operator, remember that to convert to grayscale you only need an average of the three colors: float toGrayscale(vec3 source) {                    float average = (source.x+source.y+source.z)/3.0;        return average;              } Now we go to the important part, to actually perform the convolutions. Remember that by the OpenGL ES 2.0 spec, nor recursion nor dynamic indexing is supported, so we need to do our operations the hard way: by defining vectors and multiplying them. See the following code:   float doConvolution(mat3 kernel) {                              float sum = 0.0;                                    float current_pixelColor = toGrayscale(texture2D(s_texture,g_vVSTexCoord).xyz); float xOffset = float(1)/1024.0;                    float yOffset = float(1)/768.0; float new_pixel00 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-  xOffset,g_vVSTexCoord.y-yOffset)).xyz); float new_pixel01 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y-yOffset)).xyz); float new_pixel02 = toGrayscale(texture2D(s_texture,  vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y-yOffset)).xyz); vec3 pixelRow0 = vec3(new_pixel00,new_pixel01,new_pixel02); float new_pixel10 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-xOffset,g_vVSTexCoord.y)).xyz);\n" float new_pixel11 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y)).xyz); float new_pixel12 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y)).xyz); vec3 pixelRow1 = vec3(new_pixel10,new_pixel11,new_pixel12); float new_pixel20 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x-xOffset,g_vVSTexCoord.y+yOffset)).xyz); float new_pixel21 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x,g_vVSTexCoord.y+yOffset)).xyz); float new_pixel22 = toGrayscale(texture2D(s_texture, vec2(g_vVSTexCoord.x+xOffset,g_vVSTexCoord.y+yOffset)).xyz); vec3 pixelRow2 = vec3(new_pixel20,new_pixel21,new_pixel22); vec3 mult1 = (kernel[0]*pixelRow0);                  vec3 mult2 = (kernel[1]*pixelRow1);                  vec3 mult3 = (kernel[2]*pixelRow2);                  sum= mult1.x+mult1.y+mult1.z+mult2.x+mult2.y+mult2.z+mult3.x+     mult3.y+mult3.z;\n"     return sum;                                      } If you see the last part of our function, you can notice that we are adding the multiplication values to a sum, with this sum we will see the variation of each pixel regarding its neighbors. The last part of the shader is where we will use all our previous functions, it is worth to notice that the convolution needs to be applied horizontally and vertically for this technique to be complete: void main() {                                    float horizontalSum = 0.0;                            float verticalSum = 0.0;                        float averageSum = 0.0;                        horizontalSum = doConvolution(kernel1);        verticalSum = doConvolution(kernel2);            if( (verticalSum > 0.2)|| (horizontalSum >0.2)||(verticalSum < -0.2)|| (horizontalSum <-0.2))                        averageSum = 0.0;                      else                                                    averageSum = 1.0;                    gl_FragColor = vec4(averageSum,averageSum,averageSum,1.0);                }    Conclusions and future work At this point, if you have your application up and running, you can notice that Image Processing can be done quite fast, even with images larger than 640 480. This approach can be expanded to a variety of techniques like Tracking, Feature detection and Face detection. However, these techniques are out of scope for now, because this algorithms need multiple rendering passes (like face detection), where we need to perform an operation, then write the result to an offscreen buffer and use that buffer as an input for the next shader and so on.  But Freescale is planning to release an Application Note in Q4 2012 that will expand this white paper and cover these techniques in detail.
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For more information verify the U-Boot User Manual[1].   First all configure your board IP, your host IP and the gateway IP:   => setenv ipaddr 10.29.244.91   => setenv serverip 10.29.244.27   => setenv gatewayip 10.29.244.27 You don't need to set the gatewayip when using cross'cable! Save this configuration to flash: => saveenv   Download the file to board RAM: => tftp 0x80000000 zImage   Where:   400000 is the memory position where the file will be placed;   zImage is the file that will be downloaded from TFTP server.  
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Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. i.MX 6/7 Family DDR Stress Test  The i.MX6/7 DDR Stress Test Tool is a PC-based software to fine-tune DDR parameters and verify the DDR performance on a non-OS, single-task environment(it is a light-weight test tool to test DDR performance). It performs write leveling, DQS gating and read/write delay calibration features. The tool described on this page cover the following i.MX 6/7 series SoCs: i.MX 6DQP (Dual/Quad Plus) i.MX 6DQ (Dual/Quad) i.MX 6DL/S (Dual Lite/Solo) i.MX 6SoloX i.MX 6SL i.MX 6SLL i.MX 6UL i.MX 6ULL/ULZ i.MX 7D/S i.MX 7ULP Note that the DDR Stress test tool supports the all of the above i.MX SoCs, however, some of the supported i.MX SoCs named in the tool support multiple i.MX SoCs as follows: MX6DQ – when selected, this supports both i.MX 6DQ and i.MX 6DQP (Plus) MX6DL – when selected, this supports both i.MX 6DL and i.MX 6S (i.MX 6DLS family) MX6ULL – when selected, this supports both i.MX 6ULL and i.MX6 ULZ MX7D – when selected, this supports both i.MX 7D and i.MX 7S The purpose of the i.MX 6/7 series DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.). This process equips the user to then proceed with the bring-up of a boot loader and an OS. Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface. The i.MX 6/7 series DDR Tools consist of: DDR Register Programming Aid (RPA): i.MX 6/7 Series DDR Tool Release DDR Stress test: Described below There are three options to run the DDR Stress test. Each of these options are provided in the attached zip files. The following is a high-level overview of each option along with the naming convention of the associated zip file: Option 1 GUI based: Run the GUI executable and connect your board to the host PC via USB Archive file: ddr_stress_tester_vX.xx.zip The tool will first need to run a DDR initialization script for the specified i.MX SoC (refer to Load Init Script in the GUI tool).  Example initialization scripts based on NXP's development boards can be found in this zip file under the script folder.  Note, these scripts may need to be modified for your custom board and memory.   Option 2 DDR Stress Tester: JTAG Interface A hardware debugger connected to the board via the JTAG interface is used to download an elf file into the i.MX SoC OCRAM (internal RAM) and then begin execution. Results are shown on the UART serial port (115200-8-n-1). Archive file: ddr_stress_tester_jtag_vX.xx.zip As with the GUI tool, the JTAG/debugger option will first need to run a DDR initialization script for the specified i.MX SoC. Refer to the GUI tool description above for the location of the example scripts (which are found in the ddr_stress_tester_vX.xx.zip file). Note that the scripts are available either in the RealView ICE format (.inc file) or the DS-5 DSTERAM format (.ds). For other debuggers, the user will have to modify the script's command syntax for their specific debugger. This is also true if converting from a RealView Ice (.inc) format to a DS-5 DSTREAM (.ds) format and vice versa. The DDR Stress Tester executable (starting with V2.20) has an auto UART detection feature. If a different UART port for the serial console has been chosen than used on the NXP development tool (EVK, SABRE) specific commands can be added to the DDR initialization script that allows you to configure for the specific UART and then load and run the elf executable. Refer to the FAQ section of this community post and the txt file found in the JTAG archive file for instructions.   Option 3 U-Boot: The boot loader u-boot is running and commands in u-boot are used to download the bin file into SoC OCRAM and begin execution. Results are shown on the UART serial port (115200-8-n-1) Archive file: ddr_stress_tester_uboot_vX.xx.zip When downloading the DDR Stress Test Tool by u-boot, please copy the ddr-test-uboot-jtag-mxxxx.bin to SD card and load it to IRAM using the 'fatload' u-boot command (see notes below when using newer versions of u-boot). For i.MX6, please load the binary to 0x00907000. For i.MX7D, please load the binary to 0x00910000.  It is imperative to first disable the I and D cache in u-boot as shown below as the DDR Stress Test re-configures and re-enables the cache and MMU page table. While this option allows the user to load and run the DDR stress test from u-boot, NXP highly recommends executing the GUI based version for system testing and debugging. The u-boot version is considered a “last resort” for systems in production which may not have USB or JTAG connectivity. The reasons behind this stance are: In the GUI version, the system starts “clean” and uninitialized, whereas u-boot initializes many SoC features outside the knowledge of the DDR stress test and may conflict with the stress test operation When running the u-boot version, the test will overwrite the contents of u-boot residing in DDR, hence the test will overwrite any data in DDR. Once the stress test is loaded and executed, u-boot itself will no longer be accessible. To return to the functionality of u-boot, a system re-boot is required. Newer versions on u-boot do not allow a direct loading of the DDR stress test code from the SD card (boot media) directly to the SoC internal OCRAM (aka IRAM). Hence, the procedure is updated to first load the DDR stress test code into DDR and then copy into OCRAM, as shown in the procedure below: u-boot> dcache off;icache off;fatload mmc 2:1 0x12000000 ddr-test-uboot-jtag-mx6dq.bin;cp.b 0x12000000 0x00907000 0x20000;go 0x00907000 As u-boot initializes many peripherals that may conflict with the operation of the DDR stress test, it is necessary to clock gate these peripherals prior to running the DDR stress test. Hence, it is highly recommended to augment the procedure above as follows: u-boot> dcache off;icache off;fatload mmc 2:1 0x12000000 ddr-test-uboot-jtag-mx6dq.bin;cp.b 0x12000000 0x00907000 0x20000; u-boot> mw 0x020c4068 0x00C0000F; u-boot> mw 0x020c406c 0x00000000; u-boot> mw 0x020c4074 0x3F300000; u-boot> mw 0x020c4078 0x0000F300; u-boot> mw 0x020c407c 0x0F000003; u-boot> mw 0x020c4080 0x000003FC; u-boot> go 0x00907000 Note, in the above procedure, it is recommended to write to each clock gate register in separate commands (refer to commands starting with “mw”). The SoC requires a finite amount of time to gate each clock hence performing this sequence with a new command line write ensures the SoC has time to gate the intended clocks.   Stress Test Revision Features Comments 3.00 Add i.MX 7ULP support in the GUI version Known issues: USB connection is unstable when under USB HUB or some PC environments 2.92 Minor correction with write leveling calibration code error check to avoid a corner case of flagging an error when none have occurred.    2.91 Resolved issue with write leveling calibration code where a race condition in the code may result in the calibration routine not being able to find any delay values.   Only applies to MX6 series SoCs that support DDR3.  2.90 Reserve write delay line register (MMDC_MPWRDLCTL) configuration as DDR script does when do write calibration. In previous releases, MMDC_MPWRDLCTL would be changed to 0x40404040 by default.      * Further details available in the release notes  _________________________________________________________________________________________________________________________________________    FAQ   Q. I see an error message that states "ERROR: DCD addr is out of valid range.", why is this and how do I resolve?   A. Sometimes, when using the register programming aid, there are registers writes that are not supported in the DCD range.  Try looking for the following items and comment them out from the DDR initialization script: wait = on setmem /16 0x020bc000 = 0x30 // disable watchdog (note the address for this may be different between i.MX6x devices)  Q. How do I select the "DDR Density" pull-down menu and what is the purpose of this?   A. The DDR Density pull-down menu gives the user the option of testing a DDR density smaller than what they actually have on their board.  The advantage of doing this is to speed up test time to allow the user to perform a "quick test" of their system.  IMPORTANT: it is imperative that the user not set this value higher than the supported density on their board, doing so will cause the stress test to fail and/or lock up. The DDR Density has a different meaning depending on the memory type being tested (DDR3 or LPDDR2): For DDR3, this is the density per CHIP SELECT.  So if your board has two chip selects, and each chip select has 512MB, you would simply select 512MB or lower.  The default setting will simply set this to the detected density per chip select. For LPDDR2, this is the density per CHANNEL.  This is only relevant for MX6 devices that support 2 channel LPDDR2 memories (MX6DQ, MX6DL).  For other MX6 devices that support only one LPDDR2 channel, then this is the total density (for the maximum setting) for that channel. Note that for LPDDR2, the number of chip selects (per channel) is irrelevant when selecting the density to test as the stress test combines both chip-selects into one combined density per channel.  For example, lets say you have a 2GB LPDDR2 device, which 2 channels and 2 chip-selects per channel.  That means you have 512MB per chip select, per channel.  Or, it also means you have 1GB per channel when combining both chip selects per channel.  In this case, you would choose (a maximum setting of) 1GB in the DDR Density drop down menu.  However, this is also the same setting as the default setting (which you are welcome to still choose 1GB to convince yourself that 1GB per channel is indeed being tested). Now let's assume you have only one channel (LPDDR2) and one chip select, with a density of 128MB; in this case, the maximum DDR Density you can select is 128MB. Let's assume you have one channel and two chip selects, each chip select is 128MB;  in this case, the maximum DDR Density you can select is 256MB (a combination of both chip selects).   Note, for the MX7D, an actual density needs to be entered. For the MX6x series, simply leaving this field as Default will cause the DDR stress test to ascertain the supported density from the DDR init script. As the MX7D DDR controller is different, this feature is not supported, hence it is required for the user to enter an actual density (for more details regarding MX7D usage of density and number of chip-selects, see the next FAQ on the DDR CS setting).   Q.  What is the purpose of the "DDR CS" pull-down option?   A.  The answer depends on which processor you are testing:   For the i.MX 6x series: This pull down menu gives you the option of testing one chip select (CS0) or ALL (both) chip selects *IF* you have a two-chip select configuration.  If you have a two-chip select configuration, then this allows you to test only one chip select for faster test time; else you can choose to test both chip selects.  Note that if you have a one-chip select configuration and you choose "ALL", the stress test will return an error.   For the iMX 7D: Because the MX7D DDR controller is different, the DDR stress test will need the user to supply the entire supported density found on their board. The chip select field should be left as is (0) as the test will naturally test one chip select to the next. For example, let’s assume you are using two chip selects, with each chip select being 512MB. In this case, you would enter 1GB for the DDR Density field ensuring that both chip selects will be tested. The user is allowed to enter a density less than the density found on their board (for quicker testing), but keeping in mind both chip selects may not be tested in this case.   Q. I run DDR calibration using the DDR Stress Test Tool to obtain the calibration results.  Are these calibration parameters are written to the uboot flash_header.S automatically or manually?   A. The calibration values obtained from the DDR Stress Test Tool will need to be manually updated in the flash_header.S file or any other DDR initialization script.   Q. When running the DDR stress test on MX7D and I try to perform calibration, I get an error stating that calibration is not supported, is this expected?   A. Yes, calibration is not supported or needed when using MX7.  The reason is, MX7 uses a different memory controller than the MX6 series.  The MX6 series memory controller has built-in support for calibration where the MX7 memory controller does not.   Q. When running the GUI version of the DDR stress test, on MX7 and I leave DDR Density as default, I get an error in the tool stating I must supply a density.  Why is this?   A. This is due to the fact that MX7 uses a different memory controller than the MX6 series.  In the MX6 series, it was possible to calculate the memory density from the memory controller register settings.  The MX7 memory controller is different and does not lend itself to easily calculate the supported density based on the register settings.  Instead, the user should verify the density on their board and selected this value in the DDR Density pull-down menu.    Q. I noticed that when I run write-leveling calibration I sometimes see a note that due to the write-leveling calibration value being greater than 1/8 clock cycle that WALAT must be set to 1.  What does this mean?   A. In the MMDC chapter of the reference manual for the specific i.MX 6 device, the need to set WALAT is described in the MDMISC register as follows: "The purpose of WALAT is to add time delay at the end of a burst write operation to ensure that the JEDEC time specification for Write Post Amble Delay (tWPST) is met (DQS strobe is held low at the end of a write burst for > 30% a clock cycle before it is released). If the value of any of the WL_DL_ABS_OFFSETn register fields are greater than ‘1F’, WALAT should be set to ‘1’ (cycle additional delay). WALAT should be further increased for any full-cycle delays added by the WL_CYC_DELn register fields." Therefore, if the write-leveling calibration routine detects any write-leveling delay value greater than 0x1F, it will note to the user that WALAT must be set and the user should update their DDR3 init script to ensure WALAT is set.  Sometimes, a user may find that the write-leveling delay value may fluctuate from one run to the next, which is quite normal.  If it is found that this delay is "borderline" meaning sometimes it is greater than 0x1F and sometimes it might be slightly less, then it is ok to go ahead and set WALAT permanently in your init script as there is no harm in doing so and will ensure you will stay within JEDEC's tWPST.   Q. I sometimes see that after running write-leveling calibration that delay values being reported back are zero'd out (0x00), and then at times I see a non-zero value being reported, why is this? A. It is quite normal to see slight variations in the delay value between write-leveling calibration runs.  The write-leveling calibration routine assumes a majority of users have designed their board such that the DDR3 memories are placed close to the i.MX 6 SoC. There’s a mechanism in NXP’s DDR Stress test write leveling calibration code that checks the returned write leveling value. If the write-leveling calibration routine detects that the returned delay value is greater than ¾ of a clock cycle, it will "zero out" the delay value. It does this because it assumes that such a large delay result is due to the fact that the DQS signal is already delayed relative to the SDCLK, and to align DQS with SDCLK requires the calibration routine to delay DQS even further to align it to the next SDCLK edge, something we ideally would like to avoid.  JEDEC specs that the DQS edge must be within 25% of a SDCLK cycle with respect to the SDCLK edge, so having DQS initially slightly delayed from SDCLK is actually ok, hence why the calibration routine “zero’s” this out when the returned value exceeds ¾ of a clock cycle.  In cases like this, the DQS edge and SDCLK edge are so close together that in some calibration runs, the DQS edge may slightly precede SDCLK (resulting in a very small write-leveling delay value) and other runs, it may be slightly delayed relative to the SDCLK (resulting in a very large write-leveling delay value that will try to align DQS to the next SDCLK edge, hence needs to be zero’d out).   Q. When using the JTAG version of the DDR stress test, how can I select a different UART port for my serial port?   A. Under the folder ddr_stress_tester_jtag_v2.52, there's a text file that describes how to add a different UART port by adding a few additional commands to your DDR init script.  The following is an outline of these commands: 1. Ungate UART module clocks (most NXP scripts ungate all of the peripheral clocks at the beginning of the script, so this part is already done) 2. Configure the IOMUX options for the pins you wish the UART to use (normally an IOMUX option for UART_TX and UART_RX, and a daisy chain option for the UART_RX input) 3. Enable the desired UART module via the register UCR1, bit UART_EN 4. Disable other UART modules (UCR1[UART_EN] = 0).  Normally disabling UART1 should be sufficient, but it doesn't hurt to disable all of the other un-used UART options for the purpose of the stress test.   Here's an example in the .ds file vernacular of a set up as follows: MX6DQ, UART4 on KEY_COL0 and KEY_ROW0 (assume clock is ungated to all peripherals): mem set 0x020E01F8 32 0x00000004   #// config_pad_mode(KEY_COL0, ALT4) mem set 0x020E01FC 32 0x00000004   #// config_pad_mode(KEY_ROW0, ALT4); mem set 0x020E0938 32 0x00000001   #// Pad KEY_ROW0 is involved in Daisy Chain. mem set 0x02020080 32 0x00000000   #//disable UART1 in UART1_UCR1 (Note, you can disable other UART modules as well) mem set 0x021F0080 32 0x00000001   #//enable UART4 in UART4_UCR1   Here's another example in the .inc file vernacular of a set up as follows: MX6SX, UART5 on SD4_DATA4 abd SD4_DATA5 (assume clock is ungated to all peripherals): setmem /32 0x020E0294 = 0x2 //IOMUXC_SW_MUX_CTL_PAD_SD4_DATA5, ALT2; UART5_TX_DATA setmem /32 0x020E0290 = 0x2 //IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4, ALT2; UART5_RX_DATA setmem /32 0x020E0850 = 0x00000000 // IOMUXC_UART5_IPP_UART_RXD_MUX_SELECT_INPUT, daisy chain for UART5_RX input to use SD4_DATA4 setmem /32 0x021F4080 = 0x00000001 // Enable UART_EN in UCR1 of UART5 // Disable UART_EN in UCR1 of UART1, UART2, UART3, and UART4 setmem /32 0x02020080 = 0x00000000 // UART1 setmem /32 0x021F0080 = 0x00000000 // UART2 setmem /32 0x021EC080 = 0x00000000 // UART3 setmem /32 0x021E8080 = 0x00000000 // UART4     Related Resources Links: iMX 8M Mini Register Programming Aid DRAM PLL setting  i.MX 8/8X Series DDR Tool Release  i.MX 8M Family DDR Tool Release 
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Wondering how to manage and install the various rpms generated under tmp/deploy/rpm? smart is the application you need on the target to replace apt-get Please set your local.conf with the following: # It is also recommended you use build history, which adds some sanity checks to package versions, in conjunction with the server that # is running the PR Service. To enable build history, add the following to each building system's # It is recommended to activate "buildhistory" for testing the PR service INHERIT += "buildhistory" BUILDHISTORY_COMMIT = "1" PRSERV_HOST = "localhost:0"  # This will set up your host computer as Package Revision Server // PACKAGE_FEED_URIS = "http://10.170.96.7/imx7rpm" #please place any server ip addr, this one is mine. add also the following to enable the package management (smart): EXTRA_IMAGE_FEATURES += "package-management" Setup your own http server, and link the server repository with your tmp/deploy/rpm repo (your are free to use your preferred http server). Since Morty (yocto 2.4), smart has been deprecated, and now the package management is done with dnf (from Debian). Please check dnf document to get more to know about dnf. The dependencies are still poorly controlled. After compiling a pkg the easiest remain: dnf install package.rpm example: root@imx8mmevk:~# dnf install libfuse2-2.9.7-r0.aarch64.rpm Failed to synchronize cache for repo 'oe-remote-repo-imx8m-imx8mqevk-arm', disabling. Dependencies resolved. ===============================================================================================================  Package                  Arch                    Version                   Repository                    Size =============================================================================================================== Installing:  libfuse2                 aarch64                 2.9.7-r0                  @commandline                  56 k Transaction Summary =============================================================================================================== Install  1 Package Total size: 56 k Installed size: 212 k Is this ok [y/N]: y Downloading Packages: Running transaction check Transaction check succeeded. Running transaction test Transaction test succeeded. Running transaction   Preparing        :                                                                                       1/1   Installing       : libfuse2-2.9.7-r0.aarch64                                                             1/1   Running scriptlet: libfuse2-2.9.7-r0.aarch64                                                             1/1 /sbin/ldconfig: /usr/lib/libOpenVG.so is not a symbolic link   Verifying        : libfuse2-2.9.7-r0.aarch64                                                             1/1 Installed:   libfuse2.aarch64 2.9.7-r0 Complete!
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1.  Software change for Certification Test Compared to standard Linux/Android release, you may need to do below software changes to implement the certification tests, it is applicable from imx_3.10.31_1.1.0 Linux BSP GA release, for the release before that, user may need to apply the related patches before doing below things, and some examples may be different for former releases, the user needs to change accordingly. See the detailed information in this document “How to do USB Compliance Test for 3.10.y kernel”. And there is also a link describes the patch for USB Certification Test: Patch to make i.MX6DQ USB to support test modes for certification test 2. I.MX6 series USB Certification Guide http://cache.freescale.com/files/microcontrollers/doc/user_guide/IMXUSBCGUG.pdf Include the descriptions of all the Certification Test requirements, equipment, procedures for I.MX6 series. For example, Host/Device High Speed Eye Diagram Test(眼图测试).   3. Description of USBCertification related Registers AN4589 Configuring USB on i.MX 6 Series Processors http://cache.freescale.com/files/32bit/doc/app_note/AN4589.pdf   4. I.MX6Q/I.MX6DL/I.MX6SL/ I.MX6SX Certification Reports, see attachments   5. Checklist and TPL, see attachments. Original Attachment has been moved to: I.MX6SX-Checklist-and-TPL.zip
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The i.MX27 multimedia applications processors balance high performance with low power consumption through an intelligent combination of dedicated hardware video accelerators and a fast ARM926EJ-S™ core. Both the i.MX27 and the i.MX27L processors provide an array of connectivity options and robust security. The rich feature set of the i.MX 27 processors make them an excellent choice for video- and voiceover- IP (V2IP) cordless and mobile phones, intelligent remote controls, point-of-sale terminals, control devices, low to mid end PNDs and many other wireless applications. i.MX Family Comparison Product Information on Freescale.com i.MX27 Multimedia Applications Processor i.MX27L Multimedia Applications Processor Evaluation/Development Boards and Systems IMX27PDK:  i.MX27 Development Kit Bootloader Compiling U-Boot for iMX27ADS Installing U-Boot on iMX27ADS Embedded Software and Tools Android OS for i.MX Applications Processors Partners / 3rd-Party Development Tools STK5:  Starter-Kit V for TX Modules with Freescale i.MX Processors (Karo Electronics) Additional Resources i.MX27 ADS Adding USB Host2 i.MX27 D1 Capture Kernel 2.6.22 Compiling U-Boot for i.MX27ADS IMX27-ADS i.MX27 ADS Board Flashing I.MX27 ADS Board Video i.MX27 ADS Board TV Out i.MX 27 ADS Adding USB Host2 i.MX 27 ADS Board Video GST Encode i.MX 27 ADS Board Video GST Play i.MX 27 ADS Compiling Linux Kernel Mainline i.MX 27 mDDR Issue i.MX 27 PDK I.MX27 PDK Board Flashing IMX27-Lite-Kit i.MX 27 Video GST Caps Installing U-Boot on i.MX27ADS
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