Description by Google:      Wi-Fi scan-only mode is a new platform optimization that lets users keep Wi-Fi scan on without connecting to a Wi-Fi network, to improve location accuracy while conserving battery. Apps that depend on Wi-Fi for location services can now ask users to enable scan-only mode from Wi-Fi advanced settings. Wi-Fi scan-only mode is not dependent on device hardware and is available as part of the Android 4.3 platform. Comments by Freescale:      In order to enable wifi scan mode, we should make sure wifi driver shouldn't be removed while switching off wifi from Setting. Additionally, android4.3 has introduced one CTS test to force us to change all loadable modules into kernel built in. The reason is loadable modules are often used by rootkits and other exploits. so there will be big risk in security. OK, now let's try to keep up with the pace of AOSP.      For AR6003, we are using compat-wireless driver which accommodates all linux kernel since 2.6.We are now using olca-3.4 wifi driver but our kernel version is 3.0.35.  It is not a simple change to be directly compiled into kernel since it is lack of the basic file structure for ath6kl driver. This has been double confirmed by support guy from Atheros. More terribly, Atheros has no plan to publish new version for AR6003 but just maintain it. Yeah, my pitiful baby. Say goodbye to scan mode.      This is why this document come into being. AR6003 is our default wifi module bounded to our imx6 serial board. So formal release will lose this important feature for this limitation. Here I will give out patches to enable this feature using another wifi module-----Realtek 8723as. Ok, now let's welcome this new star. Patches description:          Patch for kernel--------Change loadable driver modules to compiled into kernel, this will let wlan0 and p2p0 interfaces still can be operated although you have switched off wifi in Setting UI.      Patch for device/fsl--------Firstly, I delete one rfkill operation in init.rc which is obsolete for BT setting. If still keep it here, it will soft block wifi interface through mac80211 rfkill. Then I clean up some setting for wifi driver module.      Patch for hardware/libhardware_legacy-------Since wifi driver is already directly built in kernel, HAL will have no need to load driver now. Refactor it and optimize it. Test it manually:          If you have one sdio rtl8723as wifi module in hand, you can test it like the following to see wifi scan mode works: Firstly, disable wifi in Setting UI. then you can check netcfg result, you will see wlan0 and p2p0 are still there, only down state: Go "advanced" menu in wifi setting,Turning on the checkbox of "Scanning always available". Check netcfg result again, Oh Oh, wlan0 and p2p0 are up: Manually "scan" through "wpa_cli" tool, you will see it works:

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343576 

Here is an example for i.MX28 EVK board to support SPI NOR boot in uboot, kernel and MFGTool.   Attached files are the patches to support SPI NOR flash on i.MX28 EVK bord based on L2.6.35 ER11.09.01 BSP. It was verified on Spansion s25fl256s SPI NOR. "ER11.09.01_uboot_imx28_spi_nor.patch" is the Uboot patch. "ER11.09.01_kernel_imx28_spi_nor.patch" is the kernel patch. "ucl.xml" is the updated MFGTool config file, please update it to "Mfgtools-Rel\Profiles\MX28 Linux Update\OS Firmware\ucl.xml".   The uboot boot paramters for SPI: setenv bootargs_base 'setenv bootargs console=ttyAM0,115200' setenv loadaddr 0x42000000 setenv bootargs_spi 'setenv bootargs ${bootargs} root=/dev/mtdblock2 rootfstype=jffs2 rootwait rw ip=none' setenv bootcmd_spi 'run bootargs_base bootargs_spi;sf probe 2:0; sf read ${loadaddr} 0x100000 0x300000;bootm' setenv bootcmd 'run bootcmd_spi' saveenv   To boot the board from SPI NOR s25fl256s, the 4KB page region of the NOR should be put to top, the last 128KB of the NOR address space. The uboot.sb is about 220KB, it can't be put to 4KB and 64KB combined region. The IMX28 boot ROM can only handle simple page size for boot. All 4KB page region or all 64KB page region are both OK for boot, but combined region can't boot.   For default, the s25fl256s NOR's 128KB 4KB page size region is at the bottom of the NOR, we should update the OTP to set this region to TOP, in Uboot, we run the followed command to burn the OTP: MX28 U-Boot -> sf probe 2:0 MX28 U-Boot -> sf set_config_reg 0x04   To boot the i.MX28 EVK board from SPI2 NOR flash, the BM3~0 should be 0010.   In this example, we only used the JFFS2 file system. To support the UBIFS, there is a known issue, that the UBIFS will use vmalloc to alloc memory, and if SPI driver used the DMA, kernel will halt with error "kernel BUG at arch/arm/mm/dma-mapping.c:409!".   For 11.09.01 BSP, the default MFGTool rootfs "initramfs.cpio.gz" will be bigger than 4MB, but in i.MX28 bootlets code, the BSP only set ramdisk to 4MB, so we need modify this limitation for MFGTool.   Use command "./ltib -p imx-bootlets -m prep" to get the bootlets code, modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/linux_prep/core/setup.c", function setup_initrd_tag(), change from "params->u.initrd.size =  0x00400000;" to "params->u.initrd.size =  0x00500000;". Modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/updater.bd" and "updater_ivt.bd", change from "load 0.b    > 0x40800000..0x40c00000;" to "load 0.b    > 0x40800000..0x40d00000;".   Now the MFGTool rootfs size can be 5MB.   2013-05-09: Updated hardware rework: On iMX28 EVK board, rework J89 as followed and mount R320,R321,R322 and C178. MX28 U49 Pin1 /CS <-> NOR Pin7 CS# MX28 U49 Pin2  D0 <-> NOR Pin8 SI/IO1 MX28 U49 Pin5 DIO <-> NOR Pin15 SI/IO0 MX28 U49 Pin6 CLK<-> NOR pin 16 SCK. MX28 U49 Pin8 VCC <-> NOR Pin2 VCC                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 MX28 U49 Pin4 GND <-> NOR Pin10 VSS MX28 U49 Pin3 /WP <-> NOR Pin9 WP MX28 U49 Pin7 /Hold <-> NOR Pin pin1 hold   Software reset issue for 32MB SPI NOR: For 32MB SPI NOR, after booted into kernel, the kernel driver will set SPI NOR to 4 bytes address mode, but for iMX28 SPI boot, it can only boot with 3 bytes address mode, if reset the iMX28 board but SPI NOR was not reset, it will fail to reboot. Hardware solution: when iMX28 was reboot, reset the SPI NOR too, the SPI NOR will work in 3 bytes address mode as default. Software solution: In kernel SPI NOR driver, always switch SPI NOR to 3 bytes address mode after each SPI NOR access, and switch to 4 bytes address mode before each access. There is no such issue if the SPI NOR size is less than 32MB.    

  Products Product Category NXP Part Number URL MPU i.MX6 Family https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-6-processors:IMX6X_SERIES   Tools NXP Development Board URL i.MX6 family developement board https://www.nxp.com/design/development-boards:EVDEBRDSSYS#/collection=softwaretools&start=0&max=25&query=typeTax%3E%3Et633::archived%3E%3E0::Sub_Asset_Type%3E%3ETSP::deviceTax%3E%3Ec731_c380_c127_c126&sorting=Buy%2FSpecifications.desc&language=en&siblings=false  

i.MX28 LCD driver 8080 bus interface mechanism please read readme.txt and it will teach you how to use it

MAX resolution 1024 x 768 Factory Details:      Long name:    Freescale: Hardware (VPU) Encoder      Class:            Codec/Encoder/Video      Description:    Encodes raw YUV 4:2:0 data to MPEG4 SP, H.264 BP or H.263 (Annex J, K (RS=0 and ASO=0) and T) elementary data;Enco des raw YUV 4:2:0, 4:2:2 horizontal, 4:2:2 vertical or 4:0:0 data into MJPEG elementary data;      Author(s):       Multimedia Team <[email protected]>      Rank:             primary (256) Plugin Details:      Name:                    mfw_vpuencoder      Description:            Encodes Raw YUV Data to MPEG4 SP, H.264 BP or H.263 data. For H.263 P0, the source frame rate must be 3000 0/1001 fps      Filename:               /usr/lib/gstreamer-0.10/libmfw_gst_vpu_enc.so      Version:                  2.0.2      License:                  unknown      Source module:        gst-fsl-plugin      Binary package:       Gstreamer Multimedia Plugins (Freescale)      Origin URL:              http://www.freescale.com GObject   +----GstObject         +----GstElement               +----MfwGstVPU_Enc Pad Templates:    SINK template: 'sink'       Availability: Always       Capabilities:          video/x-raw-yuv                   format: I420                   width: [ 48, 8192 ]                   height: [ 32, 8192 ]        video/x-raw-yuv                   format: YV12                   width: [ 48, 8192 ]                   height: [ 32, 8192 ]        video/x-raw-yuv                   format: NV12                   width: [ 48, 8192 ]                   height: [ 32, 8192 ]        video/x-raw-yuv                   format: Y42B                   width: [ 48, 8192 ]                   height: [ 32, 8192 ]        video/x-raw-yuv                   format: Y444                   width: [ 48, 8192 ]                   height: [ 32, 8192 ]    SRC template: 'src'        Availability: Always        Capabilities:            video/mpeg                             width: [ 48, 1280 ]                           height: [ 32, 720 ]                   mpegversion: 4                 systemstream: false            video/x-h263                             width: [ 48, 1280 ]                            height: [ 32, 720 ]            video/x-h264                             width: [ 48, 1280 ]                            height: [ 32, 720 ]            image/jpeg                             width: [ 48, 8192 ]                            height: [ 32, 8192 ] Element Flags:    no flags set Element Implementation:    Has change_state() function: 0x2b01c98c    Has custom save_thyself() function: gst_element_save_thyself    Has custom restore_thyself() function: gst_element_restore_thyself Element has no clocking capabilities. Element has no indexing capabilities. Element has no URI handling capabilities. Pads:    SRC: 'src'      Implementation:      Pad Template: 'src'    SINK: 'sink'      Implementation:        Has chainfunc(): 0x2b01de28        Has custom eventfunc(): mfw_gst_vpuenc_sink_event        Has bufferallocfunc(): mfw_gst_vpuenc_buffer_alloc      Pad Template: 'sink' Element Properties:    name                : The name of the object                          flags: readable, writable                          String. Default: null Current: "mfwgstvpu_enc0"    codec-type          : selects the codec type for encoding                          flags: readable, writable                          Enum "MfwGstVpuEncCodecs" Default: 2, "std_avc" Current: 2, "std_avc"                             (0): std_mpeg4        - STD_MPEG4                             (1): std_h263           - STD_H263                             (2): std_avc             - STD_AVC                             (7): std_mjpg           - STD_MJPG    profile             : enable time profile of the vpu encoder plug-in                          flags: readable, writable                          Boolean. Default: false Current: false    width               : width of the frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 48 - 8192 Default: 48 Current: 0    height              : height of the frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 32 - 8192 Default: 32 Current: 0    bitrate             : target bitrate (in kbps) at which stream is to be encoded - 0 for VBR and others for CBR                          flags: readable, writable                          Unsigned Integer. Range: 0 - 32767 Default: 0 Current: 32768    gopsize             : gets the GOP size at which stream is to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 0 - 32767 Default: 30 Current: 30    qp                  : gets the quantization parameter - range is 0-51 - will be ignored for CBR (bitrate!=0)                          flags: readable, writable                          Unsigned Integer. Range: 0 - 51 Default: 15 Current: 4294967295    max-qp              : Maximum quantization parameter for CBR - range is 0-51 for H264 and 1-31 for MPEG4 - lower value brings be tter video quality but higher frame sizes                          flags: readable, writable                          Unsigned Integer. Range: 0 - 51 Default: 51 Current: 4294967295    min-qp              : Minimum quantization parameter for CBR - range is 0-51 for H264 and 1-31 for MPEG4 - lower value brings be tter video quality but higher frame sizes                          flags: readable, writable                          Unsigned Integer. Range: 0 - 51 Default: 0 Current: 4294967295    gamma               : gamma value for CBR - tells VPU the speed on changing qp - lower will cause better video quality                          flags: readable, writable                          Unsigned Integer. Range: 0 - 32768 Default: 24576 Current: 24576    intrarefresh        : 0 - Intra MB refresh is not used. Otherwise - At least N MB's in every P-frame will be encoded as intra MB 's.                          flags: readable, writable                          Unsigned Integer. Range: 0 - 3600 Default: 0 Current: 0    h263profile0        : enable encoding of H.263 profile 0 when codec-type is set to std_h263                          flags: readable, writable                          Boolean. Default: false Current: false    loopback            : disables parallelization for performance - turn off if pipeline with decoder                          flags: readable, writable                          Boolean. Default: true Current: true    intra-qp            : Quantization parameter for I frame. When this value is -1, the quantization parameter for I frames is auto matically determined by the VPU. In MPEG4/H.263 mode, the range is 1.C31; in H.264 mode, the range is from 0.C51. This is ignored for STD_MJPG                          flags: readable, writable                          Unsigned Integer. Range: 0 - 51 Default: 15 Current: 4294967295    crop-left           : The left crop value of input frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0    crop-top            : The top crop value of input frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0    crop-right          : The right crop value of input frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0    crop-bottom         : The bottom crop value of input frame to be encoded                          flags: readable, writable                          Unsigned Integer. Range: 0 - 4294967295 Default: 0 Current: 0    rotation-angle      : Pre-rotation angle - should be 0, 90, 180 or 270                          flags: readable, writable                          Unsigned Integer. Range: 0 - 270 Default: 0 Current: 0    mirror-direction    : mirror direction from source image to encoded image                          flags: readable, writable                          Enum "MfwGstVpuEncMirDir" Default: 0, "none                " Current: 0, "none                "                             (0): none                     - MIRDIR_NONE                             (1): vertical mirroring     - MIRDIR_VER                             (2): horizontal mirroring - MIRDIR_HOR                             (3): both directions       - MIRDIR_HOR_VER    h264-byte-stream    : Generate H.264 byte stream format of NALU. Take effect for H.264 stream only.                          flags: readable, writable                          Boolean. Default: true Current: true

目录 1 i.MX8Mmini 板级开发包镜像结构 ............................... 2 2 创建 i.MX8Mmini Linux 4.14.78_ga 板级开发包编译环境 3 2.1 下载板级开发包 ...................................................... 3 2.2 创建yocto编译环境: ................................................ 4 2.3 编译sdk及安装 ........................................................ 7 2.4 独立编译 ................................................................. 8 3 DDR配置，测试与输出 ............................................ 13 4 i.MX8Mmini ATF ...................................................... 15 5 FSL Uboot SPL 定制 ............................................... 17 5.1 SPL的编译............................................................ 17 5.2 SPL的启动流程 .................................................... 26 5.3 SPL的定制............................................................ 33 6 FSL Uboot 定制 ....................................................... 39 6.1 FDT支持 ............................................................... 40 6.2 DM(driver model)支持 .......................................... 45 6.3 Uboot目录 结构 .................................................... 59 6.4 Uboot编译 ............................................................ 61 6.5 Uboot初始化流程 .................................................. 62 6.6 uboot 定制 ............................................................ 72 6.7 uboot debug信息 .................................................. 78

For more information visit: http://www.silexamerica.com/freescale/index.html Informational video on why Silex Technology is the only manufacturer of Freescale-recommended Wi-Fi solutions for your i.MX 6 Platform.

Follow the PyeIQ Introduction Guide on eIQ Community: PyeIQ v1.0 for BSP 5.4.3_2.0.0 Release  Follow an introduction video for PyeIQ:

Flashing Kernel and Root File System using RedBoot Creating an image A kernel image and a root file system can be created using All Boards LTIB or compiling the kernel and setting the correct set of files. Create a root file system image from a set of files converting the files to a jffs2 file system. For this, install the package mtd-tools. In Ubuntu type apt-get install mtd-tools For making an root file system for flash, use the jffs2 file system like: mkfs.jffs2 -r rootfs -e 0x20000 -s 0x800 –n -o rootfs.jffs2 Where rootfs/ is the original set of file for the file system and rootfs.jffs2 is the output image file. Flashing Some connections errors can be avoided by Configuring RedBoot. The process below uses TFTP to copy the files between host and target. See All Boards TFTP for detail in configurations. Copy the kernel image and the root file system image to the TFTP dir. For example, in LTIB dir, type sudo cp ./rootfs/boot/zImage /tftpboot sudo cp rootfs.jffs2 /tftpboot/ Where /tftpboot is the dir configured for TFTP The next steps are performed in a Minicom session, and happens on the board. Formatting the flash: Format the flash redboot> fis init -f Make a Bad Block Table redboot> nand scan Flashing kernel Load kernel image (zImage) using the command below. Remember to modify the host IP address: redboot> load -r -b 0x100000 /tftpboot/zImage -h 10.29.244.99 The address 0x100000 is used as a temporary location Create the kernel at the right address (0x100000, for IMX27PDK) redboot> fis create -f 0x100000 kernel Flashing root file system Load root file system image (rootfs.jffs2) to the temporary address. Remember to modify the host IP address: redboot> load -r -b 0x100000 /tftpboot/rootfs.jffs2 -h 10.29.244.99 Create the root file system in the right address (0x600000, for IMX27PDK) redboot> fis create -f 0x600000 root Testing This step can be omitted! You can now load your kernel in the flash by typing: fis load kernel To know if the root file system written in the flash was correctly saved, execute the NFS file system and mount the flash. For load the the root file system by NFS, type: exec -c "noinitrd console=ttymxc0,115200 root=nfs nfsroot=<server_ip>:<root_path_on_server> ip=dhcp" Wait the system go up, then mount the flash at /mnt. Reminde that the flash has a jffs2 file system. mount -t jffs2 /dev/mtdblock4 /mnt ls /mnt List the /mnt contents. The output must be the right file system. For testing root file system on NAND, type exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock4 rw rootfstype=jffs2 ip=dhcp" Modifying the initial script Reset the board and press CTRL-C. Type fc to modify the configurations and insert the initialization script. RedBoot> fc Run script at boot: true Boot script: Enter script, terminate with empty line >> fis load kernel >> exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock4 rw rootfstype=jffs2 ip=dhcp" >> Boot script timeout (1000ms resolution): 1 Use BOOTP for network configuration: false Gateway IP address: 10.29.241.254 Local IP address: 10.29.241.6 Local IP address mask: 255.255.254.0 Default server IP address: 10.29.244.99 Board specifics: 0 Console baud rate: 115200 Set eth0 network hardware address [MAC]: false GDB connection port: 9000 Force console for special debug messages: false Network debug at boot time: false Update RedBoot non-volatile configuration - continue (y/n)? y ... Read from 0x07ee0000-0x07eff000 at 0x00080000: . ... Erase from 0x00080000-0x000a0000: . ... Program from 0x07ee0000-0x07f00000 at 0x00080000: . RedBoot> Remember to save the configuration in the flash by typing y Reset the system. To certify that the board is loading the system from flash, remove the ethernet cable.

When to enable CONFIG_DEBUG_LL, choose the debug port and then CONFIG_EARLY_PRINTK on i.MX6, system will hang. There is no error information there as below, Uncompressing Linux... done, booting the kernel. Booting Linux on physical CPU 0x0 Initializing cgroup subsys cpu Initializing cgroup subsys cpuacct Linux version 4.1.15-00001-gd582989-dirty (jay@jay-ubuntu) (gcc version 4.9 20 150123 (prerelease) (GCC) ) #10 SMP PREEMPT Mon Jul 17 15:08:55 CST 2017 CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine model: Freescale i.MX6 Quad SABRE Smart Device Board bootconsole [earlycon0] enabled cma: Reserved 448 MiB at 0x2a000000 Memory policy: Data cache writealloc -------------- hang -----------------‍‍‍‍‍‍‍‍‍‍‍‍‍ The patch fix it on android n7.1.1_1.0.0, kernel: 4.1.15.

About softISP Code : https://github.com/NXPmicro/gtec-demo-framework/tree/master/DemoApps/OpenCL/SoftISP/source Document : https://www.nxp.com/docs/en/application-note/AN12060.pdf demo is on path  /opt/imx-gpu-sdk/OpenCL/SoftISP of linux L4.19.35   About eIQ Community: https://community.nxp.com/community/eiq eIQ sample APPs : https://community.nxp.com/docs/DOC-343785 eIQ library source code : https://source.codeaurora.org/external/imx/meta-fsl-bsp-release/tree/imx/meta-ml/recipes-libraries?h=warrior-4.19.35-1.1.0

Some customer need to know how to add support RS485 mode half duplex? Here give some recommends. About i.MX6 UART to RS485 applications 1. Using RS485 mode of UART directly. On hardware, you should use UART_CTS_B to control RX & TX. On software, The link for you reference: Does UART in RS485 mode support only 9 Bit mode for i.MX6 ?  2. Sensing IO direction Automatically via hardware, don't need to tune software. For i.MX8QXP As the linux BSP for i.MX8QXP do not support RS 485 mode, so for the RS 485 using you can use the Sensing IO direction Automatically via hardware, don't need to tune software. As the above i.MX6 design.

Copy redboot binary to /tftpboot. In this case: redboot.bin Load binary file to i.MX RAM memory: RedBoot> load -v -r -b 0x100000 /tftpboot/redboot.bin Run the loaded image RedBoot> run 0x100000 Enable NOR, NAND or MMC flash media for Redboot. In this case, NAND is beeing used. RedBoot> factive nand Update RedBoot in the flash with currently running image RedBoot> romupdate

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-345672 

   Some of Chinese customer couldn’t normally download android source code from google site, here give a way to download android source from Mirror site of Tsinghua University. Customers in other areas can refer to the configurations of ubuntu 18.04 in the document. Updating software packages for ubuntu18.04 LTS 1、Using software updater to update software packages Press Install Now button to update software. Restart ubuntu18.04 2、Installing necessary software packages #sudo apt-get install flex # sudo apt-get install bison # sudo apt-get install gperf # sudo apt-get install build-essential # sudo apt-get install zlib1g-dev # sudo apt-get install lib32ncurses5-dev # sudo apt-get install x11proto-core-dev # sudo apt-get install libx11-dev # sudo apt-get install lib32z1-dev # sudo apt-get install libgl1-mesa-dev # sudo apt-get install tofrodos # sudo apt-get install python-markdown # sudo apt-get install libxml2-utils # sudo apt-get install xsltproc # sudo apt-get install uuid-dev:i386 liblzo2-dev:i386 # sudo apt-get install gcc-multilib g++-multilib # sudo apt-get install subversion # sudo apt-get install openssh-server openssh-client # sudo apt-get install uuid uuid-dev # sudo apt-get install zlib1g-dev liblz-dev # sudo apt-get install liblzo2-2 liblzo2-dev # sudo apt-get install lzop # sudo apt-get install git-core curl # sudo apt-get install u-boot-tools # sudo apt-get install mtd-utils # sudo apt-get install android-tools-fsutils # sudo apt-get install openjdk-8-jdk # sudo apt-get install device-tree-compiler # sudo apt-get install aptitude # sudo aptitude install libcurl4-openssl-dev nss-updatedb 3、Downloading and unpacking Android release package https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/android-os-for-i.mx-applications-processors:IMXANDROID?tab=Design_Tools_Tab --O8.1.0_1.3.0_ANDROID_SOURCE_8MQ_GA File name is imx-o8.1.0_1.3.0_8m.tar.gz # cd ~ # tar xzvf imx-o8.1.0_1.3.0_8m.tar.gz Downloading android8.1.0-1.3.0 source code Getting repo # cd ~ # mkdir bin # cd bin # curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo # chmod a+x ~/bin/repo # export PATH=${PATH}:~/bin   Modifying repo File Open ~/bin/repo file with 'gedit' and Change google address From REPO_URL = 'https://gerrit.googlesource.com/git-repo' To REPO_URL = 'https://mirrors.tuna.tsinghua.edu.cn/git/git-repo/' 3、Setting email address # git config --global user.email "[email protected]" # git config --global user.name "xxxx" [ Email & Name should be yours] 4、Modifying android setup script and Running it Open ~/ imx-o8.1.0_1.3.0_8m /imx_android_setup.sh and add a line like below: ...       if [ "$rc" != 0 ]; then          echo "---------------------------------------------------"          echo "-----Repo Init failure"          echo "---------------------------------------------------"          return 1       fi find -name 'aosp-O8.1.0-1.3.0.xml'| xargs perl -pi -e 's|https://android.googlesource.com/|https://aosp.tuna.tsinghua.edu.cn/|g' fi   # Don't Delete .repo directory and hidden files #rm -rf $android_builddir/.??* ... Then save it and exit. # cd ~/ # source ~/ imx-o8.1.0_1.3.0_8m/imx_android_setup.sh Then android_build directory is created at ~/ # export MY_ANDROID=~/android_build          48 hours later: Compiling android8.1.0-1.3.0 BSP # cd ~/android_build # gedit ./prebuilts/sdk/tools/jack-admin               And find “JACK_SERVER_COMMAND” ,change it to be: JACK_SERVER_COMMAND="java -XX:MaxJavaStackTraceDepth=-1 -Djava.io.tmpdir=$TMPDIR $JACK_SERVER_VM_ARGUMENTS -Xmx4096m -cp $LAUNCHER_JAR $LAUNCHER_NAME"          Save and exit. And run: # ./prebuilts/sdk/tools/jack-admin stop-server # ./prebuilts/sdk/tools/jack-admin start-server # export ARCH=arm64 # export CROSS_COMPILE=~/android_build/prebuilts/gcc/linux-x86/aarch64/aarch64-linuxandroid-4.9/bin/aarch64-linux-android- # export LC_ALL=C # source build/envsetup.sh # lunch evk_8mq-userdebug               Begin to build android BSP for i.MX8MQ # make –j4 NXP TIC weidong sun 2018-08-15

Attached is a chunk of the filesystem for the Linux Image https://community.freescale.com/docs/DOC-93887

ccache is a C compiler cache. ccache can save a large amount of compilation time on recurring builds and builds restarted from a clean repository after make clean or git clean. It is well suited for e.g. u-boot and Linux compilation. Caching the host compiler Caching "native" builds is easily done by adding in the beginning of your $PATH a special directory, which contains links to ccache to override the usual compiler. On e.g. Debian this directory is readily available as /usr/lib/ccache, So you can do:   $ export PATH="/usr/lib/ccache:$PATH" Typical links found in this folder are:   c++ -> ../../bin/ccache   cc -> ../../bin/ccache   g++ -> ../../bin/ccache   gcc -> ../../bin/ccache etc... Caching the cross compiler Caching cross-compiled builds can be done in the same way as native builds, provided you create links of the form e.g. arm-linux-gnueabihf-gcc pointing to ccache. But there is an even more convenient way for those projects, which rely on a $CROSS_COMPILE environment variable (as is the case for e.g. u-boot and Linux). You can prefix the cross compiler with ccache there in e.g. the following way:   $ export CROSS_COMPILE="ccache arm-linux-gnueabihf-" Monitoring efficiency Now that your builds are cached, you might want to see how much is "spared" with this technique. ccache -s will tell you all sorts of statistics, such as:   cache directory                     /home/vstehle/.ccache   cache hit (direct)                 10852   cache hit (preprocessed)            3225   cache miss                         19000   called for link                    33267   called for preprocessing            9463   compile failed                         3   preprocessor error                     1   couldn't find the compiler           117   unsupported source language          921   unsupported compiler option         2167   no input file                      31681   files in cache                     51694   cache size                           1.3 Gbytes   max cache size                       4.0 Gbytes Here you see a somewhat typical 50%/50% hit/miss ratio. Enjoy! See Also ccache is usually supported natively by build systems, such as Buildroot or Yocto.

Q: how to do PCIe compliance measurement on the Sabre SDB? Phase Jitter on the PCIe reference clock had been see problem. Pin C7  "CLK1_N" and Pin D7 "CLK1_P"  were used like on the Sabre SD. During Compliance meassurments  margin of -80% and more.... was seen. Is there a known issue? Has someone done a similar compliance measurement on the Sabre SDB? A: The PCIe TX compliance tests on i.MX6 SD boards in TK's Open Lab.  Based on the internal PLL clock, i.MX6 SD boards pass the PCIe TX compliance tests. 1, please check the capacitor on NVCC_PLL_OUT, it should no less than 10uF, 22uF is better. 2, please check if the 24MHz input crystal is good enough. 50ppm is required. 3, please check the test step: 1.1     TX Test Configuration and Procedures Overview of Test Steps 1.      Integrate the patch for PCIE test to mainline, recompile the Kernel , and replace the old image of the board under test. ·         Make sure the following configuration has been set, when re-compiling the kernel image. # MX6 Options: # CONFIG_IMX_PCIE=y 2.      Correctly set up the test environment: ·         Connect the compliance load board (CLB x1/x16) revision 2.0 into the slot of DUT, and change the switch and jumpers to select x1 . ·         Connect the lane under test to oscilloscope via differential probe and matched coaxial , do remember that cable calibration should be done before test. ·         Connect the clock signal to the oscilloscope. The clock must have SSC enabled or disabled to be consistent with settings for the system during normal operation. ·         Power on the system. 3.      After I.MX6x enters Polling.Compliance , press the Toggle Button on CLB to select the output , make sure the data waveform is compliance pattern, 5.0GT/s for GEN2, 2.5GT/s for GEN1. 4.      Follow the Oscilloscope operation instruction, set it to the right mode. 5.      Capture and save at least 1 million * 200 ps of data and clock simultaneously at the sample rate of 50GS/s for GEN2, or 250,000 UI * 400 ps of data at the sample rate of 25GS/s for GEN1. 6.      Run free software Sigtest to analyze the PCIE TX signal. 7.      Customer could adjust the parameters of the PCIE_PHY by changing IOMUXC_GPR8 register settings to get the test past. a.       The default of this Register is configured as: imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN1, 0 << 0, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_FULL, 127 << 18, IOMUXC_GPR8); imx_pcie_clrset(IOMUXC_GPR8_TX_SWING_LOW, 127 << 25, IOMUXC_GPR8); b.      write the Register, Address: 20E_0000h base + 20h offset = 20E_0020h; command: /unit_tests/memtool -32 0x020e0020= FFFD4000 This document was generated from the following discussion: i.Mx6 PCIe compliance

Update 2 Nov 2016: The work begun with this current sensor board has been superseded by this 4-channel solution. The ribbon cables used below, although easier to solder, were very stiff and tended to lift the sensors off the double sticky foam tape, which endangered the target application board. This post remains for historical purposes. This little board set was put together quickly to measure run current as well as sleep current. The sensor board is intended to be affixed with double sided tape to the board under test. A flat ribbon cable connects to the connection board where the power and current sensor connections may be made. The holes accommodate banana jacks. The current range is selected via the dip switch on the connection board. Below is an image of the schematic. The attached PDF contains the schematic, layout and partial Digikey parts lists along with embedded source files (look for the thumb-tacks).   The DMN1019USN FETs have a Vgs of 8V, which limits the maximum current which may be measured (currents above will starve the output of the current sensor amplifiers since the output cannot swing high enough). With a supply of ~7.5V, a maximum high current of ~3A is possible with the 2V/A gain (A4) version of the INA250. With a 2 Ohm shunt for the low current range, the maximum current with an INA212 (1000V/V gain) is ~3mA. Two FETs in parallel were used to decrease the series resistance when shorting the low current shunt. [NOTE: The voltage applied to the gates of the FETs assumes that the ground on the both board under test and the current sense board combo are in common.  An isolated supply could have been used but was not for simplicity.] The high current range is intended for normal operation, i.e., measuring run currents.The low current range should only be selected once the board is configured for a low power mode. Once in that mode, the low power mode may be selected.  To use an instrumented target board without having to have the connection board hooked up and powered, jump the two vias (spaced 0.1", labeled "Jump" by the current input connections). These vias short the 2 Ohm low current shunt resistor. The target board is connected via the 3-pin header. The outer two points are the negative input connection; the center is the positive. Two negative connections are provided to avoid having to cross the connection wires. These wires should be kept as short as possible. The series resistance at the input in the high range (dip switch off) was under 25mOhms, so the connections wires only add to that. The board set may be used as-is before snapping apart since connections between the boars runs through the row of snap-vias. A ribbon cable needs be used after snapping them apart. Finer pitch ribbon could have been used but it'd be much less friendly for hand soldering. Board sets in multiples of 3 may be ordered here. Here are some photos of the prototype board (some silk screen errors and the banana jack holes were drilled too small). Before snapping apart on the left and after with the ribbon cable and connectors added on the right. Here is a photo of the i.MX6SL on the EVK instrumented for low-power sleep-mode current measurement on VDD_HIGH_IN: SENSOR CALIBRATION CHECK: The calibration of three sensor boards was checked by forcing an accurate, known current with a Keysight B2902A Source Measure Unit (SMU). The average sensor output was measured for each forced current in the high and low range. The data was plotted and best fit lines were applied: The data for each sensor was very linear. The coefficients and offsets of all 6 best fit lines were very similar as can be seen above. The data can be perused in the attached Excel file (HiLo-sensors-1-3-calib.xlsx). The three sets of coefficients for the high range sensor (the INA250A4) were averaged. For each sensor's output, the current was calculated using these averaged coefficients and tabulated next to the forced current (the brown data). All of the calculated currents were within at most 20mA of the actual current forced by the SMU. TO DO: Two outputs are somewhat cumbersome; it'd be handier to just switch which sensor is outputting to the measurement device. It'd also be really handy to have a 4 channel distribution board and 4 sensor boards, which would allow the use of a 4 channel oscilloscope. Some LEDs on the distribution board indicating which measurement range is in use would also be nice... UPDATE 7 OCT 2016: Working now on a Kinetis-based, data-logging capable, 4-channel power profiler for run and sleep. The Kinetis ADCs will be used to measure the sensor outputs and power supply rail voltages, which should be fine given the level of accuracy that is required. Data is sent up the line in real time via a USB serial port, which opens the possibility of the target board profiling it's own power consumption, including low power modes (a wake-up line for the target board is provided for just that purpose). For more information on current measurements in general, see this tutorial series: A Current Sensing Tutorial--Part 1: Fundamentals | EE Times  A Current Sensing Tutorial-Part II: Devices | EE Times  A Current Sensing Tutorial--Part III: Accuracy | EE Times  A Current Sensing Tutorial-Part IV: Layout and Troubleshooting Guidelines | EE Times