Few issues encountered trying to build L5.1.1_2.1.0 Android for i.MX6: (some of them can apply to Android M6 build also) Issue-1: OpenJDK-7 required to build L5.1.1_2.1.0 but not able to download/install in Ubuntu 16.04: solution: Ubuntu 16.04 and openjdk 7 - Ask Ubuntu =============================== sudo add-apt-repository ppa:openjdk-r/ppa sudo apt-get update sudo apt-get install openjdk-7-jdk =============================== Issue-2: without any modification, got error message like: "You have tried to change the API from what has been previously approved." during compilation. solution: follow the suggestion in the error message, do "make update-api" Issue-3: error messages like ========================================= external/libcxx/include/thread:149: error: unsupported reloc 43 clang: error: linker command failed with exit code 1 (use -v to see invocation) build/core/host_shared_library_internal.mk:44: recipe for target 'out/host/linux-x86/obj32/lib/libc++.so' failed make: *** [out/host/linux-x86/obj32/lib/libc++.so] Error 1 ========================================= related post on Internet: http://stackoverflow.com/questions/36048358/building-android-from-sources-unsupported-reloc-43 https://bbs.archlinux.org/viewtopic.php?id=209698 solution:(as mentioned in the link above) replaced "prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.6/x86_64-linux/bin/ld" with the symlink to "/usr/bin/ld.gold" so this should look like: ========================================= ~/myandroid/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/x86_64-linux/bin$ ls -l ld* lrwxrwxrwx 1 jimlin jimlin      16     May  6 14:48 ld -> /usr/bin/ld.gold -rwxrwxr-x 1 jimlin jimlin 1645584 May  6 11:24 ld.bfd -rwxrwxr-x 1 jimlin jimlin 3497448 May  6 11:24 ld.gold -rwxrwxr-x 1 jimlin jimlin 3497448 May  6 11:24 ld.org ========================================= to this point I can build L5.1.1_2.1.0 successfully.(on 2016, May, 12.) Issue-4: can't run the SD tool "fsl-sdcard-partition.sh" used to partition/format SD card in "~/myandroid/device/fsl/common/tools" root-cause: in Ubuntu 16.04, "sfdisk" tool doesn't support "-u" parameter: ================================== sfdisk from util-linux 2.27.1 -u, --unit S              deprecated, only sector unit is supported ================================== error message encountered when running the script: ================================== ~/myandroid/device/fsl/common/tools$ sudo ./fsl-sdcard-partition.sh /dev/sdc sfdisk: unsupported unit 'M' sfdisk: unsupported unit 'M' ================================== I've modified the script a bit to adapt the changes, as attached.

[Brief description] (1)Contents The ducoment introduced how to expand Gigabit Ethernet based on i.MX6 PCI Express, and attached schematics in DSN & pdf format. (2)Binary file for EEROM I have the binary file used to debug intel82574 circuit in this schematic, If customer wants to use it to debug board based on i.MX6+Intel82574, she can submit a case for me to get the file by our Salesforece system. Best Regards, TIC Weidong Sun Email: weidong.sun@nxp.com

In some customers’ design they use the different DRAM from the one used on our reference board. So customers need to customize the DRAM to make it work well on their design. About the i.MX6x hardware design customers can refer to IMX6DQ6SDLHDG.pdf and the section 5 DRAM interface requirements for migration on AN4397. After finishing the hardware design there are two tools important for the DRAM boot up and debug: DRAM Register Programming aid And DRAM Stress Test 1\DRAM Register Programming aid Our expert team create the script to make it easier to work on DDR initialization. You can see all the scripts on different chips and the link is: i.MX Design&Tool Lists The script include 3 sections, when you open it you can see the details. Run basic DDR initialization and test memory and open a debugger memory window pointing to the DDR memory map starting address. Try writing a few words and verify if they can be read correctly. If not, re-check the DDR initialization sequence and if the DDR has been correctly soldered onto the board. It is also recommended to re-check the schematic to ensure the DDR memory has been connected to the SoC correctly. In some cases, a DRAM calibration routine may need to be executed. About the details use and introduction on this script you can refer to Freescale i.MX6 DRAM Port Application Guide-DDR3 After configure the DRAM, you need to use the DRAM Stress Test to perform calibrations the performance and then regulate some parameters. 2\DRAM Stress Test DDR_Stress_Tester is a software application for fine tuning DDR parameters and verifying DDR performance on i.MX6 boards. It performs write leveling, DQS gating, read/write delay calibration on the target board to match the layout of the board and archive the best DDR performance. In addition, the stress test can help the user to verify the DDR performance on their boards. The DDR stress test tool serves two purposes. First, it can perform calibrations for DDR3 to match the MMDC PHY delay settings with PCB for optimal DRAM performance. The process is fully automatic, and therefore the customers can get there DDR3 working in much shorter time. In addition, the tool can run a memory stress test to verify the DDR3 functionality as well as the reliability. The stress test can help verifying the hardware connections, MMDC registers parameters, and DDR3 mode registers setting. The most important purpose of the test is that it allows the customers to verify that the DDR3 operations are stable on their board. The newest version  of DRAM Stress Test tool you can see in our community: i.MX6/7 DDR Stress Test Tool V2.51 And the old version you can see in the follow link: i.MX6 DDR Stress Test Tool V1.0.3 About how to use this tool you can read the use guide. Besides , you also can refer to the Freescale i.MX6 DRAM Port Application Guide-DDR3 By the way, if customers use the different DRAM from our reference design when the use the mfgtool to download the images, they need to build manufacturing images for mfgtool. Take the Linux 3.14.52 BSP as an example: $ bitbake fsl-image-mfgtool-initramfs Hope this can help you.

Hello,   recently I'm running CTS test on MX6Q SabreSD to fix some of the issues my customer found, and found that "factory reset" is an important step during the test-environment setup but not mentioned in i.MX CTS test report.   "Factory reset" is need on official CTS page: Setting up CTS | Android Open Source Project     Without factory reset, the CTS test result in "android.core.tests.libcore.package.libcore" package looks like: There are total 8 failed items.     If we run "factory reset" before conduct the CTS test in in "android.core.tests.libcore.package.libcore" package, only 2 failed items found as below:   PS: and those 2 failed items can be waived, according to the test-house of CTS tests. PS1: the test reports of are also attached.       Please do run "factory reset" before CTS test, verified working on 4.2.2 and should also work on the version above according to the pages I found on Google when trying to fix this issue. Unfortunately "factory reset" is not documented in the environment setup process in i.MX CTS test report, you will need this if you are following the steps in i.MX CTS test report.   Best regards, Jim.

This tool is also for emmc user partition mirror. Just give this tool the emmc files. The typical use case is for emmc mass production by emmc offline programming. Ver 0.4.0 2/14/2017 Support Android 7 Nougat. AndroidSDCARDMirrorCreator_Version_0.4.0_02142017.tgz Ver 0.3.2: 6/13/2016 Using static link simg2img AndroidSDCARDMirrorCreator_Version_0.3.2_06132016.tgz Ver 0.3.1: 5/31/2016 Remove some redundent code   AndroidSDCARDMirrorCreator_Version_0.3.1_05312016.tgz Ver 0.3: 5/25/2016 Add Marshmallow partition layout AndroidSDCARDMirrorCreator_Version_0.3_05252016.tgz Ver 0.2: Add Lollipop partition layout 1. Directory AndroidSDCARDMirrorCreator |-- AndroidSDCARDMirrorCreator.sh        --- main script |-- CFG.INC                              --- configuration file |-- KitKat_LAYOUT.INC                    --- KitKat partition layout |-- LAYOUT.INC -> Lollipop_LAYOUT.INC    --- symbol link to partition layout |-- Lollipop_LAYOUT.INC                  --- Lollipop partition layout `-- readme.txt                           --- this file 2. Need "root" run or "sudo" to run 3. parted and kpartx must be installed    sudo apt-get instal parted kpartx 4. test pass under the debian 8.2 and ubuntu 12.04 5. The AndroidSDCARDMirrorCreator.sh will look for LAYOUT.INC.    please make symbol link to the correct partition layout.    The default symbol link has created for Lollipop_LAYOUT.INC (LAYOUT.INC -> Lollipop_LAYOUT.INC) 6. Command    AndroidSDCARDMirrorCreator.sh -c    AndroidSDCARDMirrorCreator.sh -p 7. Example:    Suppose    The AndroidSDCARDMirrorCreator directory is in    ~/AndroidSDCARDMirrorCreator       The Android Images are in    ~/SD and ~/eMMC       Sdcdard Mirror:    cd ~/SD    ~/AndroidSDCARDMirrorCreator/AndroidSDCARDMirrorCreator.sh -c    eMMC Mirror:    cd ~/eMMC    ~/AndroidSDCARDMirrorCreator/AndroidSDCARDMirrorCreator.sh -c    8. Once the Mirror has been created. Can be reused. Just use kpartx.

Some Chinese customers using i.MX series SoC maybe encounter some issues when they download android , u-boot & kernel source code by 'git' command, the following steps will show customer how to get them: 1. Getting repo --No.1 methord # cd ~ # mkdir myandroid # mkdir bin # cd bin # git clone git://aosp.tuna.tsinghua.edu.cn/android/git-repo.git/ <if git failed, use : git clone https://aosp.tuna.tsinghua.edu.cn/android/git-repo.git/> # cd git-repo # cp ./repo ../ --No.2 methord # cd ~ # mkdir bin # curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo # chmod a+x ~/bin/repo [Note]Customers can select one of above to get "repo" 2. Modifying repo File Open ~/bin/repo file with 'gedit' and Change google address From        REPO_URL = 'https://gerrit.googlesource.com/git-repo' To        REPO_URL = 'git://aosp.tuna.tsinghua.edu.cn/android/git-repo'        like following: ## repo default configuration ## REPO_URL = 'git://aosp.tuna.tsinghua.edu.cn/android/git-repo' REPO_REV = 'stable' 3、Setting email address # cd ~/myandroid # git config --global user.email "weidong.sun@nxp.com" # git config --global user.name "weidong.sun" [ Email & Name should be yours] 4、Getting manifest # ~/bin/repo init -u https://aosp.tuna.tsinghua.edu.cn/android/platform/manifest -b android-5.1.1_r1 # cd ~/myandroid/.repo # gedit manifest.xml        Then change the value of fetch to " git://aosp.tuna.tsinghua.edu.cn/android/ ", like following: <manifest>   <remote name="aosp"            fetch="git://aosp.tuna.tsinghua.edu.cn/android/" />   <default revision="refs/tags/android-5.1.1_r1" ...... [Note] android-5.1.1_r1 is version of branch,customer can change it to another. 5、# ~/bin/repo sync          [Note] During runing repo sync, maybe errors will occur like the following: ...... * [new tag]         studio-1.4 -> studio-1.4 error: Exited sync due to fetch errors          Then 'repo sync' exits. But don't worry about it, continue to run the command please ! " ~/bin/repo sync", downloading source code will be continous. 6、Getting Cross Compiler # cd ~/myandroid/prebuilts/gcc/linux-x86/arm # git clone https://aosp.tuna.tsinghua.edu.cn/android/platform/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6 # cd arm-eabi-4.6 # git checkout android-4.4.3_r1 7、Getting linux kernel source code        Probably, customer can't normally get linux kernel by using "git clone" command, she can download it directly from the following weblink:        http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/        At first, create a temperary directory, then download kernel into the directory. see following steps: # cd ~ /Downloads # mkdir linux-kernel   Atfer downloading l5.1.1_2.1.0-ga.tar.gz, use 'tar zxvf l5.1.1_2.1.0-ga.tar.gz' command to decompress it.        Then you can find a subdirectory name " l5.1.1_2.1.0-ga" is created, linux source code is in the directory, we should copy all files in the directory to ~/myandroid/kernel_imx/ # cd ~/myandroid # mkdir kernel_imx # cd kernel_imx # cp -a ~ /Downloads/linux-kernel/l5.1.1_2.1.0-ga ./ 8、Getting uboot source code               Probably, customer can't normally get linux kernel by using "git clone" command, she can download it directly from the following weblink:       http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/        We can use similar way to that of linux kernel to get u-boot source code: # cd ~ /Downloads # mkdir u-boot        Download l5.1.1_2.1.0-ga.tar.gz file, and save it in ~ /Downloads/ u-boot, then decompress it, then u-boot source code will be in ~ /Downloads/ u-boot / l5.1.1_2.1.0-ga/, we should copy all file in the path to ~/myandroid/bootable/bootloader/uboot-imx/ # cd ~/myandroid/bootable/bootloader # mkdir uboot-imx # cd uboot-imx # cp -a ~ /Downloads/u-boot/l5.1.1_2.1.0-ga/* ./ 9、Patch android BSP source code        android_L5.1.1_2.1.0_consolidated-ga_core_source.gz is the name of patch. Run following command to patch android. # copy android_L5.1.1_2.1.0_consolidated-ga_core_source.gz /opt/ # tar zxvf android_L5.1.1_2.1.0_consolidated-ga_core_source.gz # cd /opt/ android_L5.1.1_2.1.0_consolidated-ga_core_source/code/ # tar zxvf L5.1.1_2.1.0_consolidated-ga.tar.gz # cd ~/myandroid # source /opt/ android_L5.1.1_2.1.0_consolidated-ga_core_source/code/ L5.1.1_2.1.0_consolidated-ga/ and_patch.sh # help # c_patch /opt/ android_L5.1.1_2.1.0_consolidated-ga_core_source/code/ L5.1.1_2.1.0_consolidated-ga/ imx_L5.1.1_2.1.0-ga        If everything is OK, the following logs will display on console:               **************************************************************        Success: Now you can build the Android code for FSL i.MX platform               ************************************************************** 10、Patch Freescale extended feathures code        Please refer to chapter 3.3 of Android_User's_Guide.pdf to patch another 2 files:        (1) android_L5.1.1_2.1.0_consolidated-ga_omxplayer_source.gz        (2) android_L5.1.1_2.1.0_consolidated-ga_wfdsink_source.gz [Note]       As for other steps, such as compiling etc, please refer to Android_User's_Guide.pdf that released by NXP. TICS team Weidong Sun 04/01/2016

The default FSL android BSP support 1 SD card slot. If customer need to support more sd slot in android.Please reference below steps. There are two steps need to set up. 1 device/fsl.git NOTE: 1  change the fstab. 2194000 is the address of usdhc2.             2  change the mount point in storage_list.xml diff --git a/sabresd_6dq/fstab.freescale b/sabresd_6dq/fstab.freescale index 7f23edb..1529a27 100644 --- a/sabresd_6dq/fstab.freescale +++ b/sabresd_6dq/fstab.freescale @@ -4,6 +4,7 @@ # specify MF_CHECK, and must come before any filesystems that do specify MF_CHECK /devices/soc0/soc.0/2100000.aips-bus/2198000.usdhc/mmc_host /mnt/media_rw/extsd vfat defaults voldmanaged=extsd:auto +/devices/soc0/soc.0/2100000.aips-bus/2194000.usdhc/mmc_host /mnt/media_rw/extsd_expand vfat defaults voldmanaged=extsd_expand:auto /devices/soc0/soc.0/2100000.aips-bus/2184000.usb/ci_hdrc.0  /mnt/media_rw/udisk vfat defaults voldmanaged=udisk:auto /dev/block/mmcblk3p5    /system      ext4    ro,barrier=1                                                                               wait,verify /dev/block/mmcblk3p4    /data        ext4    nosuid,nodev,nodiratime,noatime,nomblk_io_submit,noauto_da_alloc,errors=panic    wait,encryptable=/dev/block/mmcblk3p9 diff --git a/sabresd_6dq/overlay/frameworks/base/core/res/res/xml/storage_list.xml b/sabresd_6dq/overlay/frameworks/base/core/res/res/xml/storage_list.xml index 3639bdc..c3f5105 100644 --- a/sabresd_6dq/overlay/frameworks/base/core/res/res/xml/storage_list.xml +++ b/sabresd_6dq/overlay/frameworks/base/core/res/res/xml/storage_list.xml @@ -41,6 +41,10 @@               android:storageDescription="@string/storage_sd_card"               android:primary="false"               android:removable="true" /> +    <storage android:mountPoint="/storage/extsd_expand" +             android:storageDescription="@string/storage_sd_card" +             android:primary="false" +             android:removable="true" />      <storage android:mountPoint="/storage/udisk" 2  system/core.git NOTE: mkdir the mount point. build@scmbld2:~/maddev_lp5.1_consolidate_ga_10_30/system/core/rootdir$ git diff diff --git a/rootdir/init.rc b/rootdir/init.rc index 2211cc2..fac37c2 100644 --- a/rootdir/init.rc +++ b/rootdir/init.rc @@ -72,7 +72,9 @@ on init      mkdir /storage 0751 root sdcard_r      mkdir /mnt/media_rw/extsd 0755 system system +    mkdir /mnt/media_rw/extsd_expand 0755 system system      symlink /mnt/media_rw/extsd /storage/extsd +    symlink /mnt/media_rw/extsd_expand /storage/extsd_expand      mkdir /mnt/media_rw/udisk 0755 system system

The vbs file is a script file in mfgtool. In fsl android lollipop consolidate and later MFGTOOL version, You just need add a new vbs item for new board and have not need to change the ucl2.xml. The below is the example struct. Set wshShell = CreateObject("WScript.shell") wshShell.run "mfgtool2.exe -c ""linux"" -l ""SDCard-Android"" -s ""board=sabresd"" -s ""folder=sabresd"" -s ""soc=6dl"" -s ""mmc=2"" -s ""data_type=-f2fs""" Set wshShell = Nothing Explain for each option: -l: storage type      There three type for android: Nand-Android\eMMC-Android\SDCard-Android -s: extend variable      board: It is used to download uboot and dts in init system.      folder: there are three type: sabresd sabreauto evk                the android image is located in: files/android/%folder%/      soc: Used to define android image name. types: 6q, 6dl, 6sx, 6sl.      mmc: define the storage idex.      data_type: if the type of data partition is f2fs, need define data_type=-f2fs      ldo: if the board is 1.2G, need to define it to -ldo      plus: if the board is 6qp, need too define it to p

Downloading and building the V4L2 examples V4L2 examples - v0.1 are available at https://github.com/rogeriorps/v4l2-examples To download, just clone the project: $ git clone https://github.com/rogeriorps/v4l2-examples.git Available demos Example1: Display an image coming from camera using V4L2_BUF_TYPE_VIDEO_OVERLAY Example2: Display an image coming from camera using V4L2_BUF_TYPE_VIDEO_OUTPUT Known issues

Display on LVDS0 or LVDS1 is normal, but some customer need  larger screen and they need the dual LVDS work on the same time. In another word, it is to use the dual 8 connection. Here I give the simple introduction on this. Environment Board: MCIMX6Q-SDP (Or the board customer design) BSP:  Linux or Android BSP provided by Freescale Screen: M190PW01-V8 19(Take this as example) Steps: 1\ Hardware connection Make sure the hardware connection is right. The 4 pairs of difference signals on both LVDS0 and LVDS1 work, but in our reference board MCIMX6Q-SDP only 3 pairs of difference signals work. To make this screen working well the connection must be proper connect. Take the screen M190PW01-V8 19 as a example, the connection is as follow: 2\ Software modify Here we can know the screen works on the RGB24 mode not the RGB666, as the connection is already right. So the next step is to modify the code. As customers use differently screens, they have to porting the screen driver first.  About porting customers need to modify the  ldb.c  according to the datasheet of the screen in BSP. The parameters and timing should be set right.  Also the board.c need to be modified, RGB24 mode should also be set. About the porting Lvds screen steps, details you can refer to the Porting LVDS LCD With Low Resolution to i.MX6  in our community. 3\ Command special in u-boot After porting success the LVDS  and build the BSP. The run the images built on the board then boot up the board. In the u-boot the command should be set, about the display section is : video=mxcfb0:dev=ldb,LDB-1080P60,if=RGB24 ldb=spl0. The default BSP provided by Freescale is support dual LVDS display, but the display mode should be right so it can work well. Hope this can give some help to you.

Q: Is there any guidelines document on 3G/4G modem integration with the iMX platforms running Android Lollipop versions ? A: Generally speaking, porting documents on 3G/4G should be provided by manufacture, For different 3G/4G module, porting steps are also distinct.The following steps are for ZTE 3G on android jb 4.2.2,  as a reference: ----Common steps: (1) linux USB driver In linux kernel, we should select GSM module in USB driver path. (2)Communication port for 3G After linux booting normally, you can find some communation port at path /dev/, like ttyUSB0,ttyUSB1,ttyUSB2... These tty ports are for AT commands & data transmitting, but which one is for data , or which one is for AT command, we should have to ask manufacture or get information for them. (3)dial script 3G manufacture will give the script to you, if not, ask for it. (4)Dynamic library(libreference-ril.so) 3G manufacture will give you the library to replace original one in android. (5)Add service for 3G in init.rc file according their documents ---As an example, let us see steps for ZTE 3G(CDMA) ** Replace original file with libreference-ril.so file that ZTE released. **Copy init.gprs-pppd file to system/etc/ppp directory **Modify init..rc like following: service ril-daemon /system/bin/rild -l /system/lib/libreference-ril.so -- -d /dev/ttyUSB2 -u /dev/ttyUSB0 class main socket rild stream 660 root radio socket rild-debug stream 660 radio system socket rild-ppp stream 660 radio system user root group radio cache inet misc audio sdcard_rw log service pppd_gprs /etc/ppp/init.gprs-pppd class main user root group radio cache inet misc disabled oneshot

1. INTRODUCTION:      This document explains the general and basic steps to customize U-Boot for your own board. The board used in this document it is a working and stable board, the UDOO board (http://udoo.org). 2. REQUIREMENTS:     Install Yocto Project. See the Freescale Yocto Project User's Guide.     Generate and install the meta-toolchain. Follow this great training to do so  Yocto Training - HOME     Generate core-image-minimal of L3.14.28 of FSL BSP obtained from https://www.freescale.com/webapp/Download?colCode=L3.14.28_1.0.0_iMX6QDLS_BUNDLE&appType=license&location=null&Parent_no…   3. ADDING i.MX6 CUSTOM BOARD SUPPORT FOR U-BOOT.     This section follows the steps found in Chapter 1 of the i.MX6 BSP Porting Guide of the Yocto documentation (L3.14.28) https://www.freescale.com/webapp/Download?colCode=L3.14.28_1.0.0_LINUX_DOCS&location=null&fpsp=1&WT_TYPE=Supporting%20In… . Obtain U-Boot Source Code. After having installed Yocto project and generate a valid imx6 image, the U-Boot code should be located at <build directory>/tmp/work/<machine>-poky-linuxgnueabi/u-boot-imx/<version>/git. Prepare the Code. Choose a board as reference, this board should be as similar as possible to your custom board. Copy the board directory :                $ cp -R board/freescale/mx6sabresd/ board/freescale/mx6_udoo Copy the existing mx6sabresd.h configuration file as mx6_udoo.h                $ cp include/configs/mx6sabresd.h include/configs/mx6_udoo.h Create one entry in boards.cfg. Add a configuration entry in the boards.cfg file. Active  arm  armv7  mx6  freescale  mx6_udoo mx6_udoo mx6_udoo:IMX_CONFIG=board/freescale/mx6_udoo/mx6dl_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-udoo.dtb",DDR_MB=1024 Rename <board>.c file. Rename board/freescale/mx6sabresd/mx6sabresd.c   to   board/freescale/mx6_udoo/mx6_udoo.c Modify Makefile. Change the line of COBJS to your custom board at  board/freescale/mx6_udoo/:      obj-y  := mx6sabresd.o Create a Shell script. Create a script to compile your new configuration. The script for this example is shown below and its name is build_u-boot.sh: #!/bin/bash export ARCH=arm export CROSS_COMPILE=/opt/poky/1.7/sysroots/x86_64-pokysdk-linux/usr/bin/arm-poky-linux-gnueabi/arm-poky-linux-gnueabi- make distclean; make mx6_udoo_config make Run the script to verify if the new configuration is correct.      $./build_u-boot.sh 4. CUSTOMIZING BOARD CODE      The fist part to customize is the DCD table. The DCD table contains configuration data for the DDR controller and memory. The DCD is read by the BootROM code in the iMX family and executed before copying the Uboot image to DDR. The DCD is built in the .cfg file pointed in the new entry we just added in the boards.cfg file (mx6dl_4x_mt41j128.cfg). Below you can find an example of the data that can be found in this file: /* * Device Configuration Data (DCD) * * Each entry must have the format: * Addr-type           Address        Value * * where: *      Addr-type register length (1,2 or 4 bytes) *      Address   absolute address of the register *      value     value to be stored in the register */ DATA 4, 0x020e0774, 0x000C0000 DATA 4, 0x020e0754, 0x00000000 DATA 4, 0x020e04ac, 0x00000030 DATA 4, 0x020e04b0, 0x00000030 DATA 4, 0x020e0464, 0x00000030 DATA 4, 0x020e0490, 0x00000030 DATA 4, 0x020e074c, 0x00000030 DATA 4, 0x020e0494, 0x00000030 DATA 4, 0x020e04a0, 0x00000000 The .cfg files used in this example were taken from an old U-Boot version (2009) non dtb capable. The used files are found in the attached .zip file. The specific initialization code for each board is found in mx6<customer board>.c in board/freescale/mx6<customer board>.c  in this case board/freescale/mx6_udoo/mx6_udoo.c file. Below it is explained the needed changes to route the serial console to the correct UART module, disable an external watchdog, configure and initialize the Ethernet PHY, change the lvds clock and configure the correct USDHC module.        U-Boot calls already defined functions from a function pointer array that takes care of the board initialization at different stages. For example the board_early_init_f() is called at an        early phase where we can disable the wdog and initialize the uart pins; board_init() and board_late_init() are called after board_early_init_f(). The UDOO board features an external watchdog that needs to be disabled with a GPIO, otherwise U-Boot resets after a few seconds:          The WDOG pins need to be configured and in the mx6_udoo.c file a global struct configuration for those pins is declared, as well as macros for each pin #define WDT_EN  IMX_GPIO_NR(5, 4) #define WDT_TRG IMX_GPIO_NR(3, 19) iomux_v3_cfg_t const wdog_pads[] = {         MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),         MX6_PAD_EIM_D19__GPIO3_IO19, }; static void setup_iomux_wdog(void) {         imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));         gpio_direction_output(WDT_TRG, 0);         gpio_direction_output(WDT_EN, 1);         gpio_direction_input(WDT_TRG); } This configuration needs to be called at some point of the board_early_init_f() int board_early_init_f(void) {         setup_iomux_wdog();         This way the board_early_init_f() calls the iomux for the external wdog and disables it. The UART console is routed to UART2, EIM_D26/UART2_TXD and EIM_D27/UART2_RXD. A different structure is defined with the pin configuration for the UART2.      iomux_v3_cfg_t const uart2_pads[] = {         MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),         MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; This configuration should be called at early stage too. static void setup_iomux_uart(void) {         imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); } int board_early_init_f(void) {         setup_iomux_wdog();         setup_iomux_uart(); Also the UART BASE register has to be defined as well as the console device. This is defined in the include/configs/mx6_udoo.h file. #define CONFIG_MXC_UART_BASE   UART2_BASE #define CONFIG_CONSOLE_DEV      "ttymxc1" The UDOO board features only one micro SD slot to boot and U-Boot environment storage. It uses only 4 bits and it has to be configured too. In the include/configs/mx6_udoo.h file the USDHC module has to be defined and the MMC environment device. #define CONFIG_SYS_FSL_USDHC_NUM   3 #define CONFIG_SYS_MMC_ENV_DEV       0     /* SDHC3 */          The USDHC3 pin configuration has to be defined:      iomux_v3_cfg_t const usdhc3_pads[] = {         MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),         MX6_PAD_NANDF_D0__GPIO2_IO00    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; struct fsl_esdhc_cfg usdhc_cfg[1] = {         {USDHC3_BASE_ADDR, 0, 4}, }; This must be called and configured from the board_mmc_init() function: int board_mmc_init(bd_t *bis) {         s32 status = 0;         imx_iomux_v3_setup_multiple_pads(         usdhc3_pads, ARRAY_SIZE(usdhc3_pads));         usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);                 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[0]);         return status; } The Ethernet PHY is configured in the board_eth_init() function. This function should initialize the pins for the external ethernet phy, mdio and phy configuration.  Just a piece of code is shown below: iomux_v3_cfg_t const enet_pads1[] = {         MX6_PAD_ENET_MDIO__ENET_MDIO            | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_ENET_MDC__ENET_MDC              | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TXC__RGMII_TXC       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD0__RGMII_TD0       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD1__RGMII_TD1       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD2__RGMII_TD2       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TD3__RGMII_TD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_ENET_REF_CLK__ENET_TX_CLK       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RXC__RGMII_RXC       | MUX_PAD_CTRL(ENET_PAD_CTRL),         /* RGMII reset */         MX6_PAD_EIM_D23__GPIO3_IO23              | MUX_PAD_CTRL(NO_PAD_CTRL),         /* alimentazione ethernet*/         MX6_PAD_EIM_EB3__GPIO2_IO31              | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 32 - 1 - (MODE0) all */         MX6_PAD_RGMII_RD0__GPIO6_IO25            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 31 - 1 - (MODE1) all */         MX6_PAD_RGMII_RD1__GPIO6_IO27            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 28 - 1 - (MODE2) all */         MX6_PAD_RGMII_RD2__GPIO6_IO28            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 27 - 1 - (MODE3) all */         MX6_PAD_RGMII_RD3__GPIO6_IO29            | MUX_PAD_CTRL(NO_PAD_CTRL),         /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */         MX6_PAD_RGMII_RX_CTL__GPIO6_IO24         | MUX_PAD_CTRL(NO_PAD_CTRL), }; static iomux_v3_cfg_t const enet_pads2[] = {         MX6_PAD_RGMII_RD0__RGMII_RD0       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD1__RGMII_RD1       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD2__RGMII_RD2       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RD3__RGMII_RD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),         MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL), }; static void setup_iomux_enet(void) {         imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1));         udelay(20);         gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power on enet */         gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */         gpio_direction_output(IMX_GPIO_NR(6, 24), 1);         gpio_direction_output(IMX_GPIO_NR(6, 25), 1);         gpio_direction_output(IMX_GPIO_NR(6, 27), 1);         gpio_direction_output(IMX_GPIO_NR(6, 28), 1);         gpio_direction_output(IMX_GPIO_NR(6, 29), 1);         udelay(1000);         gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* deassert PHY rst */         /* Need delay 100ms to exit from reset. */         udelay(1000 * 100);         gpio_free(IMX_GPIO_NR(6, 24));         gpio_free(IMX_GPIO_NR(6, 25));         gpio_free(IMX_GPIO_NR(6, 27));         gpio_free(IMX_GPIO_NR(6, 28));         gpio_free(IMX_GPIO_NR(6, 29));         imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); }           Let's notice that the external PHY is not the same as the SABRESD AR8031. The UDOO features the MICREL KSZ9031 PHY. The latter needs to be defined and the former undefined in the include/configs/mx6_udoo.h file. #undef  CONFIG_PHY_ATHEROS #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9031 Besides the PHY address has to be changed. #define CONFIG_FEC_MXC_PHYADDR  6 At this point, the serial console, SD card saving arguments and ethernet should be working. The last point is to configure the LVDS display. The LVDS display of the UDOO board is connected in the same port as the SABRE-SD board, but the operation frequency is different and it has to be modified to work at ~ 33.26MHz for the 7 inches LVDS display.      The mx6_udoo.c file contains a setup_display function that configures the LDB module. This functions is called in the board_early_init_f(). With the current clock configuration is not possible to get  the 33.2MHz for the LVDS and a different clock source for the LDB module must be chosen. The backlight and lvds power signals must be on.           The current configuration uses the mmdc_ch1 clock and to get closer to 33.26MHz the PLL2_PFD0 is chosen.        gpio_direction_output(IMX_GPIO_NR(1, 2), 1); /* LVDS power On */         gpio_direction_output(IMX_GPIO_NR(1, 4), 1); /* LVDS backlight On */         imx_iomux_v3_setup_multiple_pads(di0_pads, ARRAY_SIZE(di0_pads));         enable_ipu_clock();         imx_setup_hdmi();         /* Turn on4LDB0, LDB1, IPU,IPU DI0 clocks */         reg = readl(&mxc_ccm->CCGR3);         reg |=  MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK;         writel(reg, &mxc_ccm->CCGR3);         /* set LDB0, LDB1 clk select to 011/011 */         reg = readl(&mxc_ccm->cs2cdr);         reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK                  | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);         reg |= (1 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)               | (1 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);         writel(reg, &mxc_ccm->cs2cdr); With this changes you can compile the new U-Boot image with ./build_u-boot.sh and then just copy the uboot.imx file to your sd: # sudo cp if=uboot.imx of=/dev/sdX bs=512 seek= 2 && sync 5. TESTING YOUR CHANGES Inser the sd with the U-Boot image to micro sd slot and power up the board. You should get the U-Boot serial console like shown below. In the console you can test the ethernet and phy configuration with the PING command: I hope you find these basic steps useful for different boards.

       The document will introduce all steps for poring BCM4330/BCM43362 WIFI module to freescale android4.2.2 BSP, it includes these contents: --Hardware & Software Environment --Hardware Design Based on BCM43362 module --i.MX6 BSP configuration for WIFI module --BCM4330/BCM43362 dirver for linux 3.0.35 --Integrated to Android4.2.2    If customer has some questions with the porting, contact me , please ! my email address: weidong.sun@freescale.com Freescale TICS team Weidong.sun 2015-08-20

I've done some research in Android boot optimization in the past months and have some getting. This page is for recording and sharing purpose only. It's target to provide some hints and directions for Android optimization. It's NOT a Freescale official document or patch release. The code/doc inside is only for reference. Background:      1. I've used SabreSD + Android KK 4.4.2 GA 1.0 as a reference platform.      2. I'm not doing some popular optimization way such as "hibernation", "suspend". I'm trying to "optimize" the boot process by re-arranging the boot process and make GUI related process run earlier and fine tune some boot code for running faster.      3. It's target to the Android IVI product. So, some features that will never be used in a IVI environment will be disabled or removed. Minor of them. I've come out with a patch package (latest is milestone 4 which is "_m4" in the version for short) and  a training document. I didn't find any confidential information from the patch or doc, so I'm open the sharing here. Updated on 2016/01/08 for new version (milestone m5): --------------------------------------------------------------------------------------- Change log against previous (milestone 4) version:      1. BSP base changed to Android KK 4.4.3 GA 2.0 which has a Linux kernel 3.10.53      2. Linux kernel and uboot optimization added. Kernel boot time (POR -> Android init entry) is less than 1.5s.      3. Some bug fixes.      4. Document updated accordingly. Total boot time tested on SabreSDP is about 8s.

Some customers often use LVDS LCD with low resolution on i.MX6 platform, such as 320x240, but by defualt , linux bsp doesn't support low frequency pixel clock for LVDS module input. Question:     When we port LVDS LCD with 320x240 resolution to android4.2.2, we found pixel clock is not correct, it always output 38.9MHz, it is no probem for big resolution , for example 1024x768, but the clock we need for 320x240 LCD is 6.4MHz.     According to the quesiton, Let us check IPU & LDB clock in i.MX6 datasheet at first : From above table, if ldb clock is from IPU, we will not get 6.4MHz pixel clock, so we will have to adjust its source clock: The following steps are procedure that ports LVDS LCD with 320x240 resolution to i.MX6Q. 1. Adding LVDS LCD timing structure to ldb.c static struct fb_videomode ldb_modedb[] = { {       "LDB-XGA", 60, 320, 240, 155914,       38, 20,       15, 4,       30, 3,       0,       FB_VMODE_NONINTERLACED,       FB_MODE_IS_DETAILED, }, {      "LDB-1080P60", 60, 1920, 1080, 7692,      100, 40,      30, 3,      10, 2,      0,      FB_VMODE_NONINTERLACED,      FB_MODE_IS_DETAILED,}, }; 2.Modifying clock source of ldb module Checking /arch/arm/mach-mx6/clock.c, we can find there are 3 ldb's clock source : &pll5_video_main_clk, &pll2_pfd_352M, &pll2_pfd_400M, static int _clk_ldb_di1_set_parent(struct clk *clk, struct clk *parent) {        u32 reg, mux;        int rev = mx6q_revision();        reg = __raw_readl(MXC_CCM_CS2CDR)               & ~MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK;        mux = _get_mux6(parent, &pll5_video_main_clk,               &pll2_pfd_352M, &pll2_pfd_400M,               (rev == IMX_CHIP_REVISION_1_0) ?                &pll3_pfd_540M :       /* MX6Q TO1.0 */                &mmdc_ch1_axi_clk[0],     /* MX6Q TO1.1 and MX6DL */               &pll3_usb_otg_main_clk, NULL);        reg |= (mux << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);        __raw_writel(reg, MXC_CCM_CS2CDR);        return 0; } By default, pll2_pfd_352M is configured as the clock source of ldb: clk_set_parent(&ldb_di0_clk, &pll2_pfd_352M);        clk_set_parent(&ldb_di1_clk, &pll2_pfd_352M); We should change the clock source to be pll5_video_main_clk clk_set_parent(&ldb_di0_clk, &pll5_video_main_clk,);        clk_set_parent(&ldb_di1_clk, &pll5_video_main_clk,); 3. Configuring initial clock in board-mx6q_sabresd.c static struct ipuv3_fb_platform_data sabresd_fb_data[] = {        { /*fb0*/        .disp_dev = "ldb",        .interface_pix_fmt = IPU_PIX_FMT_RGB666,        .mode_str = "LDB-XGA",        .default_bpp = 16,        .int_clk = false,        .late_init = false, } int_clk=false means LDB clock is from PLL2_PFD_352 or pll5_video_main_clk; int_clk=true mean LDB clock if from IPU. OK, after doing above steps, LVDS LCD with low resolution should normally work. Freescale TICS team Weidong.sun 2015-08-18

The document includes the following contents: (1)document how to port ov5646 to android jb4.2.2 (2) ov5645 driver for Linux 3.0.35 (3) ov5645 schematic based on i.MX6Q/DL (4)ov5645 for android camera HAL   [Note:]      P5V29A-0JG is a camera module based on OV5645, and PAO532-0JG is based on OV5640, both manufactured by NINGBO SUNNY OPOTECH CO.LTD (China), If customer wants to use them on i.MX6 platform, can send me email to ask for datasheets of P5V29A & PAO532 , or discuss corresponding questions on porting.   Email: weidong.sun@freescale.com

The document will introduce all steps for poring WM8960 audio codec to freescale android4.2.2 BSP. Attachments include : (1)Document for porting (2)Codec driver : wm8960.c (3)Machine driver: imx-wm8960.c (4)wm8960 schematic for reference (5)Android Audio HAL: config_wm8960.h (6)schematic: MX6QDL-PIANO-CNFV1.DSN (7)i.MX6DL BSP files mx6dl_piano.c mx6dl_piano.h mx6dl_piano_pmic_pfuse100.c (8)i.MX6Q BSP files mx6q_piano.c mx6q_piano.h mx6q_piano_pmic_pfuse100.c   Freescale TICS Team Weidong.sun

i.MX6UL OBDS test image

INTRODUCTION REQUIREMENTS CREATE A NEW PROJECT GPU EXAMPLE GSTREAMER EXAMPLE 1. INTRODUCTION:      The below steps show how to create different application examples using Elipse IDE. 2. REQUIREMENTS:      A fully working image and meta-toolchain generated in Yocto . You can follow the  next training: Yocto Training - HOME      Install and configure the Yocto Eclipse Plug-in. For more details about this requirement please refer to Setting up the Eclipse IDE for Yocto Application Development         To demonstrate the steps, L3.14.28  BSP, fsl-image-qt5 image and i.MX6Q SABRE-SDP board were used. 3. CREATE A NEW PROJECT      Follow the section Creating a Hello World Project of this document Setting up the Eclipse IDE for Yocto Application Development 4. GPU EXAMPLE           For this project we use the source code found in the fsl-gpu-sdk that can be downloaded from:      https://www.freescale.com/webapp/Download?colCode=IMX6_GPU_SDK&location=null&Parent_nodeId=1337637154535695831062&Parent…      Follow section 3 and create a new project named gputest.      From the IMX6_GPU_SDK choose one of the examples of GLES2.0 folder. In this case the 01_SimpleTriangle is chosen.      Copy the .c and .h files to the src directory of the gputest project. The Project Explorer window should look like this:              Add the needed files and libraries to compile and link in the Makefile.am file found in the ´src´ folder. The Makefile.am file should have the below content:          bin_PROGRAMS = gputest          gputest_SOURCES = gputest.c fsl_egl.c fslutil.c          AM_CFLAGS = @gputest_CFLAGS@          AM_LDFLAGS = @gputest_LIBS@ -lstdc++ -lm -lGLESv2 -lEGL -lX11 -ldl          CLEANFILES = *~ ​    Add the PATH to CFLAGS where the compiler will look for the headers at Project->Properties->Autotools->configure:           In this project there is no need to add extra PATHs for the headers. Apply the changes by clicking on Reconfigure Project. Build the project To test the file you can send the executable to the board with:           $ scp gputest root@<board_ip>:/home/root      $./gputest      You should get the next output in the display: 5. GSTREAMER EXAMPLE      For this project we use the source code found at Basic tutorial 1: Hello world! - GStreamer SDK documentation - GStreamer SDK documentation    Follow section 3 and create a new project named Gstreamer.    Copy the code of the basic tutorial to your Gstreamer.c file.    Add the needed files and libraries to compile and link in the Makefile.am file found in the ´src´ folder. The Makefile.am file should have the below content:                           bin_PROGRAMS = Gstreamer      Gstreamer_SOURCES = Gstreamer.c      AM_CFLAGS = @Gstreamer_CFLAGS@      AM_LDFLAGS = @Gstreamer_LIBS@ -lstdc++  -lVDK -lm -lGLESv2 -lGAL -lEGL  -ldl -lgstreamer-0.10 -lgobject-2.0 -lgmodule-2.0 -lgthread-2.0 -lrt -lxml2 -lglib-2.0      CLEANFILES = *~         ​    Add the PATH to CFLAGS where the compiler will look for the headers at Project->Properties->Autotools->configure:           For this example the next lines are added             -I${Sysroot}/usr/include/gstreamer-1.0        -I${Sysroot}/usr/include/glib-2.0        -I${Sysroot}/usr/include/libxml2        -I${Sysroot}/usr/lib/glib-2.0/include      Apply the changes by clicking on Reconfigure Project. Build the project To test the file you can send the executable to the board with:           $ scp Gstreamer root@<board_ip>:/home/root To execute the application on the board:      $./Gstreamer The board should have internet access and the application should play the video found at http://docs.gstreamer.com/media/sintel_trailer-480p.webm

According to section 13.5 (Cortex-M4 Boot Requirements) of the i.MX6SX  Reference Manual : • Cortex-A9 always boots as the primary core. • Cortex-M4 does not have a boot ROM and at POR is not provided a clock. • Cortex-A9 ROM is responsible for the following: • Loading and authenticating A9 bootloader and initiating Cortex-M4 firmware as a unified image. • Setting up Cortex-M4 initial exception table in TCRAML • Launching the Cortex-M4 by enabling its clock. In addition :  M4 obtains minimal initial vector table, containing a) Initial Stack pointer b) Reset vector c) NMI vector from a fixed location (zero offset) in TCM(L) after A9 enables it’s clock. So, A9 (bootloader) is responsible for:     Configuring M4 initial vector table  in TCM(L) ;     Loading M4 code ;     Configuring CSU and RDC for TrustZone (if needed)       and A9/M4 domain separation ;     Enabling M4 clock.    Please look at the enclosed projects, which help to understand how to build, load and run startup codes for both Cortex-A9 and Cortex-M4 cores of i.MX6 SoloX.   Also note : the i.MX6 SoloX has two cores with different address mapping. Please refer to Table 2-1 (System memory map) for Cortex-A9 core and to Table 2-2 (CM4 memory map) for Cortex-M4 of the i.MX6 SoloX Reference Manual. To run Cortex-M4 it is needed to fill TCM(L), that is addressed as TCML ALIAS (from zero). The same memory is mapped to 0x007f8000 of the Cortex-A9 (non-reflected in the Table 2-1). Note, this area is accessible by the Cortex-A9 after M4 clock is enabled in CCM_CCGR3. The following resources may be helpful, when working with i.MX6 SoloX : “How to configure Real View ICE  and RealView debugger  to work with i.MX6 SoloX” https://community.freescale.com/docs/DOC-106198 “Integrating Processor Expert for i.MX and ARM GCC with Eclipse” https://community.freescale.com/docs/DOC-103736 “I.MX6SX start M4 from U-Boot with QSPI flash” https://community.freescale.com/message/499465 "Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo " http://cache.nxp.com/files/soft_dev_tools/doc/app_note/AN5317.pdf