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/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 7 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 3 channels, ADC1 4 channels. PDBs are set to back-to-back mode to perform chain conversion as shown in RM's Figure 46-3. PDB back-to-back chain forming PDB0-PDB1 ring. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 ch5 External input channel 28 is selected, as it is connected to potentiometer on the EVB. PDB0 is triggered by LPIT ch0 at 500ms rate. * ------------------------------------------------------------------------------ * Test HW: S32K148EVB-Q144 * MCU: FS32K144UAVLQ 0N20V * Target: Debug_FLASH * EVB connection: UART terminal 115200, 8N1 * Compiler: S32DS.ARM.3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: S32DS ******************************************************************************** Revision History: Ver Date Author Description of Changes 1.0 Jan-26-2023 Petr Stancik Initial version, based on adc_hwtrigger_s32k148 *******************************************************************************/
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****************************************************************************************************  Detailed Description:  The current RTD RTM 2.0.0 does not support overflow notification  if EMIOS ICU is used in the Edge Detect mode.  Workaround is to use another channel in ECU mode  clocked by the same counter bus as the ICU channel.  Emios_0 input clock: 48MHz CORE_CLK  MCL EMIOS_0_Ch_23 (BUS_A)  Global clock devider: 48  MCB prescaler: 1  MCB clock: 1MHz  MCB tick: 1us  MCB period: 65_535 ticks  Both OCU (Emios_0_Ch0) and ICU (Emios_0_ch3) use the same BUS_A counter clock.  GPIO generated PWM period: ~0.5s  That's 500_000 ticks  ICU routed to PTB0  GPIO PWM to PTB1  -----------------------------------------------------------------------------------------------  Test HW: S32K3X4EVB-Q172  MCU: S32K344  Debugger: S32DS 3.4, PEMicro Multilink rev.C  Target: internal_FLASH ****************************************************************************************************
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------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** S32K31XEVB-Q100 :-- S32K31XEVB-Q100 Evaluation Board for Automotive General Purpose | NXP Semiconductors S32K312 UART Transmit & Receive Using DMA :-- S32K311 UART Transmit & Receive Using DMA - NXP Community S32K311 UART Idle state Interrupt :-- S32K311 UART Idle state Interrupt - NXP Community
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Question As we know, the TPPSDK supports S32K144 MCU and various Kinetis MCUs to initialize GD3000 in NXP MC solutions. Because of the release of S32K3 and related SW RTD, it’s necessary to expand the capability of TPPSDK to support S32K3 MC based RTD LLD driver or MCAL driver. Unfortunately, the AA team will not maintain the TPPSDK anymore.  How could we configure the GD3000 chip for S32K3 platform?   Answer I took some time to finish this work. Here I'd like to share you the The Expanded TPPSDK Based on S32K3 RTD that is suitable for S32K3 MC application. You can find the Application Note, the source code of new TPPSDK (GD3000 driver), two examples in the attachment. I hope these materials can help you get start with the expanded TPPSDK on S32K3.
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******************************************************************************* The purpose of this demo application is to present a usage of the EMIOS IP Driver in Interrupt mode for the S32K3xx MCU. The example use to :-- EMIOS-1 - ch-0  --> PTC24 --> Generate the PWM EMIOS-1 - ch-1  --> PTC25 --> is the ICU channel to measure the duty Pins used :--     This example is tested for SAIC & IPWM mode both. You can change the mode by this setting in MEX file :--     Difference between SAIC & IPWM,  ICU Driver User Manual :--   These Two Macro :-- SAIC_MODE  --> this maco will enable variables to store for SAIC mode CUSTOM_IRQ  --> this MACRO will enable customized IRQ or RTD available IRQ   Result :--    ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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This article has been moved to a new location: https://community.nxp.com/t5/S32M-Knowledge-Base/S32M2xx-Motor-control-use-cases/ta-p/2039790
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An example implementation of SENT protocol receiver with S32K118 evaluation board. The input is expected in J106, TICK duration is 2,75us. CRC is calculated and check, the decoded output is printed into terminal via UART (ASCII)
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******************************************************************************************************** Detailed Description: LPUART1 echoes RX signal at 115200 bps When an 's' char is received, the MCU enters VLPS. A falling edge of the RX signal brings the MCU from VLPS via LPUART RXEDGIF interrupt. BUS_CLK can be monitored at CLKOUT PTD14. In VLPS, BUS_CLK is gated off. -------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  SWT IP Driver for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** With S32K312 device take care, HSE clock AIPS_SLOW_CLOCK ratio,  kept 1:2 :--   The example we use to trigger the SWT once & go to while(1) loop. This will trigger the watchdog RESET. Then After RESET from SWT we will check at starting of main function, if RESET reason is SWT, then glow LED and wait in while(1) loop  :--  
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******************************************************************************************************* * Detailed Description: The purpose of this demo application is to present some usage modes of the eMIOS for the S32K3xx MCU. The application uses the eMios_Pwm driver as OPWMCB ( Center aligned Output PWM Buffered with dead time), OPWMB (Output Pulse Width Modulation Buffered) and OPWMT (Output Pulse Width Modulation Trigger) to generate waveforms.  PWM signal generated by EMIOS 0 CH 1 (OPWMCB mode), EMIOS 0 CH 2 (OPWMCB mode), EMIOS 0 CH 3 (OPWMB mode) and EMIOS 0 CH 4 (OPWMT mode). Each waveform was manipulated to demonstrate a capability (dead time insertion and phase shift) of the configured mode. The application also uses the eMios_Icu driver as ICU_MODE_SIGNAL_MEASUREMENT in SAIC (Single Action Input Capture) mode with interrupts and IPWM (Input Pulse Width Measurement) mode without interrupts to obtain the duty cycle of the captured signal. PWM signal generated by EMIOS 2 CH 8 (OPWMB mode) measured by EMIOS 1 CH 5 (SAIC mode) AND CH 6 (IPWM mode). * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Debugger: S32DS 3.5, OpenSDA * Target: internal_FLASH *******************************************************************************************************
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 ------------------------------------------------------------------------------ * Test HW: S32K3 T-BOX * MCU: S32K324 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ********************************************************************************  The purpose of this demo application is to present a usage of the  SPI-HAP of S32K3xx MCU to download firmware to SJA1110. SPI using Interrupt working code :-- S32K324_SPI_DMA_SJA1110_Load_firmware__Working__SPI__Interrupt.zip SPI using DMA working code :-- S32K324_SPI_DMA_SJA1110_Load_firmware__SPI_DMA_not_working.zip Firmware image of the SJA1110 is stored inside the S32K3 flash memory.. See the linker file of S32K3, we specify the location where the firmware image is present. This this firmware attached to be loaded to SJA1110, any one of the firmware can be selected and renamed to flash_image.bin  :-- 1>  flash_image.bin  --> Green LED blink on SJA1110 2> flash_image_RED.bin  --> Green LED blink on SJA1110 If you use your proprietary SJA1110 binary firmware, then this example to work, you have to change this MACO, in SJA1110_APP.h file  :-- You can get the size of the SJA1110 image from the MAP file of the attached project. Check for this __sja1110_BIN_SIZE, Symbol in MAP file :--   Switch connection to S32K3 SPI pins :--   LED connected to these pins of SJA1110, on T-BOX hardware :---  
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*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART0 for transmit & receive 20 packets with each packet of 21 bytes using the DMA in cyclic order. Baudrate : 921600  ------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the SPI Interrupt Lpspi_Ip_AsyncTransmit() method . MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Interrupt Triggered :-- Async callback triggered at the end of transfer/reception :-- Lpspi_Ip_AsyncTransmit(&MASTER_EXTERNAL_DEVICE, txBuffer, rxBuffer, numberOfBytes, lpspi_callback_int);      
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ADC Module clock is ideally the CORE clock :--   Prescaler In S32DS  is this MCR[ADCLKSEL]) :-- See below snippet from specs for calculation of ADC conversion clock  :-- ADC is controlled by one clock signal, the module clock. Internally, the conversion circuit is controlled by the conversion clock, which is derived from the module clock. You must configure the ADC conversion clock divider (MCR[ADCLKSEL]) so that the frequency of the conversion clock is within allowed limits.     S32K3 Datasheet, ADC MAX MIN clock limit :--  
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*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART0 for transmit 20 packets with each packet of 21 bytes using the Interrupt in cyclic order. Also when receiving UART packet generate Idle interrupt when variable length of data is received. I used coolterm tool to send the string of data. If Data send by cool term is less than 20 bytes which is set by API call Lpuart_Uart_Ip_AsyncReceive(), then Ideal interrupt is received RTD driver modified in RTD --> Lpuart_Uart_Ip.c. Baudrate : 921600  ------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Terminal Used :-- CoolTerm User can also use following terminal :-- Hercules uart terminal Idle Interrupt received :--    
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*******************************************************************************  The purpose of this demo application is to present a usage of the PIT timer to toggle LED.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH
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This post presents two complementary FlexCAN communication examples for the S32K3X4EVB-T172 evaluation board, showcasing both low-level IP layer and AUTOSAR MCAL layer implementations. These examples are basic routines for configuring the component in normal/user mode, as the RTD examples are configured for loopback mode. To test CAN communication, another board or a CAN analyzer must be used. Since Rev. B2 of S32K3X4EVB-T172 was used to test the project, TJA1043 transceiver is mounted on the board and used to test the examples. ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS 3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH ------------------------------------------------------------------------------ Example 1: FlexCAN IP Layer (LLD) This project demonstrates a basic FlexCAN setup using the IP-level driver. It configures a standard CAN message; with transmission through POLLING and reception using INTERRUPT. If TJA1153 transceiver is used, macro TJA1153 must be uncommented at the top of the project, and it will be initialized through a custom configuration sequence. If not used and the macro is commented, normal transceiver initialization is done (only CAN0_EN_PIN & CAN0_STB_PIN set to HIGH). Rx Filter mask type is individual and set to receive STD ID 123h.  Tx MB is set to STD ID 001h. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3    Example 2: FlexCAN MCAL Layer (HLD) This project configures both Can_43_FLEXCAN and CanIf modules for CAN communication. Transmission is done via POLLING, while reception is configured via INTERRUPT.  Tx MB is set to STD ID 123h. Acceptance mask is set to 0x0 (accept all IDs). CAN messages are sent using Can_43_FLEXCAN_Write() and received using the CanIf_RxIndication() callback. After CanIf_bRxFlag is set, an ACK message is sent back. The GREEN LED toggles every 10 received messages. FlexCAN bitrate was calculated with MPC5xxx/S32Kxx/LPCxxxx: CAN / CAN FD bit timing calculation. FlexCAN bitrate settings are 500kbps with 81.25% sample point  FPE_CLK: 24MHz Synch seg: 1 Prop seg: 4 Phase 1 seg: 8 Phase 2 seg: 3 Prescaler: 3 RJW: 3  If TJA1153 transceiver is used, macro TJA1153_EVB_TRCV must be used. If not, use TJA1043_EVB_TRCV for standard transceiver initialization (CAN0_STB & CAN0_EN pins set to HIGH).          These examples are provided as is with no guarantees and no support. These are basic routines meant to be used as reference only.
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*******************************************************************************  The purpose of this demo application is to present a usage of the EMIOS IP Driver for the S32K3xx MCU. This example uses the custom IRQ.  The example uses:-- EMIOS-1 - ch-0  --> PTC24 --> Generate the PWM EMIOS-1 - ch-1  --> PTC25 --> is the ICU channel to measure the duty           Result :--        ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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*******************************************************************************  The purpose of this demo application is to present a usage of the FEE MCAL Driver for the S32K3xx MCU. This example read & write 4 byte FEE BLock. I have renamed the FEE block using a MACRO as FOUR_BYTE_EEPROM_FEE_VARIABLE. The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x52_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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Customer may need more high performance via S32K3xx. How to optimization user's code?  As following have some suggestions:  1. Most of user code allocate to P-Flash and enable I-Cache 2. Allocate system stack to D-TCM and enable D-Cache 3. Execute code frequently allocate to I-TCM. E.g., ISRs etc. 4. OS' task stack allocate to D-TCM 5. vector table allocate to D-TCM Please note: 1. Due to enable D-Cache, other masters(E.g., DMA, HSE, another APP cores) access theses area of cacheable will be impact. So, theses area need to allocate to non-cacheable area. 2. If another master(E.g., DMA, HSE and another APP cores) access the D-TCM need to over back door. E.g., core1/DMA/HSE access core0' DTCM needed to over backdoor.  Information: S32K3' Coremark in RM, theses Coremark' value are from ARM. If used IAR/GHS etc and set compiler flag, then the Coremark value is very closely with RM. If used GCC, then the Coremark value will less than RM. BR Tomlin    
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