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*******************************************************************************  The purpose of this demo application is to present a usage of the FEE MCAL Driver for the S32K3xx MCU. This example read & write 4 byte FEE BLock. I have renamed the FEE block using a MACRO as FOUR_BYTE_EEPROM_FEE_VARIABLE. The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x52_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the ICU & PWM MCAL Driver for the S32K3xx MCU. This example uses the custom IRQ. The example uses:-- EMIOS-1 - ch-0  --> PTC24 --> Generate the PWM EMIOS-1 - ch-1  --> PTC25 --> is the ICU channel to measure the duty       Result :--      ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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Customer may need more high performance via S32K3xx. How to optimization user's code?  As following have some suggestions:  1. Most of user code allocate to P-Flash and enable I-Cache 2. Allocate system stack to D-TCM and enable D-Cache 3. Execute code frequently allocate to I-TCM. E.g., ISRs etc. 4. OS' task stack allocate to D-TCM 5. vector table allocate to D-TCM Please note: 1. Due to enable D-Cache, other masters(E.g., DMA, HSE, another APP cores) access theses area of cacheable will be impact. So, theses area need to allocate to non-cacheable area. 2. If another master(E.g., DMA, HSE and another APP cores) access the D-TCM need to over back door. E.g., core1/DMA/HSE access core0' DTCM needed to over backdoor.  Information: S32K3' Coremark in RM, theses Coremark' value are from ARM. If used IAR/GHS etc and set compiler flag, then the Coremark value is very closely with RM. If used GCC, then the Coremark value will less than RM. BR Tomlin    
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Symptoms   Diagnosis   Solution  
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*******************************************************************************  The purpose of this demo application is to present a usage of the  POWER & WKUP IP Driver for the S32K3xx MCU. In current example :-- SW-5 = PTB-26  -----> PRESS to enter the STANDBY mode. SW-6 = PTB-19 = WKUP[38] --> PRESS to exit the STANDBY mode. CAN-0-RX = PTA-6 = WKUP[15] --> send CAN message to exit the STANDBY mode The example uses PIT-0 timer, to generate the periodic interrupt. The example uses FLEXCAN-0 for transmit & receive using following Message buffer :-- #define RX_MB_IDX_0 10U #define RX_MB_IDX 11U #define TX_MB_IDX 12U BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K324 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** CAN BUS :--   Push Buttons :---         Wake-up source, SW-6 GPIO:--   Wake-up source, CAN-0-RX :-- According to the IOMUX table in RM, for example, PTA6 can be used as WKPU15 and CAN0_RX. It means that the WKPU15 input doesn't require specific MSCR configuration. So if its input buffer is enabled and the corresponding WKPU input channel is enabled/configured in the WKPU, it should be able to act as wake-up input.   Standby entry :--   STandby clock :--   Enter Standby mode :--   ********* If you use external BJT on your board to generate 1.5 volts *******************     I tested on Our T172 EVB, with NPN external Ballast transistor is selected to supply the V15_MCU domain. I am able to wake up from standby mode. If we select 2-3 in J31 then NPN external Ballast transistor is selected to supply the V15_MCU domain & wakeup is ok on T172 EVB You have to make following settings in code :--      
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******************************************************************************************************* * Detailed Description: These demos showcase how to use eMIOS in Input Capture mode with DMA, utilizing both low-level drivers (Ip) and high-level drivers (MCAL). They demonstrate how timestamp data from captured input signals is stored and how a GPIO toggle provides a simple visual confirmation that the interrupt is being triggered as expected. * Connections:  ******************************************************************************************************* * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Debugger: S32DS 3.6.2, OpenSDA * Target: internal_FLASH ******************************************************************************************************* * Important information:  eMIOS Pwm: Configures EMIOS 0 Channel 1 as OPWMB (Output Pulse Width Modulation Buffered). This channel generates a waveform that will be captured by Channel 9 eMIOS Icu with DMA: Configures EMIOS 0 Channel 9 in ICU_MODE_TIMESTAMP using SAIC (Single Action Input Capture) mode. This channel captures the timestamps of the waveform generated by Channel 1. After a predefined number of captures, a DMA interrupt is triggered. ******************************************************************************************************* Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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*******************************************************************************  The purpose of this demo application is to present a usage of the MEM_InFls MCAL Driver for the S32K3xx MCU.  The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x50_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Results :-- Ram location where FLASH writing erase code is placed :-- I placed the code at 256 byte below the MAX address of the RAM size 0x20417DAA = 541162922     Size of RAM need to save the flashing routine, as per the MAP & linker file :-- 0x00407e64 - 0x00407e38 = 44 bytes      S32K3 FLASH Memory Terminology :--    
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*******************************************************************************  The purpose of this demo application is to present a usage of the Bootloader Jump to Application.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K324 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Jump is decided based on the boot_header, size we use to jump to the RESET handler:--   Cortex M-7 Interrupt vector table, RESET handler is 4 byte offset from starting of vector table :--       How to burn elf file of both application & bootloader code :--   Bootloader Linker file used :--   Application Linker file used :-- This linker file has provision to distribute RAM to both the cores   Application & bootloader both commented this, as CORE-1 should be started in CORE-0 main() function if required  :--   System.c file this changed (as in RTD-3.0.0 bug in startup file because of which HARDfault occurs in startup process for S32K324) :--  
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 ------------------------------------------------------------------------------ * Test HW: S32K3 T-BOX * MCU: S32K324 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** S32K3 T-BOX : SJA1110 Firmware update using SPI HAP : S32DS-3.5 : RTD-3.0.0 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-T-BOX-SJA1110-Firmware-update-using-SPI-HAP-S32DS-3-5-RTD/ta-p/1939324
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*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART6 for transmit & receive five bytes using the Interrupt.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************         Putty output :--  
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Where can I get s32k14x data sheet or reference manual???
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******************************************************************************* The purpose of this demo application is to present a usage of the Hardfault handling using a script for the S32K3xx MCU. ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Change the attached script name from --> gdbinit.txt --> to --> .gdbinit This script applicable for CORTEX-M7 call stack view. Select the script at this location :-- Window --> Prefrences--> c/c++ --> Debug --> GDB Whenever the hardfault comes go to the Debugger console and enter word armex press enter. This will display the callstack at the time hardfault occur, and LR address contain the address where the HARDFAULT occur. Enter address in Disassembly window And press enter, this will take you to code location where the hardfault occur. Then you can review your code setting or code usage why this hardfault is coming.    
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Symptoms   Diagnosis   Solution  
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*******************************************************************************  The purpose of this demo application is to present a usage of   configure TRGMUX to select triggers for staring Normal/Injected chain conversion. Select PIT0_Ch0 as the hardware trigger source of ADC1_Ch34 & Ch48 via TRGMUX and two LEDs to show the trigger Sequence. ADC1_Ch34 is connected to board's potentiometer,Ch38 is bandgap channel.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q257 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: OpenSDA * Target: internal_FLASH ********************************************************************************
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 ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** S32K324 SPI Transmit & Receive, using Interrupt :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K324-I2C-Transmit-amp-Receive-Using-DMA-DS3-5-RTD300/ta-p/1818631 Example S32K324 Bootloader to Application Jump DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K324-Bootloader-to-Application-Jump-DS3-5-RTD300/ta-p/1832649 Example S32K324 STANDBY wake up using GPIO Switch DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K324-STANDBY-wake-up-using-GPIO-Switch-DS3-5-RTD300/ta-p/1892849 Example S32K324 STANDBY wake up using CAN-0-RX and GPIO Switch DS3.5 RTD300 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K324-STANDBY-wake-up-using-CAN-0-RX-and-GPIO-Switch/ta-p/1911972
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This simple example demonstrates how to configure and handle UART interrupts using the LPUART module on both S32K312EVB-Q172 & S32K312MINI-EVB. It sets up a UART callback function and initiates reception in single-byte mode. After each byte is received, the buffer is updated using  Lpuart_Uart_Ip_SetRxBuffer() , unless a newline character ( '\n' ) is detected, in which case a reception flag is set to signal the main loop. When the  LPUART_UART_IP_EVENT_END_TRANSFER  event occurs, reception is re-enabled using  Lpuart_Uart_Ip_AsyncReceive() . Note: Only basic event handling is implemented; other UART events are acknowledged but not processed. The example uses LPUART instance 6, enabling serial communication via the USB port (J40 on EVB & J9 on MINI EVB).  ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 & S32K312MINI-EVB  * MCU: S32K312 * IDE: S32DS3.6.2 * RTD release: 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ Running the example: 1. Open a Serial terminal on PC for the serial device with these settings:   115200 baud rate   No parity   One stop bit  No flow control   If using TeraTerm, ensure the transmit setting is configured to LF (Line Feed) to properly send newline characters when pressing Enter. 2. Build and run the example. Test result:   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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*******************************************************************************  The purpose of this demo application is to present a usage of the Siul2_Icu IP Driver for the S32K3xx MCU.  The example uses EIRQ-13 on PTB23 for interrupt..  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        
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Example of usage of AIPS-lite, Protects the access to GPIO port. This example can be used with UART terminal, 115200 bps. The interface menu shows like this: AIPS example has started Please press 0 + enter to set red LED in GPIO port Please press 1 + enter to set red LED in GPIO port Please press 2: GPIO peripheral will only accept accesses from trusted master, M0 (Core) is set as untrusted when a write access, AIPS cannot longer be modified from core and a reset will occur in the next GPIO access Please press 3: GPIO access is write protected, any write access to GPIO will produce a hard fault
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Hi,     If you try to compile the sample project within S32K14X_MCAL4_2_RTM_1_0_0, you should take care of the command if you use Linaro.    After you set the environment of compiling and run the command under command window, you should enter     "launch.bat MODE=USER TOOLCHAIN=linaro"    NOT    "launch.bat MODE=USER TOOLCHAIN=LINARO"      The command is case sensitivity.   Hope you can compile the project successfully.  Cheers! Oliver
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*******************************************************************************  The purpose of this demo application is to present a usage of the  POWER & WKUP IP Driver for the S32K3xx MCU. In current example :-- SW-6 = PTB-19 -----> PRESS to enter the STANDBY mode. SW-5 = PTB-26 = WKUP[41] --> PRESS to exit the STANDBY mode. RTC --> Wakeup source-1 The example uses PIT-0 timer, to generate the periodic interrupt. T ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************   Make following settings, SIRC enabled in Standby mode :--    
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