*******************************************************************************  The purpose of this demo application is to present a usage of the  FlexCAN IP Driver for the S32K3xx MCU.  The example uses FLEXCAN-0 for transmit & receive Tusing following Message buffer :-- #define RX_MB_IDX 1U #define TX_MB_IDX 0U. BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    

*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART6 for transmit & receive five bytes using the DMA.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    

*******************************************************************************  The purpose of this demo application is to present a usage of the Siul2_Icu IP Driver for the S32K3xx MCU.  The example uses EIRQ-13 on PTB23 for interrupt..  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        

Customer may need more high performance via S32K3xx. How to optimization user's code?  As following have some suggestions:  1. Most of user code allocate to P-Flash and enable I-Cache 2. Allocate system stack to D-TCM and enable D-Cache 3. Execute code frequently allocate to I-TCM. E.g., ISRs etc. 4. OS' task stack allocate to D-TCM 5. vector table allocate to D-TCM Please note: 1. Due to enable D-Cache, other masters(E.g., DMA, HSE, another APP cores) access theses area of cacheable will be impact. So, theses area need to allocate to non-cacheable area. 2. If another master(E.g., DMA, HSE and another APP cores) access the D-TCM need to over back door. E.g., core1/DMA/HSE access core0' DTCM needed to over backdoor.  Information: S32K3' Coremark in RM, theses Coremark' value are from ARM. If used IAR/GHS etc and set compiler flag, then the Coremark value is very closely with RM. If used GCC, then the Coremark value will less than RM. BR Tomlin    

*******************************************************************************  The purpose of this demo application is to present a usage of   configure TRGMUX to select triggers for staring Normal/Injected chain conversion. Select PIT0_Ch0 as the hardware trigger source of ADC1_Ch34 & Ch48 via TRGMUX and two LEDs to show the trigger Sequence. ADC1_Ch34 is connected to board's potentiometer,Ch38 is bandgap channel.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q257 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: OpenSDA * Target: internal_FLASH ********************************************************************************

*************************************************************************************************************** Detailed Description: Example shows implementation of Analog Comparator ‘45.7.5 Windowed mode (#s 5A & 5B)’ of S32K1XXRM using S32 SDK API. The Comparator is configured to compare analog input 0(AIN0) with half the reference voltage generated with the internal DAC. PDB is used to generate pulse output which is used as sampling windows of CMP block via TRGMUX. PDB period is 5ms, the first 2.5ms WINDOW=1 and the next 2.5ms WINDOW=0. Pdb0PulseOut not only be TRGMUX to Cmp0Sample but also to TrgmuxOut0, so that we are able to observe WINDOW at TRGMUX_OUT0(PTA1) pin. Based on the input from CMP0_IN0 (1kHz external triangle wave) the LEDs light by the following rules: 1) Vin < DAC voltage : RED on, GREEN off 2) Vin > DAC voltage : RED off, GREEN on 3) Unknown state : RED on, GREEN on EVB connection: Signal Function pin S32K144EVB-Q100 WINDOW TRGMUX_OUT0 PTA1 J5.5 2.5ms WINDOW=1 and 2.5ms WINDOW=0 Plus input CMP0_IN0 PTA0 J5.7 Need to connect external 1khz triangle wave COUTA CMP0_OUT PTE3 J1.16 square wave PTC1 PTC1 J5.13 If there is no external triangle wave, a square wave(PTC1) is generated and output to CMP0 (PTA1) * * ------------------------------------------------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144UAVLL 0N47T * Target: Debug_FLASH * Compiler: S32DS3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: PEMicro OpenSDA * ------------------------------------------------------------------------------------------------------------------------ Revision History: Ver   Date              Author            Description of Changes 1.0   Nov-9-2023   Robin Shen    Initial version, based on cmp_dac_s32k144 and pdb_periodic_interrupt_s32k144 ***************************************************************************************************************

*******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR and BCTU IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger BCTU conversion list to  perform parallel conversions on ADC0/ADC1. Three ADC channels  are selected to be converted on each ADC:  ADC0: S8 , P0, S8  ADC1: S10, S13, S17  Converted results from BCTU FIFO are moved by DMA into result array.  ADC channel S10 is connected to board's potentiometer, and converted value is  used to dim board's LED.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: Lauterbach * Target: internal_FLASH ********************************************************************************

******************************************************************************** * Detailed Description: * The example adds DTCM_1 backdoor access for CM7_0. * int_dtcm_1_bd memory region and section dtcm1_bd_data added to the linker file. * DTCM1 ECC initialized in startup_cm7.s * MPU on DTMC1 enabled in system.c * Global variables decleared with __attribute__ ((section(".dtcm1_bd_data"))) in main.c * ------------------------------------------------------------------------------ * Test HW: S32K314EVB-Q172 * MCU: S32K314 * Debugger: S32DS_ARM_3.4 * Target: internal_FLASH ********************************************************************************

Hi all,   Many customers complained about the K3 FlexIO I2S can not support continuous transferring because there is a gap time between 2 times of invoking SendData. This gap time will break the audio continuity and bring jitters. It is gapped by the transfer API closing and re-entry time cost.   To avoid this gap and implement a real continuous transferring, we made some changes with eDMA configurations. Finally, it works!   Besides, we also enabled eDMA half-complete interrupt to support double-buffer (ping-pong buffer) operation for user's further development.   Attachments are the example projects and corresponding introduction slides, please kindly check if you are interested in. Any problem, just let me know. Welcome your comments here.   Best Regards, Shuailin Li NXP GPIS, AE

******************************************************************************** * Detailed Description: * The purpose of this example is show how to keep data in SRAM memory over SW * reset. SW reset is triggered by pressing the SW3 button on the S32K118EVB. * Reset is delayed for 514 LPO cycles. In the RCM interrupt, SRAMU_RETEN is * cleared allowing to retain SRAM data during the reset. After SW reset, * SRAMU_RETEN is set to allow accesses to SRAM. * File startup_S32K116.S in modified to skip ECC RAM initialization for SW reset * source. To check whether stored data stayed unmodified in the SRAM, specified * address is read and the LED lights up. * ------------------------------------------------------------------------------ * Test HW: S32K118EVB-Q064 * MCU: S32K118 LAMLH 0N97V QTZE1802B * Fsys: fsys = 48MHz * Debugger: Lauterbach Trace32 * Target: Debug * Terminal: 19200-8-no parity-1 stop bit-no flow control * EVB connection: default ******************************************************************************** Revision History: Ver Date Author Description of Changes 0.0 May-17-2023 David Tosenovjan Initial version *******************************************************************************/

What is “Flash Driver” (The following content is taken from Klaus Emmert->“FLASH Bootloader User Manual Version 2.7”) “The Flash Driver(actual flash algorithm) is the hardware dependent code for performing the flash functions.In most cases, programming flash memory from flash is not possible.Therefore the Flash Driver is downloaded and executed into RAM to allow programming of the application.The advantage of downloading the flash algorithm into RAM is that updates to the flash algorithms are possible without the need to reprogram the primary bootloader. The algorithm is cleared from RAM upon completion of the download to avoid accidental calls to the flash functions while in application. In special cases the flash algorithms are kept in flash memory and copied to RAM when needed. Of course the possibility of changing the flash algorithms is no longer available when this configuration is used. Moreover, there is a risk that the flash memory will be unintentionally erased from an accidental call to these functions. A remedy to correct this would be to encrypt the corresponding program code, such as e.g an XOR or the like.”   Regarding the demos -The software is using “S32 Design Studio for S32 Platform V3.4” and the SDK is “RTM 4.0.3” - Hardware based on S32K142-EVB -two demo provided, one for making “flash driver”, another is for testing the flash driver image     ·“Flash_Driver_Source_Project”  this routine used for making flash driver image.     ·“Flash_Driver_Source_Project_Test” this routine used for testing flash driver image.   ·Flash driver image making process 1.Create a new project and add the flash component       Refer to the demo provided and modified main.c file. Note 1 define function index table in main.c 2.Modify the link file Note 2 modified S32K142_32_flash.ld file   Note 3 modified S32K142_32_flash.ld file 3.Add “attribute” commands for the functions necessary to operate flash   Note 4 add "attribute" to function,like this         If another function is referenced in a function, then we also need to add “attribute” to the referenced function. 4.Compile the project and check the xx.map file to confirm whether the allocated address space is correct.   Note 5 check Flash_Driver_Source_Project.map 5.Make flash driver   Note 6 create flash image   Note 7 choose image format   Note 8 make flash driver image       New a “xx.s19” file and then copy the data which range of 0x1fffe000~0x1ffffffff into this file   Note 9 change link order if necessary       If some functions are distributed in different files, the function address allocated can be changed by changing the link order.   The process of testing the flash driver image 1.Create a new project without adding flash component.       You still need to create a new project, but you don’t need to add the Flash component to it. 2.Modify the link file as before. 3.Refer to the provided demo and modify main.c file. 4.Compile the project, check the .map file, and confirm whether the address space of the allocated array location is correct   Note 10 make sure Function_TABLE already put on the right place 5.Enter debug section, import the prepared flash driver image.   Note 12 import flash driver image before operate flash module 6.Test whether the flash driver can work normally.   Note 13 check the test result So far, we know how to make a flash driver image and how to test the flash driver image. This method is not limited to making functions related to flash operations, and other functions can also be used in this way, but there are few applications with such application scenarios.

******************************************************************************** * Detailed Description: * Example is based on Siul2_Port_Ip_Example_S32K344 and its purpose it to show * how to integrate ITCM and DTCM memories to the project. * * Modification has been done in following files: * - main.c * - startup_cm7.s * - linker_flash_s32k344.ld * * In the main function, function is placed to ITCM memory and executed. Also * data field in placed to DCTM and accessed. * ******************************************************************************** * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.4 * SDK release: PlatformSDK_S32K3_3_0_0 * Debugger: Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date Author Description of Changes 0.1 Apr-04-2019 David Tosenovjan Initial version *******************************************************************************/

/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 7 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 3 channels, ADC1 4 channels. PDBs are set to back-to-back mode to perform chain conversion as shown in RM's Figure 46-3. PDB back-to-back chain forming PDB0-PDB1 ring. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 ch5 External input channel 28 is selected, as it is connected to potentiometer on the EVB. PDB0 is triggered by LPIT ch0 at 500ms rate. Two DMA channels are configured to read result registers from both ADCs. * ------------------------------------------------------------------------------ * Test HW: S32K148EVB-Q144 * MCU: FS32K144UAVLQ 0N20V * Target: Debug_FLASH * EVB connection: UART terminal 115200, 8N1 * Compiler: S32DS.ARM.3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: S32DS ******************************************************************************** Revision History: Ver Date Author Description of Changes 1.0 Feb-21-2023 Petr Stancik Initial version, based on adc_hwtrigger_s32k148 *******************************************************************************/

 

/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 7 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 3 channels, ADC1 4 channels. PDBs are set to back-to-back mode to perform chain conversion as shown in RM's Figure 46-3. PDB back-to-back chain forming PDB0-PDB1 ring. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 ch5 External input channel 28 is selected, as it is connected to potentiometer on the EVB. PDB0 is triggered by LPIT ch0 at 500ms rate. * ------------------------------------------------------------------------------ * Test HW: S32K148EVB-Q144 * MCU: FS32K144UAVLQ 0N20V * Target: Debug_FLASH * EVB connection: UART terminal 115200, 8N1 * Compiler: S32DS.ARM.3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: S32DS ******************************************************************************** Revision History: Ver Date Author Description of Changes 1.0 Jan-26-2023 Petr Stancik Initial version, based on adc_hwtrigger_s32k148 *******************************************************************************/

************************************************************************************************ * Detailed Description: * The example shows how to skip an instruction * that causes uncorrectable ECC fault exception during C40_Ip_Read(). * ----------------------------------------------------------------------------------------------- * Test HW: S32312EVB-Q172 * MCU: S32K312 * Debugger: S32DS 3.4, PEMicro Multilink * Target: internal_FLASH *************************************************************************************************

Attachment is the UDS bootloader solution of S12Z, S32K1xx and S32K3xx. The package include projects and user guide. All projects are verified over ECU BUS(0.2.22). Unified bootloader V2.1 Vs V2 1. Integrated S32K312, S32K314, S32K324, S32K344 PC tool(https://github.com/frankie-zeng/ECUBus😞 1. ECU BUS 2. Add CAN FD support 3. Easy of use 4. The tool only support PEAK Disclaimer: 1. All projects/source code are demo code          

******************************************************************************* * * The purpose of this demo application is to present a usage of the ADC_SAR and * BCTU IP Driver for the S32K3xx MCU. * * The example uses the PIT0 trigger to trigger BCTU conversion list. Five standard * ADC channels are selected to be converted. * Converted result from BCTU data register are moved by DMA into result array. * This result array should be placed into no cacheable area if data cache is enabled. * * ADC channel S10 is connected to board's potentiometer, and converted value is * used to dim board's LED. * * * ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.4 * SDK release: RTD 1.0.0 * Debugger: Lauterbach * Target: internal_FLASH ********************************************************************************

******************************************************************************** The purpose of this demo application is to show you the usage of the FlexCAN module configured to use CAN FD and Enhance RXFIFO using the S32 RTD API. - This demo application requires two boards, or single board connected with CAN tool. - CAN FD is enabled with bitrate 500/2000 kbps - MB0 is configured to transmit either std. or ext ID - MB1 is configured to receive ext ID 0xFACE and MB2 to receive std ID 0x1 - Enhanced RXFIFO is enabled and 3 enhanced RXFIFO filter elements (filter + mask scheme) are defined ext ID 0xABCD with mask 0x1FFFFFFF std ID 0x123 with mask 0x7FF std ID 0x456 with mask 0x7FF - Callback function is used as well to handle TX and RX process in MBs and Enhanced RXFIFO - setupCanXCVR function can be called if TJA1153 is used on the board. It expects transceiver in Vanilla state and set TPL to pass all std and ext ID and do not block any message comming from bus. Finally leaving configuration mode without writing to non-volatile memory nor locking the transceiver. * * ------------------------------------------------------------------------------ * Test HW: S32K3444EVB-Q172 * MCU: PS32K344EHVPBS 1P55A * Compiler: S32DS.ARM.3.4 * SDK release: SW32K3_RTD_4_4_2_0_0_D2203 * Debugger: Lauterbach * Target: internal_FLASH * ********************************************************************************

       This routine implements all four different mask setting methods.Users can refer to these routines to implement some application scenarios.Please note that this routine is for reference only.When posting this routine, I only did some limited tests, and I don't make sure that there are no problems. If you find it, please leave a message and I will revise it in time.       When the program was flashed into the S32K142EVB, the Blue Led will toggles every 500ms, this Led shows that the program is running on well condictions. If a message was received by S32K142EVB from external CAN bus, the Green Led will toggle,at the same time, the S32K142EVB will sent a message to CAN Bus which have the same data with the message received,and the ID is 0x02.At the last,the Red Led will toggle when a CAN error is occurd.   1.FlexCAN Mask Setting Overview          S32K1XX FlexCAN support  Frame mask function ,as you can see the FlexCAN mask can be set to Global Mask or Individual Mask,and user can choose to use FIFO or MB to receive message,but only MB can be used for sending messages.and one more thing you should be care is that the FIFO can not be used for CAN FD,this is because the FIFO data filed only support 8 bit datafiled.           If you use MB14 or MB15, have to set the mask of these tow MBs separately，and you can take a look at the two functions in the below. ->FLEXCAN_DRV_SetRxMb14Mask();  ->FLEXCAN_DRV_SetRxMb15Mask();   2.Hardware Needs. 1.S32k142EVB,(or own made board which can support CAN communications.) 2.CAN TOOL's which used for send or receive messages from CAN Bus on your computer.   If you don't have such tools ,you can use another board which can replace the CAN tools to send or receive CAN messages. 3.S32K142EVB should be powered by external 12V DC, and don't forget to connect the J107 to 1-2.   3.Software Needs. 1.This demo build on S32 Design Studio for ARM V2.2  2.The SDK version is SDK_S32K1XX_15   4.FlexCAN_RX_MB_Mask_Setting 4.1.Set the Mask Type to Global Mask Type.      In this case, we can only receive the messages which ID from 0x300~0x37F and 0x400~0x47F.      If you try to sent the messages with other ID's, the S32K142EVB will not have any reponse!  4.2.Set the Mask Type to Individual Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x400~0x47F. 5.FlexCAN_RX_FIFO_Mask_Setting 5.1.Set the Mask Type to Global Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x10~0x17, 0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87. 5.2.Set the Mask Type to Individual Mask Type.      In this routine, we can only receive frames with IDs in the range of 0x10~0x17,0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87.   End       If you need to use CAN FD, please note that FIFO cannot be used. Regarding FIFO, it has three filtering formats, you can refer to the following chapters in the data sheet for details. S32K-RM Rev 13. Chapter:55.4.2.15 Rx FIFO Global Mask register (RXFGMASK) Chapter:55.4.6 Rx FIFO structure