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  EV/HEV is the mega trend and NXP focused area. E-Compressor controller is a key and additional component of EV/HEV vs. traditional vehicle. While S32K14x is the perfect product for mainstream E-compressor application. To accelerate customer develop period in automotive E-compressor application, we develop the S32K142-ECC RDB. Actually, S32K142-ECC is not only suitable for E-compressor, but also can be used in other high voltage PMSM/BLDC application in automotive industry. This RDB (Reference Design Board) hardware is based on NXP S32K142 high-performance automotive-grade MCU and UJA1075A SBC (system basic chip) provides the following features: ◼ Support high voltage up to 400V and power range up to 3.7kW BLDC/PMSM applications. ◼ Support high voltage isolated 12V power supply, which for SBC, IPM and MCU power supply. ◼ Hardware support 3 types of current sampling solutions: single shunt, dual shunts and triple shunts; software support dual shunts in V1.0. ◼ Support multiple diagnose and protection covering UV, OV, OT, OC, Short, Stall Detection, etc.; ◼ Support speed/control commands from CAN/LIN/FreeMASTER; ◼ Support external watch dog for safety. the RDB hardware system block diagram is as below: The software package of S32K142-ECC RDB is available to enable user to evaluate the S32K142 based high voltage e-compressor motor control performance with out-of-box and build their own e-compressor motor control product prototype as a general high voltage motor control hardware platform. The software package has the following features: ◼ Support e-compressor control by FreeMASTER CAN/UART; ◼ Support e-compressor speed control and state feedback by CAN DBC file; ◼ Implemented advanced motor control algorithm, including low speed torque compensation, MTPA, 2-stage current alignment and enhanced ATO to make sure the motor robust start up and high efficiency; ◼ Support rich motor control diagnostic and protection: OV, UV, OC, OT, stall and phase loss and so on; ◼ Provide S32DS IDE and IAR for ARM IDE projects, support U-Multilink and J-LINK debugger; We have several S32K142-ECC RDB in stock, if you have the project and need the RDB for evaluation, please contact your local NXP or NXP dist FAE, Sales and Marketing. For technique support, contact raymond.tang@nxp.com  thanks, Best regards, Raymond
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******************************************************************************** * Detailed Description: * * This example shows how to use the back-to-back mode of the PDB to trigger * sequence of ADC channels conversion. 4 PDB channel 0 pre-triggers/triggers are * generated upon single PDB SW trigger. The first trigger is started by the PDB, * no delay is used. Next 3 triggers start after corresponding acknowledgment is * received from ADC0. * * Converted data is used to change color of the EVB led based on Trimmer position. * * ------------------------------------------------------------------------------ * Test HW:         FRDM-S32K144 * MCU:             PS32K144HFVLL 0N77P * Fsys:            default * Debugger:        S32DS * Target:          internal_FLASH * ********************************************************************************
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Hi,    Firstly, you should get the flash block size of your S32K3xx. Table in RM could be the reference.    Secondly, you should know that there are super sector and sector in S32K3xx.   Sector                    Subdivision of the Flash Block that is independently erasable. Sector Size is always 8 KB. Super sector          Subdivision of the flash block that includes a group of sectors. Super Sector Size is always 64 KB, and consists of 8 sectors.    Thirdly, based on the information of PFCBLKx_SSPELOCK in RM, you can calculate the numbers of super sector and sector in each flash block.   For example in S32K312, it has 2MB flash totally and each block is 1MB. So, in each 1MB, its first 768KB is with super sector granularity. The numbers of super sector is 768/64=12; the followed sector number is 256/8=32. Cheers! Oliver
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Some customers inquire about the FreeMASTER JumpStart Project mentioned in the Get Started with the S32K1xxEVB. So here to talk about the problems you may encounter and how to solve them. Where to download FreeMASTER JumpStart Project Customers may not find where to download FreeMASTER JumpStart Project at the moment. It should be downloaded from the Embedded Software under Design Resources of the development board. But the download link of S32K142EVB \ S32K144EVB \ S32K146EVB is missing. We can search the keywords “* JumpStart” at www.nxp.com download embedded application software and PC host application software that you need. Which version of S32 Design Studio should be used The readme file will tell us which version of S32 Design Studio the project was created. For example: the readme in the S32K144_EVB_JumpStart_Firmware package shows that the project for S32K14x EVB JumpStart SW was created in S32 Design Studio for ARM v2.0. Which version of SDK should be used You may get the Validation of S32K144_EVB_JumpStart_Firmware Kinetis SDK project when import the project : The project S32K144_EVB_JumpStart_Firmware was created for Kinetis SDK SDK_S32K14x_08 which is not installed in this product (repository SDK_S32K14x_08 not found).  The chapter Version Tracking of S32SDK_for_S32K1xx_RTM_3.0.3_ReleaseNotes shows that the SDK_S32K14x_08 means EAR 0.8.5. By default only S32 SDK EAR 0.8.4 is installed in S32DS for ARM 2.0, so we need to update the S32 Design Studio for Arm® v2.0 Update 2 – S32 SDK 0.8.5 EAR & MQX by refer S32 Design Studio for Arm v2.0 - Update 2 available Incorrect UART baud rate setting The baud rate selected for LPUART in Processor Expert is 600 by default, which does not match the description in the readme file. 600 is not in the FreeMASTER serial port baud rate support list, so let us reconfigure the baud rate to 115200 and then click Generate Processor Expert Code. When connect S32K144EVB with FreeMASTER by UART, you can see that the Baud rate 300 is not in the support list. This is the reason why using the default configuration of S32K144_EVB_JumpStart_Firmware is not able to connect with FreeMASTER.       
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******************************************************************************** * Detailed Description: * * FlexIO module is configured for UART RX and TX function. * Timer 0 and Shifter 0 is used for UART TX function. * Timer 1 and Shifter 1 is used for UART RX function. * Timer 2 is used for idle detection. * Baud rate = 115200 * HW connection: PTA0 - TX, PTA1 - RX, PTA7 is used to signalize idle detection. * Connect PTA0 and PTA1 to create external loopback for this test. * ------------------------------------------------------------------------------ * Test HW: S32K144EVB * MCU: FS32K144HAMLL 0N57U * Fsys: 80MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH ********************************************************************************
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Some customers inquire how to use FreeMASTER with S32K3. But there is no exists example projects which demonstrate usage of the FreeMASTER serial communication driver in S32K3 Real Time Drivers at the moment. So this article will introduce how to use FreeMaster SDKs in S32K3 RTD 0.9.0. Download S32DS \ S32K3 Development Package \ RTD (SDK) \ FreeMASTER Driver Login your account on NXP website, and download the S32K3 Standard software from TOOLS &SOFTWARE of S32K3 webpage. If you have already installed the S32DS3.4 \ S32K3 Development Package 3.4.0 \ RTD 0.9.0, then you can skip the following part and start directly from 4.Install FreeMASTER Driver 3.0 for S32K3 Install S32K3 Development Package 3.4.0 After install the S32 Design Studio v3.4, we should install S32K3 Development Package 3.4.0(SW32K3_S32DS_3.4.0_D2012.zip): go to menu "Help" -> "Install New Software" and click on "Add..." button Here we uncheck S32 Design Studio S32K3 SDK (RTD S32K3 0.8.1), because we will install the newer version S32K3 RTD 0.9.0 later. Install S32K3 Real Time Drivers Version 0.9.0 S32K3 Real Time Drivers Version 0.9.0 can be installed by refer the Offline Package Installation Setup of S32DS Extensions & Updates: Explanation and How To Use. Install FreeMASTER Driver 3.0 for S32K3 Attach FreeMASTER_S32K3 to S32K344_UART_Printf_Sample_090_34 The reason for choosing the S32K344_UART_Printf_Sample_090_34 project to demonstrate the combination of FreeMaster SDKs is that the project has already configured the LPUART of the S32K3X4EVB-Q257 development board. Select LPUART peripheral as host communication Through the description in the Requirements and Release Description chapter of FreeMASTER Driver Release Notes(FMSTRS32K3RN), we can see that currently only UART interface is supported. The S32K3 FreeMASTER 3.0 version 1.0.0 only support NXP GCC 6.3 or 9.2 for ARM at the moment, but the latest S32K3 Real Time Drivers Version 1.0.0 is based on NXP GCC 10.2.0. This is the reason why RTD 0.9.0 is selected in this article.  The README.txt also shows that: Current package provides FreeMASTER Communication Driver support for S32K344 over LPUART module   LPUART13 is selected in this project for S32K3X4EVB-Q257, so we need to define the base address for FreeMASTER: #define FMSTR_LPUART_BASE           0x404A0000 Modify the main function according to the README.txt: Connect FreeMASTER3.1 to S32K3X4EVB-Q257 board Here we can see that the FreeMASTER3.1 is connected to S32K3X4EVB-Q257 board.  
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*All of the source code placed is for example use only. Document listed is only for your information only. NXP does not accept liability for use of this code or document in the user’s application. Map: https://bra.in/3vGE9q Resource: My Brain (thebrain.com) Links Community relative for S32K S32K S32DS: S32 Design Studio S32K SDK: S32 SDK S32K Safety: SafeAssure NDA Model-based Design: NXP Model-Based Design Tools Documentation Reference Manual Rev12.1 Data Sheet Rev12 Hardware Design Guide: AN5426, Hardware Design Guidelines for S32K1xx Microcontrollers  (REV 4)  Errata Application Note Tool & Software Design & Solution  S32DS IDE for ARM S32k1: S32 Design Studio IDE for Arm® based MCUs | NXP   S32SDK for ARM S32K1: Automotive S32 SDK for Arm® devices | NXP  Embedded Software Unified Bootloader Framework Unified bootloader stack based on UDS and CAN/LIN TP protocol. AUTOSAR MCAL Tips/FAQ  Safety Process to apply access to Safety Docs and Support: Functional Safety documents AVAILABLE | Require access to the SafeAssure NDA group S32K Safety Enablement: https://community.nxp.com/t5/S32K/S32K-safety-documents-and-demo-code-with-SDK/m-p/1156735#M8231 Hard Fault Fault handling on S32K144  AN12522, S32K1xx ECC Error Handling – Application note  (REV 0) S32K1xx系列MCU的常见内核异常(Fault Exception)及处理详解(以S32K144为例介绍) [FAQ] AUTOSAR MCAL   Where can I find compiler and compiler option info for specific MCAL package? Can I use different compiler version or compiler options for specific MCAL package? Where can I download MCAL package? How to get latest MCAL HF version from your NXP website account if you have already registered and applied MCAL SW package. What does HF(Hot Fix) mean? Can we use it for production? How to calculate current (power consumption) of S32K? S32K Power Estimation Tool (PET) released Enwei Hu 公众号 "汽车电子expert成长之路"原创: 历史文章分类列表目录(点击文章标题直接跳转,截止2020年4月20日)  1. 汽车电子ECU bootloader开发系列 汽车电子ECU bootloader开发要点详解 汽车电子ECU bootloader开发之S32K1xx系列MCU NVM驱动独立安全bootloader开发详解 S32K1xx ECU bootloader开发之RAM NVM驱动(S19文件)生成与集成调用和测试详解 汽车电子ECU bootloader开发之S32K144的CAN bootloader开发详解(工程源代码开源供大家参考) 汽车电子ECU bootloader开发开发之S32K1xx系列MCU bootloader开发要点详解 汽车电子ECU BootLoader开发之基于CAN总线通信的MPC574xP系列MCU bootloader开发详解 汽车电子ECU BootLoader开发之基于CAN总线通信的S12(X) 系列MCU独立NVM驱动安全bootloader  浅谈嵌入式软件开发之Qorivva MPC57xx和S32R系列多核MCU启动配置与bootloader开发要点详解 Qorivva MPC56xx系列MCU启动过程全解析(基于CW IDE应用工程--EAB I、链接文件、启动文件和map文件) 浅谈嵌入式MCU软件开发之startup过程详解(从复位向量到main函数之前的准备工作) 浅谈嵌入式MCU软件开发之S32K1xx系列MCU启动过程及重映射代码到RAM中运行方法详解 CodeWarrior IDE使用Tips之利用prm链接文件实现储存器数据填充和代码编译结果CRC校验和自动生成详解 汽车电子ECU BootLoader开发系列相关文章链接与资源汇总; 2. 浅谈嵌入式MCU软硬件开发系列 浅谈嵌入式MCU开发中的三个常见误区 浅谈嵌入式 MCU 软件开发之应用工程的堆与栈 浅谈嵌入式MCU软件开发之中断优先级与中断嵌套 浅谈嵌入式MCU软件开发之代码风格与代码优化 深入浅出谈嵌入式MCU 内核之ARM Cortex-M系列CPU内核功能特性概述与对比(强烈推荐!!!) 浅谈嵌入式MCU软件开发之内存分配详解--链接文件与map文件中段的分配使用和使用注意事项 浅谈嵌入式MCU硬件设计之MCU最小系统电路 浅谈嵌入式MCU软件开发之startup过程详解(从复位向量到main函数之前的准备工作) 浅谈嵌入式MCU软件开发之S32K1xx系列MCU启动过程及重映射代码到RAM中运行方法详解 浅谈嵌入式MCU软件开发之S32K1xx系列MCU CPU内核性能优化方法详解 浅谈嵌入式软件开发之Qorivva MPC57xx和S32R系列多核MCU启动配置与bootloader开发要点详解 浅谈嵌入式系统软件开发之S32K1xx系列MCU的MPU配置与使用详解 浅谈嵌入式软件开发之MagniV S12Z系列MCU内核Machine Exception异常原理与恢复 浅谈嵌入式软件开发之重定向标准输入输出设备使用printf()函数格式化输出调试信息(基于S32DS IDE和MPC5744P) 浅谈嵌入式MCU软件开发之startup过程详解(在CodeWarrior 5.1 中实现RAM自定义初始化) 嵌入式软件开发之S12(X)系列MCU的far和near函数指针调用详解(S12G128 CW 5.x Project) 浅谈嵌入式MCU软件开发之S12(X)系列MCU 中断ISR在CodeWarrior 5.1 IDE 中的三种写法 浅谈嵌入式软件开发之Qorivva MPC56/57xx系列MCU的Power e200内核寄存器功能和内核调试技巧介绍 嵌入式软件开发之调试器(Debugger)使用--PEMicro Multilink功能介绍与使用FAQ 浅谈嵌入式MCU软件开发之MCU芯片内部Bandgap参考电压(带隙基准)和集成温度传感器的工作原理和使用详解 浅谈嵌入式MCU软件开发之条件断点的设置与使用详解(以S32DS IDE + U-Multink debugger为例介绍) 浅谈嵌入式软件开发之使用Srecord工具实现S19文件数据填充和CRC校验和自动计算与存储方法详解 浅谈嵌入式MCU软件开发之使用makefile脚本编译和调试NXP S32 SDK应用工程详解 3. 外设使用Tips系列 S32K1xx系列MCU使用Tips之SDK软件架构和使用详解 S12(X)系列MCU的片上存储器资源与分页访问机制详解(一) S12(X)系列MCU的片上存储器资源与分页访问机制详解(二) S12(X)系列MCU的加密(Secure)原理和解密(Unsecure)方法 Qorivva MPC56xx系列MCU的Flash加密解密原理与工程实现方法详解 使用 Cyclone 离线编程器对 S12(X)和 MagniV S12Z 系列 MCU 片上 NVM 编程  S32K1xx系列MCU使用Tips--功能介绍及软件开发和硬件设计FAQ  S32K1xx系列MCU使用Tips--Flash加密后不断复位无法连接调试器的问题解决 S32K14x系列MCU使用Tips之硬件FPU特性介绍和使用详解 外设使用Tips之Qorivva MPC56xx_57xx系列MCU内核异常(IVORx)与IRQ中断处理详解 外设使用Tips之Qorivva MPC56xx/57xx系列MCU的模式控制与切换(片上外设资源使能与功耗控制) 外设使用Tips之MCU内部集成IRC时钟工作原理、特性和trim原理及方法详解(以KEA系列MCU的ICS为例) 外设使用Tips之S12G系列MCU Startup之前的复位过程详解(COP看门狗复位和时钟监测复位中断识别与处理)  外设使用Tips之MPC57xx系列MCU C55 Flash模块详解及其SSD(标准软件驱动)使用 外设使用Tips之MSCAN接收ID滤波器设置 外设使用Tips之TIM定时器使用FAQ和使用经验 外设使用Tips之MPC574xP系列汽车级MCU的SWT看门狗定时器配置与使用 NXP汽车MCU开发详解之KEA系列汽车MCU开发指南 S32K1xx系列MCU应用指南之芯片锁死(lockup)复位原因分析与恢复方法详解 关于使用J-LINK开发S32K1xx系列MCU应用程序的使用说明和注意事项 NXP S12G_XE系列汽车MCU软件开发指南 资料分享--S12XE 系列MCU XGATE协处理器开发常见问题(Q&A) S32K1xx系列MCU应用指南之相同封装不同型号(part number)间相互替换的软件与硬件设计注意事项 4. S32K SDK使用详解系列 S32K SDK使用详解之S32 SDK软件编程思想详解 S32K SDK使用详解之S32 SDK软件架构详解 S32K SDK使用详解之Keil MDK开发S32K1xx系列MCU应用程序(使用Processor Expert配置SDK) S32K SDK使用详解之GHS Multi(Eclipse插件)开发S32K1xx系列MCU应用程序(使用PE配置SDK) 浅谈嵌入式MCU软件开发之使用makefile脚本编译和调试NXP S32 SDK应用工程详解 浅谈嵌入式MCU软件开发之S32K1xx系列MCU CPU内核性能优化方法详解 S32DS GNU GCC编译优化选项与配置方法详解及S32 SDK代码编译优化选项设置建议 S32K系列MCU应用开发详解直播ppt高清pdf版本下载与直播视频回放链接 S32DS使用Tips--SDK使用常见问题(FAQ)答疑 S32K SDK使用详解之interrupt_manager组件配置与使用详解 S32K SDK使用详解之Flash驱动组件使用(FTFC Flash控制器功能详解与使用FAQ & Tips) S32K SDK使用详解之PinSettings组件配置与使用详解(S32K1xx PORT 和GPIO模块) 5. S32K1xx应用指南系列 S32K1xx系列MCU的常见内核异常(Fault Exception)及处理详解(以S32K144为例介绍) S32K1xx系列MCU应用指南之芯片锁死(lockup)复位原因分析与恢复方法详解 S32K1xx系列MCU的EEE(Emulated EEPROM)使用详解 S32K1xx系列MCU应用指南之FlexIO和CSEc硬件加密模块的使用详解 S32K1xx系列MCU应用指南之WDOG看门狗模块使用详解 S32K1xx系列MCU应用指南之存储器ECC功能使用详解(一) S32K1xx系列MCU应用指南之存储器ECC功能使用详解(二) S32K1xx系列MCU应用指南之RTC模块使用详解 S32K1xx系列MCU应用开发指南之IAR toolchain样例工程及使用常见问题(FAQ) S32K1xx系列MCU的低功耗实现要点详解(基于S32K144 EVB-Q100x Rev C测试) 6. 细说汽车电子通信总线系列 细说汽车电子通信总线之CAN 2.0 总线协议详解 细说汽车电子通信总线之CAN-FD 总线协议详解 细说汽车电子通信总线之LIN总线协议详解 细说汽车电子通信总线之常见汽车电子串行通信总线(CAN、LIN、DSI、ISO-9141、SWCAN、J 1850)对比 7. S32DS IDE使用Tips系列 S32DS使用Tips--S32DS for Power V1.2 链接文件和启动过程详解 S32K1xx系列MCU使用Tips之SDK软件架构和使用详解 S32DS GNU GCC编译优化选项与配置方法详解及S32 SDK代码编译优化选项设置建议 S32DS IDE使用Tips--应用程序开发实战实用技巧总结与详解(工欲善其事必先利其器) S32DS使用Tips--SDK使用常见问题(FAQ)答疑 S32DS IDE使用Tips--应用工程调试常见问题(FAQ)答疑 S32DS IDE使用Tips之Classic CW(2.10)和EclipseCW(10.x和11.x)应用工程移植指南 S32DS 使用Tips之S32DS for Power不同版本之间的GNU工具链差异与外设寄存器位域访问问题总结 S32DS使用Tips之S32DS for Power v1.1应用工程升级到v1.2重新编译运行程序跑飞问题解决 S32DS 使用tips--S32DS for ARM v1.3工程到S32DS for ARM V2.0迁移升级方法和注意事项 S32DS 使用 tips--工程属性配置(编译选项和C编译器、汇编器及链接器设置) S32DS使用Tips--如何编译生成和调用静态库 S32DS使用Tips--如何通过创建新的编译目标(Build Target)在同一个S32DS工程中同时编译静态库和应用程序 S32DS使用Tips--如何配置和使能Attach功能定位软件程序bug和完成bootloader与应用程序工程的联合调试 CodeWarrior与S32DS IDE使用 Tips之如何在应用工程中保留定义但未使用的全局常量、变量(用于参数标定) S32DS 使用 tips--使用Flash from file下载S19或elf文件 S32DS for ARM v2018.R1安装IAR Eclipse插件调用IAR工具链开发S32K系列MCU应用程序详解 浅谈嵌入式MCU软件开发之条件断点的设置与使用详解(以S32DS IDE + U-Multink debugger为例介绍) S32DS IDE使用Tips之配置objcopy选项生成S3行的S19文件和指定每行S19文件的最大数据长度的方法和步骤详解 8. CodeWarrior IDE使用Tips系列 CodeWarrior IDE使用tips之bug定位绝技--hotsync与attach调试 CodeWarrior IDE使用Tips之Qorivva MPC56xx新建应用工程选项、调试高级选项及下载过程控脚本详解 CodeWarrior IDE使用tips之prm链接文件详解(自定义存储器分区以及自定义RAM数据初始化与在RAM中运行函数) CodeWarrior IDE使用Tips-Qorivva MPC56xx应用工程map文件全解析(CW 2.10/10.x ) CodeWarrior IDE使用tips之map文件详解 CodeWarrior IDE 版本选择与 License功能(feature)和价格,授权形式差异、激活方法与安装使用 答疑解惑之Win10操作系统中CodeWarrior IDE USB dongle  license安装问题解决方法详解 CodeWarrior IDE使用Tips之利用Hiwave读取S12(X)系列MCU片上NVM命令脚本(CW 5.x IDE) CodeWarrior IDE使用Tips-如何编译生成和调用静态库 CodeWarrior与S32DS IDE使用 Tips之如何在应用工程中保留定义但未使用的全局常量、变量(用于参数标定) CodeWarrior IDE使用Tips之如何通过prm文件指定汇编代码函数、全局变量和常量的储存地址 CodeWarrior IDE使用Tips之利用prm链接文件实现储存器数据填充和代码编译结果CRC校验和自动生成详解 CodeWarrior IDE使用Tips之burner工具使用详解(实现不同类型存储器地址间的转换和NVM编程格式文件的输出) CodeWarrior IDE使用Tips--使用burner将elf文件转换生成HEX和BIN文件的方法和步骤详解 CodeWarrior IDE使用Tips之利用Hiwave读取S12(X)系列MCU片上NVM命令脚本(CW 5.x IDE) S32DS IDE使用Tips之Classic CW(2.10)和EclipseCW(10.x和11.x)应用工程移植指南 9.   汽车ECU参数标定系列 汽车ECU参数标定之配置e200系列CPU内核MMU实现Qorivva MPC56xx_57xx系列MCU的参数在线实时标定 汽车ECU参数标定之配置Overlay RAM实现Qorivva MPC57xx系列MCU参数在线标定和代码重映射原理和方法详解 CodeWarrior IDE使用Tips之如何通过prm文件指定汇编代码函数、全局变量和常量的储存地址 CodeWarrior与S32DS IDE使用 Tips之如何在应用工程中保留定义但未使用的全局常量、变量(用于参数标定) CodeWarrior IDE使用tips之prm链接文件详解(自定义存储器分区以及自定义RAM数据初始化与在RAM中运行函数) CodeWarrior IDE使用tips之map文件详解 S32DS使用Tips--S32DS for Power V1.2 链接文件和启动过程详解 10.  工欲善其事必先利其器系列 工欲善其事必先利其器之NXP汽车MCU系列产品家族(Family)功能特性及应用介绍 工欲善其事必先利其器之NXP汽车MCU开发资料和开发软件获取与使用指南 11.  答疑解惑系列 疑难答疑之S12G系列MCU使用Hiwave和BDM调试器debug时无法使用逻辑地址查看和保存P-flash问题的解决 疑难答疑之S32DS IDE调试启动过程详解与调试目标复位方法和步骤详解 答疑解惑之S12(X)系列MCU的CodeWarrior 5.x应用工程下载调试过程详解以及如何保护NVM存储器不被擦除 答疑解惑之Win10操作系统中CodeWarrior IDE USB dongle  license安装问题解决方法详解 12. 产线批量Flash编程与ESD/EOS保护系列 使用 Cyclone 离线编程器对 S12(X)和 MagniV S12Z 系列 MCU 片上 NVM 编程 使用Cyclone 离线编程器对S32K1系列MCU进行NVM(P-Flash, D-Flash和EEE)编程的方法与步骤详解 13.  其他 汽车电子expert成长之路微信公众号原创技术分享文章全集-2019年度精编版 汽车电子expert成长之路微信公众号原创技术分享文章集合2017~2018年 最新最全的NXP Techday和Connect(原Freescale FTF)技术培训资料下载链接 汽车以太网(100BASE-T1)转工业以太网(100BASE-TX)转换器工作原理介绍 使用关键词回复功能找到感兴趣的公众号原创技术文章    
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The S32K14x MCU ARM Cortex M4F core processor handles fault exceptions using four handlers.   Handlers UsageFault_Handler() Usage faults are caused by an application that incorrectly uses Cortex M4 processor trying to execute an undefined instruction execute an instruction that makes illegal use of the Execution Program Status Register (EPSR), typically, this processor support only Thumb instruction set and it requires that all branch targets should be indicated as odd numbers, having bit[0] set. perform an illegal load of EXC_RETURN to the PC access a coprocessor if the access is denied or privileged only (configurable in CPACR) make an unaligned memory access execute an SDIV or UDIV instruction with a divisor of 0   The detection of the division by zero fault is disabled by default which means that such an operation returns zero and the fault is not detected. Similarly, the Cortex-M4 processor supports unaligned access for certain instructions. The detection on both the division by zero and the unaligned access (for every instruction) faults can be enabled in Configuration and Control Register (CCR).   BusFault_Handler() Bus faults occur when a bus slave returns an error response while stacking for an exception entry unstacking for an exception return prefetching an instruction during floating-point lazy state preservation Beside these faults listed above, there are also bus faults labeled as Precise and Imprecise. Imprecise bus fault occurs when an application writes to buffered memory region and continues executing subsequent instructions before the actual bus fault is detected. Therefore, at the time the exception rises the program counter doesn’t point to the instruction that has caused the bus fault. For debugging purposes, it is necessary to have “precise” program counter value to know which instruction has caused the fault exception. Imprecise bus fault can be forced to be precise by disabling the write buffer in (ACTLR_DISDEFWBUF = 1). This however might decrease the performance.   Note: The S32K144 MCU has its own system Memory Protection Unit which is implemented on the bus. Therefore, any system MPU violation triggers bus faults.   MemManage_Handler() Typically, these exceptions rise on an attempt to access regions that are protected by the core ARM Cortex M4 Memory Protection Unit. attempt to load or store at a protected location instruction fetch from a protected location stacking/unstacking fault caused by violation of the memory protection protection violation during floating-point lazy state preservation   S32K1xx series implements its own system Memory Protection Unit on the bus and therefore an attempt to access a protected region results in a bus fault exception instead. Nevertheless, the system MPU does not protect access to peripheral registers, and as the attached example code shows, an attempt to fetch instruction from a peripheral memory region causes a MemManage fault exception.   HardFault_Handler() This handler is the only one that has a fixed priority (-1) and is always enabled. If other handlers are disabled (in the SHCSR register), all faults are escalated to this handler. The escalation take place also when a fault occurs during another fault handling execution or while the vector table is read.   Priority of exception fault handlers   The fault exception handlers’ priorities, besides the HardFault handler (fixed priority -1), are configurable in fields PRI_4, PRI_5 and PRI_6 of SHPR1 register. These fields are byte-accessible and Cortex M4 support 255 priority levels, however, S32K14x MCUs support 16 priority levels only. Therefore, priorities are configurable in the four most significant bits of PRI_4, PRI_5 and PRI_6 only, which is similar to other NVIC IPR registers as shown below.   The lower priority number is set, the higher priority. By default, all handlers have priority set to zero.   Status and address registers for fault exceptions Configurable Fault Status Register (CSFR) consists from three status bit fields for Usage Fault (UFSR), Bus Fault (BFSR), and Memory Management Fault (MMFSR) where each bit represents a fault exception.     There are also two auxiliary address registers. If BFARVALID is set in the BFSR register, Bus Fault Address Register (BFAR) holds the memory access location of a precise bus fault. Similarly, if MMARVALID bit is set in MMFSR register, Memory Manage Address Register (MMAR) holds the address of a MemManage fault.   Example code To demonstrate the debugging process, the following exceptions can be forced: attempt to access an unimplemented memory area attempt to write to a non-gated peripheral register write to read only register fetching an instruction from a protected peripheral memory region division be zero unaligned memory access execution of a non-thumb instruction execution of an undefined instruction   When the program enters an exception handler, the stack frame is pushed onto the stack including the program counter value of the fault instruction. In this example, the exception handlers are declared with __attribute__((nake_)) (fault_exceptions.h), no prologue is generated and the program counter is always offset by 6 words (0x14) from the stack pointer that can be read in the handlers using either the debugger (memory view) or a SW pointer. If an application uses Process Stack Pointer (PSP) as well, it is necessary to find out whether the stack pointer comes from Main Stack Pointer (MSP) or PSP, this information is available in the EXC_RETURN value in the link register. Having a precise program counter address, we can find the fault instruction in Disassembly. This applies to all exception except for imprecise bus faults as explained above, imprecise bus faults can be forced to be precise by disabling the Write buffer.   The CSFR register is read to determine which exception has occurred and, if available, the memory access location that has caused the exception.    References Cortex-M4 Devices Generic User Guide Cortex-M4 Technical Reference Manual
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******************************************************************************** * Detailed Description: * * Example shows possible setting for PWM duty cycle update using DMA. * FTM0 ch0 is set to Edge aligned mode with 20KHz period. * Initialization trigger is routed back to HW trigger 1 using TRGMUX, so this HW * trigger can be used for CnV synchronization. * DMA on FTM0 ch0 is enabled (on ch0 CHF flag) and DMA ch0 configured to update C0V * from duty cycle variable. * NOte CHF is not set for 0% and 100% duty cycle, thus no DMA trigger is generated. * * Green LED is dimming as duty is changing. * * ------------------------------------------------------------------------------ * Test HW: S32K118EVB-Q64 * MCU: PS32K118LAMLH 0N97V * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH * ******************************************************************************** Revision History: 1.0 Sep-16-2021 Petr Stancik Initial Version *******************************************************************************/
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Due to K3 hasn't been mass-produced yet, this content is moved to S32K3 Internal forum: https://community.nxp.com/t5/S32K3-Internal-Community/S32K3-Low-power-lab/ta-p/1280219 Any question, pls contact Jeremy.he@nxp.com.
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Due to K3 hasn't been mass-produced yet, this content is moved to S32K3 Internal forum: https://community.nxp.com/t5/S32K3-Internal-Community/S32K3-Low-power-lab/ta-p/1280219 Any question, pls contact Jeremy.he@nxp.com.
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The purpose of this demo application is to show you the usage of the FlexCAN module configured to use Flexible Data Rate using the S32 SDK API. - In the first part, the application will setup the board clocks, pins and other system functions such as SBC if the board uses this module as a CAN transceiver. - Then it will configure the FlexCAN module features such as FD, Bitrate and Message buffers - The application will wait for frames to be received on the configured message buffer or for an event raised by pressing one of the two buttons which will trigger a frame send to the recipient. - Pressing SW3 button of board 1 shall trigger a CAN transfer that results in toggling the RED led on board 2. - Pressing SW2 button of board 1 shall trigger a CAN transfer that results in toggling the GREEN led on board 2. - This demo application requires two boards, one configured as master and the other one configured as slave (see MASTER/SLAVE defines in application code) or single board connected with CAN tool. - Both the event and error callbacks are installed, callback_test variable indicates event entering bit0 .. RX complete bit1 .. TX complete bit2 .. ERR INT flag set bit3 .. BOFF INT flag set - to enter bus off simply short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event) and blue LED is ON. Also TX MB is aborted. Remove short connection and send message again normally, blue LED is off.   ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: FS32K1441 0N57U * Compiler: S32DS.ARM.2.2 * SDK release: S32SDK_S32K1xx_RTM_3.0.3 * Debugger: Lauterbach, OpenSDA * Target: internal_FLASH  
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******************************************************************************** * File: main.c * Owner: David Tosenovjan * Version: 0.0 * Date: Mar-12-2021 * Classification: General Business Information ******************************************************************************** * Detailed Description: * Example code configures the whole 4kB FlexRAM area for SRAM use. * By default or after mass erase, S32K1 device has only address range * 0x1400_0000-0x1400_0DFF (3.5kB) accessible for SRAM use. * To enable remaining 0.5kB it is needed to perform Program Partition Command * (with the setting shown in the example), but only once with the blank new * device (or previously mass erased). It sets up address range * 0x1400_0000-0x1400_0FFF for SRAM use. * ------------------------------------------------------------------------------ * Test HW: S32K146EVB-Q144 * MCU: PS32K146UAVLQ 0N73V QAC1735D * Fsys: default * Debugger: Lauterbach Trace32, OpenSDA * Target: Debug_RAM * Terminal: none * EVB connection: default ********************************************************************************
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Audio Video Bridging(AVB) is a protocol for the transport of audio and video streams over Ethernet-based networks, which makes it possible to deliver high volumes of data in real-time to multiple destinations with very low latency. This reference design board demonstrates the usage for AVB over S32K148. Alternatively, it can be an S32K148 evaluation board of 100pin version besides S32K148EVB-Q144 and S32K148EVB-Q176. Below shows the board layout, diagram, and main features. Figure 1. S32K148AVB-RDB Layout   S32K148AVB-RDB Diagram(Rev B) Figure 2. S32K148AVB-RDB Diagram S32K148AVB-RDB Features Figure 3. S32K148AVB-RDB Features In terms of the software, we provide several examples to show the AVB/TSN usages and other applications. The avb_listener_talker project is the main example which implements most features and demonstrates by connecting 2 AVB boards by Ethernet cable.   Figure 4. S32K148AVB-RDB Code Examples Below software stack and middleware are implemented. ✓ RTOS: FreeRTOS ✓ Peripherial Driver: SDK RTM 3.0 (Work with Processer Expert) ✓ AVB Stream: RTM 1.0 ✓ AVB AudioIf: RTM 1.0 ✓ gPTP Stack Version: 1.3.4 ✓ Lwip Stack Version: 2.1.2 •Note: Even though we did a lot of tests, it’s still the customer’s responsibility to ensure the total quality by themselves when it’s integrated into a real application project, all the sample codes and user guide documentation are just reference for the customer. •Note: We do not have an FCC or CE certificate for this board.   Now we have 50 pcs boards available in Chongqing, China. For applying for the board, please contact NXP sales or GPIS marketing.  Since the AVB stack is not free of use, for accessing the code please contact NXP sales or GPIS marketing. For technical discussion, please contact Jeremy.he@nxp.com or Frankie.zeng@nxp.com.  
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********************************************************************************  Detailed Description:  Example shows FlexCAN 0 usage in RUN/VLPR modes using SDK.  CAN bitrate is set to 250bit/s.  MCU enters VLPR mode by pressing SW3 button. CAN std message is sent with data VLPRmode"  MCU exits VLPR to RUN mode when one of following happens:  - CAN std message with RX_MSG_ID is received and MCU is in VLPR  - SW2 button is pressed (PTC12 interrupt). CAN std message is sent with data "RUN mode"  Blue LED is dimming and the rate is different for each power mode due to different  system clock (48Mhz vs 4MHz)  ------------------------------------------------------------------------------  Test HW: S32K116EVB-Q48  MCU: PS32K116LAM 0N96V  Compiler: S32DS.ARM.2.2  SDK release: S32SDK_S32K1xx_RTM_3.0.3  Debugger: Lauterbach, OpenSDA  Target: internal_FLASH ********************************************************************************
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Hi Everyone, Here I'd like to share three S32K1xx SDK FlexCAN PD and PAL component sample projects to demonstrate its basic and advanced features: 1. S32K144_CAN_PAL_SamplePrj_Basic_TxRx_ID_FiltersConfig_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PAL driver: 1. Configure to receiver the following exact 16 standard ID CAN message with RxFIFO 8x ID filter table with format type-B(2x 16-bit ID) Standard ID: 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x111, 0x222, 0x333, 0x444, 0x555, 0x666, 0x777, 0x788 The RxFIFO is configured to use CPU interrupt for CAN message receive, and CAN_PAL cannot support DMA for RxFIFO directly. Note: A. FlexCAN of S32K1xx dose not support to receive CAN-FD message frame with RxFIFO, so no CAN-FD support in this demo project. B. All the filter table elements must be configured to contain only standard or extend ID, if it contains both standard and extend ID, the IDE-bit mask will be ignored.  C. After RxFIFO enabled, MB0~MB5 is used as the RX FIFO, at least MB6~MB7 are used as the ID filter table(to store the acceptance ID), the actual available MB number is determined by RxFIFO ID filter table size, details please refer to section--55.4.6 Rx FIFO structure of S32K1xx RM Rev.12.1  2. Configure two extra individual MBs to receive: RX_MB1: 16 standard ID CAN 2.0 message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F and  RX_MB2: 4 standard ID CAN 2.0 message with the ID8 and ID9 masked(mask=0x4FF, acceptance ID = 0x256): 0x056, 0x156, 0x256 and 0x356 Both the RxFIFO and individual MBs RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure one individual MB to blocking transmit a standard CAN 2.0 message with ID = 0x100 periodically(period = 5ms), and also send back the received CAN messages(if it's available) to the CAN bus as a response. 4. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is commented by default, so manual recovery codes does not work. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is not done this sample project!!!  5. There 3 on-board RGB LED are used to indicate the FlexCAN working status: red RGB LED will be toggled after RXFIFO received a CAN message; blue RGB LED will be toggled after individual MB received a CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB 2.S32K144_CAN_PAL_CANFD_ClassicCAN_Mix_TxRx_Wakeup_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PAL driver: 1. Configure to enable CAN-FD with 500 Kbit/s arbitration phase bitrate and 2Mbit/s data phase bitrate, so it can support both classic CAN 2.0 A/B and CAn-FD message frame transfer. Note: A. The RxFIFO is disabled to work with CAN-FD message frame. B. After CAN-FD enabled, CAN-FD message frame data length can support up to 64 Bytes, so the actual available MB number is determined by the max frame data length need to support, details please refer to section--55.4.5 FlexCAN message buffer memory map of S32K1xx RM Rev.12.1  C. In order to support bitrate bigger than 1Mbit/s for CAN-FD data phase with bitrate switch enabed, PE clock source of CAN_PAL should be configured to use peripheral clock(80MHz generated from SPLL) instead of 8MHz oscillator clock; 2. Configure 3 individual MBs to receive: RX_MB0: 16 extend ID CAN 2.0/FD message with the lower 4LSB masked(mask=0x1FFFFFF0, acceptance ID = 0xfff021): 0xfff020 ~ 0xfff02F RX_MB1: 16 standard ID CAN 2.0/FD message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F RX_MB2: 4 standard ID CAN 2.0/FD message with the ID8 and ID9 masked(mask=0x4FF, acceptance ID = 0x256): 0x056, 0x156, 0x256 and 0x356 Both the RxFIFO and individual MBs RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure 3 individual MBs to transmit: TX_MB0: send back any CAN(2.0/FD) messages received from RX_MB0; TX_MB1: send back any CAN(2.0/FD) messages received from RX_MB1; TX_MB2: send back any CAN(2.0/FD) messages received from RX_MB2; 4. Configure one individual MB(TX_MB3) to blocking transmit a standard CAN FD message with ID = 0x100 periodically(period = 5ms) and length = 64 bytes, and also send back the received CAN messages(if it's available) to the CAN bus as a response. 5. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is commented by default, so manual recovery codes does not work. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is not done this sample project!!!  6. Provided the sample codes of how to configure FlexCAN as the VLPS low-power mode wakeup source, RXD of FlexCAN0 is configured as GPIO IRQ interrupt with falling edge trigger before entering VLPS mode, and after wakeup, re-configure it back to RXD function. Note: A. S32K1xx FlexCAN is unable to work as the VLPS wakeup source B. After wakeup, it's necessary to call SDK clock_manager's API--CLOCK_SYS_UpdateConfiguration() to reconfigure the system clock, or it will use 8MHz SIRC, 48 MHZ FIRC and SPLL are disabled after wakeup. c. By default, after receive ID = 0x123(it can be configured via macro LP_REQUEST_ID in /include/Config.h ) standard CAN(CAN 2.0 or CAN-FD), the MCU will go to VLPS mode 7. There 3 on-board RGB LED are used to indicate the FlexCAN working status: blue RGB LED will be toggled after individual MB received a CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB 3.S32K144_FlexCAN_PD_SamplePrj_RxFIFO_DMA_Receive_SDKRTM3P0 Functions implementation key points and tips: This sample project is made to demonstrate the following S32K1xx FlexCAN features with SDK FlexCAN PD driver: 1. Configure to receiver the following exact 16 standard ID CAN message with RxFIFO 8x ID filter table with format type-B(2x 16-bit ID) Standard ID: 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x111, 0x222, 0x333, 0x444, 0x555, 0x666, 0x777, 0x788 The RxFIFO is also configured to use eDMA channel 0 for CAN message receive, user can easily change to use CPU interrupt for RxFIFO in processor expert flexcan component configuration if required. Note: A. FlexCAN of S32K1xx dose not support to receive CAN-FD message frame with RxFIFO, so no CAN-FD support in this demo project. B. all the filter table elements must be configured to contain only standard or extend ID, if it contains both standard and extend ID, the IDE-bit mask will be ignored.  C. After RxFIFO enabled, MB0~MB5 is used as the RX FIFO, at least MB6~MB7 are used as the ID filter table(to store the acceptance ID), the actual available MB number is determined by RxFIFO ID filter table size, details please refer to section--55.4.6 Rx FIFO structure of S32K1xx RM Rev.12.1  2. Configure one extra individual MB(MB8) to receive 16 standard ID CAN 2.0 message with the lower 4LSB masked(mask=0x7F0, acceptance ID = 0x123): 0x120 ~ 0x12F; Both RxFIFO and individual MB RX use non-blocking receive method/API with MB TX/RX complete ISR callback installed to set a new circle buffer for next message frame receive 3. Configure one individual MB(MB9) to blocking transmit a standard CAN 2.0 message with ID = 0x100 periodically(period = 5ms), and also send back the received CAN messages(if it's available) to the CAN bus as a response. 4. Provide the FlexCAN bus-off manual recovery configuration API and interrupt ISR callback codes for reference, changing the macro CAN_BUSOFF_RECOVERY_MANUAL(in include/Config.h) to select the bus off recovery method(enable the macro definition: manual recovery, comment the macro definition: automatic recovery); Note: In this sample project, the macro CAN_BUSOFF_RECOVERY_MANUA is enabled by default, and manual recovery codes works. To make the bus-off recovery callback work, user should replace the flexcan PD driver codes and S32K144_feature.h with S32K1xx RTM 4.0.0(which can be downloaded from nxp.com with registered account login and then installed stand-alone or installed via S32DS v3.3 IDE update). This is already done this sample project!!!  5. There 3 on-board RGB LED are used to indicate the FlexCAN working status: red RGB LED will be toggled after RXFIFO received any CAN message; blue RGB LED will be toggled after individual MB received any CAN message; green RGB LED will be turn ON after enter bus-off and turn OFF after exist bus-off(recover successfully). To run this sample project, the following HW and SW require: SW: S32DS for ARM v2.2 IDE with S32K1xx SDK RTM 3.0.3 installation HW: S32K144EVB-Q100 Rev.C with a DC-12V adapter for its power supply by J16 and a USB-to-CAN adapter(such as PEAK CAN) to connect PC with J13 of the EVB Attached are the sample project for your reference, and details can also be fiound with the detailed comments in source codes. Hope it can help you, and any comments/questions are welcomed, and you can just ask in this thread and I will try to anwser them. Best regard, Enwei Hu(胡恩伟).  
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Hello everyone, SEGGER's Real Time Transfer (RTT) is the new technology for interactive user I/O in embedded applications. It combines the advantages of SWO and semihosting at very high performance. Bi-directional communication with the target application Very high transfer speed without affecting real-time behavior Uses debug channel for communication No additional hardware or pin on target required Supported by any J-Link model Supported by ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 and Renesas RX100/200/600 Complete implementation code providing functionality and freedom Here, I'd like to share you the SEGGER RTT porting project on S32K144 as attached. SW requirements: S32DS for ARM v2.2 IDE + S32K1xx SDK RTM 3.0 HW requirements: S32K144-EVB  + J-LINK debugger   For SEGGER RTT, you can refer to: About Real-Time Transfer: https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/   RTT SEGGER Wiki: https://wiki.segger.com/RTT#SEGGER_RTT_TerminalOut.28.29;   Using Segger Real Time Terminal (RTT) with Eclipse: https://mcuoneclipse.com/2015/07/07/using-segger-real-time-terminal-rtt-with-eclipse/   Hope this project can help you, and enjoy the RTT! Best regard, Enwei Hu.
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******************************************************************************************************** Detailed Description: LPUART1 echoes RX signal at 115200 bps When an 's' char is received, the MCU enters VLPS. A falling edge of the RX signal brings the MCU from VLPS via LPUART RXEDGIF interrupt. BUS_CLK can be monitored at CLKOUT PTD14. In VLPS, BUS_CLK is gated off. -------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************    
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Hi,      The draft time gap, from power-on to clock output of S32K14x, is as below.    You can take a reference. Cheers! Oliver
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NXP S32K1xx serial MCU is widely used in automotive body control and many general-purpose automotive applications, while to target some applications with special requirements such as requiring more peripherals instance than the portfolio can offer (e.g. 6x CAN-FD, 6x LIN or 4 I2C) like mid-end BCM or DCU, an on-board dual/multi MCU sync solution is proposed as an alternate solution to extend the S32K1xx MCU peripherals/memory resource and CPU process capability. The eRPC (Embedded Remote Procedure Call) is a Remote Procedure Call (RPC) system created by NXP(https://github.com/EmbeddedRPC/erpc/). An RPC is a mechanism used to invoke a software routine on a remote system using a sample local function call. eRPC software architecture Figure 1. eRPC software architecture In this project, we ported the eRPC protocol to S32K1xx platform, tested and figured out its performance. An out-of-box software package with detailed user guide (this document) is provided to simplify and accelerate users’ assessment of eRPC on S32K1xx. Two S32K144EVB boards are connected to demonstrate the usage of the eRPC protocol. One works as the client, another as the server. The client board starts an eRPC request and the server board responds to the request and executes the service. Figure 2. eRPC task workflow on S32K144-EVB There are three types of MCU extensions are demonstrated in the project: MCU IO extension: Set LED; MCU peripheral extension: CAN and LIN message forwarding, LED luminance regulator; CPU process capability extension: Matrix multiply and addition math operation. Please find the attached sample projects and user guide for more details. Figure 3. Table of Contents in User Guide •Note: Even though we did a lot of tests for the solution with the sample projects on S32K144-EVB, it’s still customer’s responsibility to ensure the total quality by themselves when it’s integrated in a real application project, all the sample codes and user guide documentation are just reference for customer. If you have any questions about this solution, please post here and we can have an open discussion. Best Regard, Enwei Hu(胡恩伟) GPIS System Apps Engineer.  
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