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******************************************************************************** * Detailed Description: * This example shows how to use the CTU module triggered from eTimer0 module channel 2. * * For closer details on how CTU works I suggest you to check application note * MPC5643LPWM_ADC_concept * https://community.freescale.com/docs/DOC-102559 * * This example sets eTimer0 channel2 for PWM signal generation. * This signal is than used to send MSR trigger to CTU module * Example contains also simple CTU module driver initialization * CTU scheduler submodule is toggling with external pin based on CTU triggers * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ******************************************************************************** Original Attachment has been moved to: Example-MPC5744P-CTU-eTimer-v1_1-GHS614.zip
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Q1: Why DisplayPort to LVDS adapter? DPRX-LVDS is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion and transmits processed stream in LVDS format.   NXP offers two eDP-LVDS devices: 1. PTN3460 is commercial grade, 0 – 70 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 25 MHz to 112 MHz. 2. PTN3460I is industrial grade, -40 – 85 C. It is in 56-pin HVQFN package, 7 mm x 7 mm, 0.4 mm pitch. Supports pixel clock frequency from 6 MHz to 112 MHz.   Q2. How to configure eDP-LVDS device?   The eDP-LVDS has embedded microcontroller and on-chip Non-Volatile Memory (NVM) to allow for flexibility in firmware updates.   Both PTN3460 and PTN3460I have a built in configuration table in internal 1K SRAM, which allows users to program seven EDID and 128 configuration registers through M/S I2C-bus. Please follow the programming guides below for these devices. 1. AN11128 – Programming Guide for PTN3460 2. AN11606 – Programming Guide for PTN3460I   Q3. What is maximum resolution DP-LVDS can support? The available bandwidth over a 2-lane HBR DisplayPort v1.4 link limits pixel clock rate support to: 1. 1-lane DP with single LVDS bus supports 800x600 @ 60 Hz display, 40 MHz pixel clock. 2. 1-lane DP with dual LVDS bus supports 1366x768 @ 60 Hz display, 85.5 MHz pixel clock. 3. 2-lane DP with single LVDS bus operation up to 112 mega pixel per second – supports 1440x900 @ 60 Hz resolution display. 4. 2-lane DP with dual LVDS bus operation up to 224 mega pixel per second – supports 1920x1200 @ 60 Hz resolution display.   Q4. How to update the FW? FW for eDP-LVDS devices can be updated by the following methods: 1. Flash over AUX (FoA) – This is an executable window utility that can only run under Windows OS. FW is updated through DP AUX channel. AN11133 – PTN3460 FoA utility user’s guide. 2. Flash over DOS (FoD) – This is an executable DOS utility that can run under DOS without OS. FW is updated through M/S I2C bus. 3. Flash over I2C – FW is updated through external I2C device that is plugged in a M/S I2C header.   Q5. How to check the FW version? FW version can be read out with DPCD utility that runs under Windows OS. Please follow DPCD Tool User Manual V1.0.   Q6. How many DP lanes supported in NXP DP to LVDS bridge device? NXP DP to LVDS bridge device supports 2 lanes HBR/RBR.   Q7. What does HBR/RBR mean? HBR means “High Bit Rate”, it runs 2.7 Gbit/s. RBR means “Reduced Bit Rate”, it runs 1.62 Gbit/s.   Q8. What is DP AUX channel? DP AUX channel is used for communication channel between DP source and DP sink device.   Q9. What is DP source device? DP source device is DP signal transmitter.   Q10. What is DP sink device? DP sink device is DP signal receiver.
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This video shows the necessary configurations to flash a binary file to a target, in this case the FRDM-KL25
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****************************************************************************************************** * The PCF2127T is a CMOS Real Time Clock (RTC) and calendar with an integrated * Temperature Compensated Crystal Oscillator and a 32.768 kHz quartz crystal * optimized for very high accuracy and very low power consumption.   * This simple example code has been written for the FRDM-KL25Z + OM13513 * boards in MCUXpresso IDE v10.1.0 and demonstrates how to set and read * the time/date on the PCF2127T using the SPI (do not forget to remove the * JP1 jumper) interface. It also illustrates how to use a minute interrupt to * generate an interrupt on the INT pin once per minute when the Minutes * register increments. * * In this example the date/time to be set is Wednesday, January 17 2018, 2:45 PM. * * Connection:     FRDM-KL25Z        OM13513 * VDD               J9-4                         P2-2 * GND               J9-18                       P2-1 * MOSI              J2-8                         P2-5 * MISO              J2-10                       P2-6 * SCLK             J2-12                       P2-4 * CS                  J2-6                        P2-3 * INT                 J1-6                        P2-8 ******************************************************************************************************
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Hi Everyone, I would like to share with you a simple bare metal example for the the SC16IS752 to demonstrate NXP Bridge IC for SPI/ I 2 C host to Dual Uart/IrDa/GPIO interface. This example is based on the OM6273 demo board for the SC16752/762. I made this example working with the NXP FRDM-KL25Z development platform. The example shows the device functionality by creating a simple echo transmission, where you are able to read what you just write into the device. This example illustrates: 1. Initialization of the MKL25Z128 MCU (I 2 C and port modules) 2. I 2 C data write and read operations 3. Initialization of the bridge to perform the communication 4. Transmission and the reception done with interrupt technique 5. Visualization of the echo function using the serial terminal 1. As you can see in the FRDM-KL25Z schematics and the image below, I 2 C signals are routed to the I2C1 module (PTC1 and PTC2 pins) of the KL25Z MCU and the INT1 output is connected to the PTA16 pin. The INT1 output of the SC16IS752 is configured as a push-pull active-low output, so the corresponding PTA16 pin configuration is GPIO with an interrupt on falling edge.                                               Therefore, this is the MCU configuration: void MCU_Init(void) {      //I2C1 module initialization      SIM_SCGC4 |= SIM_SCGC4_I2C1_MASK;          // Turn on clock to I2C1 module      SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK;          // Turn on clock to Port E module      PORTC_PCR1 = PORT_PCR_MUX(2);               // PTC1 pin is I2C1 SCL line      PORTC_PCR2 = PORT_PCR_MUX(2);               // PTC2 pin is I2C1 SDA line      I2C1_F  = 0x14;                               // SDA hold time = 2.125us, SCL start hold time = 4.25us, SCL stop hold time = 5.125us      I2C1_C1 = I2C_C1_IICEN_MASK;              // Enable I2C1 module      //Configure the PTA16 pin (connected to the IRQ of the SC16IS752) for falling edge interrupts      SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;               // Turn on clock to Port A module      PORTA_PCR16 |= (0|PORT_PCR_ISF_MASK              // Clear the interrupt flag                    | PORT_PCR_MUX(0x1)                    // PTA16 is configured as GPIO                    | PORT_PCR_IRQC(0xA));               // PTA16 is configured for falling edge interrupts      //Enable PORTA interrupt on NVIC      NVIC_EnableIRQ(PORTA_IRQn);                // Enable interrupts      NVIC_ClearPendingIRQ(PORTA_IRQn);          // Clear pending interrupts } ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ 2. To perform the read or write operation we'll make use of an I 2 C library which contains to main functions: void I2C_WriteRegister(unsigned char u8SlaveAddress, unsigned char u8RegisterAddress, /*unsigned*/ char u8Data); unsigned char I2C_ReadRegister(unsigned char u8SlaveAddress, unsigned char u8RegisterAddress) Before any data is transmitted or received, the master must send the address of the receiver via the SDA line. The first byte after the START condition carries the address of the slave device and the read/write bit. Table 32. shows how the SC16IS752/SC16IS762’s address can be selected by using A1 and A0 pins. In the demo board OM6273, these  2 pins are connected to JP4 and JP3 and in this example there are two jumpers plugged so A1 = VDD and A2 = VDD, then the SC16IS752’s address is set to 0x90(Write) and 0x91(Read), and the master communicates with it through this address.                                                 The second parameter in the read or write function is the internal register address, these are defined in the SC16IS752.h attached to this document and explained with greater detail in the SC16IS752 datasheet.                                                           3. The SC16IS752 is set to work at 115, 200 baud/s , the Receive Holding Register interrupt is enabled and routed to the INT1 pin that is configured to be a push-pull, active-low output. The registers are shift 3 positions left because the UART's internal register select are the bits 3:0, as shown in table 33. In the example channel 0 is used. This initialization is based in the application notes AN10587 and AN10462, where is possible to find additional information in regards the SC16IS752 // Program channel A for I2C-UART void SC16IS752_Init_ChA (void) {      I2C_WriteRegister(SC16IS752_ADDRESS, LCR_REG     << 3, 0x80);            // 0x80 when LCR[7] = 1 DLL and DLH are accessible      I2C_WriteRegister(SC16IS752_ADDRESS, DLL_REG     << 3, 0x08);         // 0x08 = 115,200 baud rate when XTal = 14.7456 MHz      I2C_WriteRegister(SC16IS752_ADDRESS, DLH_REG     << 3, 0x00);         // 0x00 = 115,200 baud rate when XTal = 14.7456 MHz      I2C_WriteRegister(SC16IS752_ADDRESS, LCR_REG     << 3, 0xBF);            // Access special features register      I2C_WriteRegister(SC16IS752_ADDRESS, EFR_REG     << 3, 0x10);            // enable enhanced functions      I2C_WriteRegister(SC16IS752_ADDRESS, LCR_REG     << 3, 0x03);            // 8 data bit, 1 stop bit, no parity           I2C_WriteRegister(SC16IS752_ADDRESS, IODIR_REG   << 3, 0xFF);            // set GPIO [7:0] to output (input by default)      I2C_WriteRegister(SC16IS752_ADDRESS, IOSTATE_REG << 3, 0x00);            // set GPIO [7:0] to 0x00 (Turn LEDs on)      I2C_WriteRegister(SC16IS752_ADDRESS, IER_REG     << 3, 0x01);            // enable Rx data ready interrupt }‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ 4. In the interrupt service routine the program reads the interrupt identification register, and it's ready to add a different task for each interrupt, for now it simply enables the data ready flag when the interrupt was generated by the RHR. It also cleans the flag that generated the interrupt. We also have the write function and the read function of the SC16IS752, these two functions access the corresponding THR or RHR registers. void PORTA_IRQHandler() {      //Interrupt service routine      Interrupt_Source iir = I2C_ReadRegister(SC16IS752_ADDRESS, IIR_REG << 3);   //read IIR to retrieve the interrupt source      // IIR[5:1] 5-bit encoded interrupt      switch(iir & 0x3E) {           case RHR: DataReady = 1; break;           default : break;      }      PORTA_PCR16 |= PORT_PCR_ISF_MASK;               // Clear the interrupt flag } void writeSC16IS752(char data) {      I2C_WriteRegister(SC16IS752_ADDRESS, FCR_REG <<3, 0x04);              //clears the contents of the transmit FIFO      while(!(I2C_ReadRegister(SC16IS752_ADDRESS, LSR_REG <<3) & 0x40));    //Is it able to transmit? - Poll Transmit empty indicator      I2C_WriteRegister(SC16IS752_ADDRESS, THR_REG << 3, data);             //Write to the transmit holding register to start transmission } unsigned char readSC16IS752(void) {      return I2C_ReadRegister(SC16IS752_ADDRESS,RHR_REG);                  //Read receive holding register } ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ 5. We connect the I 2 C lines with each other in the board, JP6 contains INT1, SDA and SCL in that order, then P1 is connected to EVBUSB2SER (USB to serial device), and this last one to a computer. In the computer must be installed a serial terminal,   for this example Teraterm is used                 We set up Tera Term going to Setup > Serial Port and then select corresponding port to the EVBUSB2SER and baud rate 115,200 This is the main, that should be executed to perform the echo function char DataReady; int main(void) {      unsigned char echo = 0;      MCU_Init();      Pause(500000);      SC16IS752_Init_ChA();      for (;;) {           if(DataReady) {                DataReady = 0;                echo = readSC16IS752();            //Read RHR, since FIFO is disable it only reads the first location                writeSC16IS752(echo);            //Send back the value received           }      }      return 0; }‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ After this, every character written in the serial terminal will appear in the serial terminal as you were writing in the command prompt Attached you can find the complete source code written using KDS IDE and some other relevant documentation   If there are any questions regarding this simple application, do not hesitate to ask below. Your feedback or suggestions are also welcome.   Thanks to a major collaborator for this document david_diaz‌. Regards, Darío Arias
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The following wikis provide useful “how to” and FAQ information not available on Freescale websites or forums. The links below provide useful design resources for product designers and users. eGUI PEG GUI StarCore DSPs
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Hi, Trying download and debug in IAR for MAC57D54H from NXP but get an error as: "Warning:Stack pointer is setup to incorrect alignment.Stack addr=0xFFFFFFFF" What would be the reason?
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Subject:  Info on FET BUK7909-75AIE Description:  The datasheet for part number BUK7909-75AIE describes it as qualified to AEC standard for use in automotive critical applications.  It also says it is Q101 compliant.  We are not familiar with these automotive standards but would like to know if samples have been tested for either these or similar qualification tests: Lifetesting Tempeature Cycling HAST or 85/85. I am expecting the automotive qual to meet or exceed these requirements, but need to be sure that device samples or devices from the same process have had qualification testing performed.  Please comment. Also, we need to know if there is an MSL rating for this part?  Finally, what is the terminal finish?  What is the long-term availability.  WE are looking to use these to replace an obsolete FET from IR/Infineon, and we want to be sure it will remain available.
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********************************************************************************* * Detailed Description: * Updated the example lwip_FreeRTOS_SJA1110 for board MR-T1ETH8 * to enable ping from the command window, from all applicable ports * *ping 192.168.0.200 * *Pinging 192.168.0.200 with 32 bytes of data: *Reply from 192.168.0.200: bytes=32 time=2ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 * *Ping statistics for 192.168.0.200: * Packets: Sent = 4, Received = 4, Lost = 0 (0% loss), *Approximate round trip times in milli-seconds: * Minimum = 1ms, Maximum = 2ms, Average = 1ms * * Installed packages to S32DS 3.5 update 14: * SW32SJA11xx_S32DS_3.5.0_RFP_D2206.zip * SJA11XX_RTD_4.4_1.0.1_P02_HF01_D2510_DesignStudio_updatesite.zip * SW32SJA1110_XJA11XX_ETH_PHY_4.4_1.0.8_CD01_D2509_DesignStudio_updatesite.zip * SJA11XX_ETH_SWITCH_4.4_1.0.2_CD01_D2509_DesignStudio_updatesite.zip * SW32SJA11xx_FreeRTOS_11.1.0_0.8.0_CD2_D2411_DesignStudio_updatesite.zip * SJA11XX_TCPIP_2.0.0_CD01_D2510_DesignStudio_updatesite.zip * * EVB * - to enable flashing by Lauterbach TRACE32 - Populate R78, DNP R77 * * Configuration: * - Updated switch configuration * - Updated phy configuration * - Fixed Mcu/McuModuleConfiguration/McuPowerControlUnit - 1V8 and 2V5 * - Fixed Eth configuration * <setting name="EthMaxFrameLength" value="1518"/> * <setting name="EthCtrlConfigEgressFifoBufLenByte" value="1536"/> * <setting name="EthCtrlConfigIngressFifoBufLenByte" value="1536"/> * - TCPIP stack: enabled UDP_ECHO, etc. * - Added DIO * - Added nvm_metadata * - MAC learning is disabled * - All available ports initialized * - All ports checked, except 1 Gbit/s ix Industrial connector (J9) * * main.c * - Updated only the header * device.c * - Added LED routines * test.c * - Removed code that shuts down the TCP/IP stack after its predefined timeout * - Added debug stuff * - Commented out the code that initializes 2nd switch * * ----------------------------------------------------------------------------- * Test HW: MR-T1ETH8 * MCU: SJA1110 * Debugger: Lauterbach TRACE32 * Target: RAM or external FLASH (flash_image.bin generated) * EVB connection: any port <-> RDDRONE T1ADAPT (on ports where applicable) <-> USB-to-Ethernet adapter <-> Laptop DELL, Windows 11
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********************************************************************************* * Detailed Description: * Updated the example lwip_FreeRTOS_SJA1110 for board SJA1110-MGS-EVM * to enable ping from the command window, from all applicable ports * *ping 192.168.0.200 * *Pinging 192.168.0.200 with 32 bytes of data: *Reply from 192.168.0.200: bytes=32 time=2ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.200: bytes=32 time=1ms TTL=255 * *Ping statistics for 192.168.0.200: * Packets: Sent = 4, Received = 4, Lost = 0 (0% loss), *Approximate round trip times in milli-seconds: * Minimum = 1ms, Maximum = 2ms, Average = 1ms * * Installed packages to S32DS 3.5 update 14: * SW32SJA11xx_S32DS_3.5.0_RFP_D2206.zip * SJA11XX_RTD_4.4_1.0.1_P02_HF01_D2510_DesignStudio_updatesite.zip * SW32SJA1110_XJA11XX_ETH_PHY_4.4_1.0.8_CD01_D2509_DesignStudio_updatesite.zip * SJA11XX_ETH_SWITCH_4.4_1.0.2_CD01_D2509_DesignStudio_updatesite.zip * SW32SJA11xx_FreeRTOS_11.1.0_0.8.0_CD2_D2411_DesignStudio_updatesite.zip * SJA11XX_TCPIP_2.0.0_CD01_D2510_DesignStudio_updatesite.zip * * EVB: * - All jumpers in default positions, except J76 - open * - SW2.7 ON and SW2.6 OFF -> 0b01 - NVM Boot - SPI Flash * * Configuration: * - Updated switch configuration * - Updated phy configuration * - Fixed Mcu/McuModuleConfiguration/McuPowerControlUnit - 1V8 and 2V5 * - Fixed Eth configuration * <setting name="EthMaxFrameLength" value="1518"/> * <setting name="EthCtrlConfigEgressFifoBufLenByte" value="1536"/> * <setting name="EthCtrlConfigIngressFifoBufLenByte" value="1536"/> * - TCPIP stack: enabled UDP_ECHO, etc. * - Added DIO * - Added nvm_metadata * - MAC learning is disabled * - All ports initialized, except: * - TJA1104B - Port 2 SGMII * - Port 3 2.5G SGMII has not been tested * - cage - Port 4 SGMII * * Copied pcal9722 driver from SJA1110_MGS_Minimal (from package SJA1110 examples 0.2.0) * - fixed to MCAL Spi driver * - Updated Spi configuration * * main.c * - Updated only the header * device.c * - Added LED routines * test.c * - Removed code that shuts down the TCP/IP stack after its predefined timeout * - Added LED ALIVE task * - Added RX/TX blinking LED * - Added debug stuff * - Commented out the code that initializes 2nd switch * * ----------------------------------------------------------------------------- * Test HW: SJA1110-MGS-EVM SCH-94089_B1 * MCU: SJA1110 * Debugger: Lauterbach TRACE32 * Target: RAM or external FLASH (flash_image.bin generated) * EVB connection: any port <-> Media converter TE-1402 (1000M or 100M, Leader) <-> USB-to-Ethernet adapter <-> Laptop DELL, Windows 11
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S32G-VNP-RDB2 Note: S32G-VNP-RDB2 examples can be used also on S32G-VNP-RDB3. Example SJA1110 FreeRTOS lwIP S32G-VNP-RDB2 S32DS 3.5 RTD 1.0.2   SJA1110-MGS-EVM Example SJA1110 FreeRTOS lwIP SJA1110-MGS-EVM S32DS 3.5 RTD 1.0.2   MR-T1ETH8 Example SJA1110 FreeRTOS lwIP MR-T1ETH8 S32DS 3.5 RTD 1.0.2
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********************************************************************************* * Detailed Description: * Updated the example lwip_FreeRTOS_SJA1110 for board S32G-VNP-RDB2 * to enable ping from the command window, from all applicable ports * *ping 192.168.0.210 * *Pinging 192.168.0.210 with 32 bytes of data: *Reply from 192.168.0.210: bytes=32 time=2ms TTL=255 *Reply from 192.168.0.210: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.210: bytes=32 time=1ms TTL=255 *Reply from 192.168.0.210: bytes=32 time=1ms TTL=255 * *Ping statistics for 192.168.0.210: * Packets: Sent = 4, Received = 4, Lost = 0 (0% loss), *Approximate round trip times in milli-seconds: * Minimum = 1ms, Maximum = 2ms, Average = 1ms * * Installed packages to S32DS 3.5 update 14: * SW32SJA11xx_S32DS_3.5.0_RFP_D2206.zip * SJA11XX_RTD_4.4_1.0.1_P02_HF01_D2510_DesignStudio_updatesite.zip * SW32SJA1110_XJA11XX_ETH_PHY_4.4_1.0.8_CD01_D2509_DesignStudio_updatesite.zip * SJA11XX_ETH_SWITCH_4.4_1.0.2_CD01_D2509_DesignStudio_updatesite.zip * SW32SJA11xx_FreeRTOS_11.1.0_0.8.0_CD2_D2411_DesignStudio_updatesite.zip * SJA11XX_TCPIP_2.0.0_CD01_D2510_DesignStudio_updatesite.zip * * EVB: * - SW10[1]: On, SW10[2]: Off * - SW12[1]: On, SW12[2]: Off * * Configuration: * - Updated switch configuration * - Updated phy configuration * - Fixed Mcu/McuModuleConfiguration/McuPowerControlUnit - 1V8 and 2V5 * - Fixed Eth configuration * <setting name="EthMaxFrameLength" value="1518"/> * <setting name="EthCtrlConfigEgressFifoBufLenByte" value="1536"/> * <setting name="EthCtrlConfigIngressFifoBufLenByte" value="1536"/> * - TCPIP stack: enabled UDP_ECHO, etc. * - Changed IP address to 192.168.0.210 * - Added DIO * - Added nvm_metadata * - MAC learning is disabled * - The example includes two flash images for Port 4 SGMII speed * configuration towards the S32G: * - flash_image_2G5.bin (tested) * - flash_image_1G.bin (not tested) * * main.c * - Updated only the header * device.c * - Added LED routines * test.c * - Removed code that shuts down the TCP/IP stack after its predefined timeout * - Added debug stuff * - Commented out the code that initializes 2nd switch * * ----------------------------------------------------------------------------- * Test HW: S32G-VNP-RDB2 REV E * MCU: SJA1110A * Debugger: Lauterbach TRACE32 * Target: RAM or external FLASH (flash_image.bin generated) * EVB connection: any port <-> RDDRONE T1ADAPT (on ports where applicable) <-> USB-to-Ethernet adapter <-> Laptop DELL, Windows 11
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This article describes how to correctly install the SGTL5000 GUI on an existing Windows OS. and install documentations Since the initial user guide was written over a decade or two ago, the installation steps described in it have become invalid by now.
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I would like to present a bare-metal example project named MK22F51212_Project_FXLS8974CF, developed for the FXLS8974CF accelerometer. This project utilizes the FRDM-STBC-FNM03 multisensory board in combination with the FRDM-K22F Freedom Kinetis MCU board, and was created using the MCUXpresso IDE. Hardware Setup To ensure proper functionality, please configure the jumpers on the multisensory board as follows: J5: 3–4 — Powers the FXLS8974CF sensor J9: 1–2 — Enables Motion Detection mode J10: 1-2 — If BT_MODE=VDD (J9: 1-2) must be populated All other jumpers can remain open Project Functionality The K22F MCU continuously reads the following registers from the FXLS8974CF sensor in an infinite loop: OUT_X_LSB, OUT_X_MSB OUT_Y_LSB, OUT_Y_MSB OUT_Z_LSB, OUT_Z_MSB The raw data is first stored in the g_master_rxBuff array, then parsed into the accelX, accelY, and accelZ variables. To convert the raw data into acceleration values (in g), divide each value by the nominal sensitivity of 512, which corresponds to the default ±4g measurement range. Building and Debugging Once the project is imported into MCUXpresso IDE, follow these steps: 1. Clean and Build the project 2. Debug the project as LinkServer and Run the application 3. View the raw and/or processed acceleration values in the Global Variables Window Data Visualization with FreeMASTER To visualize the accelerometer data using FreeMASTER, follow these steps: Download and launch the latest version of FreeMASTER Terminate the debug session in MCUXpresso IDE Ensure the FRDM-STBC-FNM03 + FRDM-K22F kit is still connected to your PC In FreeMASTER, open the Connection Wizard and configure as follows: Select “Connect through a debugger probe or on-board debugger interface”  Choose “CMSIS-DAP compliant interface from ARM”  Select “Direct access to target microcontroller memory” Click “Plug-in Configuration”                 9. Test the connection. If successful, click OK twice and then Finish                       10. Click “Open an Existing Project” and locate the Project.pmpx file in your                              MCUXpresso workspace                   Now you can observe live accelerometer data in the FreeMASTER Oscilloscope or Variable Watch Window.   Attached are: FRDM-STBC-FNM03 multisensory board GERBER files and BOM, and Project for the KIT.  Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design.  Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction. 
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Here an example project using the PCF8563 is shown to demonstrate the easy use of the RTC devices from NXP. The PCF8563 is a real-time clock based on an ultra -low power oscillator and using an I 2 C- bus for interfacing. 
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************************************************************************************************************** The FRDM-A9957HN is an EVB designed for evaluation of PCA9957 daisy-chain SPI-compatible 4-wire serial bus controlled 24-channel constant current LED driver optimized for dimming and blinking 32 mA Red/Green/Blue/Amber (RGBA) LEDs. * The FRDM-A9957HN is designed to be used with FRDM-KL25Z Freedom Development Platform and an SDK example code.  * * Connection:      FRDM-KL25Z           OM13513 * VDD                 J9-4                           J9-2                                                                                                           * VDDIO             J9-8                            J9-4 * GND                 J2-14                         J2-7 * MOSI               J2-8                            J2-4 * MISO               J2-10                          J2-5 * SCLK               J2-12                          J2-6 * CS                   J2-6                            J2-3 * RESET            J9-6                            J9-3 ***************************************************************************************************************  
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*************************************************************************************************** The PCA9957 is a daisy-chain SPI-compatible 4-wire serial bus controlled 24-channel constant current LED driver optimized for dimming and blinking 32 mA Red/Green/Blue/Amber (RGBA) LEDs. * This simple example code was created for FRDM-KL25Z freedom board plus FRDM-A9957HN evaluation board. The code is sets the PCA9957 for the gradation control of all LED channels. * * Connection:      FRDM-KL25Z          FRDM-A9957HN * VDD                 J9-4                           J9-2                                                                                                           * VDDIO             J9-8                            J9-4 * GND                 J2-14                         J2-7 * MOSI               J2-8                            J2-4 * MISO               J2-10                          J2-5 * SCLK               J2-12                          J2-6 * CS                   J2-6                            J2-3 * RESET            J9-6                            J9-3 ***************************************************************************************************
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Q1. What is the difference between A and B? CBTL02043A has input and output pins on the opposite of the package, and is suitable for edge connector(s) with different signal sources on the motherboard. CBTL02043B has outputs on both sides of the package, and the device can be placed between two connectors to multiplex differential signals from a controller.     Q2. Can CBTL02043 be used for HDMI applications? No, CBTL02043 cannot be used for HDMI applications. HDMI TMDS signal has its DC termination supply voltage at 3.3V +/-5%. CBTL02043 maximum input voltage at differential pins is limited at 2.4V, only.   Q3. How does CBTL02043 affect the system channel loss budget? CBTL02043 will brings in extra insertion loss to the system. CBTL02043 has −1.3 dB loss at 4 GHz, which is equivalent to about 1.5 inch (3.81 cm) to 2 inch (5.08 cm) FR4 PCB loss. The system designers need to take this MUX insertion loss into account when planning the system loss budget.   Q4. Are there SPICE, IBIS or S-parameter models available for CBTL02043? There is no SPICE model. IBIS/S-parameter models can be found below in attachments.   Q5. How to bias the high-speed switch?   PCIe, DP, USB3, and SATA electrical signals require AC coupling between the transmitter and receiver. The AC coupling capacitors are usually placed close to the transmitter. CBTL02043 requires a bias voltage, less than 2 V, applied to its switches. There are several AC coupling capacitor placement options:   A. The capacitors can be placed between the MUX and the downstream controller, and the MUX is biased by the upstream controller.   B. The capacitors can be placed between the upstream transmitter and the MUX. RX signals on the motherboard sides usually do not require AC coupling capacitors since those capacitors are located on the add-in card. The TX MUX is biased by the downstream controller, and the RX MUX is biased by the upstream controller.   C. Do not place capacitors at both side of MUX, unless a bias voltage is provided. In case of that both upstream and downstream controllers’ common-mode voltage is higher than 2 V, a bias voltage, which is less than 2 V, is needed for CBTL02043. The following figure shows an implementation in this case.
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