i.MX Family Processor The i.MX family is designed for use in smartphones, wireless PDAs, gaming and many other mobile wireless applications, Freescale's i.MX Family of applications processors are a leading solution in today's smartphone environment. Based on ARM® core technology, the i.MX1, i. MXL, i.MX21, i.MX27 and i.MX31 are designed to offer low power consumption with real-world power performance and a high degree of integration to reduce your design time significantly. The i.MX Family supports a broad range of industry-leading platforms such as those based on the Microsoft® Window® CE operating systems, Palm® OS, Linux® OS, and Symbian™ operating systems. The i.MX portfolio is a leading solution in today's smartphone environment and is a central feature of Freescale's i.Smart smartphone reference design, providing power performance to our Innovative Convergence™ platforms. We are committed to continually expanding our Innovative Convergence platforms to support new technologies and new services as they emerge into the marketplace, such as advanced display technologies including smart panels; streaming video; multiple operating systems; and the far-reaching capabilities of the personal server.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              Processor CPU Speed FPU DMA Channels Embedded SRAM Flash Boot Video Acceleration 2D/3D Graphics i.MXS ARM920T 100MHz No 11 No NOR No No i.MXL ARM920T 200MHz No 11 No NOR DCT/iDCT Hardware Acceleration 2D/3D Graphics Through Software i.MX21S ARM926EJ-S 266MHz No 16 6KB NAND or NOR No No i.MX21 ARM926EJ-S 350MHz No 16 6KB NAND or NOR MPEG4 CIF 30 fps encoder and decoder 2D/3D Graphics with external accelerator i.MX27 ARM926EJ-S 400MHz No 16 45KB NAND or NOR H.264, MPEG-4, H.263 HW Enc/Dec; 24 fps VGA Full Duplex No i.MX31L ARM1136JF-S 532MHz Yes 32 16KB NAND or NOR MPEG4 VGA 30 fps Encode No i.MX31 ARM1136JF-S 532MHz Yes 32 16KB NAND or NOR MPEG4 VGA 30 fps Encode Integrated 2-D/3-D Processing Unit with OpenGL® Support i.MX35 ARM1136JF-S 532MHz Yes 32 128KB NAND, NOR, MMC/SD MPEG-4, H.264, ... Integrated 2D Processing Unit (Z160 @133MHz) with OpenVG® 1.1 Support i.MX51 ARM Cortex-A8 800MHz Yes 32 128kB NAND, NOR, MMC/SD MJPEG, MPEG-2, MPEG-4, H.263/264, VC-1, DivX, RV10 Integrated 2D (Z160 core @166MHz) and 3D (Z430 core @166MHz) Processing Unit with OpenVG® 1.1 and OpenGL ES® 2.0 / Direct3D Mobile Support i.MX53 ARM Cortex-A8 1GHz Yes 32 144kB NAND, NOR, MMC/SD MJPEG, MPEG-2, MPEG-4, H.263/264, VC-1, DivX, RV10 Integrated 2D and 3D (Z430 core @200MHz) Processing Unit with OpenVG® 1.1 and OpenGL ES® 2.0 / Direct3D Mobile Support For complete comparison click here. For more information about i.MX Family click here.

Question: To eliminate the need for pull-ups AND  pull-downs on the gpio boot override pins to save board space, does anyone know when in the boot rom that the GPIO pins are sampled and whether the internal Pull Downs are already enabled? Is this true for all the GPIO override pins? To just be able to provide an external Pull-up to specify boot options and NOT both pull-up and pull-down option. Can this be done? Answer: The pull-ups and pull-downs are active while POR_B is low (as defined in the datasheet). The pins are sampled on the 2 nd rising edge of RTC_XTALO before the rising edge of POR_B. As a caution, on-chip pull-up/downs are very weak and are primarily intended for controlling the pin (keeping it from logically wiggling) if the pin is not connected at all. If a pin is connected out to a trace, relaying on the on-chip PU/PD alone could be a little risky. Since the PU/PD is weak, it's possible to have noise coupled onto the pin. [Similar to Brett's comment above].

When configuring i.MX6 IPU IDMAC CPMEM parameters or debugging it, it's hard to find the value of a parameter inside the 160 bits word. This web tool separates the 160 bits words into parameters making it easier to check their values. Link: i.MX Tools 

Question: The i.MX6 documentation gives several different values for the maximum frequency of the IPU’s HSP_CLK clock. What are the correct HSP_CLK maximum frequency values for the i.MX6 Dual/Quad and Solo/DualLite? Can HSP_CLK run at 270 MHz on both the DQ and SDL CPUs, but it’s not clear from the documentation if this is permitted. Maximum HSP_CLK frequencies listed in the reference manual (DQ😞 264 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources)) 266 MHz (Table 18-3 (System Clock Frequency Values)) Maximum HSP_CLK frequencies listed in the reference manual (SDL😞 270 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources), Table 18-3 (System Clock Frequency Values)) Answer: Referring to Figure 18-2, IPU1_HSP_CLK_ROOT may be selected to have 1 of 4 sources. These sources are highlighted in yellow on the northwest corner of the page and the previous paragraph states these are max values. Possible sources are 540, 528, 396, and 480 MHz. The 480 MHz is divided by 4 before the selector, so winds up being 120 MHz. Per the diagram, these are all divided by 2 for IPU1_HSP_CLK_ROOT. The result is 270, 264, 198, and 60 MHz choices. Therefore, the max for IPU1_HSP_CLK_ROOT is 270 MHz for DQ. MX6D/Q and MX6S/DL are different with respect to max HSP_CLK frequency. MX6D/Q = 264 MHz max MX6S/DL = 270 MHz max

Random Number Generator - RNGA Download rng-tools: http://downloads.sourceforge.net/sourceforge/gkernel/rng-tools-2.tar.gz This tool tests the link between a random number generator hardware and the kernel's PRNG (pseudo-random number generator). ./ltib -m shell LTIB> cd rpm/BUILD/ LTIB> cp ~/hwrandom/rng-tools-2.tar.gz . LTIB> tar zxvf rng-tools-2.tar.gz LTIB> cd rng-tools-2 LTIB> ./configure --host=arm-linux LTIB> make LTIB> sudo cp rngtest /tftpboot/ltib/home/ Restart your board and execute this command in the board's console: $ cat /dev/hwrng | /home/rngtest -c 1000

Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. These are detailed programming aids for the registers associated with DRAM initialization (LPDDR3 and LPDDR2). The last work sheet tab in the tool formats the register settings for use with the ARM DS5 debugger. It can also be used with the windows executable for the DDR Stress Test (note the removal of debugger specific commands in this tab). These programming aids were developed for internal NXP validation boards.   This tool serves as an aid to assist with programming the DDR interface of the i.MX 7ULP and is based on the DDR initialization scripts developed for NXP boards and no guarantees are made by this tool.   The following are some general notes regarding this tool: The default configuration for the tool is to enable bank interleaving. Refer to the "How To Use" tab in the tool as a starting point to use this tool. The tool can be configured for one of the two memory types supported by the i.MX 7ULP.  Nevertheless, two separate programming aids are provided based on the DRAM type: LPDDR3 and LPDDR2.  Therefore, you may use the tool pre-configured for your desired memory type as a starting point. Some of the CCM programming at the beginning of the DRAM initialization script (in the "DStream .ds file" tab) were automatically generated and in very few cases may involve writing to reserved bits, however, these writes to reserved bits are simply ignored. Note that in the "DStream .ds file" tab there are DS5 debugger specific commands that should be commented out or removed when using the DRAM initialization for non-debugger specific applications (like when porting to bootloaders). This tool may be updated on an as-needed basis for bug fixes or future improvements.  There is no schedule for aforementioned maintenance. For questions or additional assistance using this tool, please contact your local sales or FAE.

Flashing Kernel and Root File System using RedBoot Creating an image A kernel image and a root file system can be created using All Boards LTIB or compiling the kernel and setting the correct set of files. Create a root file system image from a set of files converting the files to a jffs2 file system. For this, install the package mtd-tools. In Ubuntu type apt-get install mtd-tools For making an root file system for flash, use the jffs2 file system like: mkfs.jffs2 -r rootfs/ -e 0x20000 -n -p -o rootfs.jffs2 Where rootfs/ is the original set of file for the file system and rootfs.jffs2 is the output image file. Flashing Some connections errors can be avoided by All Boards Configuring RedBoot. The process below uses TFTP to copy the files between host and target. See All Boards TFTP for detail in configurations. Copy the kernel image and the root file system image to the TFTP dir. For example, in  LTIB dir, type sudo cp ./rootfs/boot/zImage /tftpboot sudo cp rootfs.jffs2 /tftpboot/ Where /tftpboot is the dir configured for TFTP The next steps are performed in a Minicom session, and happens on the board. Formatting the flash: fis init Flashing kernel Load kernel image (zImage) using the command below. Remember to modify the host IP address: load -r -b 0x100000 /tftpboot/zImage -h 10.29.244.99 The address 0x100000 is used as a temporary location Create the kernel at the right address (0x200000, for IMX31PDK) fis create -f 0x200000 kernel Flashing root file system Load root file system image (rootfs.jffs2) to the temporary address. Remember to modify the host IP address: load -r -b 0x100000 /tftpboot/rootfs.jffs2 -h 10.29.244.99 Create the root file system in the right address (0x600000, for IMX31PDK. fis create -f 0x600000 root Testing You can now load your kernel in the flash by typing: fis load kernel To know if the root file system written in the flash was correctly saved, execute the NFS file system and mount the flash. For load the the root file system by NFS, type: exec -b 0x100000 -l 0x200000 -c "noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=10.29.244.99:/tftpboot/rootfs init=/linuxrc ip=10.29.241.6:10.29.244.99" Wait the system go up, then mount the flash at /mnt. Reminde that the flash has a jffs2 file system. mount -t jffs2 /dev/mtdblock2 /mnt ls /mnt List the /mnt contents. The output must be the right file system. Modifying the initial script Reset the board and press CTRL-C. Type fc to modify the configurations and insert the initialization script. RedBoot> fc Run script at boot: true Boot script: Enter script, terminate with empty line >> fis load kernel >> exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=none" >> Boot script timeout (1000ms resolution): 1 Use BOOTP for network configuration: false Gateway IP address: 10.29.241.254 Local IP address: 10.29.241.6 Local IP address mask: 255.255.254.0 Default server IP address: 10.29.244.99 Board specifics: 0 Console baud rate: 115200 Set eth0 network hardware address [MAC]: false GDB connection port: 9000 Force console for special debug messages: false Network debug at boot time: false Update RedBoot non-volatile configuration - continue (y/n)? y ... Read from 0x07ee0000-0x07eff000 at 0x00080000: . ... Erase from 0x00080000-0x000a0000: . ... Program from 0x07ee0000-0x07f00000 at 0x00080000: . RedBoot> Remember to save the configuration in the flash by typing y Reset the system. To certify that the board is loading the system from flash, remove the ethernet cable.

I was trying to implement an E-Ink solution using IMX7D. Unfortunately I only had a IMXEBOOKDC3 available, not the DC4 shown on the IMX7D E-Ink tutorials. After a couple of tries I found the right way of connecting the expansion board and the the definition of the arguments on U-boot to make the IMX7D and DC3 work together.  I logged these considerations on the blog post below: http://bit.ly/IMX7D_IMXEBOOKDC3   Andres

It is one mandatory patch if you are in the case: The chip you are using is imx6sx TO1.3 and newer, and use the kobs-ng to flash your image to the Nand memory chip. If you are using MFG, you also need rebuild the kobs-ng, and update the binary into your MFG tool.  The patch have been integrated into the default release yocto_4.1.15, but if you are using the older version release before yocto_4.1.15, please make sure you have integrated the modification when you need to use kobs-ng to flash the image to Nand memory chip. commit 5ecf08703da489a3bd317341f630870a3d07dab9 Author: Han Xu <han.xu@nxp.com> Date:   Thu Jan 28 14:40:14 2016 -0600     MMT-105: change the i.mx6sx revision check change the i.mx6sx revision check since v1.3 uses v1.2 boot config as well.     Signed-off-by: Han Xu <han.xu@nxp.com>     (cherry picked from commit 1dac0c14d1e2016c2fa804f6628543d8d238c680) diff --git a/src/plat_boot_config.c b/src/plat_boot_config.c index 461675a..e1ef6f3 100644 --- a/src/plat_boot_config.c +++ b/src/plat_boot_config.c @@ -1,5 +1,5 @@ /* -* Copyright (C) 2010-2015 Freescale Semiconductor, Inc. All Rights Reserved. +* Copyright (C) 2010-2016 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -256,10 +256,12 @@ int discover_boot_rom_version(void)                                         }                                         fgets(line_buffer, sizeof(line_buffer), revision);                                         if (!strncmp(line_buffer, "1.0", strlen("1.0")) || -                                                       !strncmp(line_buffer, "1.1", strlen("1.1"))) +                                                       !strncmp(line_buffer, "1.1", strlen("1.1"))) {                                                 plat_config_data = &mx6sx_boot_config; -                                       if (!strncmp(line_buffer, "1.2", strlen("1.2"))) +                                       /* all other revisions should use the latest boot config */ +                                       } else {                                                 plat_config_data = &mx6sx_to_1_2_boot_config; +                                       }                                 }                                 if (!strncmp(line_buffer, plat_imx6ul, strlen(plat_imx6ul))) How to apply it to older version quickly:  Apply the patch and rebuild the kobs-ng in yocto_3.14_x environment: bitbake -c compile -v -f imx-kobs cd tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/imx-kobs/5.0-r0/imx-kobs-5.0 git apply yocto_3_14_x.patch bitbake -c compile -v -f imx-kobs you can find the new binary “kobs-ng” under “tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/imx-kobs/5.0-r0/build/src” Apply the patch and rebuild the kobs-ng in yocto_3.10_53 environment: . ./setup-environment build bitbake -c compile -v -f imx-kobs cd tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/imx-kobs/3.10.53-1.1.0-r0/imx-kobs-3.10.53-1.1.0 git apply yocto_3_10_53patch bitbake -c compile -v -f imx-kobs you can find t he new binary “kobs-ng” under tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/imx-kobs/3.10.53-1.1.0-r0/imx-kobs-3.10.53-1.1.0/src As one alternation method, you also can download the whole imx-kobs-5.4 package which yocto_4.1.15 is using to build. wget http://www.freescale.com/lgfiles/NMG/MAD/YOCTO//imx-kobs-5.4.tar.gz

Question: LVDS in split mode (dual lvds) is used. In this configuration, only LVDS0_CLK is used. What is the suggestion for the LVDS1_CLK?  The HW user guide says that if this is unused, then to leave it floating.  Would we also suggest the same for this case or would termination be more appropriate?  Or is there some possible way to gate this clock?  (if so, it isn't obvious in the RM) Answer: According to the MX6 Developer's Guide, any unused LVDS pins should be left floating, so the LVDS1_CLK pair, in this case should be left floating. In order to minimize any potential EMC, the lands for those balls should not have any additional traces leading away. To add a bit more information, the customer ran some tests and found that the clock gate bits for the LVDS1 are essentially ignored in Dual mode.  The only way to disable it is if they are both disabled which is not helpful in this case.  It seems that the Dual mode setting overrides the CG.

The Android O8.0.0_1.4.0 for i.MX 7ULP RFP(GA) release is now available on IMX_SW web page. Overview -> BSP Updates and Releases -> Android O8.1.0 for i.MX 7ULP GA.   Files available:   # Name Description 1 android_o8.1.0_1.4.0_7ulp-ga_docs.tar.gz Android O8.1.0_1.4.0 for 7ULP GA Documentation 2 imx-o8.1.0_1.4.0_7ulp-ga.tar.gz i.MX Android proprietary source code for Android O8.1.0_1.4.0_7ULP_GA 3 android_o8.1.0_1.4.0_7ulp-ga_image_7ulpevk.tar.gz Prebuilt images with NXP extended features for the i.MX7ULP EVK board 4 android_o8.1.0_1.4.0_7ulp-ga_tools.tar.gz Manufacturing Toolkit and VivanteVTK for Android O8.1.0_1.4.0_7ULP_GA 5 fsl_aacp_dec_O8.1.0-7ULP_GA.tar.gz AAC Plus Codec for  O8.1.0_1.4.0_7ULP_GA   Target boards: i.MX 7ULP EVK   Features and Known issues For features and known issues, please consult the Release Notes in detail.#

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This is a How-To documentation for OpenCL on i.MX6 using LTIB, there are all necessary steps and sample code to create,  build and run a HelloWorld application.

Many times I came across one issue while using Redlib in MXUXpresso IDE project. I like to provide some guidance here to match the proper solution that can help others. Problem Statement : printf or sprintf doesn't print anything or printing random characters while using Redlib library. Reason : When you are creating your project you may ask to choose the c/c++ library setting to select either of the c libray provided by IDE in Advanced project setting wizard. If you have not checked the option "Redlib: Use floating point version of printf" (which will use the floating-point variant of printf) have tried to print the floating point value, You will end up with the problem mentioned above. Solution : You need to enable the floating support by modifying some preprocessor directives in "Defined symbols (-D)" wizard of your project. Path :  Your Project > properties > C/C++ Build > Setiings > Tool Settings > MCU C Compiler > Preprocessor. These are: PRINTF_FLOAT_ENABLE - keep the directive value to "1" SCANF_FLOAT_ENABLE - keep the directive value to "1" CR_INTEGER_PRINTF - Undefine/Remove this directive Click on Apply and close. That is it. Now you will have your expected prints for floating point values in your debugger console.

Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response.   This is a detailed programming aid for the registers associated with MMDC initialization. The last sheet formats the register settings for use with ARM RealView ICE. It can also be used with the windows executable for the DDR Stress Test. This programming aid was used for internal NXP validation boards.

logcat Logcat is the most powerful debug tool for Android. Logcat is to Android what the dmesg is to kernel. It shows messages logs from system and applications. logcat can be used directly on board console or via adb. $ logcat directly on board console. It gives the complete log message list and waits for any new log message. $ logcat & board console. It gives log list and run in background. Any new log message will be displayed. # adb logcat Using adb you can get log messages through Ethernet or USB connection. $ logcat -d > logcat.txt it sends log messages to logcat.txt file and exits. $ logcat *:W it filters expression displays all log messages with priority level "warning" and higher, on all tags * * http://developer.android.com/guide/developing/debugging/debugging-log.html

When streaming, if you want to play a streaming URL, it can be inconvenient if the browser cannot recognize the URL as a media stream and downloads the content rather than using Gallery to play it. To create this kind of media streaming, you need to write an apk to use VideoView to play the URL/media stream from the console. Here is the command of how to play a media file or network stream from console. Gingerbread am start -n com.cooliris.media/com.cooliris.media.MovieView -d "<URL>"       The URL can be file position or network stream URL, such as: you can play a local file by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "/mnt/sdcard/test.mp4" You can also play a http stream by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "http://v.iask.com/v_play_ipad.php?vid=76710932" Or play a rtsp stream by: am start -n com.cooliris.media/com.cooliris.media.MovieView -d "rtsp://10.0.2.1:554/stream" ICS am start -n com.android.gallery3d/com.android.gallery3d.app.MovieActivity -d "<URL>"        The URL has the same definition of Gingerbread.

This tutorial teaches how to program bootloader on a SD Card using ATK. To program kernel and root file system to the SD card, please follow this i.MX35 PDK Linux Booting SD    ATK (Advanced Toolkit)       ATK (Advanced Toolkit) is a Windows software for programming the flash memory of i.MX boards. It can be downloaded here.     Using ATK       This section will describe the procedure to erase and program the bootloader in the SD Card.       1. Connect a serial cable between PC and i.MX board.       2. Set the switches:       Debug Board: SW9 -> 0         SW10 -> 0         Personality Board: SW1 and SW2 (All bits) -> 0     3. Run ATK going to Start -> Programs -> AdvancedToolKit -> AdvancedToolKit           Set the options:       i.MX CPU -> i.MX35_TO2       Device memory -> DDR2;       Communication Channel -> Serial Port (Usually COM1)     4. Click Flash Tools to erase, program, or dump the the memory and click GO     Erasing     1. To erase SD Card, select the parameters as below: Select MMC/SD as "Flash Model".     Select Erase on "Operation Type". 2. Turn on the board and press Erase.     3. ATK shows a message: "Flash erase successful!" when card is erased   Programming     Next, program the bootloader image into the memory card following the steps below:     1. Select the parameters: The bootloader binary image file can be found into your Board Support Package (click here to download) Select Program on "Operation Type".     Address: 0x00000000     File: "mx35_3stack_redboot_mmc.bin" (or similar name that indicates a MMC/SD image)     2. Press Program.     3. Close ATK, turn off the board and set switches to:     Debug Board: SW9 -> 0       SW10 -> 0 Personality Board: SW2 (Bits 1 and 2) -> 1       SW2 (All other bits) -> 0       SW1 (All bits) -> 0     4. Open Hyper Terminal, set it 115200,N,8 and see RedBoot Prompt.      

  IMX6 SL boot process is described in Chapter 8 (System Boot) of the Reference Manual. Shortly, the loading boot data from boot SD card is performed in two stages : first read IVT, DCD, then read executable code, using the Boot Data Structure.    At first, boot ROM copies 4K byte (containing IVT and DCD ) from sector 0 of the boot SD card to internal buffer in OCRAM, located in reserved area (0x00900000 - 0x00907000). This area must not be used by user application.   Then, “after checking the Image Vector Table header value (0xD1) from Program Image, the ROM code performs a DCD check. After successful DCD extraction, the ROM code extracts from Boot Data Structure the destination pointer and length of image to be copied to RAM device from where code execution occurs”.   The IVT contains field entry - absolute address of the first instruction to execute from the image.   Note : according to Figure 8-3 (Internal ROM and RAM memory map), only OCRAM Free Area (68KB) from 0x00907000 till 0x00918000 may be used by user’s application.   The attachment contains SD-bootable example.