i.MX Processors Knowledge Base

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i.MX Processors Knowledge Base

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This document intends to provide an overview of the i.MX8 Boot process and walk you through the process of creating a bootable image. Boot process Coming out of a reset state the i.MX8 ROM (firmware that is stored in non-volatile memory of the i.MX8) reads the boot mode pins to determine the boot media/device that will be used. The i.MX8 can boot out of the following boot devices: eMMC/SD card FlexSPI Flash NAND Serial Download Protocol (USB) - This is used in manufacturing mode to bring-up a board by downloading an image to RAM and then flashing the on-board boot device. The following table indicates the available options on a i.MX8QXP, the i.MX8 reads the boot mode pads and based in the configuration selects the desired boot device. Once the boot device has been identified, ROM configures the boot media and attempts to read the image from a predefined address in the boot device, the following table shows the addresses where the image is expected to be on different boot devices. ROM loads data from the predefined addresses above (depending on the selected boot device) to the System Controller Unit (SCU) internal memory (tightly coupled memory) and parses it to find the image container. It can also boot by downloading an image through USB. The image container has all the information needed to load all the images to the system, the first images that get loaded are the System Controller Firmware (SCFW) and Security Controller Firmware (SECO). The SECO FW needs to be loaded to refresh the watchdog timer (kick the dog) in the device, if the SECO FW is not loaded before the watchdog expires the device will reset, this usually happens when the device fails to fetch a valid image from the boot media. Once the SCFW is loaded, ROM jumps to it and starts executing it. The SCFW then initializes the DDR and starts loading the images for the Cortex-M4 (optional) and the Cortex-A cores (optional). Once the images are loaded to their destination memory the SCFW boots the cores and sets them in their start address. Creating a bootable image As a recap a bootable image is comprised of as minimum the System Controller Firmware and the Security Controller Firmware, optionally it can contain images for the Cortex M4 cores (if more than one available as in the case of QM devices) and Cortex A cores. It is possible to boot an image that only contains the SCFW and SECO FW, this could be useful in the first stages of porting the SCFW to the target board. It is also possible to boot an image with only the Cortex-M4 image (baremetal, FreeRTOS, AutoSAR...), only the Cortex-A image (U-boot or any bootloader) or both Cortex-M4 and Cortex-A images. Mkimage tool The tool in charge of merging all these images and creating a bootable image for the i.MX8 is called mkimage, and can be obtained in source form in the following repository: https://source.codeaurora.org/external/imx/imx-mkimage mkimage is only supported in Linux So the first step is to clone the mkimage repository into our machine and checkout the latest branch, at the time of writing this document the latest release is 4.14.98_02: git clone https://source.codeaurora.org/external/imx/imx-mkimage cd imx-mkimage git checkout imx_4.14.98_2.0.0_ga‍‍‍‍‍‍‍‍‍‍‍‍ ‍ ‍ ‍ You should now be able to see the following folders: Getting the SCFW Now that you have the mkimage tool you need some actual images to work with, if you are using a custom board you might need to port the SCFW and DDR configuration files for it (depending on how close it follows NXP's reference board). The following is a compendium of documents on the basics of the SCFW and how to build it from scratch you can go there if you need help getting started with the porting process: https://community.nxp.com/docs/DOC-342654 If you are trying this on one of NXP's reference board you can use a pre-built SCFW binary, this can be obtained through the building process of the Yocto project or by downloading the porting kit and following these steps: Dowload SCFW binaries for release 4.14.98_02 here. chmod a+x imx-sc-firmware-1.2.bin ./imx-sc-firmware-1.2.bin‍‍‍‍‍‍‍‍ ‍ ‍ You will prompted to accept a license agreement and after that the binaries will be extracted: Getting the SECO FW The Security Controller Firmware is only distributed in binary form and can be obtained from the NXP website. Download SECO FW binaries for release 4.14.98_02 here. chmod a+x firmware-imx-8.1.bin ./firmware-imx-8.1.bin‍‍‍‍‍‍‍‍ ‍ ‍ You will prompted to accept a license agreement and after that the   binaries   will be extracted: The SECO FW is under firmware/seco mx8qm-ahab-container.img -----> SECO FW for QM devices mx8qx-ahab-container.img ------> SECO FW for QXP devices Getting an image for the Cortex-M4 The image for the Cortex-M4 can be generated using the SDK: https://mcuxpresso.nxp.com/en/select Just select the device you are working with and click Build MCUXpresso SDK, then you will prompted to select your IDE and host. Click on Download SDK and a compressed file containing the SDK will be dowloaded to your computer. Now you only need to uncompress the file and follow the steps in the getting started document to generate the image.  The getting started document includes steps to setup the toolchain and build an image for the M4. An M4 binary for the QM and QXP MEKs is also attached in this document, the example outputs a hello world message on the M4 terminal. Getting an image for the Cortex-A  The bootloader for the Cortex-A cores can be obtained through the Yocto BSP: The steps on generating the image for the 4.14.98 release can be found here: https://www.nxp.com/webapp/Download?colCode=imx-yocto-L4.14.98_2.0.0_ga  Some more details on the Yocto BSP can be found here: https://community.nxp.com/docs/DOC-94849 All the required binaries to create a bootable image for the Cortex-A cores on the MEK platforms are attached here. Building a bootable image Once all the required pieces have been built/obtained, the bootable image can be created. The SCFW, SECO FW and respective Cortex-M4/A images need to be copied to the folder for the target device, i.e. if you are building an image for an i.MX8QX variant copy the binaries for that variant to its folder:   Here is a list of the required files to build a bootable image: scfw_tcm.bin -------------------------------------------- System Controller Firmware binary for the target board mx8qm(qx)-ahab-container.image ---------------- Security Controller Firmware for the QM or QXP variants bl31.bin --------------------------------------------------- ARM Trusted Firmware binary (Required if using u-boot with ATF) Only needed to create Cortex-A image with u-boot u-boot.bin ------------------------------------------------ U-boot binary (optional) m4_image ----------------------------------------------- M4 binary image, the QM variant has 2 Cortex-M4s and in this case to M4 binaries might be required (optional) Once the required binaries have been copied to the desired variant folder (QXP or QM in this example), you are ready to start building some images. All the targets for building different images are defined on the soc.mak file contained in each folder, this file contains different examples for creating a lot of the supported bootable images. Creating a SCFW only image The target used to create a SCFW only image is flash_b0_scfw and it is defined under the soc.mak file of each variant. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0_scfw‍‍ ‍ To invoke this target   for QM from the imx-mkimage directory: make SOC=iMX8QM flash_b0_scfw‍‍ ‍ The target definition for flash_b0_scfw can be seen below. Definition for QXP: flash_scfw flash_b0_scfw: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin ./$(MKIMG) -soc QX -rev B0 -dcd skip -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -out flash.bin ‍‍‍‍‍ ‍ ‍ ‍ Definition for QM: flash_b0_scfw: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -out flash.bin‍‍‍‍ ‍ ‍ Creating a Cortex-A image only The target used to create a Cortex-A image only is called flash_b0. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0 ‍ ‍ ‍ To invoke this target for QM from the imx-mkimage directory: make SOC=iMX8QM flash_b0‍ ‍ ‍ ‍ The target definition for flash_b0 can be seen below. Definition for QXP: flash flash_b0: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin u-boot-atf.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -ap u-boot-atf.bin a35 0x80000000 -out flash.bin‍‍ ‍ ‍ Definition for QM: flash_b0: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin u-boot-atf.bin ./$(MKIMG) -soc QM -rev B0 -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -ap u-boot-atf.bin a53 0x80000000 -out flash.bin‍‍ ‍ ‍ Creating a Cortex-M4 image only The target used to create a Cortex-m4 image only is called flash_b0_cm4 on QXP and QM has different targets since there are two M4s available in the system. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_b0_cm4‍ ‍ To invoke this target for QM from the imx-mkimage directory: // For Cortex-M4_0 only make SOC=iMX8QM flash_b0‍_cm4‍_0 // For Cortex-M4_1 only make SOC=iMX8QM flash_b0‍_cm4‍_1 // For both Cortex-M4_0 and Cortex-M4_1 make SOC=iMX8QM flash_b0‍_m4‍s_tcm ‍‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ The target definition for flash_b0_cm4 can be seen below. Definition for QXP: flash_cm4 flash_b0_cm4: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin‍‍ ‍ ‍ Definitions for QM: flash_b0_cm4_0: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin flash_b0_cm4_1: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m4_image.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m4_image.bin 1 0x38FE0000 -out flash.bin flash_b0_m4s_tcm: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin m40_tcm.bin m41_tcm.bin ./$(MKIMG) -soc QM -rev B0 -dcd skip -append mx8qm-ahab-container.img -c -scfw scfw_tcm.bin -p1 -m4 m40_tcm.bin 0 0x34FE0000 -m4 m41_tcm.bin 1 0x38FE0000 -out flash.bin‍‍‍‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ ‍ The examples above are for M4 images booting from TCM, the M4 is capable of booting and executing from DDR and it is also able to XIP (execute in place) from SPI memory, for examples on this targets please look at the soc.mak for the desired variant. Creating an image with both Cortex-A and Cortex-M4 images The target used to create an image with software for all the cores is called flash_linux_m4. To invoke this target for QXP from the imx-mkimage directory: make SOC=iMX8QX flash_linux_m4 ‍ ‍ To invoke this target for QM from the imx-mkimage directory: make SOC=iMX8QM flash_linux_m4 ‍ ‍ The target definition for flash_linux_m4 can be seen below. Definition for QXP: flash_linux_m4: $(MKIMG) mx8qx-ahab-container.img scfw_tcm.bin u-boot-atf.bin m4_image.bin ./$(MKIMG) -soc QX -rev B0 -append mx8qx-ahab-container.img -c -flags 0x00200000 -scfw scfw_tcm.bin -ap u-boot-atf.bin a35 0x80000000 -p3 -m4 m4_image.bin 0 0x34FE0000 -out flash.bin ‍ ‍ Definition for QM: flash_linux_m4: $(MKIMG) mx8qm-ahab-container.img scfw_tcm.bin u-boot-atf.bin m4_0_image.bin m4_1_image.bin ./$(MKIMG) -soc QM -rev B0 -append mx8qm-ahab-container.img -c -flags 0x00200000 -scfw scfw_tcm.bin -ap u-boot-atf.bin a53 0x80000000 -p3 -m4 m4_0_image.bin 0 0x34FE0000 -p4 -m4 m4_1_image.bin 1 0x38FE0000 -out flash.bin ‍ ‍ Flash image This will create a bootable image named flash.bin, to flash this image to the SD card and boot it on your MEK simply do: sudo dd if=iMX8QX/flash.bin of=/dev/mmcblkX bs=1k seek=32‍‍‍‍‍‍ ‍ If the desired target is a QM variant change if=iMX8QX... to if=iMX8QM. Then match your SD card device on "of=/dev/mmcblkX" you can see how your SD card enumerates by typing lsblk on your console before and after inserting your SD card. Remember from the information above that the i.MX8 will search for the image at 32k on the SD card, that is why we are flashing it there. For more examples please look at the soc.mak file, it includes examples for different boot media (NAND/QSPI) as well as different configurations and usage. Additional resources Reference Manual Chapter 5 System Boot SCFW API and Port document imx-mkimage README System Controller Firmware 101 
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NXP i.MX 8 series of application processors support running ArmV8a 64-bit and ArmV7a 32-bit user space programs.  A Hello World program that prints the size of a long int is cross-compiled as 32-bit and as 64-bit from an Ubuntu host and then each is copied to MCIMX8MQ-EVK and run. Resources: Ubuntu 18.04 LTS Host i.MX 8M Evaluation Kit|NXP  MCIMX8MQ-EVK Linux Binary Demo Files - i.MX 8MQuad EVK L4.9.88_2.0.0_GA release Source Code: Create a file with contents below using your favorite editor, example name hello-sizeInt.c. #include <stdio.h> int main ( int argc , char * * argv ) { printf ( "Hello World, size of long int: %zd\n" , sizeof ( long int ) ) ; return 0 ; } ‍‍‍‍‍‍‍ Ubuntu host packages: $ sudo apt - get install - y gcc - arm - linux - gnueabihf $ sudo apt - get install - y gcc - aarch64 - linux - gnu‍‍ ‍ ‍ Line 1 installs the ArmV7a cross-compile tools: arm-linux-gnueabihf-gcc is used to cross compile on Ubuntu host Line 2 install the ArmV8a cross-compile tools: aarch64-linux-gnu-gcc is used to cross compile on Ubuntu host Create Linux User Space Applications Build each application and use the static option to gcc to include run time libraries. Build ArmV7a 32-bit application: $ arm - linux - gnueabihf - gcc - static hello - sizeInt . c - o hello - armv7a‍ - static ‍ ‍ Build ArmV8a 64-bit application: $ aarch64 - linux - gnu - gcc - static   hello - sizeInt . c - o hello - armv8a‍ - static ‍ ‍ Copy Hello applications from Ubuntu host and run on MCIMX8MQ-EVK Using a SDCARD written with images from L4.9.88_2.0.0 Linux release (see resources for image link), power on EVK with Ethernet connected to network and Serial Console port which was connected to a windows 10 PC. Launched a terminal client (TeraTerm) to access console port. Login credentials: root and no password needed. Since Ethernet was connected a DHCP IP address was acquired, 192.168.1.241 on the EVK.  On the Ubuntu host, secure copy the hello applications to EVK: $ scp hello - armv7a - static root@ 192.168 . 1.241 : ~ / hello - armv7a - static                           100 %   389KB   4 . 0MB / s   00 : 00     $ scp hello - armv8a - static root@ 192.168 . 1.241 : ~ / hello - armv8a - static                           100 %   605KB   4 . 7MB / s   00 : 00 ‍‍‍‍‍ ‍ ‍ ‍ ‍ ‍ Run: root @imx8mqevk : ~ # ./hello-armv8a-static Hello World , sizeof long int : 8 root @imx8mqevk : ~ # ./hello-armv7a-static Hello World , sizeof long int : 4 ‍‍‍‍ ‍ ‍ ‍ ‍
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i.MX8X 板级开发包镜像结构 ...................................... 3 2 创建 i.MX8QXP Linux 5.4.24 板级开发包编译环境 ..... 3 2.1 下载板级开发包 ....................................................... 3 2.2 创建yocto编译环境: ................................................. 5 2.3 独立编译 ............................................................... 10 3 i.MX8X SC firmware ................................................. 16 3.1 SC firmware 目录结构 ........................................... 16 3.2 SC firmware 启动流程 ........................................... 18 3.3 SC firmware定制 ................................................... 18 4 i.MX8X ATF .............................................................. 30 5 FSL Uboot 定制 ........................................................ 32 5.1 FDT支持 ............................................................... 33 5.2 DM(driver model)支持 ........................................... 38 5.3 Uboot目录 结构 ..................................................... 52 5.4 Uboot编译 ............................................................. 54 5.5 Uboot初始化流程 .................................................. 55 5.6 uboot 定制 ............................................................ 66 5.7 uboot debug信息 ................................................... 82
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Some customer need to know how to add support RS485 mode half duplex? Here give some recommends. About i.MX6 UART to RS485 applications 1. Using RS485 mode of UART directly. On hardware, you should use UART_CTS_B to control RX & TX. On software, The link for you reference: Does UART in RS485 mode support only 9 Bit mode for i.MX6 ?  2. Sensing IO direction Automatically via hardware, don't need to tune software. For i.MX8QXP As the linux BSP for i.MX8QXP do not support RS 485 mode, so for the RS 485 using you can use the Sensing IO direction Automatically via hardware, don't need to tune software. As the above i.MX6 design.
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344474 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344473 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344893 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344779 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344896 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345359 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344579 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345307 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345322 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345644 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-344336 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345672 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345680 
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[中文翻译版] 见附件   原文链接: https://community.nxp.com/docs/DOC-345751 
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All below changes are done based on imx_android-10.0_5.4.y. mek_8qm enable uSD 8987 wifi            1. hardware rework                no hardware rework required            2. patches The patch is attached as 0001-8qm-usd-8987-wifi.patch mek_8qm enable M.2 8987 wifi            1. hardware rework                no hardware rework required            2. patches The patch is attached as  0001-8qm-m2-8987-wifi.patch evk_8mq enable uSD 8987 wifi            1. hardware rework                no hardware rework required            2. patches diff --git a/imx8m/evk_8mq/BoardConfig.mk b/imx8m/evk_8mq/BoardConfig.mk index db7c4991..4d130cc0 100644 --- a/imx8m/evk_8mq/BoardConfig.mk +++ b/imx8m/evk_8mq/BoardConfig.mk @@ -136,7 +136,8 @@ ifeq ($(TARGET_USE_DYNAMIC_PARTITIONS),true) TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-no-product.dtb else # imx8mq with HDMI display - TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-pcie1-m2.dtb + TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-usd-wifi.dtb + # imx8mq with MIPI-HDMI display TARGET_BOARD_DTS_CONFIG += imx8mq-mipi:imx8mq-evk-lcdif-adv7535.dtb # imx8mq with HDMI and MIPI-HDMI display diff --git a/imx8m/evk_8mq/SharedBoardConfig.mk b/imx8m/evk_8mq/SharedBoardConfig.mk index 330ab1c5..a6654bad 100644 --- a/imx8m/evk_8mq/SharedBoardConfig.mk +++ b/imx8m/evk_8mq/SharedBoardConfig.mk @@ -7,10 +7,10 @@ PRODUCT_IMX_TRUSTY := true #Enable this to disable product partition build. #IMX_NO_PRODUCT_PARTITION := true -#NXP 8997 wifi driver module +# NXP 8987 wifi driver module BOARD_VENDOR_KERNEL_MODULES += \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/mlan.ko \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/pcie8xxx.ko + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/mlan.ko \ + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/moal.ko # mipi-panel touch driver module BOARD_VENDOR_KERNEL_MODULES += \ diff --git a/imx8m/evk_8mq/UbootKernelBoardConfig.mk b/imx8m/evk_8mq/UbootKernelBoardConfig.mk index 5aa1ce35..4c3378f0 100644 --- a/imx8m/evk_8mq/UbootKernelBoardConfig.mk +++ b/imx8m/evk_8mq/UbootKernelBoardConfig.mk @@ -14,7 +14,7 @@ endif TARGET_BOOTLOADER_CONFIG += imx8mq-evk-uuu:imx8mq_evk_android_uuu_defconfig TARGET_KERNEL_DEFCONFIG := imx_v8_android_defconfig -# TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig +TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig diff --git a/imx8m/evk_8mq/android_addition_defconfig b/imx8m/evk_8mq/android_addition_defconfig new file mode 100644 index 00000000..f51bd5ff --- /dev/null +++ b/imx8m/evk_8mq/android_addition_defconfig @@ -0,0 +1,2 @@ +CONFIG_WLAN_VENDOR_NXP=y +CONFIG_MXMWIFIEX=m diff --git a/imx8m/evk_8mq/early.init.cfg b/imx8m/evk_8mq/early.init.cfg index 9262d953..70097a1c 100644 --- a/imx8m/evk_8mq/early.init.cfg +++ b/imx8m/evk_8mq/early.init.cfg @@ -1,3 +1,3 @@ insmod vendor/lib/modules/mlan.ko -insmod vendor/lib/modules/pcie8xxx.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none p2p_enh=1 fw_name=pcieuart8997_combo_v4.bin +insmod vendor/lib/modules/moal.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none fw_name=sdiouart8987_combo_v0.bin insmod vendor/lib/modules/synaptics_dsx_i2c.ko diff --git a/imx8m/evk_8mq/evk_8mq.mk b/imx8m/evk_8mq/evk_8mq.mk index 7db1b212..210f8971 100644 --- a/imx8m/evk_8mq/evk_8mq.mk +++ b/imx8m/evk_8mq/evk_8mq.mk @@ -250,9 +250,9 @@ PRODUCT_PACKAGES += \ PRODUCT_PACKAGES += \ bt_vendor.conf -# NXP 8997 Wifi and Bluetooth Combo Firmware +# NXP 8987 Wifi and Bluetooth Combo Firmware PRODUCT_COPY_FILES += \ - vendor/nxp/imx-firmware/nxp/FwImage_8997/pcieuart8997_combo_v4.bin:vendor/firmware/pcieuart8997_combo_v4.bin + vendor/nxp/imx-firmware/nxp/FwImage_8987/sdiouart8987_combo_v0.bin:vendor/firmware/sdiouart8987_combo_v0.bin # Wifi regulatory PRODUCT_COPY_FILES += \ The patch is attached as 0001-8mq-usd-8987-wifi.patch evk_8mq enable M.2 8987 wifi            1. hardware rework                hardware rework required ( Be aware: after this rework, uSD is not working!)            2. patches diff --git a/imx8m/evk_8mq/BoardConfig.mk b/imx8m/evk_8mq/BoardConfig.mk index db7c4991..0cca9b8e 100644 --- a/imx8m/evk_8mq/BoardConfig.mk +++ b/imx8m/evk_8mq/BoardConfig.mk @@ -136,7 +136,8 @@ ifeq ($(TARGET_USE_DYNAMIC_PARTITIONS),true) TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-no-product.dtb else # imx8mq with HDMI display - TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-pcie1-m2.dtb + TARGET_BOARD_DTS_CONFIG ?= imx8mq:imx8mq-evk-usdhc2-m2.dtb + # imx8mq with MIPI-HDMI display TARGET_BOARD_DTS_CONFIG += imx8mq-mipi:imx8mq-evk-lcdif-adv7535.dtb # imx8mq with HDMI and MIPI-HDMI display diff --git a/imx8m/evk_8mq/SharedBoardConfig.mk b/imx8m/evk_8mq/SharedBoardConfig.mk index 330ab1c5..a6654bad 100644 --- a/imx8m/evk_8mq/SharedBoardConfig.mk +++ b/imx8m/evk_8mq/SharedBoardConfig.mk @@ -7,10 +7,10 @@ PRODUCT_IMX_TRUSTY := true #Enable this to disable product partition build. #IMX_NO_PRODUCT_PARTITION := true -#NXP 8997 wifi driver module +# NXP 8987 wifi driver module BOARD_VENDOR_KERNEL_MODULES += \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/mlan.ko \ - $(KERNEL_OUT)/drivers/net/wireless/marvell/mrvl8997/wlan_src/pcie8xxx.ko + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/mlan.ko \ + $(KERNEL_OUT)/drivers/net/wireless/nxp/mxm_wifiex/wlan_src/moal.ko # mipi-panel touch driver module BOARD_VENDOR_KERNEL_MODULES += \ diff --git a/imx8m/evk_8mq/UbootKernelBoardConfig.mk b/imx8m/evk_8mq/UbootKernelBoardConfig.mk index 5aa1ce35..4c3378f0 100644 --- a/imx8m/evk_8mq/UbootKernelBoardConfig.mk +++ b/imx8m/evk_8mq/UbootKernelBoardConfig.mk @@ -14,7 +14,7 @@ endif TARGET_BOOTLOADER_CONFIG += imx8mq-evk-uuu:imx8mq_evk_android_uuu_defconfig TARGET_KERNEL_DEFCONFIG := imx_v8_android_defconfig -# TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig +TARGET_KERNEL_ADDITION_DEFCONF ?= android_addition_defconfig # absolute path is used, not the same as relative path used in AOSP make diff --git a/imx8m/evk_8mq/android_addition_defconfig b/imx8m/evk_8mq/android_addition_defconfig new file mode 100644 index 00000000..f51bd5ff --- /dev/null +++ b/imx8m/evk_8mq/android_addition_defconfig @@ -0,0 +1,2 @@ +CONFIG_WLAN_VENDOR_NXP=y +CONFIG_MXMWIFIEX=m diff --git a/imx8m/evk_8mq/early.init.cfg b/imx8m/evk_8mq/early.init.cfg index 9262d953..70097a1c 100644 --- a/imx8m/evk_8mq/early.init.cfg +++ b/imx8m/evk_8mq/early.init.cfg @@ -1,3 +1,3 @@ insmod vendor/lib/modules/mlan.ko -insmod vendor/lib/modules/pcie8xxx.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none p2p_enh=1 fw_name=pcieuart8997_combo_v4.bin +insmod vendor/lib/modules/moal.ko sta_name=wlan uap_name=wlan wfd_name=p2p max_vir_bss=1 cfg80211_wext=0xf cal_data_cfg=none fw_name=sdiouart8987_combo_v0.bin insmod vendor/lib/modules/synaptics_dsx_i2c.ko diff --git a/imx8m/evk_8mq/evk_8mq.mk b/imx8m/evk_8mq/evk_8mq.mk index 7db1b212..210f8971 100644 --- a/imx8m/evk_8mq/evk_8mq.mk +++ b/imx8m/evk_8mq/evk_8mq.mk @@ -250,9 +250,9 @@ PRODUCT_PACKAGES += \ PRODUCT_PACKAGES += \ bt_vendor.conf -# NXP 8997 Wifi and Bluetooth Combo Firmware +# NXP 8987 Wifi and Bluetooth Combo Firmware PRODUCT_COPY_FILES += \ - vendor/nxp/imx-firmware/nxp/FwImage_8997/pcieuart8997_combo_v4.bin:vendor/firmware/pcieuart8997_combo_v4.bin + vendor/nxp/imx-firmware/nxp/FwImage_8987/sdiouart8987_combo_v0.bin:vendor/firmware/sdiouart8987_combo_v0.bin The patch is attached as 0001-8mq-m2-8987-wifi.patch
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For IMX8QM and iMX8QXP, the DDR config is in SCFW porting kit with DDR script. After boot, for iMX8QM, the LPDDR4 clock is set to 1.6GHz, and for iMX8QXP, after boot, the LPDDR4 clock is set to 1.2GHz. Their clock source is a HPPLL (High Performance PLL) , the HPPLL work frequency range is 1.25GHz to 2.5GHz. But for some product, due to some EMC signal test requirement, sometimes we need adjust the DDR clock a little, the attached patches can be used as reference to do such test. iMX8QM:    HPPLL = 1600MHz, DRC clock = 800MHz, DDR clock = 1600MHz. iMX8QXP:    HPPLL = 2400MHz, DRC clock = 600MHz, DDR clock = 1200MHz. After applied attached two reference patches in SCFW porting kit, they will be: iMX8QM:    HPPLL = 1584MHz, DRC clock = 792MHz, DDR clock = 1584MHz. iMX8QXP:    HPPLL = 2388MHz, DRC clock = 597MHz, DDR clock = 1194MHz. If you want to try set other clock frequency for iMX8QM, you can change the followed lines: ......  uint32_t rate2 = SC_792MHZ;  /* DRC clock */ ......  DSC_AIRegisterWrite(0x12,0,4,0x00000084);  /* DRC_0: (24M*0x84/2) = 1584M, valid dividder: 0x68~0xD0 */  //This is the HPPLL frequency ......  DSC_AIRegisterWrite(0x28,0,4,0x00000084);  /* DRC_1: (24M*0x84/2) = 1584M, valid dividder: 0x68~0xD0 */  //This is the HPPLL frequency ...... If you want to try set other clock frequency for iMX8QXP, you can change the followed lines: ......  uint32_t rate2 = 597000000U;  /* DRC clock */ ......  DSC_AIRegisterWrite(0x24,0,4,0x000000C7);  /* DRC_0: (24M*0xC7/2) = 2388M, valid dividder: 0x68~0xD0 */  //This is the HPPLL frequency ......
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