i.MX6DL LPDDR2 Register Programming Aid

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i.MX6DL LPDDR2 Register Programming Aid

i.MX6DL LPDDR2 Register Programming Aid

This is a detailed programming aid for the registers associated with MMDC initialization. The last sheet formats the register settings for use with ARM RealView ICE. It can also be used with the windows executable for the DDR Stress Test. This programming aid was used for internal Freescale validation boards.


Register MMDC_MAARCR is not normally programmed by the initialization script. Freescale recommends leaving it with default values.

This is an advisory to customers who decide to change some of the fields in this register.

A bug has been found with the ARCR_GUARD field. It should always be left programmed to the default 0x0 value. If programmed to a different value, the behavior is unpredictable.

Does this file replace the "Mx6DQSDL LPDDR2 Script Aid V0.04.xlsx" available elsewhere on this forum? If so, it would be helpful to indicate that as the first google hit is to that version rather than here.

Also there appears to be a bug relating to using 2 chip selects: When we set up a RAM which uses 2 chip selects, the generated code still has the lines relating to CS1 commented out, saying "// Note, CS1 does not exist in this memory hence these writes are commented out"

Can we just put them back in manually or are there are other settings not being correctly set as well?

Hi Rob,

>> Does this file replace the "Mx6DQSDL LPDDR2 Script Aid V0.04.xlsx" available elsewhere on this forum?

There are two versions of the register programming aid. I would call them "the short form" and the "long form". They represent two schools of thought: Make it simplest and easiest to use for the customer by limiting choice to only a bare few vs. providing a detailed form for the customer to verify each timing value from a datasheet. This is the long version and the one you found is the short version. In my training session, I provide links to both. It really depends on user preference.

Unfortunately, because the two forms are maintained from two different geographical regions, they do not always contain the same updates, even though we do try to communicate with each other. There is an addition to this form (setmem /32 0x021b4800 = 0xA1380003 // DDR_PHY_P1_MPZQHWCTRL) that must be added for two channel operations that does not seem to be updated on the V0.04 Aid. I am adding a note to the other thread to have it corrected.

When the whole concept of the Register Programming Aid was first introduced, yes, it was expected for customers using CS1 to uncomment out the lines needed to update the CS1 registers. Nevertheless, now that you mention it, I can think of a way to make that automatic. So, the next time I (or someone else here in my office) updates each of the "long forms", we will make it automatic for the comments to be either set in or out as necessary.



Ok, thanks for clearing that up Mark. From a customer perspective it would be be easier/clearer if there were one release with two "modes/tabs" depending on how much control we needed, but I can see the issue.



Just found an error in the spreadsheet in the calculation of the nWR value of MR1. Will correct this and add a Pre-Charge all command to the MR programming sequence. New version number of Spreadsheet will be 1.4.


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Last update:
‎06-24-2015 10:13 PM
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