Product Release Announcement Automotive Microcontrollers and Processors S32 Design Studio for Power Architecture 2017.R1 Update 8          What is new? S32 SDK for Power Architecture 1.8.0 EAR supporting MPC5777C, MPC5775B, MPC5775E, MPC5746R, MPC5745R, MPC5743R This is a cumulative update - it includes all of the content of previous updates (Update 1, Update 2, Update 3, Update 4, Updates 5 and 6, Update 7 ). Installation instructions The update is available for  (via S32DS Eclipse Updater) or offline installation (direct download link)  installation:  go to menu "Help" -> "Install New Software..." dialog  select predefined update site "S32DesignStudio - http://www.nxp.com/lgfiles/updates/Eclipse/S32DS_POWER_2017.R1/updatesite" select all available items and click "Next" button   offline installation:   go to S32 Design Studio for Power product page -> Downloads section or use direct link to download the update archive zip file  Start S32DS and go to "Help" -> "Install New Software..." Add a new "Archive" repository and browse to select the downloaded update archive zip file you downloaded in the previous step Select all available items and click "Next" button.   This will start the update installation process.

      Product Release Announcement Automotive Microcontrollers and Processors S32 Design Studio for ARM® 2018.R1  Update 5          What is new? Service Pack WCT101xS. This is a cumulative update - it includes all the content of previous updates (Update 1, Update 2, Update 3, Update 4) Installation instructions The update is available for online (via Eclipse Updater) or offline installation (direct download link) online installation:  go to menu "Help" -> "Install New Software..." dialog  select predefined update site "S32DesignStudio - http://www.nxp.com/lgfiles/updates/Eclipse/S32DS_ARM_2018.R1/updatesite" select all available items and click "Next" button   offline installation:   go to S32 Design Studio for ARM product page -> Downloads section or use direct link to download the update archive zip file Start S32DS and go to "Help" -> "Install New Software..." Add a new "Archive" repository and browse to select the downloaded update archive .zip file you downloaded in the previous step Select all available items and click "Next" button.   This will starts the update installation process.

This release of S32K116 Bootloader was compiled and tested with the following development tools: S32DS Rappid Bootloader  Tested on the hardware: Development Board S32K116EVB – Q048 Processor  PS32K116MLF- Q048   Supported communication: UART0 (Pin PTB0-PTB1) CAN0 (Pin PTE4-PTE5)

Create From Example 1 | Create an ISP Project from Example A demonstration of how to load an example ISP image processing application project featuring RGB, YUV, and GS8 image formats, in the S32 Design Studio. 2 | Create an APEX2 Project from Example A demonstration of how to load an example ORB-based APEX2 image processing application project in the S32 Design Studio. https://www.nxp.com/support/training-events/getting-started-with-s32-design-studio-ide-for-vision-2018.r1:TIP-S32DS Create New Project 3 | Create a New ISP Project A demonstration of how to create a new Debayer-based ISP image processing application project in the S32 Design Studio. 4 | Create a New APEX2 Project A demonstration of how to create a new APEX2 image processing application project featuring upscaling and downscaling in the S32 Design Studio. https://www.nxp.com/support/training-events/getting-started-with-s32-design-studio-ide-for-vision-2018.r1:TIP-S32DS Debug 5 | ISP Debugging w/ S32 Debug Probe A demonstration of how to setup and debug an ISP application project using S32 Design Studio, S32 Debugger, and S32 Debug Probe. 6 | APEX2 Debugging w/ S32 Debug Probe A demonstration of how to setup and debug an APEX2 application project using S32 Design Studio, S32 Debugger, and S32 Debug Probe. 7 | APEX2 Debugging with Emulator A demonstration of how to debug an emulated-APEX2 image processing application project in the S32 Design Studio. 8 | Debug a bare-board APEX2 Project A demonstration of how to debug a bareboard APEX2 image processing application project in the S32 Design Studio with Lauterbach TRACE32. 9 | Debug a Linux A53 Project A demonstration of how to debug a Linux A53 application project in the S32 Design Studio for Vision version 2.0. The example shown also includes code for APEX, but currently GDB Remote Linux only supports debug of the A53 code. 10 | Debug a bare-board A53 Project A demonstration of how to debug a bareboard A53 image processing application project in the S32 Design Studio for Vision version 2.0 using PEMicro GDB interface. The example shown also includes code for APEX, but currently PEMicro only supports debug of the A53 code.

        Product Release Announcement Automotive Microcontrollers and Processors S32 Design Studio for Power Architecture v1.2, Update 3            September 21, 2017   What is new? S32 SDK EAR 0.8.1 supporting MPC5748G & MPC5748C. The new project wizard now offers the new version of S32 SDK: "New S32 Project from Example" offers additional demos and examples. The complete S32 SDK EAR 0.8.1 release notes attached below. Installation instructions This is a cumulative installer - all previous updates (except previous version of S32 SDK EAR 0.8.0) are included so you do not need to install any previous update. The update is available for online (Eclipse Updater) or offline (direct download link) installation. online installation go to menu "Help" -> "Install New Software..." dialog  select predefined NXP S32 Design Studio update repository select all available items http://www.nxp.com/lgfiles/updates/Eclipse/S32DS_POWER_1_2/com.freescale.s32power.updatesite click "Next" button offline installation  go to S32 Design Studio product page -> Downloads section or use the direct download linkand download the "S32 Design Studio for Power v1.2 - Update 3" file. Start S32DS and go to "Help" -> "Install New Software..." Add a new "Archive" repository and browse to select the downloaded Update 3 archive file Select all available items and click "Next" button.

KEA64 RAppID Bootloader rbf file for KEA64    MPC57xx RAppID Bootloader rbf file for MPC5744P   RAppID Bootloader rbf file for MPC5746R  RAppID Bootloader rbf file for MPC5777C  RAppID Bootloader rbf file for MPC5777C - BookE (non-VLE)    S32Kxx RAppID Bootloader rbf file for S32K116 RAppID Bootloader rbf file for S32K144W  

        Product Release Announcement Automotive Microcontrollers and Processors S32 Design Studio for ARM v2.0 Update 3          What is new? S32 SDK 0.8.6 EAR (Early Access Release)  for S32K142, S32K144, S32K146, S32K148)- see attached release notes for more details Installation instructions The update is available for online (via Eclipse Updater) or offline installation (direct download link) online installation:  go to menu "Help" -> "Install New Software..." dialog  select predefined update site "S32 Design Studio for ARM v2.0 - http://www.nxp.com/lgfiles/updates/Eclipse/S32DS_ARM_2_0/com.freescale.s32arm.updatesite" select all available items and click "Next" button   offline installation:   go to S32 Design Studio for ARM product page -> Downloads section or use this direct link to download the update archive zip file Start S32DS and go to "Help" -> "Install New Software..." Add a new "Archive" repository and browse to select the downloaded update archive zip file you downloaded in the previous step Select all available items and click "Next" button. This will starts the update installation process.

      Product Release Announcement Automotive Microcontrollers and Processors S32 Design Studio for ARM® 2018.R1  Update 2          What is new? This update adds bare-board device support for S32K118 and some minor fixes. This is a cumulative update - it includes all the content of previous Update 1 Installation instructions The update is available for online (via Eclipse Updater) or offline installation (direct download link) online installation:  go to menu "Help" -> "Install New Software..." dialog  select predefined update site "S32DesignStudio - http://www.nxp.com/lgfiles/updates/Eclipse/S32DS_ARM_2018.R1/updatesite" select all available items and click "Next" button   offline installation:   go to S32 Design Studio for ARM product page -> Downloads section or use direct link to download the update archive zip file Start S32DS and go to "Help" -> "Install New Software..." Add a new "Archive" repository and browse to select the downloaded update archive .zip file you downloaded in the previous step Select all available items and click "Next" button.   This will starts the update installation process.

S32DS for Vision contains many example projects from which you can learn how S32DS for Vision can be used with the help of the Vision SDK to develop vision applications. The example projects contain generated and hand-written code, which utilize the Vision SDK to demonstrate a workflow using S32DS for Vision. In this document, the procedure for creating a project from one of the provided ISP examples through to execution on the EVB is detailed. 1) Launch S32DS for Vision 2) Select "New S32DS Project from example" 3) Select isp_sonyimx224_csi_dcu project    In this particular project, the ISP graph diagram is included. If you wish to view it, go to the Project Explorer panel and expand 'isp_sonyimx224_csi_dcu_graph'. Then double click on 'ISP data flow : isp_sonyimx224_csi_dcu_graph'. The ISP graph diagram will appear in the editor panel. 4) Change to C/C++ perspective, click on 'Switch to C/C++ Development' 5) Select isp_sonyimx224_csi_dcu: A53 in the Project Explorer panel 6) Build project for A53  7) Start a debug session using method as described in HOWTO Create A53 Linux Project in S32DS for Vision, beginning at step 9. 😎 Should get results similar to this:

CAN communication is supported in the latest version of MPC5744P Bootloader .rbf file (attached below) + Supported UART1/LINFlexD_1(OpenSDA on DevKit): PD9-PD12 pins(Speed: 115200b/s) + Supported  CAN_0 (J5 on DevKit):  PB0-PB1 pins(Speed: 500Kb/s)   Tested on the dev boards:   Development Board DEVKIT-MPC5744P MPC5744P-144DC MPC5744P-257DC Processor MPC5744P-FML09 1N15P MPC5744P-FMLQ8 0N65H PPG5744P-FMMM8 0N65H  

After installation of S32 Flash Tool 2.1, try to start the GUI and get below error : We noticed this behavior on some PCs – either OS setup or security rules do not allow the installer to create a link to the JRE (Java 11) that is installed with Flash Tool. A quick fix is to set the path manually by adding the following lines to “S32FlashTool_2.1\GUI\ s32ft.ini”

This application demonstrate integration Processor Expert (PE) RAppID Suite for  MPC5777M initialization tool with S32 Design Studio for Power v1.1. There is a separate RAppID project and RAppID Workspace folder included in this project:       This multicore project first initializes the device (PinMux, Clocks, PIT timer). Each core toggles with one LED with different time period. Z4_0 core: LED1...GPDO[0] Z7_0 core: LED2...GPDO[1] Z7_1 core: LED3...GPDO[2]     Yo can adjust the device initialization in PE RappID (open included workspace), generate the code and finally rebuild the project in S32DS.   Note:  Do not let generate PE_Types.h file since it includes some non-vle instructions mixed with VLE ones - this cannot be built by S32DS compiler. linker command file generation needs to be disabled otherwise it generates HighTec specific keywords that S32DS GCC linker does not understand.    Test HW:       MPC5777M-512DS, MPC57xx Motherboard MCU:             PPC5777MQMVA8 0N78H Debugger:    PeMicro USB-ML-PPCNEXUS Target:           Debug (internal flash) EVB connection:  USER LED1 connected to P8.0, LED2 connected to P8.1 LED3 connected to P8.2

This instruction details the steps to create an image vector table, then subsequently generate a blob image which can be written to external flash on the S32R45 EVB. For this, the 'hello_world_s32r45' example project from the S32R45 SDK installed to S32 Design Studio IDE. This instruction shows the process for QSPI, however, SD, MMC, and eMMC are also supported.   The Image Vector Table (IVT) image is a set of pointers to other images which are required by the BootROM. It typically contains the following images, though not all are required to create a valid IVT image: DCD Self-Test DCD HSE Application Bootloader   The IVT Tool enables configuration and generation of the IVT image as specified in the BootROM reference manual.   Prerequisites Before using the IVT Tool, it will be useful to have already generated the binary image from your application project, it will be an input to the IVT. It may also be necessary to include a DCD image, for example, to initialize the SRAM. For application bootloader image, follow the steps in HOWTO: Generate S-Record/Intel HEX/Binary file, selecting 'Raw binary' option. For DCD image, follow the steps in HOWTO: Use DCD Tool To Create A Device Configuration Data Image .     Procedure With desired project open in project explorer (C/C++ perspective), switch to IVT perspective. Click on 'Open IVT'. In the Boot Configuration section, check that the correct Boot Target is selected. For the demonstration here, M7_0 is the correct selection. Check the 'Interface selection' section. If your intended boot device is SD, MMC or eMMC, then change the setting from QuadSPI Serial Flash. If your intended boot device is QuadSPI AND you do not have a QuadSPI parameter file to specify, then uncheck the box for 'Configure QuadSPI parameters'. QuadSPI parameters change some flash registers' settings away from the default setting and are generally required for larger memory sizes (for ex. applications over 1 MB in size, for some supported devices). From the Image Table section, depending on your configuration, turn off all unused images. For the demonstration here, the following will be changed to Reserved: Self-Test DCD, Self-Test DCD (backup), DCD (backup), Application bootloader (backup). The following images will remain enabled: DCD, Application bootloader. In DCD section of the Image Table, click 'Browse File' and select the DCD binary file. Ignore the red shading on the Start address and Size in bytes fields for now. Now the red shading should be resolved. This is appearing because when the DCD section was enabled, it added a block to the Memory Layout map. But the other blocks in the map are unchanged resulting in overlaps. To resolve this, click on the ‘Align’ button from within the Automatic Align section.. After the Memory Map has been aligned, a confirmation message will be displayed and the red shading will disappear. In Application bootloader section, again use  'Browse File' and select the application binary. When the application boot image is loaded, the tool processes the file to check if it contains the header for the application bootloader image. If the header is not found, it means that the file is only the raw code (the bin generated by S32 Design Studio) and it will be necessary to provide the values for RAM start & entry addresses (code length is automatically calculated), as noted with the expanded view and red shading. To set the RAM start pointer and entry pointer addresses, from to the C/C++ perspective: From Project Explorer on the C/C++ perspective, open the linker file (hello_world_s32r45\Project_Settings\Linker_Files\S32R45_common_ram.ld) and locate the RAM start address and enter it in both the RAM start pointer AND RAM entry pointer fields in the IVT Tool. Since the application binary file which was loaded is just a raw binary file, it is necessary to generate the full application bootloader image. The Export Image function takes the values entered for the RAM start & entry pointers and Code length, then generates the Application bootloader header. This header is added to the raw binary file producing a new image, the full application bootloader image file. Within the Application bootloader section, click 'Export Image' and enter a meaningful name for the image file. In addition to being a necessary source component of the IVT image, this file can more easily be shared or re-used to as an input to other IVT images. After the file has been generated, you will notice that the address settings section has collapsed. This is because it has replaced the file you originally selected with the newly generated one and the tool has recognized that the file contains the required header information. Click 'Export Blob Image' to generate the blob image file. This is what will be flashed to the target. Now that the Blob Image is generated, the 'Flash Image' button could be used to program the image to the target over serial connection, use the S32 Flash Tool, or over the JTAG connection using the Flash Programmer within the S32 Debugger (QSPI only).

NXP devices can be secured either with password or challenge and response authentication scheme. The S32 Debugger included within the S32 Design Studio for S32 Platform IDE with the S32 Debug Probe provides the ability to debug a secured device. This document provides only the necessary commands specific to launching a debug session on secured NXP devices.. Once the device is unsecured, it will remain so until a power-on-reset or destructive reset occurs. Preparation Setup the software tools Install S32 Design Studio for S32 Platform Install the Development Package for the device you are debugging. In this case, the S32R4xx development package. This package is important as it contains the S32 Debugger support component Setup the hardware Confirm the setup of the S32R45 evaluation board. Connect the power supply cable Setup the S32 Debug Probe. Refer to the S32 Debug Probe User Manual for installation instructions. Connect the S32 Debug Probe to the evaluation board via JTAG cable. Connect the S32 Debug Probe to the host PC via USB cable OR via Ethernet cable (via LAN or directly connected and configured for static IP address) and power supply connected to USB port. Launch S32 Design Studio for S32 Platform Open existing project or create a new project and check that it successfully builds. If creating a new project, be sure the S32 Debugger is selected in the New Project Wizard. Procedure Before starting a secure debug session, first confirm that the device is indeed secure. Once one core is unlocked, all cores are unlocked and will remain so until a power-on-reset or destructive reset occurs. After confirming the device is secured, then select the procedure which applies to the lifecycle of the SoC to be debugged.   Check the state of the SoC Open a command window from the installation directory containing the GTA server: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\Server\gta\ Execute the following command: gta.exe -t s32dbg This will invoke a utility that launces a new GTA server instance and then communicates with the target via the S32 Debug Probe and will request a set of properties of the SoC. These properties are available to be read regardless of security state. The GTA server will close once the information is returned. As is shown above, the Debug state is ‘Locked’. This means it is secured and the secure debug steps outlined within this document must be used. There is no way to determine the security enabled on the SoC, so this should be known by the user in order to select the correct authentication scheme. Proceed from here using the method (Password or Challenge & Response) which applies for your SoC security configuration. Password From S32DS, open the Debug Configurations menu, select the configuration for the project you wish to debug, select the ‘Debugger’ tab and scroll down until the ‘Secure debugging’ section is visible. Check the box for ‘Enable secure debugging’ and then select the Debugging type ‘Password’. Click Debug. When the debug session initialization reaches the stage where the password must be entered to unsecure the SoC, the following menu will appear. Enter the password. This is a 16-byte value entered as a hexadecimal without the leading ‘0x’. If you choose to check the box for ‘Store keyword in secure storage’, the value entered will be stored within the Eclipse secure storage and will remain available for the duration of the current S32DS instance. This saves the user from having to enter the password again, should the security state of the SoC becomes once again secured. Now the debug session initialization will complete and debug activities may be executed as with any SoC which is not secured. After terminating the debug session, the GTA utility can be used again to see the new state of the SoC. This utility cannot be executed while the debug session is running. It launches a new instance of the GTA server, which would be blocked by the already running debug session. Challenge & Response For the Challenge & Response security scheme, the included Volkano Browser must be used. From the S32DS menu bar, select Window -> Show View -> Other -> ‘Volkano Browser’. The Volkano Browser will now appear in the current perspective. Since there is no current key stored in the Volkano local storage, a new key must be registered. Click on ‘Register Key’ to register a new key. This will bring up the Volkano command dialog. Now enter the ADKP value (Application Debug Key/Password) which is correct for the SoC to be debugged. The Volkano utility uses the same functionality as the command-line GTA utility shown earlier to check the state of the SoC. This will read the UID from the Soc. Click Connect to the SoC and load the UID (Device Unique ID). The UID is associated with the ADKP when it is registered within the Volkano local storage for easier access in the future. Click OK to complete the registration of the new key. Now the key is registered, the debug session can be setup and started. Open the Debug Configurations menu, select the configuration for the project you wish to debug, select the ‘Debugger’ tab and scroll down until the ‘Secure debugging’ section is visible. Check the box for ‘Enable secure debugging’ and then select the Debugging type ‘Challenge & Response’. Click Debug. Now the debug session initialization will complete and debug activities may be executed as with any SoC which is not secured. During debug session initialization, the key that was registered will be used to unsecure the SoC. After terminating the debug session, the GTA utility used earlier can be used again to see the new state of the SoC. This utility cannot be executed while the debug session is running. It launches a new instance of the GTA server, which would be blocked by the already running debug session. Troubleshooting There are some messages displayed when things go wrong that can help to identify the cause of the issue. Due to the sensitive nature of the Secure Debug, the error indications detailed below are inherently general and are provided as a guide for interpreting them to determine the likely cause. Debug session started when SoC is still secured There is an error message reported in the S32 Debugger Console to indicate the SoC is still secure. To see this message the GDB Server log must be enabled in Debug Configurations -> Debugger tab, GDB Server section: When this error is incurred, first indication is popup error message for Error code 102: Next, the following text will be displayed in the S32 Debugger console window: If needed, select this view from the menu: In addition, if GDB Traces log is enabled, the following error message can be found in the gdb traces console view: Enable the GDB Traces log in Window->Preferences, then search on GDB: To select the view from console: Incorrect Challenge/Response Or Password If the SoC is setup for Challenge & Response security scheme, but Password security scheme is selected in Debug Configuration, or Challenge & Response is correctly selected but the wrong ADKP value is provided, below are the expected error messages. The result is same if the SoC is setup for Password and either Challenge & Response or wrong password is used. First error message is Error code 601: Next, the gdb traces console displays the following error: There is no error displayed in the S32 Debugger console.

Condition:  I am trying FreeRTOS using S32K118 EVB and run in DEBUG mode. When I set the break point in vTaskDelay and press Resume for the first time, there is a smooth stop at the break point. The second time I press Resume, the debugger should enter the same break point again, but there is no response. Then I press Suspend and can't press Resume again, at this point I can only leave. However, I am free to run this project with no problem, what's wrong? Analysis: This is due to an access of DDR memory region which is not initialized by default project settings. Solution: To resolve it, a macro initializing the DDR memory should be selected to run at the beginning of a debug session. A user should go to Advanced Options dialog and check "Enable initialization script". Our DDR init macros can be found at the following location within S32DS3.2 layout: eclipse\plugins\com.pemicro.debug.gdbjtag.pne_4.2.8.201909091700\win32\gdi\P&E\supportFiles_ARM\NXP\S32Vxxx\S32V234M100_DDR3_EVB29288.mac. Please note that the type of the macro might depend on the revision of the board and S32V23x device one is working with. I am also attaching a picture of debug configuration and Advanced Options dialog with all the settings in place.

The following article describes how to add FreeRTOS thread aware debugging to the Eclipse Debug view using SEGGER J-Link: Show FreeRTOS Threads in Eclipse Debug View with SEGGER J-Link and NXP S32 Design Studio | MCU on Eclipse  I hope this is useful, Erich

This document shows the step-by-step process to create a simple blinking LED application for the S32R41 device using the S32 RTD non-AUTOSAR drivers. For this example used for the S32R41 EVB, connected via ethernet connection through S32 Debugger. Preparation Setup the software tools Install S32 Design Studio for S32 Platform Install the S32R41 development package and the S32R41 RTD AUTOSAR 4.4. Both of these are required for the S32 Configuration Tools. Launch S32 Design Studio for S32 Platform Procedure New S32DS Project OR Provide a name for the project, for example 'Blinking_LED_RTD_No_AUTOSAR'. The name must be entered with no space characters. Expand Family S32R41, Select S32R418AB Cortex-M7 Click Next Now, uncheck the selection mark for other core, i.e. for Cortex-M7-1   And Click '…' button next to SDKs   Check box next to PlatformSDK_SAF85_S32R41_2022_08_S32R418AB _M7_0. (or whichever latest SDK for the S32R41 is installed). Click OK Click Finish. Wait for project generation wizard to complete, then expand the project within the Project Explorer view to show the contents. To control the LED on the board, some configuration needs to be performed within the Pins Tool. There are several ways to do this. One simple way by double-click on the MEX file. The schematic for S32R41 EVB, checking for signal line for the user LED, channel 4 is connected to user LED signal, so we use channel 4 for signal line for user LED on the chip. So, we select the signal line for Dio channel Id 4 for the LED connected on the S32R41 EVB. From the Peripheral Signals tab left to the Pins tool perspective layout, locate Open the Siul2_0 from the peripheral signals tab. And from the drop down menu select “gpio,36 PC_04” option as per shown in the following image. We are using PC_04 for the GPIO usage, so we are routing SIUL2_0 GPIO signal to this pin. The Direction required! menu will appear. Select Output then OK. In Routing Details view, notice a new line has been added and highlighted in yellow. Add ‘LED’ to the Label and Identifier columns for the PC_04 pin. Code Preview Go to Peripherals tool and add Siul2_Dio to enable LED blinking, it adjacent to the Blue LED on S32R41  EVB. Click on the Peripherals Tool icon from the Eclipse Perspective navigation bar. From the Components view, click on ‘Add a new configuration component…’ button from the Drivers category. This will bring up a list of all configuration components. Locate and then select the ‘Siul2_Dio’ component from the list and click OK. Do not worry about the warning message. It is only indicating that the driver is not already part of the current project. The associated driver package will be added automatically. Note: It may be necessary to change the selection at the top from ‘Present in the tool-chain project’ to ‘All’. The DIO driver provides services for reading and writing to/from DIO Channels. Also, select the Siul2_Port tab and uncheck the checkmark against ‘Siul2 IP Port Development Error Detect’ option as below. The Gpio_Dio driver requires no further configuration. Click Save to store all changes to the .MEX file. Now the device configurations are complete and the RTD configuration code can be generated. Click ‘Update Code’ from the menu bar. To control the output pin which was just configured, some application code will need to be written. Return to the ‘C/C++’ perspective. If not already open, in the project window click the ‘>’ next to the ‘src’ folder to show the contents, then double click ‘main.c’ file to open it. This is where the application code will be added. Before the pin can be controlled, it needs to be initialized using the configuration information that was generated from the S32 Configuration tools. Initialize all pins using the Port driver by adding the following line: Insert the following line into main, after the comment 'Write your code here': /* Initialize all pins using the Port driver */ Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0); Now, add logic for the LED turn and off. To turn the pin on and off with some delays in-between to cause the LED to blink. Make the delays long enough to be perceptible. Add line to initialize variable uint8 i = 0; Change the code within the provided for loop, and add the following lines: /* logic for blinking LED 10 times for (i=0; i<10; i++) {       Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 1U);       level = Siul2_Dio_Ip_ReadPin(LED_PORT, LED_PIN);       TestDelay(2000000);       Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 0U);       level = Siul2_Dio_Ip_ReadPin(LED_PORT, LED_PIN);       TestDelay(2000000); } return (0U); And add this line above the main() function to initialize the variable volatile uint8 level; Before the 'main' function, add a delay function as follows: void TestDelay(uint32 delay); void TestDelay(uint32 delay) {    static volatile uint32 DelayTimer = 0;    while (DelayTimer<delay)    {        DelayTimer++;    }    DelayTimer=0; } Update the includes lines at the top of the main.c file to include the headers for the drivers used in the application: Remove #include "Mcal.h" Add #include "Siul2_Port_Ip.h" #include "Siul2_Dio_Ip.h" Build 'Blinking_LED_RTD_No_AUTOSAR'. Select the project name in 'C/C++ Projects' view and then press 'Build'. After the build completes, check that there are no errors. Open Debug Configurations and select 'Blinking_LED_RTD_No_AUTOSAR_Debug_RAM'. Make sure to select the configuration which matches the build type performed, otherwise it may report an error if the build output doesn’t exist. Now, you need to Select the Interface (Ethernet or USB) by which the S32 Debug Probe is connected. If connected via USB and this option is selected for interface, then the COM port will be detected automatically (in the rare event where 2 or more S32 Debug Probes are connected via USB to the host PC, then it may be necessary to select which COM port is correct for the probe which is connected to the EVB) If connected via Ethernet, enter the IP address of the probe. See the S32 Debug Probe User Manual for ways to determine the IP address. Click Debug To see the LED blink, click ‘Resume'. This code, as it is, will blink the LED 10 times, you can make changes in for loop condition to blink it infinitely.

Purpose   This document holds information about how S32 Design Studio and S32Debugger probe or PE Micro Debug probe can be used to debug applications running on NXP’s S32 family processors from the operating system perspective using OSEK Kernel awareness.   Abbreviations Abbreviation Description OSEK Open Systems and their Interfaces for Automotive Electronics is a standard developed in the automotive industry to define a common architecture for embedded Real-Time Operating Systems (RTOS). NXP RTOS NXP Real Time Operating System compliant with OSEK specification  ORTI OSEK Run Time Interface.  ORTI file is generated based on NXP RTOS configuration *.ort / *.orti OSEK system builder ORTI file extension MSI Microsoft Software Installer   Background OSEK Kernel awareness within S32 Design Studio allows you to debug your application from the operating system perspective. ORTI is a specification that enables OS awareness for external debuggers (e.g NXP S32 Debugger, Lauterbach T32, PEmicro's debug probe).  Most OSEK system builders are able to extract all necessary information of the OS component into a text file, called “ORTI file”. NXP RTOS generates an *.ort file based on the user configuration. Debuggers can load this ORTI file to add support for the operating system. S32Design Studio can load such an ORTI file and adds some special views that will allow the user to inspect the configured OS objects: Tasks, Alarms, Counters, Scheduletable.   Document structure The basic workflow for setting up and managing OSEK OS Awareness projects in S32 Design Studio remains consistent across both single-core and multi-core projects, irrespective of the debug probe used. The focus will be on the universal steps that are described in single-core projects case. For OSEK OS Awareness multi-core projects and for projects utilizing PE Micro debug probes, only the specific considerations will be highlighted.                 Hardware Support OSEK OS Awareness support in S32 Design Studio is available for: S32G27x, S32G39x S32E/Z  S32K396 S32R41 SAF85xx   OS Support OSEK OS Awareness support is available only on Windows.   How to use OSEK OS Awareness with S32 Design Studio and S32Debugger probe   Single core projects   Prerequisites Note: This HOWTo Guide describes the required steps for using OSEK Run Time Interface on a single-core example project for S32R418AA Cortex-M7 in S32 Design Studio. Prerequisites might differ depending on the project hardware type.   Software environment S32 Design Studio project or example project delivered with the NXP RTOS imported in S32 Design Studio Workspace S32R41 Development Package S32R41 Real-Time Drivers Version 1.0.0 SW32R41 RTOS 4.7.0 version 0.9.0 BETA   !Note: For this example project, NXP RTOS SysGen requires Java Runtime Environment OpenJDK-JRE 11.0.11 installed on your computer. The OpenJDK-JRE can be downloaded from the following URL (please search with exact keyword "jre-11.0.11-x64 MSI" or “jdk-11.0.11-x64 MSI” for correct version): https://developers.redhat.com/products/openjdk/download Using the installer (MSI) is recommended because it creates the HKEY_LOCAL_MACHINE\SOFTWARE\JavaSoft\JDK registry entry. JAVA_HOME environment variable must be set to point to location of Java Runtime Environment. For example: JAVA_HOME=C:\Program Files\RedHat\java-11-openjdk-jre-11.0.11-1 (Please choose correct path for your machine). Error or unexpected behavior may occur if the version of Java is different than 11.0.11 when NXP RTOS SysGen is executed (steps that are described Chapter III – “Generating Configuration”). If Java version is not found in the HKEY_LOCAL_MACHINE (HKEY_LOCAL_MACHINE\SOFTWARE\JavaSoft) a warning is reported.    Hardware environment Silicon: - Chip P/S32R418AAU(K1)MUFT (rev 1.1) Board: - X-S32R41-EVB PCB 48194 RevD SCH RevD Debug Probe: S32 Debug Probe       Project setup While in Design Studio, go to File -> New -> S32DS Project From Example  and select one of the existing single core S32 Design Studio Sample applications delivered with the NXP RTOS or import your own S32 Design Studio project.   Select the desired project from the list of examples and click finish       Generating configuration Before running the example, a configuration needs to be generated. First, go to Project Explorer View in S32 Design Studio and select the current project.   Right click and select the "S32 Configuration Tool" menu then click "Open Peripherals".  Click on the "Update Code" button.   Click on Select directory under "Generate" field to select the directory which contains example project (E.g.: D:\WorkspaceS32DS\RTOS_example_S32R418AA_SC1_M7) then click on Generate Configuration.  Click "Update Code" again.   Building the project Select the project in the S32 Design Studio Workspace and click on Build. Clicking this button will start the build using the preset build type.    Debug configuration Click on Debug Configurations   Setup the Debug Probe Connection for the project. Select either USB or Ethernet, depending upon your hardware setup. If USB is selected, the COM port for the S32 Debug Probe will automatically be detected (unless not connected or more than one probe is connected). If Ethernet is selected, then enter either the hostname (fsl + last 6 digits of MAC address) or IP address. See ‘S32_Debug_Probe_User_Guide.pdf’ ({S32DS_installation_directory}/S32DS/tools/S32Debugger/Debugger/Docs/S32_Debug_Probe_User_Guid e.pdf) for more details on the setup of the S32 Debug Probe.      Loading the ORTI file and starting debug From the OS Awareness tab select “OSEK” from the OS dropdown list. Browse and select from local system or Workspace the required *.ort file Click the Debug button.     OS Details Browser view Navigate to go to Window -> Show View -> Other…  and select the OS Details Browser view     Using the OS Details Browser view, Design Studio can display information about the tasks status on the target.   Tasks tab In the “Tasks”  tab from the OS Details Browser view you can see information about the operating system (the number of tasks, current task states, system objects):   Implementation tab Switch to the “Implementation” tab to see more detailed information gathered from the .ort file:   OS – current state Tasks – priority, state and assigned stack Stacks – usage and attributes Other OS resources defined and declared through ORTI Detailed info about ORTI data object Customize data presentation (HEX format, re-arrange the table columns) Colored presentation of data: -   White fields are static Blue fields are non-static Yellow fields are fields that changed their values from the last time they were inspected/checked.   OS information: Tasks information:   Stacks information:   Multi-core projects Prerequisites Note: This HOWTo Guide describes the required steps for using OSEK Run Time Interface on a multi-core example project for S32Z270 Cortex-R52 in S32 Design Studio. Prerequisites might differ depending on the project hardware type.   Software environment: S32 Design Studio project or example project delivered with the NXP RTOS imported in S32 Design Studio Workspace S32Z2/E2 Development Package S32Z/E Real Time Drivers Version 0.9.0 S32ZE RTOS R21-11 version 0.9.0   !Note: For this multi-core example project, NXP RTOS SysGen requires Java Runtime Environment OpenJDK-JRE 1.8 installed on your computer. The OpenJDK-JRE can be downloaded from the following URL (please search with exact keyword "jdk-8u372-x86 MSI" for correct version): https://developers.redhat.com/products/openjdk/download - Using the JDK 1.8 installer (MSI) is recommended. JAVA_HOME environment variable must be set to point to location of Java Runtime Environment. For example: JAVA_HOME= C:\Program Files (x86)\Java\java-1.8.0-openjdk-1.8.0.372-1 (Please choose correct path for your machine). Error or unexpected behavior may occur if the version of Java is different than 1.8 when NXP RTOS SysGen is executed (steps that are described in Chapter III – “Generating Configuration”).   Please notice that SysGen is not stable in JRE 1.8 64 bit. Using SG with JRE 1.8 32 bit is recommended.     Hardware environment:             Boards: S32Z27X-DC PCB 50588 RevA1 SCH RevB (DC2)             Silicon chip: P32Z270ADCK0MJFT P65C ATTJ2151A (E2). (21x21, 594 BGA) Debug Probe: S32 Debug Probe               Boards: S32Z270-DC PCB 50912 RevA SCH RevA (DC1)             Silicon chip: S32Z270ADCK0MJET (17x17, 400 BGA) Debug Probe: S32 Debug Probe   Project setup Go to File -> New -> S32DS Project From Example  and select one of the existing multi-core S32 Design Studio Sample applications delivered with the NXP RTOS or import your own S32 Design Studio project.      Generating configuration The steps for generating configuration must be performed for all projects: RTOS_example_S32Z270_SC1_multi_instance_R52_0_0, RTOS_example_S32Z270_SC1_multi_instance_R52_0_1, RTOS_example_S32Z270_SC1_multi_instance_R52_0_2, RTOS_example_S32Z270_SC1_multi_instance_R52_0_3.   Building the projects Before running, you must build all projects: RTOS_example_S32Z270_SC1_multi_instance_R52_0_0, RTOS_example_S32Z270_SC1_multi_instance_R52_0_1, RTOS_example_S32Z270_SC1_multi_instance_R52_0_2, RTOS_example_S32Z270_SC1_multi_instance_R52_0_3.     Debug configuration Click on Debug Configurations. Click the initial core under S32 Debugger in Debug configurations menu.  Setup the Debug Probe Connection.    Loading the ORTI file   Loading the ORTI file must be done for all the project configurations:  RTOS_example_S32Z270_SC1_multi_instance_R52_0_0 RTOS_example_S32Z270_SC1_multi_instance_R52_0_1 RTOS_example_S32Z270_SC1_multi_instance_R52_0_2 RTOS_example_S32Z270_SC1_multi_instance_R52_0_3   Starting debug on multi core project From the Debug Configuration menu, click on Launch Group for S32 Debugger. Check all the cores that you want to debug. Click the Debug button.   OS Details Browser view Compared with single core projects, when debugging multi core projects you can switch between the debugging sessions and information from all debugged cores   Tasks tab     Implementation tab The information displayed in Implementation tab is the same as in single-core projects case, but you can switch between the debugged cores       How to use OSEK OS Awareness with S32 Design Studio and PE Micro Debug probe Prerequisites Note: This HOWTo Guide describes the required steps for using OSEK Run Time Interface on a single-core example project for S32K396 Cortex-M7 in S32 Design Studio. Prerequisites might differ depending on the project hardware type.   Software environment: S32 Design Studio project or example project delivered with the NXP RTOS imported in S32 Design Studio Workspace S32 Design Studio 3.5.6 development package with support for S32K396 devices S32K3 Real-Time Drivers Version 3.0.0 P01 SW32K396 RTOS version 0.9.0 BETA   !Note: check the note from S32 Debugger – multi-core projects and install requires Java Runtime Environment OpenJDK-JRE 1.8   Hardware environment: Board:             Mini-module: XS32K396-BGA-DC PCB 54614 RevX1 SCH RevA              Silicon: Chip P32K396EHMJBS OP40E QAD2222F  Debug Probe: PE Micro Debug Probe     Project setup Select the desired project from the list of examples delivered with PE Micro Debug probe support or import your own S32 Design Studio project and click finish For this How To Guide, RTOS_example_S32K396_SC1_M7_0_0 was used   Generating configuration     Building the projects Select the project in the S32 Design Studio Workspace and click on Build.    Debug configuration Click on Debug Configurations. Select the debug configuration associated with your current build configuration and click on the “PEmicro Debugger” tab. Verify proper interface and port and if the device is properly detected.   Loading the ORTI file and starting debug From the OS Awareness tab select “OSEK” from the OS dropdown list. Browse and select from local system or Workspace the required *.ort file Click the Debug button.   OS Details Browser view Go to Window -> Show View -> Other…  and select the OS Details Browser view   Tasks tab In the “Tasks”  tab from the OS Details Browser view you can see information about the operating system (the number of tasks, current task states, system objects):   Implementation tab  “Implementation” tab displays more detailed information gathered from the .ort file:   Revision history: Revision no. Revision date Description 01 Nov 2023 Created document about how to use OSEK OS Awareness in S32 Design Studio on single and multi core projects with PE Micro and S32 Debug probes    

The S32 Debugger included within the S32 Design Studio for S32 Platform IDE provides the ability to access the flash programming and debugging of the S32 Debug Probe via GDB command line. This document provides only the necessary commands specific to launching a debug session on NXP devices. It does not cover general GDB command line operations, these are covered in detail in the GNU communities and other public websites which are not associated with NXP.   Preparation Setup the software tools Install S32 Design Studio for S32 Platform  Install the Development Package for the device you are debugging. In this case, the S32R45 development package. This package is important as the S32 Debugger support component contains the device-specific Python scripts required for initialization of the cores.   Setup the hardware Confirm the setup of the S32R45 evaluation board.  Connect the power supply cable Setup the S32 Debug Probe. Refer to the S32 Debug Probe User Manual for installation instructions. Connect the S32 Debug Probe to the evaluation board via JTAG cable.   Connect the S32 Debug Probe to the host PC via USB OR via Ethernet (via LAN or directly connected, and configured for static IP address) and power supply connected to USB port. Launch S32 Design Studio for S32 Platform Create new or open existing project and check that it successfully builds. If creating a new project, be sure the S32 Debugger is selected in the New Project Wizard.   Procedure As separate debug threads need to be started for each core to be debugged, and the method for launching a debug thread differs depending upon whether it is a primary core or secondary core and if the executable image will be loaded or if the executable is already running and the debugger just needs to be attached. These scenarios will be covered by the following 3 sections: Primary Core Load Image and Run: The application image will be loaded directly to memory by the debugger and then initialized and started. The primary core will launch any secondary cores used by the application. Secondary Cores: The primary core has launched a secondary core, it is now running and the debugger will connect through the attach method. Primary Core Image Already In Memory and Running: The primary core has already been initialized and launched by other means, such as via a Linux OS on the target, so the debugger will connect through the attach method without initializing or loading the image to memory.   Please proceed with the section which applies to the core for which you are starting a debug thread.   Primary Core Load Image and Run Prepare the initialization script for the core(s) to be debugged. Open the core initialization Python script: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\scripts\s32r45\s32r45_generic_bareboard_all_cores.py Uncomment the following lines: # _JTAG_SPEED = 50 # _PROBE_IP = "10.81.18.242" # _GDB_SERVER_HOST = 'localhost' # _GDB_SERVER_PORT = 45000 # _CORE_NAME = 'A53_0' # _RESET_TYPE = "default" # _RESET_DELAY = 1 # _REMOTE_TIMEOUT = 100 # _IS_LOGGING_ENABLED = True This file is used by the S32 Debugger within the S32 Design Studio IDE where the settings are provided from the GUI, so these lines are commented out in order to allow the GUI settings to have control. The commented lines are provided so the script could more easily be run by the command line method. Update the IP address line (_PROBE_IP) to match the IP address of the S32 Debug Probe which is connected to your PC. See the user guide for the S32 Debug Probe for details on how to obtain the IP address. Update the core name (_CORE_NAME), if necessary. See s32r45_context.py for complete list of supported cores. Save the file with a new name to preserve the original. For example, s32r45_gen_bb_all_c_my_probe.py. This ensures the S32 Debugger will still function correctly. Launch GTA server. From command prompt or Windows File Explorer run the command: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\Server\gta\gta.exe  Should see a window appear like this:   Ensure Environment Variable for Python is set. From command prompt, run the command:  set PYTHONPATH={S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7;{S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7\site-packages   Start GDB. In a command window, run the command: Windows OS: {S32DS Install Path}\S32DS\tools\gdb-arm\arm32-eabi\bin\arm-none-eabi-gdb-py.exe (for arm32)  OR {S32DS Install Path}\S32DS\tools\gdb-arm\arm64-eabi\bin\aarch64-none-elf-gdb-py.exe (for arm64) Linux OS: arm-none-eabi-gdb-py A (gdb) prompt should now be displayed in the command window:   From (gdb) prompt, enter the following commands(in this order): source {S32DS Install Path}\\S32DS\\tools\\S32Debugger\\Debugger\\scripts\\s32r45\\s32r45_gen_bb_all_c_my_probe.py This specifies the script for initialization. py board_init() This initializes the board. It should only be called for the initial core. In a multicore debugging workflow, the debugger launch for additional cores would omit this step. py core_init() This initializes the core specified in the initialization script in step 1. Now standard GDB commands may be used. For example, you may wish to load an ELF file: file {S32DS Workspace Path}\\ New_S32R_Project_M7_0\\Debug_RAM\\ New_S32R_Project_M7_0.elf load   Secondary Cores After completing the launch of debug for the primary core, it is possible to perform multicore debug by launching GDB debugging on the secondary cores. Some additional steps will need to be performed from within the primary core GDB session, enter the following commands: set *0x34100000 = 0x34200000  set *0x34100004 = 0x34100025 set *0x34100024 = 0xFFFEF7FF set *0x34200000 = 0x34300000 set *0x34200004 = 0x34200025 set *0x34200024 = 0xFFFEF7FF b main c These lines prepare the environment for launching debugging on secondary cores. This will allow for multicore debugging in the case of separate ELF files for each core. These can be found in the Run Commands field of the Startup tab on the Debug Configuration for the primary core within S32 Design Studio IDE, of any multicore project created from the New Application Project Wizard. Note: If there is just one ELF file for all cores, then these 'set *0x... = 0x...' commands should be skipped. In general, it will be correct to set the break-point at main, as shown, but this might need to be changed depending on when the secondary cores are started within the project. Prepare the initialization script for the secondary core to be debugged. Open the core initialization Python script: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\scripts\s32r45\s32r45_attach.py This is a different script than the one used for the primary core. It is designed to launch a debug session on a core which is already initialized and running. Edit the script for the secondary core to be debugged. Since this script is setup for the primary core, some adjustments need to be made to setup for a secondary core Uncomment the following lines: #_JTAG_SPEED = 14000 #_GDB_SERVER_PORT = "127.0.0.1:45000" #_RESET_TYPE = "default" #_PROBE_IP = "s32dbg:10.222.24.64" #_CORE_NAME = 'M7' #_RESET_DELAY = 1 #_CMD_TIMEOUT = 7200 Make the following changes to the lines: _JTAG_SPEED = 14000 ->  None _GDB_SERVER_PORT = "127.0.0.1:45000" -> 45000 _RESET_TYPE = "default" _PROBE_IP = "s32dbg:10.222.24.64" -> None _CORE_NAME = 'M7' -> 'M7_1' (this should be set to match the name of the core to be debugged, see s32r45_context.py for complete list) _RESET_DELAY = 1 -> _REMOTE_TIMEOUT = 60 (add this line) _CMD_TIMEOUT = 7200 -> _IS_LOGGING_ENABLED = True (add this line) Save the file with a new name to preserve the original. For example, s32r45_attach_my_probe_core1.py. This ensures the S32 Debugger will still function correctly. The existing GTA server is used, so do not launch a new one. Open an new command window and follow similar steps as done for the primary core. Setup the Python environment variable, if not done globally set PYTHONPATH={S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7;{S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7\site-packages Start GDB {S32DS Install Path}\S32DS\tools\gdb-arm\arm32-eabi\bin\arm-none-eabi-gdb-py.exe (for arm32) OR {S32DS Install Path}\S32DS\tools\gdb-arm\arm64-eabi\bin\aarch64-none-elf-gdb-py.exe (for arm64) A (gdb) prompt should now be displayed in the command window: From (gdb) prompt, enter the following commands(in this order): source {S32DS Install Path}\\S32DS\\tools\\S32Debugger\\Debugger\\scripts\\s32r45\\s32r45_attach_my_probe_core1.py This specifies the script for initialization. We will not execute the py board_init() as this was already done for the primary core. py core_init() This initializes the core specified in the initialization script in step 2. Now standard GDB commands may be used. For example, you may wish to load an ELF file: file {S32DS Workspace Path}\\S32R45_Multicore\\S32R45_Multicore_M7_1\\Debug_RAM\\S32R45_Multicore_M7_1.elf load Repeat 3-6 for each additional core.   Primary Core Image Already in Memory and Running The core is running and does not need to be initialized. Prepare the initialization script for the core to be debugged. Open the core initialization Python script: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\scripts\s32r45\s32r45_attach.py This is a different script than the one used for the primary core. It is designed to launch a debug session on a core which is already initialized and running. Edit the script for the secondary core to be debugged. Since this script is setup for the primary core, some adjustments need to be made to setup for a secondary core Uncomment the following lines: #_JTAG_SPEED = 14000 #_GDB_SERVER_PORT = "127.0.0.1:45000" #_RESET_TYPE = "default" #_PROBE_IP = "s32dbg:10.222.24.64" #_CORE_NAME = 'M7' #_RESET_DELAY = 1 #_CMD_TIMEOUT = 7200 Make the following changes to the lines: _JTAG_SPEED = 14000  _GDB_SERVER_PORT = "127.0.0.1:45000" -> 45000 _RESET_TYPE = "default" _PROBE_IP = "s32dbg:10.222.24.64" -> (enter the IP address of your probe) _CORE_NAME = 'M7' -> 'M7_0' (this should be set to match the name of the core to be debugged, see s32r45_context.py for complete list) _RESET_DELAY = 1 -> _REMOTE_TIMEOUT = 60 (add this line) _CMD_TIMEOUT = 7200 -> _IS_LOGGING_ENABLED = True (add this line) Save the file with a new name to preserve the original. For example, s32r45_attach_my_probe_core0.py. This ensures the S32 Debugger will still function correctly.   Launch GTA server. From command prompt or Windows File Explorer run the command: {S32DS Install Path}\S32DS\tools\S32Debugger\Debugger\Server\gta\gta.exe Should see a window appear like this:   Ensure Environment Variable for Python is set. From command prompt, run the command: set PYTHONPATH={S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7;{S32DS Install Path}\S32DS\build_tools\msys32\mingw32\lib\python2.7\site-packages   Start GDB. In a command window, run the command: Windows OS: {S32DS Install Path}\S32DS\tools\gdb-arm\arm32-eabi\bin\arm-none-eabi-gdb-py.exe (for arm32) OR {S32DS Install Path}\S32DS\tools\gdb-arm\arm64-eabi\bin\aarch64-none-elf-gdb-py.exe (for arm64) Linux OS: arm-none-eabi-gdb-py A (gdb) prompt should now be displayed in the command window:   From (gdb) prompt, enter the following commands(in this order): source {S32DS Install Path}\\S32DS\\tools\\S32Debugger\\Debugger\\scripts\\s32r45\\s32r45_attach_my_probe_core0.py This specifies the script for debugger initialization. Do not execute the py board_init() as this will initialize the board, and reset the currently executing application, which is not desired for this case. py core_init() This initializes the debugger connection to the core specified in the initialization script in step 1.   Now standard GDB commands may be used. For example, you may wish to load an ELF file: file {S32DS Workspace Path}\\S32R_Multicore\\S32R_Multicore_M7_0\\Debug_RAM\\S32R_Multicore_M7_0.elf load   After completing the launch of debug for the primary core, it is possible to perform multicore debug by launching GDB debugging on the secondary cores. See section ‘Secondary Cores’ for each additional core to be debugged.