RF power regulation is a critical factor in the development of NFC devices, as it directly influences performance, reliability, and compliance with industry standards. There are three main reasons for this:  If the PN7642 VUP current exceeds the limit given by the product Data sheet, the PN7642 can be damaged. If too high RF power is radiated from the antenna, there exists a risk for NFC Cards. Too high RF power might lead to exceeding a given RF limit (NFC Forum, ISO, EMVCo). NXP provides comprehensive documentation on Dynamic Power Control for the PN7642 and PN5190. Designers are expected to adhere to these guidelines, especially when aiming for compliance with standards such as EMVCo. PN5190 Dynamic Power Control Quick Calibration and TxShaping Demo Automatic DPC Calibration for PN7642 and PN5190 However, if the user's design is intended for infrastructure applications, such as a smart lock. At a minimum, Dynamic Power Control (DPC) should be enabled to serve as a current limiter. The evaluation can be done with the help of NFC Cockpit.  1// Start DPC Calibration  "Press" Start DPC Calibration  "Press" Load protocol  Make sure that the DPC is "Enabled" 2// Adjust current reduction table  Set all entries to "0" Write into EEPROM   3// Set the "Target" current Use approx. the same current as "TxLDO Vales"  Save to EEPROM   4// Check the power regulation  Start DPC Calibration  Place a card or any metal object in the antenna's proximity  Observe VDDPA and "TxLDO" current  The current should stay around the given target  The VDDPA will drop once the antenna is loaded  5// Set a minimum VDDPA in DPC  In the case that the current is still too high, a user can define a minimum VDDPA that is used for the DPC regulation. By default, this value is set to 2.2V. The user can decrease it up to 1.5V.  In that case, NXP also recommends disabling the RDOn control.  Note: The User has to consider the "DPC_TXLDO_MAX_DROPOUT" parameter, which defines the maximum voltage drop on TXLDO. By default, it is set to 3.6 V. That means if the user wants to use the minimum VDDPA 1.5 V, then the maximum TXLDO input shall not exceed 5.1 V. This feature protects the TXLDO from overheating.    Once the evaluation is done, the customer shall program the following EEPROM entries in their application. For more info, see PN7642 Product Data sheet.  DPC_CONFIG (Address: 0x0068) -> example: enabled -> 0x01 DPC_TARGET_CURRENT (Address: 0x0069) -> example: 229 mA -> 0xE5 DPC_TXLDO_MAX_DROPOUT (Addresses: 0x0073 - 0x0074) -> example: 3.6 V -> 0x10,0x0E DPC_TXLDOVDDPALow (Address: 0x006F) -> example: 1.5 V -> 0x00 DPC_HYSTERESIS_LOADING (Address: 0x006B) -> example: 20 mA -> 0x14 DPC_HYSTERESIS_UNLOADING (Address: 0x006E) -> example: 10 mA - 0x0A DPC lookup table entries (Addresses: 0x007D - 0x0125) -> example: for current limitation only -> all 0x00 If a user does not want to use a maximum range of VDDPA during DPC (5.7V), e.g., their system uses a 3.3V supply domain. Then, the maximum VDDPA in DPC can be limited by the following EEPROM settings:  TXLDO_VDDPA_MAX_RDR (Address: 0x0007)-> example: 3.0 V -> 0x0F Note: TXLDO has approx. 0.3V voltage drop. Always set this parameter 0.3V lower. Once this is done, the user has to check the "TxLDO" current and adjust the target current accordingly. In this case, to approximately 150 mA. If you don´t change it, the DPC starts to limit the power around 229 mA, as has been set in a previous step. 

The PN7642 includes a USB interface, which allows USB communication with the PC.  Once the PN7642 USB communication is established, the NFC Cockpit tool can be used for RF debugging.  Note: This also requires flashing the NFC Cockpit application with the help of the mass storage mode or SWD interface.  Basically, the user has to connect a USB cable/Connector to the following PN7642 pins.  USB Signal  PN7642 Pin  5V  USB_VBUS Data - ATX_D Data + ATX_C GND GND   See an example below. This is a very basic connection (for evaluation or debugging only) where the USB cable is directly connected to the PN7642 pads.  This situation may arise during debugging on customer hardware where the USB interface is not yet implemented on the PCB. But a user wants to debug with the help of NFC Cockpit.    Please note that the proper USB interface might require special layout rules, such as impedance, overvoltage protection, etc.. For more info, see the PN7642 EVK reference schematic or USB PCB design guide. 

This might be convenient if the user wants to use NFC Cockpit on their device.  See the photo of PNEV5190BP EVK with the instructions.          1. Place R5 and R7, keep R6 open    2. Place R20, keep R19 open Note: This step depends on the voltage domain used in the external hardware. If R19 is placed -> 1.8V domain, if R20 is placed -> 3.3V domain.    3. Remove VBAT, VBAT_PWR, and VUP jumpers to disconnect the "internal" PN5190 located on the EVK    4. Connect the following SPI lines to external PN5190 (e.g., customer HW) SPI_CLK SPI_MOSI SPI_MISO SPI_CS NFC_IRQ GND Note: It is also necessary to disconnect the external PN5190 from the customer MCU. 5. Connect VEN to the external PN5190  NFC_VEN   Now, the external PN5190 HW should communitate with the MCU located in PNEV5190BP, and the NFC Cockpit can be used. The user should see that the blue LED is on. If the red LED is blinking, there is an issue, and the user should check the connections/supply. 

LPCD (Low Power Card Detection) works on the principle that the I and Q values are extracted from the RF signal captured on the RX pins. These values are then compared with the I and Q data obtained using LPCD calibration. If the difference is greater than the chosen I and Q threshold, the load is detected and the IC wakes up.  1// LPCD Way of working  Run LPCD Calibration  It is recommended to use an external power supply to supply the EVK board. If the USB supply is used, the value can fluctuate because of the transition effects.  Run "Single LPCD" and check the performance  Adjust the I and Q thresholds  Low value -> Better detection range, more false wake-ups  High value -> Worse detection range, fewer false wake-ups  The number of samples, RSSI, and VDDPA parameters typically remain at their default values.  2// Auto LPCD  When the "Auto LPCD" is used, the LPCD algorithm always performs LPCD Calibration before entering the LPCD. 3//Semi-autonomous LPCD mode (PN5190 only)   The user can evaluate the I and Q values behaviour under loaded/unloaded conditions. Based on that, the LPCD threshold can be properly selected.  Use the same "Register" RSSI Target and Hysteresis as for "EEPROM" Calibrate LPCD Run "Endless I/Q read"  Check how the I and Q values change With no card/object in the antenna proximity  with a NFC card/object in the antenna proximity

This document show the detail steps of following the Personalization example in AN12196. Tool : Pegoda3 and RFIDDiscover.    

A user can evaluate the current consumption of PN7642 in low power modes with the help of the PN7642 Evaluation Board (OM27642) and:  MCUXpresso SKD example (LPCD)  NFC Cockpit or MCUXpresso SKD example (ULPCD) NXP defines the current consumption in ULPCD/LPCD as VBAT current + VDDIO current for the LPCD/ULPCD cycle time of 330 ms. Make sure that DC/DC is disabled.  Where:  VBAT current = VBAT_Current + VBATPWR_Current + VUP_Current See the snapshot from the PN7642 Datasheet below:    See where to measure the currents on PN7642 EVK: J63 and J64 are used for enabling/disabling the LEDs that are connected to PN7642 GPIOs. They must be disabled for VDDIO current measurement.  A modification of R69 and R70 is necessary to perform the current measurement on VDDIO in LPCD mode.   1. ULPCD current consumption evaluation For the ULPCD evaluation, the NFC Cockpit or SDK example can be used. In this article, we will focus on evaluation using the NFC Cockpit.  See the used ULPCD configuration:    Note: The current should be measured as an average over, e.g., 10 seconds.  The ULPCD current can be evaluated separately, as shown in the following chapters  2.1 VBAT Current measurement 2.2 VBATPWR Current measurement 2.3 VUP Current measurement  2.4 VDDIO Current measurement  This might be helpful to understand the contribution of each current in ULPCD.  The overall average current can also be measured directly, as shown in  2.5 Overall ULPCD current measurement    2.1 VBAT Current measurement    In this case, the VBAT current is approximately 13,7 μA. 2.2 VBATPWR Current measurement   In this case, the VBATPWR current is approximately 2,1 μA. 2.3 VUP Current measurement    In this case, the VUP current is approximately 5,5 μA. Note: This current depends on the ULPCD VDPPA settings + Antenna Impedance tuning and RF_ON time  2.4 VDDIO Current measurement  Note: Before VDDIO measurement, place jumpers J63 and J64 on PN7642 EVK. This will disable LEDs that are connected to PN7642 GPIOs.    In this case, the VDDIO current is approximately 3,7 μA.  Then the overall current comsumption in ULPCD is I_VBAT+I_VBATPWR+I_VUP + I_VDDIO= 13,7 + 2,1 + 5,5 + 3,7 μA = 25 μA 2.5 Overall ULPCD current measurement  To measure all currents together, a user can create a measurement fixture as shown below:  Real setup :  Then the overall results look as follows:   As can be seen, the directly measured ULPCD current consumption is around 24 μA. 2. LPCD current consumption evaluation The user has to import the example (pnev7642fama_nfc_low_power_mode_Pub) from the PN7642 SDK.  Before building it, the following change in the code has to be made:  -> Comment line 84   A user can adjust the LPCD cycle time as shown below:   1.1 VBAT Current measurement    In this case, the VBAT current is approximately 123 μA. 1.2 VBATPWR current measurement  In this case, the VBAT_PWR current is approximately 91,8 μA. 1.3 VUP Current measurement  In this case, the VBAT_PWR current is approximately 32,8 μA.  Note: This current depends on the LPCD VDPPA settings + Antenna Impedance tuning  1.4 VDDIO Current measurement Note: Before VDDIO measurement, place jumpers J63 and J64 on PN7642 EVK. This will disable LEDs that are connected to PN7642 GPIOs.  The VDDIO current measurement requires the following steps:  Run the "pnev7642fama_nfc_low_power_mode_Pub" example  Once the example is running, disconnect the debugger (J-link, LPC-Link...) from J21 (NFC Debug connector)    Remove R70  Populate a 10K resistor on the R69 position (it disables the SWD interface) Once the measurement is done, change it back to the default state (R70=0R, R69=Open). Note: It is recommended to prepare the board with the option to easily populate or remove R70 and R69 when the LPCD example is running. E.g., with the help of jumpers/pin headers as shown below.   Only then will the correct VDDIO be measured on PN7642 EVK.  See the VDDIO current measurement below:    In this case, the VDDIO current is approximately 5,48 μA.  Then the overall current comsumption in LPCD is I_VBAT + I_VDDIO= (123 + 91,8 + 32,8 + 5,48) = 253,08 μA Note: For this measurement, the NFC Cockpit is not suitable because the IC does not go into standby mode between LPCD RF pings. Meaning LPCD works normally, but a user can measure higher current consumption. Used Ampere meter -> Power Profiler Kit II Measurement has been performed with FW 2.6  Board supply (jumpers J1, J2 and J4) -> 3.3V Please note that this measurement is indication only! 

 

This article provides information on the expected NFC communication range for NXP products (Connected tags) when used with various mobile phones and the CLRC663 reader.   1// NFC Antenna 54 mm vs 27 mm (NTAG 5 Boost Antenna 10 mm vs 10 mm)    1.1// Used antenna   1.2// Results  Note: NTAG5 Link - Energy harvesting is disabled      2// NFC Antenna 25 mm vs 18 mm    2.1// Used antenna   2.2// Results Note: NTAG5 Link - Energy harvesting is disabled      3//NFC Antenna 25 mm vs 18 mm with "filling"    3.1// Used antenna    3.2// Results    Note: NTAG5 Link - Energy harvesting is disabled 

This article describes how to evaluate ULPCD feature toghether with PN7642 EVK (OM27642EVK) and NFC Cockpit.  1// Disable DC-DC in EEPROM  OM27642EVK does not required any HW changes for ULPCD. User is only required to change the following settings in EEPROM  (disable DC-DC converter). Address: 0x0000 (Secure_Lib_Config) Value: 0x21  2//Set required ULPCD settings in EEPROM  The default settings can be used as a starting point as such. The optimum threshold for OM27642EVK is between 5-10. Below 5, user can observe higher occurrence of fake detection  Above 10, the detection range might drop significantly.  3// Perform "Reads HF Attenuator"  Once the required ULPCD settings is set (Guard times, Threshold....). Then User has to perform "Reads HF Attenuator". This will read and write the HF Attenuator value in the EEPROM at the address 0x63A (Secure_Lib_Config).  4//Enable that the RSSI value is calculated based on HF attenuator value  User is required to set most significant bit (7) to 1b. This will enable RSSI calculation based on the current HF attenuator value.  Example: If the HF Attenuator value is 0x0B, user has to write 0x8B in the eeprom field.  Note that if user reads the HF attenuator again, this step must be repeated.    Note: This has been updated in NFC Cockpit version 8.3.0. User needs to "check" the HF Attenuator check box.    5// Perform ULPCD Calibration and check RSSI Value  User can now perform the ULPCD Calibration and check the RSSI value by reading PCRM_ULPCD_STS register.  For OM27642EVK, the RSSI value for unloaded antenna is typically around 1500dec - 1550dec. 6//Enter ULPCD mode  User can enter the ULPCD mode. The board will be again connected once the load change is detected (e.g. NFC card or smarphone in the antenna proximity).

Prerequisites:  PN5190 instruction layer-> https://www.nxp.com/docs/en/user-manual/UM11942.pdf NFC Cockpit -> https://www.nxp.com/products/rfid-nfc/nfc-hf/nfc-readers/nfc-cockpit-configuration-tool-for-nfc-ics:NFC-COCKPIT   In case of PN5190, the NFC cockpit can only show a generic error messages. More detailed error description has to be decoded from the received "FrontEnd Packets" 1. See an example of the error returned after ULPCD calibration    2.  The Errors description is descibred in  PN5190 instruction layer UM. However, the error has to be "decoded"  →> Take the received packets before the error ntf. in NFC Cockpit → 80 00 0C 02 02 00 00 BB 07 00 00 23 00 00 00 Where:  2.1. Decode the "Event" 02 02 (Little endian format) → General_Error_Event + LPCD_Calibration_Done_Event   2.2 Check LPCD_CALIBRATION_DONE_EVENT  07 BB (Little endian format) → Measured RSSI Value    2.3. Check the GENERAL_ERROR_EVENT  00 23 (Little endian format) → Definition of the general error event → Error is : GPADC_ERROR, CLOCK_ERROR and XTAL_START_ERROR  

Step 1:  Disable the DCDC in settings (Valid for PNEV5190B and OM27642EVK) Write 0x21 into EEPROM PWR_CONFIG (address: 0x0000) This disables the DCDC. & selects that the VUP must be supplied with the same supply voltage as VBAT = VBATPWR. Do not enable RF afterwards, before the hardware is modified properly! Enabling the RF without supplying the VUP might kill the PN5190/PN7642! Step 2: Supply VUP = VBATPWR  Connect jumper J13 positions: 1-2: This supplies the VUP with VBATPWR = 3.3V PN5190 EVK: Please note that for a final application using ULPCD, the "DC-DC" inductor (L2) has to be replaced by a zero resistor/short.    PN7642 EVK:  The OM27642EVK does not require any jumper settings (DC-DC is not used by default), the User must only disable DC-DC in EEPROM (address 0x0000, value 0x21) Then you can turn-on RF and perform ULPCD   Please note that for a final application using ULPCD, the "DC-DC" inductor (L2) has to be replaced by a zero resistor/short.  Also, R8 shall be placed   

this is a step by step guider to port PN7160 to Android 14 on i.MX 8M Nano board

Hardware: 1. i.MX6ULL EVK board   2. OM27160A1HN   Software: 1. Build the Yocto Linux BSP for i.MX6ULL EVK. Here are the steps: $ mkdir L6.6.36_2.1.0 $ cd L6.6.36_2.1.0 $ repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.36-2.1.0.xml $ repo sync   $ DISTRO=fsl-imx-xwayland MACHINE=imx6ull14x14evk source imx-setup-release.sh -b build-for-6ullevk $ bitbake core-image-full-cmdline   2. Add the nxpnfc driver to kernel After the BSP build succeed, the kernel source code is located here: L6.6.36_2.1.0/build-for-6ullevk/tmp/work/imx6ull14x14evk-poky-linux-gnueabi/linux-imx/6.6.36+git/git/   Clone the nxpnfc repository into the kernel directory, replacing existing implementation: $ cd L6.6.36_2.1.0/build-for-6ullevk/tmp/work/imx6ull14x14evk-poky-linux-gnueabi/linux-imx/6.6.36+git/git/ $ rm -rf drivers/nfc $ git clone https://github.com/NXPNFCLinux/nxpnfc.git drivers/nfc  This will end-up with the folder drivers/nfc containing the following files: • README.md: repository information • Makefile: driver heading makefile • Kconfig: driver configuration file • LICENSE: driver licensing terms • i2c_devicetree.txt: example of I²C device tree definition • spi_devicetree.txt: example of SPI device tree definition • nfc sub folder containing: – Makefile: – common.c: generic driver implementation – common.h: generic driver interface definition – i2c.c: I2C specific driver implementation – i2c.h: I2C specific driver interface definition – spi.c: SPI-specific driver implementation – spi.h: SPI-specific driver interface definition   Through kernel menuconfig procedure include the targeted driver to the build, as built-in (<*>): $ bitbake linux-imx -c menuconfig <*> NFC I2C Slave driver for NXP-NFCC       3. Connection between i.MX6ULL EVK and the PN7160 There are some pins on the Arduino header on the i.MX6ULL EVK board can be used to connect the PN7160 board. Below is the schematic of the Arduino headers on the i.MX6ULL EVK board. The two I2C2 pins can be used for I2C connection. The UART2_RX, UART2_TX and UART2_RTS can be changed to GPIO for connecting IRQ, VEN and DWL_REQ of PN7160, respectively. Below is the J1704 and J1703 on the EVK board.   Below is the schematic of Arduino interface on OM27160A1HN. There is a connector board (OM29110ARD-B). The OM27160A1HN is connecting on top of it. Below is the connectors board schematic. So, on the i.MX6ULL EVK board, we need I2C2 SDA and I2C2 SCL for I2C connections. And 3 GPIO pins for PN7160's IRQ, VEN and DWL_REQ. Here is the connection between i.MX6ULL EVK and OM29110ARD-B. OM29110ARD-B pin i.MX6ULL EVK pin I2C_SCL J2-1 I2C2_SCL J1704-10 I2C_SDA J2-2 I2C2_SDA J1704-9 GPIO_0 J2-10 GPIO1_21 J1703-1 GPIO_1 J4_1 GPIO1_20 J1703-2 GPIO_2 J4_2 GPIO1_25 J1703-3 3.3V J1-4 3.3V J1705-4 5V J1-5 5V J1705-5 GND J1-6 GND J1705-6      4. Modify the device tree file of i.MX6ull evk. The device tree file for i.MX6ULL evk is imx6ul-14x14-evk.dtsi. The location of the device tree file is here: L6.6.36_2.1.0/build-for-6ullevk/tmp/work/imx6ull14x14evk-poky-linux-gnueabi/linux-imx/6.6.36+git/git/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi   As we don't use the UART2, we disabled it. &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; uart-has-rtscts; /* for DTE mode, add below change */ /* fsl,dte-mode; */ /* pinctrl-0 = <&pinctrl_uart2dte>; */ status = "disabled"; // <--- change the status to "disabled" bluetooth { compatible = "nxp,88w8987-bt"; }; };   Put the below nxpnfc under the &I2C2 node. nxpnfc: nxpnfc@28 { compatible = "nxp,nxpnfc"; reg = <0x28>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nfcgpio>; nxp,nxpnfc-irq = <&gpio1 21 0>; nxp,nxpnfc-ven = <&gpio1 20 0>; nxp,nxpnfc-fw-dwnld = <&gpio1 25 0>; };   Like this: Add the gpios for nxpnfc. pinctrl_nfcgpio: nfcgpiogrp { fsl,pins = < MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0xb0 //irq MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0xb0 //ven MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0xb0 //dwld req >; };     5. Re-compile the kernel and the whole image. $ bitbake linux-imx -c compile $ bitbake core-image-full-cmdline     6. Using UUU to program the image to the board. The built image is .wic.zst file. We need to program it to the board. It is located in the deploy folder below. L6.6.36_2.1.0/build-for-6ullevk/tmp/deploy/images/imx6ull14x14evk/core-image-full-cmdline-imx6ull14x14evk.rootfs-20241113103828.wic.zst   Download the UUU.exe from here: https://github.com/nxp-imx/mfgtools/releases   Download the Demo image for i.MX6ULL EVK from the Linux BSP web page.   Unzip the demo image file to a folder. And then copy the UUU.exe to the same demo image folder.   Connect the board to your PC using the USB cable. Switch the boot mode to "Serial Downloader mode"   On the PC side, run the below command to program the image to SD card on the i.MX6ULL EVK. uuu -b sd_all core-image-full-cmdline-imx6ull14x14evk.rootfs-20241112083235.wic.zst   Then switch the boot mode to "Internal Boot (Development)". Restart the board. Now, you can login as "root" and use the board. And you can see the nxpnfc driver is properly loaded.     7. Build the NFC Library and the nfcDemoApp in Yocto In the Yocto's sources directory, download the meta-nxp-nfc layer from https://github.com/NXPNFCLinux/meta-nxp-nfc     $ git clone https://github.com/NXPNFCLinux/meta-nxp-nfc.git  Then, the NFC library recipe is located in L6.6.36_2.1.0/sources/meta-nxp-nfc/recipes-nfc/nxp_nfc. Change the recipe nxp-nfc_git.bb as below: # Copyright (C) 2016 NXP Semiconductors DESCRIPTION = "Linux NFC stack for NCI based NXP NFC Controllers." LICENSE = "Apache-2.0" LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=86d3f3a95c324c9479bd8986968f4327" SRC_URI = " \ git://github.com/NXPNFCLinux/linux_libnfc-nci.git;branch=NCI2.0_PN7160;protocol=https \ " SRCREV = "6bf9f42b94e267f6384043009bda84c11e7ebbaa" SRC_URI[sha256sum] = "47bdc27108fc8d66ce5d6c33f76b419cdef20c24b9e187ada8e689d1bd7f79c7" inherit autotools pkgconfig lib_package S = "${WORKDIR}/git"   Add the meta-nxp-nfc layer to the build definition. Updating file build_dir/conf/bblayers.conf with: BBLAYERS += " ${BSPDIR}/sources/meta-nxp-nfc"   Build meta-nxp-nfc layer:     $ bitbake nxp-nfc After build succeed, the library files and the nfcDemoApp are located in here : L6.6.36_2.1.0/build-for-6ullevk/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/nxp-nfc/git/   Use the "scp" command to copy the files to the EVK board via the Network. If the folder is not exist on the EVK, please use "mkdir" to make the folder on the EVK first. Then use the "scp" command.  Here is the example: (**The IP address below should change to your EVK's IP address.) scp build/.libs/* root@10.192.246.136:/.libs/ scp image/etc/libnfc* root@10.192.246.136:/etc/   scp image/usr/lib/* root@10.192.246.136:/usr/lib     On the EVK board: root@imx6ull14x14evk:/# mkdir /usr/local root@imx6ull14x14evk:/# mkdir /usr/local/etc root@imx6ull14x14evk:/# cp /etc/libnfc-nci.conf /usr/local/etc   Now, you can run the nfcDemoApp on the i.MX6ULL EVK. root@imx6ull14x14evk:/# cd .libs/ root@imx6ull14x14evk:/.libs# ./nfcDemoApp poll       References: 1. i.MX Yocto Project User's guide 2. PN7160 Linux Porting Guide 3. MCIMX6ULL-EVK_DESIGNFILES 4. OM27160A1HN Hardware Design Files 5. OM29110 NFC’s SBC Interface Board Design Files 6. PN7150 NFC Controller on i.MX8M mini evk running Yocto

The Raspberry Pi Foundation released the Raspberry Pi 5 in October 2023, Raspberry Pi 5 features the Broadcom BCM2712 quad-core Arm Cortex A76 processor @2.4GHz, making it up to three times fast than Raspberry Pi 4.   The latest version of Raspberry Pi OS is Bookworm. However, some customers found the PN7160 is not detected over I2C/SPI on the Raspberry Pi 5. Running "i2cdetect -y 1" produces a blank table, and running "nfcDemoApp poll" results in an "nfcservice init fail" message. The incompatibility appears to be between the PN7160 and the new Raspberry Pi OS—Bookworm.  This reason is Raspberry Pi OS received a major update in Linux Kernel 6.6,  the classic way of GIPO handling no long work.   In step 6, a new GPIO interface is introduced to resolve the incompatibility issue. This article is a step-by-step guide to port PN7160 NCI2 stack to Raspberry Pi OS--Bookworm.   Hardware setup: For detail information about Raspberry Pi 5, please refer to below link.  https://www.raspberrypi.com/products/   The PN7160 EVK board must be connected to Raspberry Pi using the following instructions:   Raspberry Pi 5 board pin NFC controller board signal #1 3.3V PWR VDD (PAD) +5V VBAT and VDD (UP) #16 GPIO23 IRQ #18 GPIO24 VEN #22 DWL_REQ #6 GND #5 I2C_SCL #3 I2C_SDA     This matches the Raspberry Pi version of OM27160A1EVK (I2C variant).  The kit can then be plugged on Raspberry Pi 5 board to run the example. First of all, assemble the PN7160 NFC controller board (OM27160A1HN or OM27160B1HN) with the Raspberry Pi interface board (OM29110RPI)      Then stacked together the boards with the Raspberry Pi board.     Software Setup: 1    Install Rasp 5 OS -Bookworm We use Raspberry Pi Imager tool to install Raspberry Pi OS (64bit, Bookworm). Click choose device and select Raspberry Pi 5, next click choose OS and select an operating system –Raspberry Pi OS (64-bit) , and select Micro SD card. Next we can write the Image to the Micro SD card.   2 Enable i2c interface 1). Run command:     sudo raspi-config     2). Use the down arrow to select "Interface Options"   3). Arrow down to "I5 I2C"     4). Select "yes" when it asks you to enable I2C 5). Use the right arrow to select the <Finish> button To verify the i2c interface is enabled, enter the following command: $ ls /dev/i2c* The Pi should respond with “ /dev/i2c-1” which represents the user-mode i2c interface to which is connected the PN7160    3 Install necessary tools   We need to use APT commands to install , update software package in Raspberry Pi OS, please refer to  below link. https://www.raspberrypi.com/documentation/computers/os.html Libtool needs to be installed to run the NCI stack.    4 Clone Linux libnfc-nci library repository NFC NCI library is available from the following repository: https://github.com/NXPNFCLinux/linux_libnfc-nci $ git clone https://github.com/NXPNFCLinux/linux_libnfc-nci.git -b NCI2.0_PN7160     5 Apply 64bit patch To install on 64bit OS, we need to apply 64bit patch.  It is under folder linux_libnfc-nci/64bit_patch/ROOT_src.patch   6 Modifications for GPIO Raspberry Pi OS (Bookworm) received a major update which includes the Linux kernel 6.6.   In the new OS update, the classic way of interfacing with GPIO has been deprecated.  Unfortunately our PN7160 NCI stack still interact with GPIO using /sys/class/gpio pseudo-filesystem,  low level control of GPIOs no longer work with Bookworm.  So we need to use the new GPIO interface on the Raspberry PI: libgpiod.  At this point Raspberry OS with a kernel 6.6 both libgpiod and gpiod are not pre-packaged and we need to install them.   6.1  Installation of gpiod tools We can look more into what is installed   The output of gpioinfo reports all of the available GPIO lines, by default for all chips. 6.2 Installation of the gpio libraries If we want to install libraries for development we need to do the following   Here is the info on libgpiod-dev     The development package installs the C libraries and header files for us to use. Namely, the /usr/include/gpiod.h C header file and the /usr/lib/arm-linux-gnueabihf/libgpiod.so Shared Library.   6.3 Modifications in PN7160 NCI2 library. In source code, we need to add the gpiod library support 6.3.1 Makefile.am    6.3.2 src/nfcandroid_nfc_hidlimpl/halimpl/tml/transport/NfccAltTransport.cc    ......     and src/nfcandroid_nfc_hidlimpl/halimpl/tml/transport/NfccAltTransport.h   If you need the modified source code files, please let me know. I can send the source code changes to you.    7 Configure the library       8 Set the library to map i2c interface   9 Build and install the library   $ make $ sudo make install $ export LD_LIBRARY_PATH=/usr/local/lib   10 Run & Verify the NFC functionality     This demo works as expected.   Summary: Porting PN7160 NCI2 stack to Raspberry Pi 5, we need to follow PN7160 Linux porting guide and update the classic GPIO interface to gpiod libraries.   Happy porting 😊

  Some customers are trying to update the user firmware on PN7642 through host interface and using “DownloadLibEx1” demo,  and they are using SFWUMaker to create .esfwu file from .bin followed the readme file but failed to do a firmware update. Here is a step-by-step guide to do it. I will use the SDK led blinky demo,  and generate an Esfwu file , and program it into PN7642 board with LPC5516 host.  Led blinky demo is in PN7642_MCUXpresso_SDK_02-15-00_PUB.  You can download it from PN7642 product page.  Single-Chip Solution with High-Performance NFC Reader, Customizable MCU and Security Toolbox | NXP Semiconductors Step 1: compile pnev7642fama_led_blinky demo Please make sure the flash size is 180KB.  By default,  the output flash size is 180KB with MCUXpresso IDE.     Step 2: Bin file generation The binary (.bin) file is not generated by default, we can do it manually by doing following: Build your target application Open the debug/release folder in MCUXpresso Right-click on the *.axf file Choose 'Binary Utilities' → 'Create binary' in the menu The .bin should appear   Step 3: Make an ESFWU file To convert a bin file to an ESFWU file, we can use the ESFWU Maker Utility (sw810311). It can be downloaded from PN7642 product page. It is a secure file, and you need to have an active NDA to get it.  To run this utility, the toml file is very important.  You need to change the output name and binary name according to your project ,  and  you need to use the correct aes_root_key. For other parameters, we left them unchanged.   3.1   change the output name and binary name   3.2 set the correct aes_root_key The application flashed via SWD is a bin file and NOT encrypted neither is it flashed with our bootloader. The .esfwu file via host interface is encrypted and flashed by our own bootloader.  The keys have to be valid, else the bootloader will not be able to decrypt the received file. Please make sure we are using the right keys to create the user application firmware.  This is crucial and without it, it won’t work anyways. The default keys are mentioned in the datasheet as transport keys. See below picture.  But it is highly recommended to provision your own keys!  Please have a look at the secure key mode application note for further information on that.        If you are not sure whether you have provisioned the root key or not, you can check the SKM state by running SKM demo. if the root key is provisioned, please use the provisioned root key.  From below picture, I can see that the app_root_key is  not provisioned, so I use the default transport key.     3.3  use the EsfwuMaker command to generate the Esfwu file.     After this command, we can get the esfwu file.       Step 4: Secure firmware download   We use the firmware download example to update the PN7642 firmware.  It is in the host software package, it  holds examples to be used with LPC55S16 and MCUXpresso, to interact with the PN7642. The LPC55S16 Host Software can be download from PN7642 product page. LPC55S16 Host Software Version 02.01.00 (nxp.com) To run the demo, we need to edit the firmware location.  In file DownloadLibEx1.c,  about line 60.       Please set the correct hardware settings as below.  we have to stack the PNEV7642A Rev-B development board on top of the LPC55S16-EVK board. Align Pin.1 of J36 of the PNEV7642A Rev-B development board with Pin.1 of J9 of the LPC55 board. The last 4 pins, 17 - 20, of J12 of the LPC board are not connected. As well as pin 1-4 of J10 stay unconnected, as below picture shows.       Run the firmware download Demo with LPC55s16,  see the log output below.  Choose option “6” to update your application firmware. The update may take a while.  At the end, a successful update is indicated by the prompt of “Successful firmware upload ”.         To verify it is successful, we can run this demo, please keep J65 open.  you will see the D7 (RED LED) blinky (0.5 HZ rate). If you need the pnev7642fama_led_blinky.esfwu, please let me know.    

In the case, the Reader output power cannot be further reduced with the help of the tuning and TXLDO settings (e.g. EMI reasons)  Then further reduction can be done using DPC settings. The idea is to use just one DPC entry and adjust the GSN value as shown below: DPC Settings:    The DPC Entries (1-19) have been deactivated (Index Activate ->0), and only Entry 00 stays active.    An example (RF Field measured using a scope probe): No DPC, TXLDO 5V    NO DPC, TXLDO 2.7V   DPC Activated, One Entry, GSN-> 0x05   DPC Activated, One Entry, GSN-> 0x01   Please consider that the reading performance will be impacted. 

Introduction NTAG5 offers a powerful energy harvesting feature (up to 30mW). One useful application can be charging the supercapacitor which then might be used as the supply of customer MCU, Sensor, etc.   See the typical schematic below:  C1 and C1P are used for the impedance tuning. The antenna is typically tuned at 13.56 MHz-14MHz.  R1 is used to limit the charging current of the supercapacitor. Its value depends on the selected VOUT voltage, keep in mind that the maximum output current is 12.5 mA.  E.g. VOUT=2.4V, Icharging=10mA -> R1=240 Ohm Keep in mind, that if the charging current is too high and/or the amount of the received magnetic field is not high enough, the VOUT may drop.  D1 should be a low-drop diode e.g. RB520CS30L Used super cap: CPX3225A752D Antenna size  Generally, it is best to attempt to match the tag and the reader antenna geometries for maximum efficiency. A significant difference between the reader and tag antenna dimensions result in bad communication and energy harvesting performance because of the small coupling factor. As smartphone NFC antennas can have different dimensions. It might be challenging to design one NFC Tag antenna that will deliver the best performance for multiple smartphones.  The phone's NFC Antenna dimensions are typically between approximately 25 mm vs 20 mm (NFC Forum Poller Class 6) & 50 mm vs 30 mm (NFC Forum Poller Class 3). Note: But this might be different e.g., iPhones  So customers can consider the following form factors of NFC antennas for their Energy harvesting NTAG5 Link design:  For bigger designs (NFC Forum Listener Class 3):    For circle NFC Antenna ->Outer diameter is approx. 44 mm    For smaller designs (NFC Forum Listener Class 6):  For circle NFC Antenna ->Outer diameter is approx. 25 mm     Tomas Parizek  Customer Application Support 

There is a basic GUI for PN7160 RF Settings available.

How to set the RF Settings can be found in -> https://www.nxp.com/docs/en/application-note/AN13218.pdf The list of the default values + values which shall not be changed is available in the attachment.  Tomas Parizek  Customer Application Support 

The PN5180 offers a low-power card detection (LPCD) feature, which allows to power down the reader for a certain period of time to safe the energy. After this time the reader must become active again to poll for the cards. If no card has been detected, the reader can go back to the power down state. PN5180 LPCD cycle time includes standby time and VBAT time. In a normal case, standby time is 200ms (user can define it),   standby current is 15uA, VBATON current is 7500uA, FieldON current: 200mA.  Average current is about 200uA, it depends on your settings and application.   This article describes how to configure PN5180 LPCD using NXP Cockpit Tool and using NXP NFC Reader library.   1  PN5190 LPCD Overview PN5180 LPCD operates in two modes: auto calibration mode and self-calibration mode. Auto calibration mode:  everything done automatically Self-calibration mode:   calibration must be done manually before starting the LPCD.   1.1  Auto Calibration Mode ( 00b) The LPCD calibration is done automatically when the LPCD is started, using the gear and threshold as defined in the EEPROM. This mode always uses the same gear for the LPCD, and is the fast and easiest way to start the LPCD.  It is recommended to choose a gear, which always keeps the ITVDD and field strength limits, so normally, the highest gear number. Auto calibration mode is most commonly used, it is a standard use case. Below parameters need to be configured correctly in EEPROM   LPCD_REFERENCE_VALUE       LPCD_REFVAL_GPO_CONTROL      LPCD_THRESHHOLD  ( 0x37) LPCD wakes up, if current AGC during “ping” > AGC Reference + LPCD_THRESHOLD or< AGC Reference -LPCD_THRESHOLD Minimum LPCD_THRESHOLD = 03…08 (very sensitive) Maximum LPCD_THRESHOLD = 40 … 50 (very robust)    LPCD_FIELD_ON_TIME  (0x36) RF on time in 8µs, excluding the fix time .   Fix time = 62µs 01 => RF on = 70µs 02 => RF on = 78µs 03 => RF on = 86µs 10 => RF on = 190µs   1.2  Self Calibration Mode (01b) The LPCD calibration must be manually triggered, with reading or writing into the AGCREF_CONFIG register.   Reading from this register - without prior writing - starts an LPCD calibration. The calibration is executed using the gear which is resulting from the actual DPC setting under the actual antenna detuning condition. AGC_GEAR is used in the LPCD self-calibration.   Reading from this register - without prior writing - delivers in addition to the AGC_GEAR value the AGC_VALUE. The AGC_VALUE is used in the LPCD self-calibration. Writing to this register: Writing data to this register is required before starting the LPCD in Self-calibration mode. Either the previously read AGC_GEAR or a user-defined gear can be chosen. The previously read AGC_VALUE has to be written in any case. Writing data to this register defines the values for AGC_GEAR without taking the actual detuning condition into account. The value of AGC_GEAR to perform an LPCD calibration which derives the AGC_VALUE. This AGC_VALUE and the AGC_GEAR are used in the LPCD self-calibration.   Self-calibration mode always requires a Read AGC_REF_CONFIG, followed by a write AGC_REF_CONFIG, using the previously read AGC_VALUE.   The LPCD calibration can be done in two different options: Option 1:  Read AGC_REF_CONFIG register:  This command executes a standard RF Field on. So depending on the load condition the DPC adjusts the output power. The final gear is take as gear for the LPCD.  This option guarantees that the maximum output power is taken for the LPCD.   Option 2: Write AGC_REF_CONFIG register: This command executes a LPCD calibration ping with the gear number, as defined in the AGC_REF_CONFIG, bit 10:13. This option allows a flexible use of any of the defined gears for the LPCD.   PN5180 LPCD self-calibrate is executed, using Gear -> AGC_REF_CONFIG (Register) Threshold -> LPCD_THRESHOLD (EEPROM) RF on time-> LPCD_FIELD_ON_TIME (EEPROM)   2  How to configure PN5180 LPCD with Cockpit The NFC Cockpit allows the configuration and test of the low power card detection of the PN5180 as shown in below picture. The LPCD parameter, which are stored in the EEPROM, can be changed and the LPCD can be started. The LPCD tab allows to directly define and write the related EEPROM addresses:   LPCD Gear #: Defines the gear number, which is used for the LPCD in auto calibration mode, stored in addr. 0x34, bit 0:3 Threshold Value: Defines the threshold window, As soon as the AGC value during the LPCD ping exceeds the AGC reference value + threshold window, the IRQ will be raised and the PN5180 wakes up. Field On Time:  Defines the ping length Standby time :  This value defines the time between two pings in ms. FieldOn Current: This value is ITVDD under the loading condition, when RF field is on with the used gear. This value does not have any influence on the LPCD execution, but simply is used to estimate the overall  average current consumption. This current estimation is calculated, when the LPCD is started.         3   How to configure PN5180 LPCD with NXP NFC reader library. The LPCD works in two phases: First the standby phase is controlled by the wake-up counter (timing defined in the instruction), which defines the duration of the standby of the PN5180. Second phase is the detection-phase. The RF field is switched on for a defined time (EEPROM configuration) and then the AGC value is compared to a reference value.   Below is the flow chart for PN5180 LPCD