LPC微控制器知识库

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

LPC Microcontrollers Knowledge Base

讨论

排序依据:
Continuously reducing the power consumption of integrated circuits is a constant topic in the development of integrated circuits. Reduced power consumption helps save power, extend standby time and reduce product heat, etc. Needless to say, low power consumption has become one of the important factors to measure product performance.   We usually recommend customers to refer MCUXpresso SDK power_mode_switch_lpc demo as low power design reference code. With this demo, customers can use serial terminal to control MCU to enter four low power consumption modes:Sleep mode,Deep Sleep mode,Power Down mode and deep power down mode. Meanwhile, user can also choose a variety of wake-up methods to wake up MCU through UART command.   However, when customers take use of power_mode_switch_lpc demo to measure lower power static characteristics, they find discrepancies with data sheet. Take example with LPCXpresso845MAX board. In power down mode, the demo board current reaches to around 100uA in debug mode. But data sheet states the typical current value is 1.5uA, no more than 10uA (see the Table below). Where is the problem? The purpose of the power_mode_switch_lpc demo is to demonstrate several low power modes and multiple wake-up methods to customers. We can’t get similar low power current value with default demo board as spec shows, but let's walk through a step-by-step demonstration and modify the routine to get the data sheet values.   LAB ENVIRONMENT: Demo Board: LPCXpresso845MAX SDK: SDK_2.11.0_LPCXpresso845MAX Demo Code: power_mode_switch_lpc IDE:MCUXpresso IDE v11.5.0   STEP: 1. Download power_mode_switch_lpc to LPC845 development board and run it. The serial port selects low power mode, press (SW2 button) to wake up. The program runs into power down mode, with debugger connected, the measured Idd is 99.5uA To enter low power mode, the following code is used: POWER_EnterPowerDown(DEMO_ACTIVE_IN_DEEPSLEEP); In order to wake up, parameter DEMO_ACTIVE_IN_DEEPSLEEP is configured with PDSLEEPCFG. BOD and watchdog oscillator power domains are turned on. All these setting results in potential current loss, causing power supply current higher than expectation.   2. In this step, we will remove wakeup initialization code // DEMO_InitWkt(); Replace this line of code //POWER_EnterPowerDown(DEMO_ACTIVE_IN_DEEPSLEEP); //enter power down mode with BOD and watchdog osc with POWER_EnterPowerDown(0); //power down BOD and watchdog osc   The modification is to turn off BOD power domain and watchdog clock in power down mode, compile and download the code again and enter the power down mode. At this time, the measured Idd is 57.3uA   In this way, Idd is significantly reduced. However, 57.3uA is still far from the typical value of 1.5uA stated in the data sheet. This is due to MCU debug power domain is turned on by IDE debugger, which leads to extra current consumption.  3. Thus we disconnect debugger and let the development board work in stand-alone mode (power off and re-power on). After power on, LPC is in power down mode. At this time, the measured Idd is 1.4uA. This is quite similar as the current value in datasheet. Consider GPIO configuration: The spec data shown in datasheet are tested under a dedicated test board with almost no external peripheral devices, and unused pins are basically in a floating state. For custom board or  LPCXpresso804 EVK. Some of its IO pins have external pull-up resistors and LEDs. If the GPIO is configured to output low power, the small light will be lit, resulting in additional power consumption. So we configure all pins as pull-up inputs for low power measurement.   Consider package: The test is based on LPCXpresso845MAX equipped LPC845 64pin package. It also applies to LPC845 48pin package. 33 package doesn't have VDDA pin. Due to VDD and VDDA pin design are not exactly the same as other package, for instance, 33pin low power consumption in power down mode is slightly higher than 64/48pin, but no more than 10uA as our spec in DS. Summary: Low power current parameters of the data sheet are measured with all MCU oscillators and analog domains off. Besides, reasonable configuration of GPIO can further reduce MCU power consumption. Before entering the low power consumption mode, it is recommended to set the unused GPIO as a pull-up input according to the actual situation (It can also be set to output low when the pin is floating). In applications with high requirements for low power consumption, users need to carefully optimize the code design to obtain the best low power consumption design.
查看全文
A vulnerability (CVE-2022-22819) has been identified on select NXP processors by which a malformed SB2 file header sent to the device as part of an update or recovery boot can be used to create a buffer overflow. The buffer overflow can then be used to launch various exploits. Refer to the attached bulletin for more information.   09/26/2022 - Bulletin updated to include fix datecode information. 11/01/2022 - Bulletin updated with clarification that mixed datecodes are RT600 only.    
查看全文
经常有客户在使用LPC55S69的过程中遇到读 Flash进入异常HardFault中断的现象。如果在Flash Mass Erase之后从未对Flash扇区进行过写操作,直接用指针通过AHB读Flash地址会导致程序跳入HardFault 中断而无法继续正常运行。 原因    刚出厂的LPC55Sxx FLASH处于全零的全擦除状态,没有设置ECC。当芯片通过LinkServer 和MCUXpresso IDE建立连接时,先擦除要下载代码用到的扇区,再把代码下载到对应位置,并对相应存储区的ECC值同时进行更新。代码以外的区域仍然是无ECC设置的擦除状态。 当LPC55Sxx 通过AHB总线直接读取Flash内存区域时(例如,mytemp = *(uint32_t*)0x4000)要对Flash ECC进行校验。这一指令对于读有效代码区是没有问题的, 因为这一区域的ECC在下载代码时早已设置好。但是一旦读取没有代码的扇区,由于没有检测到正确的ECC,导致Flash读取失败,并跳转到下图中的HardFault_Handler()异常中断:   我们在Sector Erase后通过AHB读取Flash内存内容,也会遇到同样的HardFault异常跳转,出问题的原因都是一样的。 解决方法 针对这一问题我们有如下两种解决方法: 先执行Flash写操作,再读取Flash 与Flash 擦除操作不同,执行Flash写操作后对应的ECC值也同步更新。这样,ECC校验通过后,通过下面的代码就可以对Flash直接进行AHB读取。 volatile uint32_t mytemp; …… mytemp = *(uint32_t*)0x1000;//read memory content 0x1000 to mytemp 请注意:0x1000必须是一个已经写过的地址。 如果Flash的某个扇区处于被擦除的状态,我们只需要在通过AHB总线读取内存区域之前对该区域执行写操作,这样ECC校验位更新正确后,就可以正常读Flash。 Flash的写操作可以参考MCUXpresso SDK自带的flashiap例程,函数FLASH_Program。   使用Flash控制指令读取Flash区内容 使用Flash控制指令进行读操作不会导致硬件错误(请参阅UM11126 “Command listing (CMD)”章节)。这是用户手册中推荐的读Flash正确打开方式。 请注意:CPU只有在频率低于100MHz时,才能进行Flash操作(读,写,擦除,校验,等等),当CPU频率超过100MHz时是不能实现上述操作的。 目前,官方没有提供上用控制指令读取Flash内容的例程,因此需要您根据下面步骤创建自己的读Flash程序。 开发环境: IDE: MCUXpresso IDE v11.1.0 SDK MCUXpresso SDK v2.7.0 步骤: 在MCUXpresso IDE中导入一个基础例程,如led_blinky 在下图所述选项中添加iap组件   选择iap1,点击OK   点击完OK之后,fsl_iap_ffr.h, fsl_iap.c, fsl_iap.h文件将自动添加到工程中   在source文件夹中添加附件中的memory.h和memory.c文件   4) 使用Flash 控制指令时,需要在源文件中添加memory.h, fsl_iap.h   5) 调用memory初始化和memory读取函数   6)调试,单步执行(step over)到memory_read(),查看结果  
查看全文
Contents     The default storage address space of code and data. 1     Customize Flash and RAM partitions. 2     Place the data in the specified address space. 3     Place the function in the specified address space. 4     Place the specified file in the specified address space. 5   During MCU development, placing data, function, and file in the specified memory address according to actual requirements is important for the memory usage. We Combine customer’s frequent ask questions, explain how to operate these features step by step. 1.     The default storage address space of code and data Take the hello world demo in LPC54628 as an example, and the development environment: MCUXpresso IDE. After building, the memory allocation is as shown in the following console window:   The relationship between .text, .data, .bss, .dec and Flash and RAM is as follows:   2.     Customize Flash and RAM partitions In order to place the data, function or file in the specified address space, we split some new partitions. Open the project property setting interface, and split MY_FLASH and MY_RAM address spaces in the MCU settings option for testing. The size of these two address spaces can be customized, as follows:   After configuring Flash and RAM, click ‘Apply and Close’ button and you will see Flash2 and RAM2 in the project column, as follows: 3.     Place the data in the specified address space 1)The default storage address space of variables and constants View the default address space of variables and arrays, as follows: Initialized variable:uint16_t value1 = 1; Uninitialized array:char data_buffer1[1024]; Constant array:   const char data_buffer2[1024] = "hello nxp"; View storage address space of arrays using the Image Info window in MCUXpresso IDE, as follows:   Readable and writable variables and arrays are stored in RAM (0x20000000-0x20014000) named "SRAM_UPPER" by default, and const arrays are stored in Flash (0x0-0x40000) named "PROGRAM_FLASH".  2) Place the specified variables and constants in the specified address space To place the array in custom Flash and RAM, you need to call the C language: __attribute__ ((section(#type #bank))) For example, place the data in .text of Flash2: __attribute__ ((section("text_Flash2" ".$Flash2"))) + data declaration The NXP official has encapsulated this and defined it in cr_section_macros.h. __DATA(RAM2) means that the readable and writable array is placed into the .data section of RAM2, and __RODATA(Flash2) means that the read-only array is placed into the .rodata section of Flash2. __DATA(RAM2) char data_buffer3[1024]; __RODATA(Flash2) const char data_buffer4[1024] = "hello nxp"; Note that you must #include "cr_section_macros.h".   Global variables and arrays are placed in custom RAM2 (0x20014000-0x20028000) named "MY_RAM", and const arrays are placed in custom Flash2 (0x40000-0x80000) named "MY_FLASH". 4.      Place the function in the specified address space 1)The default storage address space of functions The code is placed in the Flash (0x0-0x40000) named "PROGRAM_FLASH" by default, and the following function is defined: int hello1(void) {         return 1; } 2)Place the specified function in the specified address space To place the function in custom Flash, you need to call the C language: __attribute__ ((section(#type #bank))) For example, place the function in .text of Flash2: __attribute__ ((section("text_Flash2" ".$Flash2")))+function declaration The NXP official has also encapsulated this and defined it in cr_section_macros.h. The method to change the address space of the function is as follows, and place the function in a custom Flash named "MY_FLASH" (0x40000-0x80000). __TEXT(Flash2) int hello2(void) {                return 2; }   5.      Place the specified file in the specified address space When there are many functions that need to be placed in the specified Flash, it is a little clumsy to use the __TEXT(Flash) method to set each function. If you need to place all the functions in the c file in the specified Flash, you only need to place the compiled .o file in the specified Flash. Split a new partition named "MY_FLASH_O" , create a new hello.c under the source folder, compile and generate hello.o, and configure Linker Script to place hello.o in the partitioned Flash, as follows:   Reference: https://mcuoneclipse.com/2021/05/26/placing-code-in-sections-with-managed-gnu-linker-scripts/ Relocating Code and Data Using the CW GCC Linker File for Kinetis .pdf  
查看全文
Recently I found some customers have a bit of problem when porting project from one MCU to another, so this article using simple steps demonstrates how to change MCU with MCUXpresso. There is also a video demonstrated the detail steps in attachment. Pay attention, as MCUXpresso User Guide says: All projects are associated with a particular MCU at creation time. The target MCU determines the project memory layout, startup code, LinkServer flash driver, libraries, supporting sources,launch configuration options etc. etc. so changing a project’s associated MCU should not be undertaken unless you have a total grasp of the consequence of this change. Therefore rather than changing a project’s associated MCU, it is strongly recommended that instead a new project is generated for the desired MCU and this new project is edited as required. However, on occasion it may be expedient to reset a project’s MCU (and associated SDK) and this can be achieved as follows. For example, changing lpc55s69 to lpc55s06, we need install SDKs for lpc55s69 and lpc55s06 before all the below steps. 1 - Change MCU & Package 1.1 – Change MCU Right click “MCU” under Project tree, choose “Edit MCU” Uncheck ”Preserve memory configuration”(it is checked by default)->choose LPC55S06->there is a warning, choose Yes. We can see the Memory details changed to lpc55s06, then click ”Apply and close”. 1.2 – Change Package 2 - Change Compiler Definitions In Properties view->Settings->MCU Compiler ->Preprocessor, change the definition for CPU from LPC55S69JBD100 to LPC55S06JBD64 as below: 3 – Change/add SDK driver for LPC55s06 Selected project, then click ”Manage SDK components”, choose the drivers our application used, for example, clock, power, usart. Click “OK”, then click “Yes” to update. Delete LPC55S69 device related files: Add “system_LPC55S06.c” and “system_LPC55S06.h” files: 4 - Change startup file. Delete LPC55s69 startup files, add “startup_lpc55s06.c”, we can find the startup file in any SDK demo. 5 - Change board related files. Refer to our own new board, change files under “board” folder, for example pins, uart number, here directly copy from SDK demo for LPCxpresso55s06 board. 6 - Test the project  function with new board Build project until no compile error, download and run it, result as below.        
查看全文
Symptoms Many LPC55 users experienced connection failure when using ISP USB0 for firmware update. In practice, we don’t suggest user updating firmware via ISP USB0 for LPC55(S)6x/ 2x,LPC55(S)1x/0x parts. Diagnosis LPC55 USB0 is Full Speed USB port. The default setting of CMPA turns off the USB0 port. Some users may reconfigure CMPA to enable ISP USB0 in order to use ISP USB0 BOOT, but this is not recommended in practice. LPC55 ISP USB0 uses internal FRO as clock source. According to LPC55 data sheet, the FRO accuracy is only +-2%, while the FS USB data rate tolerance specification is +-2500ppm(+-0.25%). Obviously, the LPC55 FRO spec can’t meet the USB0 clock accuracy requirement. See below extraction from NXP manuals. Fig 1. The accuracy of FRO ( Extracted from LPC55S69 Datasheet )   Fig 2. The accuracy requirement of USB FS( Extracted from TN00063 )  Some users may wonder why USB0 can use internal FRO as clock source in the user application?  Whenever internal clock source FRO is used as USB0 clock source, we must calibrate FRO in source code for communication. That’s to say, trim FRO to an accurate frequency. We can see FRO trim in many MCUXPressoSDK USB demos. When using FRO as the USB0 clock source, in order to ensure the USB0 clock accuracy, we must use the USB0 SOF frame synchronization to calibrate the FRO in order to ensure the accuracy of FS USB clock source (reference design of TN00063, TN00063-LPC5500 Crystal-less USB Solution). Unfortunately, the BOOT ROM of LPC55 does not support USB SOF calibrating FRO. As a result, even if we enable ISP USB0, the FRO clock drift can still cause USB0 communication failure under non-room temperature conditions. Solution Since ISP USB0 is not recommended for firmware update, the user manual no longer announces the enablement bit of ISP USB0 in CMPA. If you need to use USB0 for firmware update, we recommend using ISP USB1 (High Speed USB), because USB1 uses accurate external clock source which can ensure the ISP USB1 working stable. In addition, the communication protocol of ISPUSB complies with BLHOST specification. For details, see:  blhost User's Guide - NXP  
查看全文
This article mainly introduces how to use CTIMER measuring pulse-width in LPC845, in fact, it can applies to all LPC products  including CTIMER modules. 1  CTIMER has below features: A 32-bit timer/counter with a programmable 32-bit prescaler. Four 32-bit match registers that allow interrupt generation on  match. The timer and prescaler may be configured to be cleared on a designated capture event. This feature permits easy pulse width measurement by clearing the timer on the leading edge of an input pulse and capturing the timer value on the trailing edge.(This article mainly use this feature.) Up to four match registers can be configured for PWM operation.   2 Introduction There is neither pulse-width measurement nor input capture demo under SDK, so write this article and related code for this topic. The principle is clearing the timer and prescaler on the leading edge of an input and capturing the timer valued on the trailing edge.   3  Main steps   Step1 Choose CAP input channel, capture edge, and enable interrupt if needed. Using “Capture control register”. The Capture control register is used to control whether one of the four capture registers is loaded with the value in the timer counter when the capture event occurs, and whether an interrupt is generated by the capture event. Setting both the rising and falling bits at the same time is a valid configuration, resulting in a capture event for both edges. In the description below, n represents the timer number, 0 or 1. In this example, choose capture channel 0 as input channel, falling edge as capture edge, and enable capture interrupt. SDK code: CTIMER_SetupCapture(CTIMER,CTIMER_CAP0_INT,  CTIMER_CAP_FALL,TRUE); Step2 Select which capture input edge will cause the timer and pre-scaler to be cleared. Using “Count control register”. The Count Control Register (CTCR) is used to select between timer and counter mode, and in counter mode to select the pin and edge(s) for counting. When counter mode is chosen as a mode of operation, the CAP input (selected by the CTCR bits 3:2) is sampled on every rising edge of the APB bus clock. After comparing two consecutive samples of this CAP input, one of the following four events is recognized: rising edge, falling edge, either of edges or no changes in the level of the selected CAP input. The timer counter register is incremented only if the identified event occurs and the event corresponds to the one selected by bits 1:0 in the CTCR register. Effective processing of the externally supplied clock to the counter has some limitations. Since two successive rising edges of the APB bus clock are used to identify only one edge on the CAP selected input, the frequency of the CAP input cannot exceed one half of the APB bus clock. Consequently, duration of the HIGH/LOWLOW levels on the same CAP input in this case cannot be shorter than 1/APB bus clock. Bits 7:4 of this register are also used to enable and configure the capture-clears-timer feature. This feature allows for a designated edge on a particular CAP input to reset the timer to all zeros. Using this mechanism to clear the timer on the leading edge of an input pulse and performing a capture on the trailing edge, permits direct pulse-width measurement using a single capture input without the need to perform a subtraction operation in software. In this example, we choose timer mode, configure Channel 0 rising edge clearing the timer, enable clearing of the timer and the pre-scaler. SDK code:   CTIMER->CTCR = CTIMER_CTCR_CTMODE(0)|CTIMER_CTCR_SELCC(1)   |CTIMER_CTCR_ENCC_MASK ; Step3 Read pulse-width value from “Capture register”. Each Capture register is associated with one capture channel and may be loaded with the counter/timer value when a specified event occurs on the signal defined for that capture channel. The signal could originate from an external pin or from an internal source.   SDK code: CTIMER_GetCAPCounter(HW_CTIMER0, HW_CTIMER_CH0); We can read capture value on capture interrupt. Detail code please refer to attached project, it based on MCUXpresso IDE v11.3, SDKv2.9, LPCxpresso845MAX board.   4  Test Result Input a signal as below into channel 0 (P1_0), pulse width is 10us. Print the measurement results on Console view of MUXpresso IDE:        
查看全文
There are two ways to program LPC chips using Flash Magic, ISP mode and  Single Wire Debug (SWD) mode. ISP mode support COM port, USB, CAN and Ethernet. SWD support LINK2(LPC1800/lpc4300) bridge and LPC11u35 bridge. This article uses four demonstrations to show these programming methods.   1. ISP mode   1.1 UART ISP Mode Demonstration   1.2 USB ISP Mode Demonstration 2. Single Wire Debug(SWD) Mode   2.1 SWD over Link2 Bridge     2.1.1 Introduction     2.1.2 Demonstration  2.2 SWD over LPC11U35    2.2.1 Introduction    2.2.2 Demonstration    2.2.3 Recover board   Download Flash Magic tool from: https://www.flashmagictool.com/ Pay attention use the new version Flash Magic v13.10 or later.   About detail steps please refer to attachment. Thanks!
查看全文
Previously, I wrote two articles about LPC55xx AHB read ( How to fix AHB Read HardFault Error) and LPC55xx FLASH alignment (Why FLASH Program cannot Success? ). In this article, we will go on investigating LPC55xx erased memory state. For most of NXP MCU, the erased FLASH state is 0xFF. Writing action is to change 1 to 0. However for LPC55, when we perform mass erase or section erase, we see the related memory turns to all 0 in MCUXpresso IDE debugger Memory view. This all-0-erased-status confuses many LPC55 beginners. Is this real memory state? The answer is yes, IDE debugger display is correct. LPC55xx FLASH uses 0x00 as erased value, which is opposite to most of the other FLASH devices which use 0xFF as erased value) There is no way to verify the erased FLASH state with code in runtime. NXP enhanced LPC55xx FLASH with ECC added. This means that there is now a functional block between the read entity (for example the CPU) and the FLASH itself. When erasing, both the erased FLASH and its ECC are set as 0. The reading can’t be successful if the erased memory and its ECC don’t match. Thus we can’t read memory in erased state. AHB read hardfault error is produced if do so.  Because of ECC mechanism, you can't read FLASH until you have written to it. see  How to fix AHB Read HardFault Error The User's Manual mentions the reading and writing operation in UM11126 chapter 5.7.13: When writing, parity is automatically computed and stored alongside user data. When reading, data and parity are used to reconstruct correct data, even in the case of a 1-bit error. When reading an erased location, an uncorrectable error is flagged. Use the “blank check” command to test for successful erase. The LinkServer debug in MCUXpresso IDE takes some precautions to avoid this problem while programming the FLASH before starting a debug session. That’s the reason we can see erased memory state in debugger memory view window, Admittedly, this is something not really pre-eminent in the documentation. The only reference we could spot is in UM11126. See below: “ The selected pages are checked for the erased condition (all 0 including parity)”   Thanks for the valuable comment from Radu Theodor Lazarescu.
查看全文
LPCXpresso804 board has a on-board debugger developed with LPC11U35. Old batches of the board uses the old firmware for LPC11U35 debugger. The old firmware has some issues such as that when you send a string through the debug COM port the LPC804 only can receive the first byte. The solution is easy. We can download the newest firmware for LPC11U35 and update the firmware for LPC11U35. Download the fimware. The firmware and driver can be download from this link. Update the firmware.(Details can be found in UM11083: User Manual for LPCXpresso804 Board) Hold down the reset button and keep it held down while applying power to the board. Release reset. Using File Explorer (or equivalent on Mac/Linux platforms), look at the available drives on your system. A device called CRP_DISABLED will appear. Delete the firmware.bin file on the CRP_DISABLED drive. Drag and drop the firmware.bin file you downloaded from nxp.com on to the CRP_DISABLED drive. Re-power the board. The board should now enumerate on your system - allow 20-30 seconds for this to complete.
查看全文
The documentation is only valid for the LPC55xx and LPC55Sxx families. In power down mode, some of peripherals for LPC55xx are power off, which means that the peripherals lose it’s power in power-down mode, so it is required to reinitialize the peripherals after waking-up from  power down mode. The DOC lists the peripherals which lose power in power down mode and are required to initialize, introduces the procedure to enter the power down mode, and  the procedure to reinitialize the peripherals after waking-up from power down mode. The doc is attached and power scheme is also attached.
查看全文
MCUXpresso SDK for LPC55xx uses FLASH API to implement FLASH drivers. Some user may meet issue when executes FLASH program code, for instance: status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 8); After execution this code, nothing changed in the destination address, but error code 101 returns: This error code looks new, as it doesn’t commonly exist in other older LPCs. If we check FLASH driver status code from UM, code 101 means FLASH_Alignment Error: Alignment error Ah ha? ! Go back to the definition of FLASH_Program, status_t FLASH_Program(flash_config_t *config, uint32_t start, uint32_t *src, uint32_t lengthInBytes); New user often overlooks the UM description of this API “the required start and the lengthInBytes must be page size aligned”. That’s to say, to execute FLASH_Program function, both start address and the length must be 512 bytes-aligned. So if we modify status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 8); To status = FLASH_Program(&flashInstance, destAdrss, (uint8_t *)s_bufferFF, 512); FLASH_Program can be successful.   !!NOTE: In old version of SDK2.6.x, the description of FLASH_Program says the start address and length are word-aligned which is not correct. The new SDK2.7.0 has fixed the typo.  Keep in mind: Even you want to program 1 word, the lengInBytes is still 512 aligned, as same as destAdrss! PS. I always recommend my customer to check FLASH driver status code when meet problem with FLASH API. We can find it in UM11126, Chapter 9, FLASH API. I extract here for your quickly browse:   Happy Programming
查看全文
The documentation discusses how to generate phase-shift PWM signals based on SCTimer/PWM module, the code is developed based on MCUXpresso IDE version 10.3 and LPCXpresso5411x board. The LPC family has SCTimer/PWM module and CTimer modules, both of them can generate PWM signals, but only the SCTimer/PWM module  can generate phase-shift PWM signals. In the code, only the match registers are used to generate events, I/O signals are not used.  The match0 register is set up as (SystemCoreClock/100), which determines the PWM signal frequency. The the match1 register is set up as 0x00, which generate event1. The the match2 register is set up as (SystemCoreClock/100)/2;, which generate event2. The duty cycle is (SystemCoreClock/100)/2-0x00= (SystemCoreClock/100)/2, which is 50% duty cycle, the cycle time is (SystemCoreClock/100). The event1 sets the SCT0_OUT1, event2 clears the SCT0_OUT1, so SCT0_OUT1 has 50% duty cycle. The the match3 register is set up as (SystemCoreClock/100)/4;, which generate even3. The the match4 register is set up as 3*(SystemCoreClock/100)/4, which generate event4. The duty cycle is 3*(SystemCoreClock/100)/4  -  (SystemCoreClock/100)/4= (SystemCoreClock/100)/2, which is 50% duty cycle. The event3 sets the SCT0_OUT2, event4 clears the SCT0_OUT2, so SCT0_OUT2 has 50% duty cycle. The phase shift is (SystemCoreClock/100)/4 - 0x00= (SystemCoreClock/100)/4, which corresponds 90 degree phase shift. PWM initilization code: //The SCT0_OUT1 can output PWM signal with 50 duty cycle from PIO0_8 pin //The SCT_OUT2 can output PWM signal with 50 duty cycle fron PIO0_9 pin //The SCT0_OUT1 and SCT0_OUT2 PWM signal has 90 degree phase shift. void SCT0_PWM(void) {     SYSCON->AHBCLKCTRL[1]|=(1<<2); //SET SCT0 bit     SCT0->CONFIG = (1 << 0) | (1 << 17); // unified 32-bit timer, auto limit     SCT0->SCTMATCHREL[0] = SystemCoreClock/100; // match 0 @ 100 Hz = 10 msec     SCT0->EVENT[0].STATE = 0xFFFFFFFF; // event 0 happens in all states     //set event1     SCT0->SCTMATCHREL[1]=0x00;     SCT0->EVENT[1].STATE = 0xFFFFFFFF; // event 1 happens in all states     SCT0->EVENT[1].CTRL = (1 << 12)|(1<<0); // match 1 condition only     //set event2     SCT0->SCTMATCHREL[2]=(SystemCoreClock/100)/2;     SCT0->EVENT[2].STATE = 0xFFFFFFFF; // event 2 happens in all states     SCT0->EVENT[2].CTRL = (1 << 12)|(2<<0); // match 2 condition only     //set event3     SCT0->SCTMATCHREL[3]=(SystemCoreClock/100)/4;     SCT0->EVENT[3].STATE = 0xFFFFFFFF; // event 3 happens in all states     SCT0->EVENT[3].CTRL = (1 << 12)|(3<<0); // match 3 condition only     //set event4     SCT0->SCTMATCHREL[4]=3*(SystemCoreClock/100)/4;     SCT0->EVENT[4].STATE = 0xFFFFFFFF; // event 4 happens in all states     SCT0->EVENT[4].CTRL = (1 << 12)|(4<<0); // match 4 condition only     //PWM output1 signal     SCT0->OUT[1].SET = (1 << 1); // event 1 will set SCT1_OUT0     SCT0->OUT[1].CLR = (1 << 2); // event 2 will clear SCT1_OUT0     SCT0->RES |= (3 << 2); // output 0 toggles on conflict     //PWM output2 signal     SCT0->OUT[2].SET = (1 << 3); // event 3 will set SCT1_OUT0     SCT0->OUT[2].CLR = (1 << 4); // event 4 will clear SCT1_OUT0     SCT0->RES = (3 << 4); // output 0 toggles on conflict     //PWM start     SCT0->CTRL &= ~(1 << 2); // unhalt by clearing bit 2 of the CTRL } Pin initialization code: //PIO0_8 PIO0_8 FC2_RXD_SDA_MOSI SCT0_OUT1 CTIMER0_MAT3 //PIO0_9 PIO0_9 FC2_TXD_SCL_MISO SCT0_OUT2 CTIMER3_CAP0 - FC3_CTS_SDA_SSEL0 void SCTimerPinInit(void) {     //Enable the     SCTimer clock     SYSCON->AHBCLKCTRL[0]|=(1<<13); //set IOCON bit     //SCTimer pin assignment     IOCON->PIO[0][8]=0x182;     IOCON->PIO[0][9]=0x182;     IOCON->PIO[0][10]=0x182; } Main Code: #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC54114_cm4.h" void SCT0_Init(void); void SCTimerPinInit(void); void P1_9_GPIO(void); void SCT0_PWM(void); int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals();     printf("Hello World\n");    // SCT0_Init();    // P1_9_GPIO();     SCTimerPinInit();     SCT0_PWM();     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;     }     return 0 ; } The Yellow channel is PIO0_8 pin output signal, which is SCT0_OUT1 PWM output signal. The Bule channel is PIO0_9 pin output signal, which is SCT0_OUT2 PWM output signal.
查看全文
Description This application provides a human interface via terminal (UART1) menus and numbered selections to select and play audible medical alerts that are generated algorithmically on the NXP LPC23xx. The medical alarms are designed to comply with the IEC 60601-1-8 standard for audible medical alarms. The IEC standard seeks to improve patient safety by standardizing medical audible and visual alarms. The audible portion of the standard specifies high, medium, and low priority alarms, and these are provided via a menu system. In addition, a test menu is added to facilitate analysis of the quality of the alarms generated and their compliance with the standard. Many previous applications used playback techniques to use pre-recorded alarm sounds for the alerts. An algorithmic approach provides a much more efficient, high-quality implementation compared to the pre-recorded sounds. Plus, the sounds can be customized to differentiate equipment while still staying within the parameter limits of the standard. Block Diagram Documentation     IEC Alarm Detailed Documentation Products Below are recommended microcontrollers for use in implementing this design to a system. Comparison Table Product Pins On-Chip Flash On-Chip RAM Comments LPC2364 100 128KB 34KB 128KB flash/34KB RAM version of LPC2368, no SD/MMC LPC2366 100 256KB 58KB 256KB flash version of LPC2368, no SD/MMC LPC2368 100 512KB 58KB + 8KB 100-pin version of LPC2378, no external bus LPC2378 144 512KB 58KB + 8KB 144 pin, similar to LPC2368 but more pins and a MiniBus (8-bit) LPC2387 100 512KB 98KB LPC2368 with 98KB SRAM LPC2388 144 512KB 98KB LPC2378 with 98KB SRAM and USB Host/OTG LPC2458 180 512KB 98KB + 8KB LPC2468 with 16-bit External Memory Interface LPC2460 208 0KB 98KB + 8KB Flashless LPC2468 LPC2468 208 512KB 98KB Host/OTG/device, 32-bit ext. bus, 512KB flash/98KB RAM, 208 pin package LPC2470 208 0KB 98KB + 8KB LPC2460 with XGA LCD controller LPC2478 208 512KB 98KB + 8KB LPC2468 with XGA LCD controller More Information Example Code IEC Alarm Example Code Disclaimer This design example shows possible hardware and software techniques used to implement the design. It is imperative that the viewer use sound engineering judgment in determining the fitness of this design example for any particular application. This design example may include information from 3rd parties and/or information which may require further licensing or otherwise. Additional hardware or software design may be required. NXP Semiconductors does not support or warrant this information for any purpose other than an informational design example. documentation.pdf 395.85 KB example.code_.zip 255.55 KB
查看全文
This document was made to explain how to regain control of any LPC EVK on brick mode without using an external debugger. Explore the simple way. In some cases, this method forms well and is the easy way, open your IDE and select your project.   At this point you may have a debugger configuration of your last debug session, so, you have similar icons to the image. Open the tab below and select erase. Depending on your debugger configuration you need to select the same icons below. Note: In some cases will be necessary to put your MCU in ISP. And that’s all, could try if the MCU is out the brick mode.   Introduction First, you need to install these tools on your PC. LPCScrypt [LPCScrypt v2.1.2 | NXP Semiconductors]. J-Link Commander. [J-Link Commander (segger.com)]. To understand this document, we need to know that every EVK [Evaluation Kit] can be divided into 2 parts. The debugger on the board Link2 and the target LPC55sXX. Figure 1. Link2 Green square, LPC55sXX Red square This document will describe two methods that must be done in the order mentioned because we will see how to update the firmware of the debugger to use the same board for a self-recovery, this step is necessary for the tool J-Link Commander to recognize the debugger as a Segger probe, then when the update is done the second step should be to enter ISP mode to do a mass erase of the target to get out of the brick mode. Link2 The Link 2 (LPC4370) debugger on the board probe can be configured to support various development tools and IDEs using a variety of different downloadable firmware images. Available firmware images include: J-Link by Segger. LinkServer. By default, the EVK board has the firmware LinkServer on the LPC4322 (dependent on your board), for this proposal we will see how to change to J-Link On-Board. DFU The EVK needs to be prepared to receive this firmware on the debugger, to do that we need to put the board on DFU [Device Firmware Update]. On the schematic need to find the DFU jumper to put on the board, the image below is an example of different EVKs check Figure 2.   Figure 2. DFU from different boards. Then connect it to the PC. Note: The firmware update is completely reversible. LPCScrypt Once installed on the PC we need to locate these files of the installation. Root example: C:\nxp\LPCScrypt\scripts When you have the board on DFU, connecting the USB Llink2 to the PC and then RUN the Scrypt (program_JLINK) in CMD check Figure 3. Press any key to continue… Figure 3. Flash firmware of J-Link in DFU mode. Successfully done, at this moment the EVK has the firmware of J-Link Segger. Review the Figure 4. Figure 4. The firmware was flashed successfully. Remove the USB cable to remove the DFU jumper with the board unpowered. ISP Brief of ISP (In System Programming) this method is used to recover a part programmed with a corrupted image which is not detectable by ROM. So, to enter this mode the user needs to put a jumper in the ISP header pins, search for this in the schematic, then connect to the PC and check Figure 5.     Figure 5. ISP image examples from different boards. J-LINK Commander Open the software and if the communication is right the message will appear J-Link via USB… OK check Figure 6. Figure 6. The EVK is now communicating to the tool J-Link Commander. Commands To start the communication needs to send the command “connect”. Then the tool shows your last target (if you use it) and use the next command “?” to change the target review Figure 7. Figure 7. Review the target. In the new popup window in the green area, you need to put the name of the target, take care you do not put the debugger check Figure 8. Figure 8. In the green area, you need to put the matricula of the MCU target. Example [LPC55s16 or LPC55s69] depending of your target check Figure 9. Figure 9. If the tool supports the MCU will show below the red square. In the next selections the tool is asking for the interface of communication, the communication of the EVK is SWD, and for that write “S” as SWD. On speed, only click enter without entry. Then this will appear before the connection check Figure 10. Figure 10. The communication is Done. Then use the command “erase” like the Figure 11. Figure 11. The tool indicate the erase is done. Finally disconnect the USB and remove the ISP jumper, then open the IDE and test the blinky led example, or if you wanted you could use the BLHOST. Flashing the MCU using  BLHOST. At this step you could able to use the IDE or use BLHOST. You could install SPSDK if you wanted [Installation Guide — SPSDK documentation]. In ISP mode… blhost -p COMxx  get-property 1 Figure 12. The first command is to check the communication. blhost -p COMxx flash-erase-all Figure 13. Do a mass erase. blhost -p COMxx write-memory 0 C:\root_example\Debug\led_blinky.bin Figure 14. The flashing was done. Remove the ISP jumper and reset your device. Common error LPCScrypt If the message appears “Nothing to boot”, need to be sure the board is connected to the PC with the DFU mode in LINK 2 check Figure 16. Figure 16. The red square is an example of an error communication. J-Link Commander If a similar message appears, “Cannot connect to target”, need to put the target in ISP mode, and return to the first steps with J-Link commander check Figure 18. Figure 18. Show how the communication is not done.
查看全文
Introduction GUI Guider is a user-friendly graphical user interface development tool from NXP that enables the rapid development of high quality displays with the open-source LVGL graphics library. GUI Guider's drag-and-drop editor makes it easy to utilize the many features of LVGL such as widgets, animations and styles to create a GUI with minimal or no coding at all. In recent years, Smart Home has emerged rapidly and has a strong momentum of development. Smart Homes connect various household appliances and provide services such as lighting control, telephone remote control, burglar alarm and environmental monitoring. Smart Home applications are more and more widely used, but it is difficult for many developers to start. Using NXP GUI Guider can improve the development speed, reduce development difficulty, shorten development cycle. This article mainly introduces the use of GUI Guider to realize some functions of Smart Home, and shares some common methods in the use of GUI Guider, including creating a new project, adding controls, adding events, interface design and layout, and controlling the lighting of hardware lights. Development environment 2.1 Hardware environment Evaluation of LPC54628 -LPCXpresso54628, also applies to LPCxpresso54618, LPCxpresso54608. 2.2 Software Environment This Smart Home demo uses GUI Guider version 1.5.1 to set up the software environment. GUI Guider version 1.5.1 supports LVGL versions 7.10.1 and 8.0.2. This introduction is based on version 8.0.2 LVGL. Download link: https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER Create a new project 3.1 Double-click the GUI Guider icon to start the GUI Guider.   3.2 Click Create a new project (" Create a New Project ") button to start the project creation process.   3.3 select LVGL version v8.3.2 and click Next button.   3.4 Select LPC54628 as the target board template and click Next button.   3.5 Select empty application template EmptyUI and click Next.   3.6 Perform the project Settings, and set the project name, project location, and screen type (select RK043FN66H or RK043FN02H according to your screen type). Click Create to create the project.   3.7 After the project is created, the interface is as follows.   Page Design and Layout This section describes how to adjust the background color, layout, add various controls (Such as images, image buttons, text, and containers , etc), and set properties. 4.1 Create the image folder, and put the image resources needed in the project under the established image folder.   4.2 Adjust the background color of the interface ① Click the Background color icon to open the background color Settings. ② You can set the background Gradient or monochrome by using Gradient. ③ Then select the background color.   4.3 Add images ① Open Widgets control options. ② Click to add the Image control. ③ Then click the image shape button in the Attribute box of the property Settings, and “Select Images” will pop up. In “Select Images”, select the image you want to add, click OK to add the image, and adjust the image size and position.   In the same way, you can add the "small house" image. In the Widgets box, you can view the added image and set the image name. In the Screen box, you can view the current interface and set the interface name.   4.4 Add text ① Open the control options, select and click the Label control. ② In Property Settings Text, set the text content to SMART HOME. ③ Then click the Background background setting area to set the Label control background. ④ Set the color depth of the Label control to 0, without background color. ⑤ Set the Font color, size and style in the font.   4.5 Add a container Containers are essentially basic objects with layout and automatic resizing capabilities. Open the control option, click Container to add the Container control, and drag the control size. Set the background color in the property Settings. ③ Then set the Border and rounded corner of container in "Border".   Name the added Container control cont_TodayInfo. Add other controls to the Container control. You can view other controls (including picture, text, and line controls) added to the cont_TodayInfo container in the Widgets.   4.6 Add an Image button Image button are very similar to simple "button" objects. The only difference is that it displays image in each state defined by the user. ① Open component options, select and click the Imgbtn control. ② Add the Released and Pressed images.   In the same way, add other Imgbtn controls and Label controls.   Switch the interface This section describes how to create sub-interfaces and switch between the main interface and sub-interface. 5.1 Add a second new interface Click “+” to add a new screen, rename the new screen src_Light, add Image, imgbtn controls, and change the background color.   5.2 Add interface switching trigger conditions ① Select the imgbtn_Light button on the first screen. ② Select the Events Settings. ③ Click “+” to add an event, and then set the event. ④  In event Settings, trigger conditions need to be selected, here Clicked trigger conditions are selected. Target Select the second new interface src_Llight that you want to load, and then select the Delete current interface option. When the program is running, when the imgbtn_Light button is clicked, it will switch to the second src_Light interface.   Updating Media   5.3 Add a trigger condition for returning to the interface ① Select the imgbtn_Home control. ② In the event Settings, select Clicked trigger conditions, Target select src_Welcome for the interface to be loaded, and select Delete the current interface option. When the program is running, when the imgbtn_Light button is clicked, it returns to the first main screen of src_Welcome.   5.4 Design the second interface Add controls in the second interface, including Switch control, Slider control, Dropdown control, Image control, Imgbtn control, Label control. Switch control: This switch can be used to turn the light on/off and it looks like a small slider. Slider control: The slider object looks like a bar supplemented with knobs. You can drag the knob to set the value. The slider can be vertical or horizontal. Dropdown control: A drop-down list allows the user to select a value from a list. By default, the drop-down list is turned off and displays a single value or predefined text. The Image control, Imgbtn control, and Label control are described in the previous section.   Control hardware light design Smart home usually has the control of the light, through the control interface to control the hardware light on and off, the steps are as follows: 6.1 GUI Guider generates code project ① Generate the code by clicking the Generate code button. ② Click the Folder icon to open the project folder   6.2 Starting the MDK Project After the generated code is completed, open the project folder and open the MDK project in the specified directory (support MCUXpressoIDE, MDK, IAR).   6.3 First, the drive to control the light switch is added to the project Add a GPIO initializer in lvgl_guider.c.   6.4 then, add a custom Led control function under Custom.c This routine adds Led1_Control, Led2_Control, and Led3_Control lamp control functions.   6.5 Add custom event program to GUI Guider ① Select the first Switch control and add the event. ② In the event, select Trigger to trigger the event condition that the Switch control is on and off, and the Target option is set to Null.  In Action, select C to add custom events and click to open Edit Code.  Add a custom event function to Edit Code (open Led3, close Led2, Led1), and add the header file of the file where the custom event function is located.   6.6 View custom events in the MDK project After setting the custom event, the set Led custom trigger event can be found on events_init.c after the GUI Guider regenerates the code again.   Program download and demo After the project is completed, there are two ways to download the program to the development board: Open the project with IDE (MCUXpresso IDE, KEIL or IAR), compile and download the program to the development board. Selecting MCUXpresso, Keil, or IAR from Target in the GUI Guider automatically compiles the program to download to the board. The following diagram shows how Guider automatically compiles the download program to the development board in GUI.   Attached video shows the effect.   8.In SUMMARY This artical mainly shares the Smart Home interface design based on GUI Guider. GUI Guider, as a tool for GUI design, is powerful and easy to use. This article only uses a few functions of GUI Guider, we can further learn to explore GUI Guider, the related project has been placed in the attachment. The GUI Guider application guide can be found on the NXP official website, and the following are some ways to find information when learning to use GUI Guider. View the User Guide and click Help->User Guide   control Settings and usage instructions, you can click the following small icon to view    
查看全文
  Background LPC55(S)XX and MCX series products support updating firmware (ELF, HEX, BIN or SREC/S19) in ISP mode, including USB, UART, SPI, and I2C  connection interfaces.  There was no official host software tool supporting SPI-ISP and I2C-ISP before, so it was difficult for customers to update firmware files through I2C and SPI in ISP mode. Now NXP has launched MCUXpresso Secure Provisioning Tool(SEC or SPT), a graphical interface tool that makes it easy to connect through the four ISP interfaces. Based on the SEC, this article takes LPCXpresso55S69 as an example to introduce the methods of updating firmware in four modes: USB-ISP, UART-ISP, SPI-ISP and I2C-ISP.   Preparation (1)Software MCUXpresso Secure Provisioning Tool is a graphical user interface tool, which is mainly used for security configuration. When  MCU is in the ISP mode, you can use this tool to connect and communicate, it support all interfaces of  ISP. LPC55(s)xx series include four ISP download interfaces: USB, UART, SPI, and I2C. This article is based on this to introduce. (2)Hardware LPCXpresso55S69-evk development board (chip version is 1B)   Steps Make chip into ISP mode before  using SEC tool connect. When power-on, BOOT ROM determines whether enter the ISP mode, based on the CMPA configuration in bit DEFAULT_ISP_MODE and ISP pin status. As shown in  following tables:     Keep the default value of EFAULT_ISP_MODE to “000”, and enter the ISP mode by pulling down the ISP pin PIO0_5. The first valid probe message on USART, I2C, SPI or USB locks in that interface. On LPCXpresso55S69 development board, connect the ISP interface cable (USB\UART\SPI\I2C), press and hold the ISP button, power on,  it will  enter ISP mode.   3.1 USB HID ISP mode (1)In LPC55(s)xx, HS-USB is default USB-ISP port, LPCxpresso55s69-evk uses P9 port, use USB cable to connect P9 and PC. (2)Press and hold  ISP button, reset board, entered ISP-USB mode. (3)Configure MCUXpresso Secure Provisioning Tool: select USB connection mode, test connection. First, click "File->New Workspace", open the option to create a new workspace, and select the processor model you are using.     Then, click "Target->Connection" to open the connection configuration.   In configuration, select USB interface, click “Test Connection” button, if the result shows " ok", connected successfully.   (4)Select the source file in "Source executable image". This tool can build plaint image, signed image, and encrypted image. You can configure it according to your own requirements. For example, use a plain image file "lpcxpresso55s69_gpio_led_output.hex", this file is a binary file generated from MCUXpresso IDE under the SDK example. Click the "Build image" button, ensure that the compilation was successful.     (5)Download the image file Choose “Write Image” view, in “Image path” select the image generated by the previous step, then click  “Write Image” button.   If download  successfully, the following picture will be displayed:     3.2 UART ISP mode (1)LPC55(s)xx  use UART0 as UART-ISP interface, you can use USB cable to connect P6 of LPCxpresso55s69-evk and PC, or use USB-UART convertor to connect UART0 TX/RX and PC. (2)Enter ISP mode, refer to 3.1. (3)Configure MCUXpresso Secure Provisioning Tool, refer to 3.1, select UART connection mode, and perform connection test.   Step 4 and step 5 are the same as 3.1.   3.3 SPI ISP mode (1) LPC55(s) 2x/6x currently includes two versions, 0A and 1B, which can be checked from the chip mask. The 0A version supports SPI3 and HS_SPI ISP interface, and the 1B version only supports HS_SPI ISP interface. This article uses version 1B for the experiment. Both SPI and I2C use LIBUSB interface, LPC-LINK2 and MCU-LINK pro support this function interface, so as long as there is LPC-LINK2 or MCU-LINK pro, SPI-ISP and SEC tool connection can be realized. Special reminder: LPC-link2 and MCU-LINK pro must be updated to CMSIS-DAP debugging interface, J-link does not support this function. In the LPCxpresso55s69-evk development board, SPI3 is connected to LPC-LINK2 by default, and HS_SPI is not connected, so  an external connection is required, connect SCK, MOSI, MISO, and SSEL1 of HS_SPI to the corresponding positions of LPC-link2. For details, please refer to the lpc55xx manual and the development board schematic. It can also be connected according to the figure below. The connection of the development board is shown in the below picture   (2) Connect the USB cable to the P6 port. (3) Enter ISP mode, refer to 3.1. (4) Configure MCUXpresso Secure Provisioning Tool, refer to 3.1, select the SPI connection mode, and perform a connection test.   Step 5 and step 6 are the same as 3.1.   3.4 I2C ISP mode The I2C-ISP mode is the same as SPI, with the help of the LIBUSB interface, that is, the LPC-link2 on the development board. Special reminder: LPC-link2 and MCU-LINK pro must be updated to CMSIS-DAP debugging interface, J-link does not support this function. (1)  Connect the USB cable to the P6 port. (2)  LPC55(s)6x/2x uses I2C1, and LPCxpresso55s69-evk development board has already connected I2C1 and LPC-LINK2, no need additional connection. (3)  Enter ISP mode, refer to 3.1. (4) Configure the MCUXpresso Secure Provisioning Tool, refer to 3.1, select the I2C connection mode, and perform a connection test.   Step 5 and step 6 are the same as 3.1.   Summary (1) All ISP interfaces (USB/UART/SPI/I2C) are supported by MCUXpresso Secure Provisioning Tool. (2) LPC-link2/MCU-LINK pro must be configured as CMSIS-DAP debug probe. (3) Check the chip version and make sure use the correct SPI port. (4) Make sure that the usb  cable interface is connected correctly and must enter the ISP mode before testing the connection.      
查看全文
1. Background When an embedded device is being upgraded, due to external factors such as power outage and forced interruption, the new firmware can‘t be written completely into flash, which causes problems when the system is started. Or if the image file is damaged during device is currently running, the system will break down and the device cannot run. To solve these problems, you can use the dual image, which ensures that at least one image file can be started and works properly at any time. If anything goes wrong, the bootloader detects and uses the alternate image file. 2. Principle LPC5536 ROM supports the dual image boot for internal flash, that means, in the flash region, two boot images can be placed there; ROM decides to boot which image based on the image version, boot the one with the newer image version first, if fail, boot the older one. During power-on and startup, the ROM first detects the location and size of the relocated image file in the CMPA, and then detects the version number of the two images. Therefore, when the dual image is used,  mainly need configure the relocation address and version number of the image files. The internal flash boot flow for dual image is as follows:   2.1 Relocating Image File The LPC5536 internal flash supports remapping. When set the remap offset, Internal FLASH memory AHB access will change the access address adding the offset as the below figure shows. For example, when the offset is set to 128K(0x20000), the access to 0x0 will be remapped to 0x20000. Via this IP feature, ROM can implement a dual image boot with two images. The offset and the remap size of the image is set in CMPA region by the user. This is an illustration of two image files stored in internal FLASH. The offset and remap size of the second image is set by the user in the CMPA area to let ROM know the location of the second image.   2.2 Configuring Image Version The image version is the image header offset 0x24; bit 10 shows whether the image contains the image version for not; if bit10 is 0, that means the image has no image version; ROM will take the image version as 0.   3、Implementation 3.1 Configuring CMPA 1) Configure Data Values in the CMPA Use blhost to write the modified bin file to CMPA to configure the image1 offset and remap size. The procedure is as follows: First, open an all “0” cmpa.bin and change the data at 0x3E23C to 0x20000, as shown in the figure below:   Then, modify the remap size. The data at address 0x3E238 is changed to 0x1d800, as shown in the following figure:   Modify and save, rename as cmpa_new.bin, save as \blhost_2.6.7\blhost_2.6.7\bin\win. 2) Download cmpa_new.bin Blhost 2.6.7 is a command-line tool, that use it to program cmpa_new.bin. Check whether the communication between blhost and development board is successfully. Firstly, check the port number for connecting between development board and computer from  device manager.   Secondly, short 3 and 4 of jumper J43 on lpc55s36-evk to enable ISP boot. Thirdly, press the reset key to reset board, input connection test command “blhost-p com12 -- get-property 1” Check whether communication is normal. If connection is successful, the message will be displayed as below:   Program modified bin file into CMPA. Write CMPA by using command “blhost-pcom12 -- write-memory 0x3e200 cmpa_new.bin”as shown below:   Read back CMPA data after writing. To confirm the accuracy of the data, run command “blhost-pcom12 -- read-memory 0x3e200 512” to view the configured CMPA data, as shown in the following figure:   3.2 Setting Dual Image Version To observe experimental effect, Image0 function is the RED light on LPC5536-evk development blinking, Image1 function is BLUDE light blinking. In Image0 project, set version number to 1, in Image1 set version number to 2: Open the project of red light blinking and change the header file to 0x10400 at offset 0x24.   Open the project of blue light blinking and change the header file to 0x20400 at offset 0x24.   3.3 Remap Flash For users, LPC5536JBD100 has a total of 246K internal flash available, so Image0 is assigned to the address range 0x00000-0x1FFFF and Image1 is assigned to the address range 0x20000-0x3D7ff. If using MCUXpresso ID, the Settings are as follows: Right-click Selected Project -> choose Properties ->MCU settings, set the Location (start address) and Size, click  Apply button when finished. The red light blinking project are modified as follows:    The blue light blinking project modified as follows:   Re-compile the project.  3.4 Functional Testing Test application is two lighting projects, namely red light blinking and blue light blinking. The red light blinking is image0, version 1, and the blue light blinking is image1, version 2. Therefore, if test result is blue light blinking, dual image function works successfully.. Download Images: Using GUI Flash Tool in MCUXpresso IDE, download two image files to the development board:   Open, and the following view pops up. Select download File in "File to program", then click run button, image will be downloaded to flash.   When the download is complete, click OK.   Download another image in the same way. Note that "mass erase" cannot be checked when programing the second image. If you use other tools to program, also should disable the same function as "mass erase", avoid erasing the first image file. Test result: After downloading the program and reset, the blue light blinking. Further test: Change the version number of red light blinking project to 3, that is, modify 0x10400 to 0x30400. Then downloading the image file again. The red light blinking. 4、Summary Dual image function increases the security for boot and firmware update of embedded devices. It is necessary to pay attention to the way of setting image offset, remapping size and configuring image version in the CMPA area when using it, and also pay attention to the flash configuration in the two projects.   Attachment is test application project.
查看全文
The ADC of LPC55xx supports scan mode, in scan mode, once ADC triggering (either hardware or software) can convert multiple analog channels. The document gives an example that the CTImer2 module triggers ADC and ADC converts two analog channels for each triggering. The doc introduces the CTimer configuration, ADC triggering control register configuration, and ADC Command buffer chain and ADC result reading , in this way, the CTimer can trigger ADC, the ADC can convert multiple channels. The example and the doc are attached. The Example is developed based on SDK example lpcxpresso55s69_lpcadc_interrupt example, the tools is MCUXprsso IDE ver11.7, the SDK package is SDK_2.x_LPCXpresso55S69 ver2.11.1  
查看全文
In some early LPC products, such as LPC11xx, LPC17xx, LPC18xx, LPC40xx, LPC43xx, LPC8xx, etc, CRP is used to utilize code protection. CRP has three different security levels: Figure 1 shows the security levels of CRP1, CRP2, and CRP3. Figure 1 The LPC55 series (LPC55(S)0x, 1x,2x, and 6x) uses Secure boot and Protected Flash Region (PFR) configuration instead of CRP for security protection. The part number with S (eg. LPC55S) supports Secure boot, for instance, LPC55S28 and LPC55S06. However, non-S series products, such as LPC5506, LPC5528,  can only utilize code protection by configuring FPR related fields. CRP2 is the most commonly used protection level. With CRP2, SWD access is blocked, so users can not read, write, or erase Flash via SWD or ISP. In addition, users cannot erase part of Flash to modify existing code. Once in CRP2 mode, Flash can only be recovered by Mass Erase Flash, which effectively prevents attacker from reading and modifying the Flash code. Unfortunately, the LPC5500 device such as LPC55(S)0x, 1x,2x,6x doesn't have exactly the same functional mechanism as the CRP2, which is questioned by many users. However, if we need to achieve the same functionality as CRP2, we can configure CMPA to disable ISP and SWD debugging port. 1.   Disable ISP Customer Manufacturing/Factory Configuration Area (CMPA) is part of the PFR, Configure BOOT_CFG to select whether the ISP mode is enabled. Table 1 shows the field table starting with 9E40 word address in CMPA. ISP control domains have been marked in red (as shown in Table 1). Table 2 shows the mode selection of ISP domains, 111 is ISP disabled. If the ISP mode is disabled, set BOOT_CFG to 0b1110000. Word Address(HEX) Byte Address Field Description 6 5 4 3 2 1 0 9E40 9E400 BOOT_CFG Default ISP mode 0 0 0 0 9E404 SPI_FLASH_CFG 0 0 0 0 0 0 0 9E408 USB_ID USB Vendor ID 9E40C SDIO_CFG 0 0 0 0 0 0 0 9E41 9E410 CC_SOCU_PIN ISP_CMD_EN MCM33_DBGEN 0 0 0 0 0 9E414 CC_SOCU_DFLT ISP_CMD_EN MCM33_DBGEN TAPEN SPIDEN SPNIDEN DBGEN NIDEN Table 1 Default ISP mode Bit 【6:4】 Auto ISP 000 USB_HID_MSC 001 UART ISP 010 SPI Slave ISP 011 I2C slave ISP 100 Disable ISP 111 Table 2 2.   Disable SWD The DCFG_CC_SOCU is a configuration that specifies debug access restrictions per debug domain. These access restrictions are also referred as constraint attributes in this section. The debug subsystem is sub-divided into multiple debug domains to allow finer access control. Figure 2 shows debug domains and their corresponding control bit position in DCFG_CC_SOCU. Logically, DCFG_CC_SOCU has two components: SOCU_PIN and SOCU_DFLT. The SOCU_PIN and SOCU_DFLT registers are used together to define SWD debug access for the module. Which is logically composed of two components: SOCU_PIN: A bitmask that specifies which debug domains are predetermined by device configuration. SOCU_DFLT: Provides the final access level for those bits that the SOCU_PIN field indicated are predetermined by device configuration. In another words, set the corresponding bit of SOCU_PIN and SOCU_DFLT register to 1 at the same time to enable the module. This module is disabled by setting the corresponding bits of the SOCU_PIN and SOCU_DFLT registers to 0 simultaneously. See Figure 2. Figure 2 Note that the default value of CC_SOCU_PIN and CC_SOCU_DFLT in LPC55 PFR are all zeros. Therefore, in this case, although SOCU_PIN and SOCU_DFLT are both 0, the bit reverse rule is not met (Figure 3 below). Therefore, all debugging permissions are enabled by default when CC_SOCU_PIN and CC_SOCU_DFLT are all 0. Figure 3 Note: the distinction between CC_SOCU_PIN(CC_SOCU_DFLT) and SOCU_PIN(SOCU_DFLT). The former with CC_ includes the reverse bit of the latter. For example, if SOCU_PIN and SOCU_DFLT are set to all zeros and the reverse bit is set to 1, all SWD modules are disabled. Figure 4 3. Implementation The following uses LPC5506 as an example to configure the CMPA field: 3.1  Disable ISP and SWD Figure 5 Keep the default CMPA values except for the two highlighted in red in Figure 5. 1) Set BOOT_CFG to 0x70 to disable ISP. 2) Set all SOCU_PIN and SOCU_DFLT to 0, and set all reverse bits to 1. That is, disable all debug accessing subdomains. 3.2 Enable ISP and SWD Figure 6 Keep the default CMPA values except for the two highlighted in red in Figure 6. 1) Set BOOT_CFG to 0x00 to enable Auto ISP. 2) Restore the default values of DCFG_CC_SOCU, that is, CC_SOCU_PIN and CC_SOCU_DFLT to all zeros. in this case, all debug permissions are restored (turned on) because the rule of bit reversal is not met (see Part 2 of this article). 3.3 Code Implementation Enable or disable the SWD and ISP functions by serial command (1 or 0). Figure 7 The demo code is attached. This routine has been tested on the LPCXpresso55S06 development board. NOTE:     As system security requirements and the attack surface evolves, it is important for customers to understand the types of attacks (especially advanced physical attacks) which NXP does not claim to protect against, or strongly mitigate, so that appropriate mitigation can be taken by the customer at the system level if necessary.  
查看全文