The i.MX28 family of multimedia applications processors is the latest extension of Freescale's ARM9 product portfolio. The i.MX28 family integrates display, power management, and connectivity features unmatched in ARM9-based devices, reducing system cost and complexity for cost sensitive applications. It also integrates CAN, USB and Ethernet connectivity with full AEC-Q100 automotive qualification for automotive applications. i.MX Family Comparison Product Information on Freescale.com i.MX280 i.MX280 Multimedia Applications Processor i.MX281 i.MX281 Multimedia Applications Processor i.MX283 i.MX283 Multimedia Applications Processor i.MX285 i.MX285 Multimedia Applications Processor i.MX286 i.MX286 Multimedia Applications Processor i.MX287 i.MX287 Multimedia Applications Processor Evaluation/Development Boards and Systems MCIMX28EVKJ: i.MX28 Evaluation Kit How to add support for a new NAND How to add a New on imx28 with Win CE Running a mainline kernel on a MX28EVK board How to enable SPI NOR boot for iMX28 (Spansion s25fl256s) Embedded Software and Tools Android OS for i.MX Applications Processors i.MX28 Software and Development Tool Resources Additional Resources Adding Support For a New NAND with i.MX28–NAND Analysis Adding Support For a New NAND with i.MX28 on Win CE Board bring-up and DDR initialization tools i.MX as a USB Playback/Capture Device on One OTG Port i.MX28: GPIO interrupt on both rising and falling edges How to enable SPI NOR boot for iMX28 (Spansion s25fl256s) Running a Mainline Kernel on an i.MX28 EVK Board Running mk_mx28_sd on Ubuntu 12.04 Ubuntu 12.04 64-bit Precise Pangolin Host Setup for Building i.MX28 L2.6.35_MX28_SDK_10.12_SOURCE Use LCD_D11 pin for enet reset in iMX28

Here is an example for i.MX28 EVK board to support SPI NOR boot in uboot, kernel and MFGTool.   Attached files are the patches to support SPI NOR flash on i.MX28 EVK bord based on L2.6.35 ER11.09.01 BSP. It was verified on Spansion s25fl256s SPI NOR. "ER11.09.01_uboot_imx28_spi_nor.patch" is the Uboot patch. "ER11.09.01_kernel_imx28_spi_nor.patch" is the kernel patch. "ucl.xml" is the updated MFGTool config file, please update it to "Mfgtools-Rel\Profiles\MX28 Linux Update\OS Firmware\ucl.xml".   The uboot boot paramters for SPI: setenv bootargs_base 'setenv bootargs console=ttyAM0,115200' setenv loadaddr 0x42000000 setenv bootargs_spi 'setenv bootargs ${bootargs} root=/dev/mtdblock2 rootfstype=jffs2 rootwait rw ip=none' setenv bootcmd_spi 'run bootargs_base bootargs_spi;sf probe 2:0; sf read ${loadaddr} 0x100000 0x300000;bootm' setenv bootcmd 'run bootcmd_spi' saveenv   To boot the board from SPI NOR s25fl256s, the 4KB page region of the NOR should be put to top, the last 128KB of the NOR address space. The uboot.sb is about 220KB, it can't be put to 4KB and 64KB combined region. The IMX28 boot ROM can only handle simple page size for boot. All 4KB page region or all 64KB page region are both OK for boot, but combined region can't boot.   For default, the s25fl256s NOR's 128KB 4KB page size region is at the bottom of the NOR, we should update the OTP to set this region to TOP, in Uboot, we run the followed command to burn the OTP: MX28 U-Boot -> sf probe 2:0 MX28 U-Boot -> sf set_config_reg 0x04   To boot the i.MX28 EVK board from SPI2 NOR flash, the BM3~0 should be 0010.   In this example, we only used the JFFS2 file system. To support the UBIFS, there is a known issue, that the UBIFS will use vmalloc to alloc memory, and if SPI driver used the DMA, kernel will halt with error "kernel BUG at arch/arm/mm/dma-mapping.c:409!".   For 11.09.01 BSP, the default MFGTool rootfs "initramfs.cpio.gz" will be bigger than 4MB, but in i.MX28 bootlets code, the BSP only set ramdisk to 4MB, so we need modify this limitation for MFGTool.   Use command "./ltib -p imx-bootlets -m prep" to get the bootlets code, modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/linux_prep/core/setup.c", function setup_initrd_tag(), change from "params->u.initrd.size =  0x00400000;" to "params->u.initrd.size =  0x00500000;". Modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/updater.bd" and "updater_ivt.bd", change from "load 0.b    > 0x40800000..0x40c00000;" to "load 0.b    > 0x40800000..0x40d00000;".   Now the MFGTool rootfs size can be 5MB.   2013-05-09: Updated hardware rework: On iMX28 EVK board, rework J89 as followed and mount R320,R321,R322 and C178. MX28 U49 Pin1 /CS <-> NOR Pin7 CS# MX28 U49 Pin2  D0 <-> NOR Pin8 SI/IO1 MX28 U49 Pin5 DIO <-> NOR Pin15 SI/IO0 MX28 U49 Pin6 CLK<-> NOR pin 16 SCK. MX28 U49 Pin8 VCC <-> NOR Pin2 VCC                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 MX28 U49 Pin4 GND <-> NOR Pin10 VSS MX28 U49 Pin3 /WP <-> NOR Pin9 WP MX28 U49 Pin7 /Hold <-> NOR Pin pin1 hold   Software reset issue for 32MB SPI NOR: For 32MB SPI NOR, after booted into kernel, the kernel driver will set SPI NOR to 4 bytes address mode, but for iMX28 SPI boot, it can only boot with 3 bytes address mode, if reset the iMX28 board but SPI NOR was not reset, it will fail to reboot. Hardware solution: when iMX28 was reboot, reset the SPI NOR too, the SPI NOR will work in 3 bytes address mode as default. Software solution: In kernel SPI NOR driver, always switch SPI NOR to 3 bytes address mode after each SPI NOR access, and switch to 4 bytes address mode before each access. There is no such issue if the SPI NOR size is less than 32MB.    

Gstreamer Please, select the gstreamer package in [LTIB] under Package List. Choose the package that you will need. For a complete installation, select all: gstreamer gstreamer-plugins-base gstreamer-plugins-good gstreamer-plugins-bad gstreamer-plugins-bad gstreamer-plugins-ugly What can be done With Gstreamer, it's possible to: i.MX27 ADS Board Video GST Play i.MX27 ADS Board Video GST Encode i.MX27 ADS Board Video GST Video Streaming

The i.MX27 PDK, with Smart Speed™ technology, is a completely integrated hardware and software solution designed to simplify product development so you can focus on the critical differentiation needed for market success. Reduce development time and design products that have power to spare, even when running multiple applications simultaneously. Receive stellar Ethernet and video performance in a system design that dramatically reduces power consumption. Features i.MX27 Applications Processor - ARM9™ 128 MB DDR SDRAM 256 MB NAND FLASH Power Management (PMIC MC13783) + Power Circuitry Audio HS USB PHY Touch Controller 10/100 Ethernet port Accelerometer MMA7450L (Freescale) User I/O Connectivity (FM, 802.11, Bluetooth, USB OTG, USB HS) Button 2.7" TFT Display 2MP Camera Module SD card, ATA HDD External Connectors (dock, headphones, TV out, GPS) Microphone Speaker Debug Ethernet Port Debug Serial Port JTAG Reset, Interrupt, Boot Switches Debug LEDs CodeTest Interface Power Source Current/Power Monitoring

Building on the success of low-cost, high-performance application development kits, Freescale introduces the i.MX27 Lite Kit. Once again, Developed in Logic Product Development and Freescale have worked together to deliver a product-ready software and hardware platform for OEMs, ODMs, IDHs and independent developers and a price point that's quite appealing. The i.MX27 Lite Kit enables rapid design of embedded products targeting the medical, industrial, wireless, consumer markets and general purpose markets. Leverage the power of the i.MX27 multimedia processor in this cost-effective development solution. Features The Freescale i.MX27 SOM-LV is based on the i.MX27 multimedia applications processor running up to 400 MHz. Click here for the full list of i.MX27 SoC features: Includes i.MX27 SOM-LV module Standard peripheral connectors supporting: Ethernet, LCD, audio in/out, serial, CompactFlash®, MMC/SD, USB host, USB OTG, ATA LogicLoader™ (bootloader/monitor) in executable format GNU Cross-Development Toolchain (compiler, linker, assembler, debugger) included Kit contents: i.MX27 SOM-LV Application baseboard Expansion header breakout board Null-modem serial cable Ethernet crossover cable USB A to mini-B cable 5 volt power supply with power adapters (Europe, Japan, UK, and US) Logic Starter CD QuickStart Guide Zoom™ LV baseboard (146.1 x 158.8 x 17.1 mm) RoHS compliant

The i.MX27 Application Development System (MCIMX27ADSE) is a development tool which is designed to run software applications designed for the i.MX27 processor. Features i.MX27 Multimedia Application Processor Two clock-source crystals, 32 KHz and 26 MHz Power management & Audio IC (MC13783) included battery charging, 10bit ADC, buck switchers, boost switcher, regulators, amplifiers, CODEC, SSI audio bus, real time clock, SPI control bus, USB OTG transceiver & touchscreen interface Multi-ICE debug support Two 512Mbit DDR-SDRAM devices, configured as one 128MB, 32-bit device One 256Mbit Burst Flash with 128Mbit Pseudo Static RAM (PSRAM) memory device, configured as one 16MB flash with 8MB PSRAM, 16-bit device An single board system with connections for LCD display panel, Keypad and Image sensor. Complex Programmable Logic Device (CPLD) for reducing glue logic interface Software readable board revisions Configuration and user definable DIP switches Two SD/MMC, MS memory card connectors PCMCIA & ATA Hard Disk Drive (HDD) Two RS-232 transceivers and DB9 connectors (one configured for DCE and one for DTE operation) supporting on-chip UART ports External UART with RS-232 transceiver and DB9 connector Infrared transceiver that conforms to Specification 1.4 of the Infrared Data Association USB Host (HS & FS), USB OTG (HS & HS) interface Separate LCD panel assembly that connects to the main board Separate keypad unit with 36 push button keys Separate CMOS Image Sensor Card A 3.5 mm headset jack, a 3.5 mm line out jack, a 3.5 mm line in jack, a 3.5 mm microphone jack and a 2.5 mm microphone and headset jack Cirrus Logic CS8900A-CQ3Z Ethernet controller (10BASE-T), with RJ-45 connector AMD AM79C874 NetPHY (10BASE-T & 100BASE-X), with RJ-45 connector Two 32 × 3-pin DIN expansion connectors with most i.MX27 I/O signals Variable resistor for emulation of a battery voltage level NAND Flash card (Plugs into Main Board) which is included in the ADS kit LED indicators for power, Ethernet activity, and two LEDs for user defined status indication Universal power supply with 5 volt output @ 5 Amperes USB, RS-232 and RJ45 cables available in kit Kit Contains a main board an LCD display panel a keypad a NAND flash card an image sensor a TV encoder card, etc It supports application software, target-board debugging or optional extra memory.

The latest i.MX28 BSP provided by Freescale (10.12) is based on a 2.6.35 kernel. If you want to use the latest and greatest kernel version from kernel.org, follow the steps below. 1. Get the mainline kernel: git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git(this is only done once) git checkout -b yourlocalbranch origin/master 2. Export the toolchain PATH=/opt/freescale/usr/local/gcc-4.4.4-glibc-2.11.1-multilib-1.0/arm-fsl-linux-gnueabi/bin/:$PATH export PATH export CROSS_COMPILE=arm-none-linux-gnueabi- export ARCH=arm 3. Build the kernel make mxs_defconfig make uImage sudo cp arch/arm/boot/uImage /tftpboot (In this example /tftpboot is the directory used to send files via TFTP) 4. Kernel command line: On U-boot change the following parameter of the kernel command line: console=ttyAM0,115200 to console=ttyAMA0,115200 5. On LTIB You can still use LTIB to provide the root file system. ./ltib -c Target System Configuration Options ----> Unselect [] boot up with tty and login If this option is selected the serial port will fail to open as it still uses ttyAM0 instead of ttyAMA0. 6. Boot the kernel via TFTP and mount the rootfs via NFS.

Most engineers should incorporate the following fundamental methodology when designing and bringing up a new board design: 1. Review the schematics and layout to ensure proper connectivity of all devices 2. Once the board returns from the manufacturer, measure and document all of the voltage rails of each IC on the board (especially the SoC and DRAM) 3. Ensure JTAG debugger connectivity (due to the complexity of systems today, every new board design should have some “hooks” to allow JTAG connectivity, even if these are simply test points) 4. Bring up and ensure proper DRAM functionality; it is imperative the first three steps are precisely accomplished – often times, DRAM instability or non functionality is due to improper connection (including not being connected to the voltage net) or poor layout. Once these four steps are completed, the board can then proceed to a more broad based checkout of other peripherals using some type of compiled test code executed from DRAM. More often than not, the end user’s board will differ from Freescale reference design boards either in how the DRAMs are connected or simply by using a different DRAM vendor.  As such, tools were created to aid in the development of DRAM initialization scripts.  The resulting script, though targeted for the RealView development system (aka include files), can be easily ported to another debugger’s command syntax or to assembly code for use in boot loaders.  These tools are Excel spread sheet based and include a “How To Use” tab, making the tool usage relatively self-explanatory.  Each tool is unique to a specific i.MX processor and to the DRAM technology used with each processor.  This attached files are tools available for the following i.MX SoCs:

Structures to be modified The main table that needs to be modified is in C:\WINCE600\PLATFORM\COMMON\SRC\SOC\COMMON_FSL_V2_PDK1_9\NAND\INC\NANDTYPES.h. Add the Nand specific information to the following structure. typedef struct _NandChipInfo { FlashInfo fi; //@<<info> FlashInfo structure BYTE NANDCode[NANDID_LENGTH];//@<<info> NAND full ID BYTE NumBlockCycles; //@<<info> flash erase address cycle BYTE ChipAddrCycleNum; //@<<info> flash access address cycle BYTE DataWidth; //@<<info> 8/16 bits data width BYTE BBMarkNum; //@<<info> MAX_MARK_NUM = 4 BYTE BBMarkPage[MAX_MARK_NUM];//@<<info> MAX_MARK_NUM = 4 BYTE StatusBusyBit; //@<<info> interleave mode support BYTE StatusErrorBit; //@<<info> interleave mode support WORD SpareDataLength; //@<<info> spare area size BYTE CmdReadStatus; //@<<command> read status BYTE CmdRead1; //@<<command> read first 256 bytes data BYTE CmdRead2; //@<<command> read last 256 bytes data BYTE CmdReadId; //@<<command> read device ID BYTE CmdReset; //@<<command> reset nand flash BYTE CmdWrite1; //@<<command> sequence data input BYTE CmdWrite2; //@<<command> page program BYTE CmdErase1; //@<<command> block erase BYTE CmdErase2; //@<<command> block erase NANDTiming timings; //@<<info> NAND timing parameters }NandChipInfo, *pNandChipInfo; All information from NANDCode to CmdErase2, can be obtained from the Nand Datasheet. The structure FlashInfo, is filled in with data obtained from the Nand Analysis sheet. Please check this link to see how to create this spreadsheet from Nand Datasheets. typedef struct _FlashInfo { FLASH_TYPE flashType; DWORD dwNumBlocks; DWORD dwBytesPerBlock; WORD wSectorsPerBlock; WORD wDataBytesPerSector; }FlashInfo, *PFlashInfo; In the similar way the Nand timings calculated from the spreadsheet are add into this structure. typedef struct _NANDTiming { BYTE DataSetup; BYTE DataHold; BYTE AddressSetup; BYTE DataSample; }NANDTiming, *PNANDTiming; Remember to do a clean sysgen and build.

This page describes how to determine the NAND timing parameters for use in the NAND driver. This is independent of any OS that may be used. Analyzing NAND Datasheets  We use a spreadsheet to capture and analyze NAND features. That spreadsheet is [attached to this wiki page|Adding support for a new NAND with i.MX28– Nand Analysis^nand_analysis_template.xls]. We analyze a NAND as described below. We must have the NAND datasheet to do the analysis. Copy the *analysis spreadsheet* to a new filename with the exact part number(s) of the NAND(s) being analyzed. Fill in sheet 1 ("Cover Page") of the analysis spreadsheet. Work on sheet 3 next: Fundamental Features. Other tables. If the NAND is one of a family listed together in a data sheet, then analyze the whole family with one spreadsheet. You can use the "Similar to" rows for the additional members of the family. Add more rows if needed. Most NANDs have an asyncrhronous interface, so there is not a simple clock frequency involved. Instead, there are various setup times, hold times, and output delays that imply limits on the I/O rate to/from the NAND. The spreadsheet compares the NAND's timing specifications to see if sums of the setup, hold, and output times are shorter than the minimim read-cycle or write-cycle times. The spreadsheet is specifically intended for use with the Nand controller in STMP378x/i.MX233/i.mx28 chips, so the spreadsheet performs the timing calculations with the goal of deriving the timing parameters *TSU*, *TDS*, and *TDH* for those CPUs. If the TDS and/or TDH quantities {color:#ff0000}turn red{color} after all the timings have been computed, then the computed TDS and/or TDH are too short for the specified cycle-time of the NAND. In that case:           You will have to increase one or both of them in the software. Write a note somewhere in the analysis spreadsheet about the values that you choose, but don't mess up the automatic computations. Record how the flash denotes factory-marked bad-blocks. (Some use the first page of a block, some use the last page,, etc.) Compare it to this [current superset of bad-block marking methods [http://wiki.freescale.net/display/PSGSW/Storage+Media%2C+Flash+Bad+Block+Marks] used to detect any flash factory bad block. Example Analysis Examples of NAND datasheets and analyses can be found on the [Hynix NAND Page | http://wiki.freescale.net/display/PSGSW/Hynix+NAND+Flash+Documents].

The imx_bootlets package in LTIB contains the code that will be the first code loaded and executed by ROM when booting a build of the Linux BSP. It is responsible for initializing some of the low level peripherals such as the integrated power supply and the DRAM controller as well as a few other initialization tasks. The default configuration of the bootlet code for the latest i.MX233 and i.MX28x release (SDK 10.05 and SDK 10.12 respectively) support a hardware configuration that has both a LiIon battery configuration (as shown in the reference schematics for these platforms as shown on freescale.com). For other configurations though such as a VDD5V connection only or a DCDC_BATT/Battery connection only, some additional changes are recommended.

ATK (Advanced Toolkit) ATK is a Windows tool for programming the flash memory of i.MX boards. It can be downloaded here. Using ATK This section will describe the procedure to erase the flash memory and program the bootloader. 1. Assemble the PDK using the CPU board, the Personality board, and the Debug board. 2. Connect a USB cable between the PC and the i.MX25 PDK Personality board. 3. Some hardware configurations (switches) must be set for booting from UART/USB:   On the debug board:   Switch SW5 -> Off   Switch SW6 -> Off   Switch SW7 -> Off   Switch SW8 -> Off   Switch SW9 -> On   Switch SW10 -> On   On the personality board:   Switch SW21 -> 11000000   Switch SW22 -> 00000000 {{Note|On SW5 thourgh SW10, "1" means the keys selected towards the edge of the board.} 4. Run ATK (1.6 or above) going to Start -> Programs -> AdvancedToolKit -> AdvancedToolKit   Set the options:   i.MX CPU -> i.MX25_TO1.1   Device memory -> DDR2;   Custom Initial File -> (keep it unmarked)   Communication Channel -> USB 5. Power up the i.MX25 PDK 6. Click on "Next" 7. Click on Flash Tools to erase, program or dump the the flash memory and click GO. NAND Flash Erasing 1. Configure the Dip Switch of Personality Board:                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      Switch 1 2 3 4 5 6 7 8 SW1 OFF OFF OFF OFF N/A N/A N/A N/A SW2 ON OFF OFF ON ON OFF OFF OFF 2. Choose NAND model K9LAG08U8M 3. Continue the steps Remember to select the checkbutton BBT (Back Block Table) Commands to flash kernel and rootfs fis init -f load -r -b 0x100000 zImage -h <host IP address> fis create -f 0x300000 kernel load -r -b 0x100000 rootfs.jffs2 -h <host IP address> fis create -f 0x800000 root fis load kernel exec -c "noinitrd console=ttymxc0 115200 root=/dev/mtdblock2 rw ip=dhcp rootfstype=jffs2" Command to create rootfs.jffs2 mkfs.jffs2 -r rootfs -e 0x80000 -s 0x1000 -n -o rootfs.jffs2

Introduction i.MX25 PDK Board Get Started Bootloader i.MX25 PDK Board Flashing NAND i.MX25 PDK Board Flashing SD Card i.MX25 PDK Board Flashing SPI NOR I.MX25 PDK U-boot SDCard I.MX25 PDK U-boot SplashScreen I.MX25 PDK Using FEC

Booting from NAND    Some hardware configurations (switches) must be set for booting from NAND:    On the debug board:      Switch SW4 -> 10000001      Switch SW5 -> Off      Switch SW6 -> Off      Switch SW7 -> Off      Switch SW8 -> Off      Switch SW9 -> Off      Switch SW10 -> Off    On the personality board:      Switch SW21 -> 10011000      Switch SW22 -> 00100000 Booting from SD Card    Some hardware configurations (switches) must be set for booting from an SD card:       On the debug board:      Switch SW4 -> 10000001      Switch SW5 -> Off      Switch SW6 -> Off      Switch SW7 -> Off      Switch SW8 -> Off      Switch SW9 -> Off      Switch SW10 -> Off    On the personality board:      Switch SW21 -> 11000000      Switch SW22 -> 00000000