Introduction The NFC Reader Library is a feature complete software support library for NXP's NFC Frontend ICs. It is designed to give developers a faster and simpler way to deliver NFC-enabled products. This multi-layer library, written in C, makes it easy to create NFC based applications. The purpose of this document is to provide instructions on how to install the NFC Reader Library on imx7dsabresd and communicate with PN5180, a NFC frontend. It will describe all the steps required to connect the board to an OM25180TWR, the wire connections, the changes in the device tree, and the library configuration. Building the Linux image and the Bal kernel module This section describes how to build the Linux image using Yocto and how to compile the Bal kernel module. Informations specific for this library start from the next section. Requirements: a Linux host PC (ex. Ubuntu 14.04/16.04) and root permissions. To download the required host packages, use: $ sudo apt-get install gawk wget git-core diffstat unzip texinfo gcc-multilib build-essential chrpath socat libsdl1.2-dev Specific for Ubuntu: $ sudo apt-get install libsdl1.2-dev xterm sed cvs subversion coreutils texi2html docbook-utils python-pysqlite2 help2man make gcc g++ desktop-file-utils \ libgl1-mesa-dev libglu1-mesa-dev mercurial autoconf automake groff curl lzop asciidoc To setup the repo utility (a tool written on top of git), run the commands: $ mkdir ~/bin (this step may not be needed if the bin folder already exists) $ curl http://commondatastorage.googleapis.com/git-repo-downloads/repo > ~/bin/repo $ chmod a+x ~/bin/repo Then add the following line to .bashrc to ensure the ~/bin is in the PATH variable. export PATH=~/bin:$PATH To download the Freescale Yocto Project Community BSP: $ mkdir fsl-release-bsp $ cd fsl-release-bsp $ repo init -u git://git.freescale.com/imx/fsl-arm-yocto-bsp.git -b imx-4.1-krogoth $ repo sync To build the image, in the fsl-release-bsp run the commands: $ mkdir buildDevSpi $ DISTRO=fsl-imx-xwayland MACHINE=imx7dsabresd source fsl-setup-release.sh -b buildDevSpi $ bitbake fsl-image-machine-test To build the toolchain, run: $ bitbake meta-toolchain $ cd buildDevSpi/tmp/deploy/sdk/ $ ./fsl-imx-xwayland-glibc-x86_64-meta-toolchain-cortexa7hf-neon-toolchain-4.1.15-2.1.0.sh Accept the default parameters. In order to deploy the image on an SD card use: $ sudo dd if=fsl-image-machine-test-imx7dsabresd.sdcard of=<sd card> bs=1M && sync The image is found in buildDevSpi/tmp/deploy/images/imx7dsabresd. For the kernel module compilation, setup the console environment: $ . /opt/fsl-imx-xwayland/4.1.14-2.1.0/environment-setup-cortexa7hf-neon-poky-linux-gnueabi Then, in the kernel module directory, replace the path with your linux build directory in the Makefile and run: $ make The bal.ko is the compiled module. To use the kernel menuconfig, run: $ bitbake -c menuconfig linux-imx Another useful command, for rebuilding the linux kernel image, is: $ bitbake -f -c compile linux-imx; bitbake -f -c deploy linux-imx; bitbake -f -c compile fsl-image-machine-test; bitbake -f fsl-image-machine-test Host interface The interface of the PN5180 to a host is based on a SPI interface, extended by the signal line BUSY. Only half-duplex data transfer is supported and no chaining is allowed, meaning that the whole instruction has to be sent, or the whole receiver buffer has to be read out. The module is connected to the i.MX7D board using the mikro bus expansion port in the following way: MK_BUS_CS, MK_BUS_SCK, MK_BUS_MOSI, MK_BUS_MISO are used for the SPI bus lines. MK_BUS_INT, MK_BUS_RX, MK_BUS_TX are used for the BUSY, RESET and IRQ lines. The pin configuration will be the following: GPIO6_IO22 will be the CS, GPIO6_IO14 will be BUSY, GPIO_IO12 will be RESET and GPIO_IO13 will be IRQ. The DWL pin, which can be used for firmware update, will be connected to GND. A common ground is also required. Connections table: Jumper Jumper Pins Description i.MX7D I/O Tower Edge J4 1 - 2 SPI Clk Selection ECSPI3_SCLK (SAI2_RX_DATA) B7 J20 1 - 2 PN5180 Reset GPIO6_IO12 (SAI1_RX_DATA) B8 J1 1 - 2 SPI SS0 GPIO6_IO22 (SAI2_TX_DATA) B9 J3 1 - 2 SPI MOSI ECSPI3_MOSI (SAI2_TX_BCLK) B10 J2 1 - 2 SPI MISO ECSPI3_MISO (SAI2_TX_SYNC) B11 J19 2 - 3 PN5180 BUSY GPIO6_IO14 (SAI1_TX_SYNC) B58 J5 1 - 2 PN5180 IRQ GPIO6_IO13 (SAI1_TX_BCLK) B62 X X PN5180 DWL GND B52 X X GND GND B2 Kernel Configuration In order to allow the library to manage the RESET, IRQ and BUSY pins, the options for Debug GPIO and Userspace I/O drivers must be enabled (in menuconfig, Device Drivers -> GPIO Support -> Debug GPIO and Device Drivers -> Userspace I/O -> Userspace I/O platform driver with generic IRQ). For controlling the SPI, there are two options: spidev or NXP bal. For spidev, it is necessary to select Device Drivers -> SPI support -> User mode SPI and apply the imx7d-sdb_spidev.patch (it also does the pinmuxing, it is attached to the document). When using NXP bal, it is necessary to compile the module, initialize it with insmod and apply the imx7d-sdb_bal.patch (it also does the pinmuxing, the patch and the module are attached to this document). Library Configuration For the library configuration, <lib-folder>/Platform/DAL/Board_Imx6ulevkPn5180.h must be replaced with Board_Imx7dsabresdPn5180_bal.h or Board_Imx7dsabresdPn5180_spidev.h (based on the selected spi interface). For compilation, the command is: $ ./build.sh yocto /opt/fsl-imx-xwayland/4.1.15-2.1.0/sysroots/ The last parameter is the location of the toolchain generated by yocto. A build folder is generated outside of the source code folder. The applications from the ComplianceApp can be deployed on the board in order to test the functionality provided. Other useful resources: – i.MX Yocto Project User's Guide: https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true – NFC Reader Library for Linux Installation: https://www.nxp.com/docs/en/application-note/AN11802.pdf – PN5180 component: https://www.nxp.com/docs/en/data-sheet/PN5180A0XX-C1-C2.pdf

Low power demo on i.MX8MM.   9/28/2020: Attachments updated. 1. Fix a bug in 5.4.24 kernel that system can only wakeup once. 2. Remove 0x104 from atf patch. On 5.4.24, tested OK without PLL2.   9/8/2020: Attachments updated. Add patches for 5.4.24 kernel.   We use it to test power consumption on i.MX8MM EVK.   Usage: 1. Kernel: echo "mem" > /sys/power/state   2. M4: Select a power mode from menu and wait for wakeup. Default wakeup method is GPT.   Add more patches, which will add functions for the case: 1. M core RUN and A core in suspend with DDR OFF. 2. M core wakeup A core without DDR support.   Descriptions: freertos_lowpower.zip. A simple freertos example for M4 RUN when A core in DSM. Generally, we use MU_TriggerInterrupts(MUB, kMU_GenInt0InterruptTrigger); to do wakeup. low_power_demo.zip A simple baremetal example for M4 RUN when A core in DSM. Generally, we use MU_TriggerInterrupts(MUB, kMU_GenInt0InterruptTrigger); to do wakeup. Note that the freertos version will have more options in menu. atf patch: Allow A53 to enter fast-wakeup stop when M4 RUN. Also avoid bypass of some plls, which is important to make M4 RUN when A53 enters suspend. 0001-iMX8MM-GIR-wakeup.patch: GIR wakeup patch for kernel. Need kernel to use fsl-imx8mm-evk-m4.dtb. 0002-Don-t-keep-root-clks-when-M4-is-ON.patch. Don't keep root clocks when M4 is ON. 0001-plat-imx8mm-keep-the-necessary-clock-enabled-for-rdc.patch. There's a design issue that when wakeup from DSM, described in patch: "if NOC power down is enabled in DSM mode, when system resume back, RDC need to reload the memory regions config into the MRCs, so PCIE, DDR, GPU bus related clock must on to make sure RDC MRCs can be successfully reloaded." Note that this patch will keep PCIE, DDR and GPU clock on, which will increase the power. An optimization will be decrease PCIE, DDR and GPU clock before entering DSM.   Power measurement: Supply Domain Voltage(V) I(mA) P(mW) peak avg peak avg peak avg VDD_ARM(L6) 1.010029 1.009513 1.109 1.030 1.120 1.039 VDD_SOC(L5) 0.855199 0.854857 190.110 189.973 162.582 162.400 VDD_GPU_VPU_DRAM(L10) 0.977240 0.977050 19.865 19.800 19.413 19.346 NVCC_DRAM(L15) 1.094407 1.094168 2.059 1.984 2.253 2.171 Total         185.367 184.956   Notes: This power measurements is got by putting Cortex-A in DSM and Cortex-M in RUNNING. In other tests, if M core can be put to STOP mode, additional power can be saved (5 - 20mA in VDD_SOC). From the table, we can see that by putting DDR to retain, a lot of power can be saved in VDD_SOC and NVCC_DRAM.

       There are 8 UART ports on i.mx6ul and one uniform Linux driver for these UARTs. Form UART1~UART6, there is no special operation or attention to use them. But for UART7/UART8, there is a special rule to enable them.       According to i.mx6ul RM, we can see UART7/8 RTS pins are muxed with ENET TX_CLK pins. When SION bit of ENET_TX_CLK is set, we need switch to other MUX mode as input signal for UARTx_RTS. Otherwise, UARTx_RTS will be interrupted by loopback ENET clock signal. So we should set IOMUXC_UART7_RTS_B_SELECT_INPUT and IOMUXC_UART8_RTS_B_SELECT_INPUT registers to 0x2/03 to avoid ENET clock's conflict no matter whether we enable UART7/8 RTS/CTS function or not. Let's summarize the different scenarios to enable UART7/8 as follows: 1. ENET driver is disabled and UART7/8 is enabled. There is no special operation to do, just use UART7/8 like other UARTs 2. ENET and UART7/8 are both enabled. There are two use models, RTS/CTS enabled or disabled.     2a. If we enable RTS/CTS feature and configure RTS/CTS pins in the device tree, of course, we should avoid the conflict between UART CTS/RTS pins and ENET TX_CLK pins. There is no special operation to do becuase your RTS/CTS device tree would automatically set  IOMUXC_UART7_RTS_B_SELECT_INPUT/ IOMUXC_UART8_RTS_B_SELECT_INPUT register to correct value.     2b. If we don't enable RTS/CTS feature and no RTS/CTS pin configuration in devcie tree, we should manually add code to set  IOMUXC_UART7_RTS_B_SELECT_INPUT/  IOMUXC_UART8_RTS_B_SELECT_INPUT register because the default value is 0x0(ENETx_TX_CLK_ALT1) Here is an example to show how to use UART7 on EVK board in scenario 2b. 1. modify imx6ul-14x14-evk.dts to enable UART7     a. remove all  LCD settings to disable lcdif because we configure UART7 TX/RX pin pad to LCD data line     b. add UART7 related settings                &uart7 {                     pinctrl-names = "default";                     pinctrl-0 = <&pinctrl_uart7>;                    status = "okay";                 };               &iomuxc {                   pinctrl-names = "default";                   pinctrl-0 = <&pinctrl_hog_1>;                   ....                           pinctrl_uart7: uart7grp {                           fsl,pins = <                                       MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1                                       MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1                           >;                  }; 2. add code to set IOMUXC_UART7_RTS_B_SELECT_INPUT register in arch/arm/mach-imx/mach-imx6ul.c          static void __init imx6ul_init_machine(void)          {               struct device *parent;               void __iomem *iomux;               struct device_node *np;               ...........               imx6ul_pm_init();               np = of_find_compatible_node(NULL,NULL,"fsl,imx6ul-iomuxc");               iomux = of_iomap(np, 0);               writel_relaxed(0x2,iomux+0x650);            } 3. build zImage and imx6ul-14x14-evk.dtb 4. Test in linux console      root@imx6ulevk: ls /dev/ttymxc*                      //you can see ttymxc6 is in the list     root@imx6ulevk: echo hello > /dev/ttymxc6         root@imx6ulevk:

Most engineers should incorporate the following fundamental methodology when designing and bringing up a new board design: 1. Review the schematics and layout to ensure proper connectivity of all devices 2. Once the board returns from the manufacturer, measure and document all of the voltage rails of each IC on the board (especially the SoC and DRAM) 3. Ensure JTAG debugger connectivity (due to the complexity of systems today, every new board design should have some “hooks” to allow JTAG connectivity, even if these are simply test points) 4. Bring up and ensure proper DRAM functionality; it is imperative the first three steps are precisely accomplished – often times, DRAM instability or non functionality is due to improper connection (including not being connected to the voltage net) or poor layout. Once these four steps are completed, the board can then proceed to a more broad based checkout of other peripherals using some type of compiled test code executed from DRAM. More often than not, the end user’s board will differ from Freescale reference design boards either in how the DRAMs are connected or simply by using a different DRAM vendor.  As such, tools were created to aid in the development of DRAM initialization scripts.  The resulting script, though targeted for the RealView development system (aka include files), can be easily ported to another debugger’s command syntax or to assembly code for use in boot loaders.  These tools are Excel spread sheet based and include a “How To Use” tab, making the tool usage relatively self-explanatory.  Each tool is unique to a specific i.MX processor and to the DRAM technology used with each processor.  This attached files are tools available for the following i.MX SoCs:

  The mfgtool is the tool download the images to i.MX series of applications processors. It’s convenient and easy use to download the images to your board. About its introductions, work flow and use guide you can see details in the Document file of mfgtool. If customers use our reference boards, they can directly use the default mfgtools we supply for every version BSP and board. But when customers design board and do porting with our i.MX series processors. As they do many changes from our reference board, they need to rebuild the images for their board and for the download tool mfgtool. In the old version BSP, take the L3.0.35_4.1.0_130816 version as an example. When finishing porting the BSP for design board. Run the following command line to generate the manufacturing firmware. ./ltib --profile config/platform/imx/updater.profile --preconfig config/platform/imx/imx6q_updater.cf --continue –batch For android BSP Android4.2.2, one can use the follow command: make distclean make mx6dl_sabresd_mfg_config make In the newest BSP, for linux BSP in yocto use the command: $ bitbake fsl-image-mfgtool-initramfs For the newest android BSP, the command” make mx6dl_sabresd_mfg_config” can not use anymore. So how to get the \Profiles\Linux\OS Firmware\firmware\u-boot-imx6dlsabresd_sd.imx? The easiest way that you can use the u-boot you build for your board, and in the newest BSP, mfgtool can use the same u-boot with the normal u-boot for your board. You do not need to build the u-boot for mfgtool separately. They can use the same one. Hope this can do some help for you.

This doc show: on i.MX8QXP MEK board, configure ov5640 sensor(parallel interface) output 5MP(2592x1944) RAW(Bayer) data at 15fps, and Parallel Capture Subsystem and Image Sensor Interface capture RAW RGB data, and i.MX8QXP GPU debayer RAW data then display image. HW: i.MX8QXP MEK board, MEK base board (to place the parallel camera), ov5640 sensor. SW: Linux 4.14.98_2.0.0 BSP, and patches in this doc.   Configure at camera sensor side A Bayer filter is a color filter array (CFA) for arranging RGB color filters on a square grid of photosensors. The filter pattern is 50% green, 25% red and 25% blue, hence is also called BGGR, RGBG ,GRGB, or RGGB. The ov5640 has an image array capable of operating at up to 15 fps in 5 megapixel (2592x1944) resolution. OV5640 support output formats: RAW(Bayer), RGB565/555/444,CCIR656, YUV422/420, YCbCr422, and compression. To make ov5640 output 5MP RAW data at 15fps, check my kernel patch imx8-ov5640-raw-capture-driver-4.14.98_2.0.0.diff which apply on i.MX Linux 4.14.98_2.0.0 BSP kernel code. Parallel interface ov5640, use ov5640_raw_setting[] array of drivers/media/platform/imx8/ov5640_v3.c. This register setting is come from ov5640 software application note and data sheet. Configure at i.MX8QXP side The Parallel Capture Subsystem consists of the Parallel Capture Interface (BT 656) and associated peripherals. It interfaces to the Parallel CSI sensor. This allows for up to 24 RGB data bits in parallel or for RGB components on consecutive clocks (up to 10-bit color depth). The formats supported are RGB, RAW and YUV 422. Below is Parallel Capture Subsystem diagram: For RAW format data, CSI_CTRL_REG of Parallel Capture Subsystem need configured as my patch, otherwise found cannot get correct data.   The multiple input sources (MIPI CSI, Parallel Capture) captures the pixel data and feeds it to the ISI. The ISI is responsible for capturing and pre-processing the pixel data from multiple input sources and storing them into the memory. Below is ISI diagram: For RAW format data, it should be bypass any processing pipeline of ISI, just use ISI to save it to memory.   Capture test code To capture the RAW data and save it to file, check my patch imx8_ov5640_raw_captupre_test_4.14.98_2.0.0_ga.diff which apply on i.MX Linux 4.14.98_2.0.0 BSP unit test code. Note the usage is: ./imx8_cap.out -of -cam 1 -fr 15 -fmt BA81 -ow 2592 -oh 1944 -num 100   Display RAW data The RAW data cannot be displayed directly, debayer process is needed to get complete red, green, blue color for each pixel. The debayer process if run on CPU, will cost much CPU time. To save CPU time, debayer could done by GPU. The method is, captured RAW data upload to GPU as texture , then GPU will do the debayer, then full color of each pixel will be got, then display it. To upload RAW camera data to GPU with zero memory copy, i will use i.MX8QXP GPU extension GL_VIV_direct_texture. It create a texture with direct access support. API glTexDirectVIVMap,  which support mapping a user space memory or a physical address into the texture surface. The API glTexDirectVIVMap need logic and physical address of data buffer, so i will allocate data buffer from g2d lib, it is dma-buffer also get logic/physical address of buffer, then queue it as DMABUF to v4l2 capture driver, after dequeue got RAW camera data, pass it to GPU for debayer. GPU side, I will use OpenGL shader code from "Efficient, High-Quality Bayer Demosaic Filtering on GPUs". Check my patch imx8_debayer-gpusdk-5.3.0.diff which apply on i.MX GPU SDK 5.3.0 code. Note, here i only do is debayer, no extra process.   Known issue One thing is ov5640 output 5MP at 15fps, compare with output 5MP at 5fps, there are more noise of camera data at 15fps case. My debug found is, this noise seems come from ov5640 itself.   Reference: a>https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM b>https://www.nxp.com/webapp/Download?colCode=L4.14.98_2.0.0_MX8QXP&appType=license c>https://github.com/NXPmicro/gtec-demo-framework d>ov5640 data sheet e>ov5640 software application note f>Efficient, High-Quality Bayer Demosaic Filtering on GPUs https://www.semanticscholar.org/paper/Efficient%2C-High-Quality-Bayer-Demosaic-Filtering-on-McGuire/088a2f47b7ab99c78d41623bdfaf4acdb02358fb

This article explains how to get started with JTAG debugging of the Linux kernel running on the A55 of iMX93EVK. We will be using Lauterbach Trace32 to debug iMX93EVK. Here is a list of pre-requisites that is expected from the readers:- 1. Basic knowledge to get started on Trace32 - Please refer Learning and Training | Lauterbach TRACE32 2. You should have Linux source code and steps to build the kernel. 3. Trace32 Software with a license to debug A55 COMPONENTS   Hardware required: -   iMX93EVK running 6.6.52 BSP Lauterbach Power Debug E40 with a Debug cable Software required: - Trace32 Linux kernel source code   Linux Kernel Modifications Step 1:- In arch/arm64/configs/imx_v8_defconfig, please make sure that:- CONFIG_DEBUG_INFO_REDUCED=n CONFIG_DEBUG_INFO = y CONFIG_KALLSYMS=y   Step-2 :- Enabling JTAG debugging in Linux On iMX93EVK LPUART5 is MUX'd with the JTAG pins   so if we want to debug the linux kernel via JTAG, we will have to disable it. Go to the device tree source file - arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts Change the status of the following node to 'disabled'     Step 2:- Build the kernel. vmlinux will be created as part of this. This has the Linux kernel along with the debug symbols required for Trace32 debugging. Step-3 At this point either you can copy the linux-imx folder to your local windows machine where Trace32 is installed, or you can simply map the linux machine as a network drive so that the same folder '/opt/samba/nxg05261/linux-imx' is accessible on windows. The motive of this exercise is to use 'vmlinux' and the linux source files present in this folder from trace32 cmm scripts that we will be executing.   Step-4 Replace the newly built kernel 'Image' - arch/arm64/boot/Image with the one present in the boot partition of imx93evk. You can simply copy this Image to iMX93EVK via scp and copy it to the folder - /run/media/boot-mmcblk0p1 Note:- Please make sure that the kernel version that is running on the box and the one you have built should be the same otherwise there will be debug symbols mismatch After copying the Image, reboot iMX93EVK. Debugging with Trace32 Step-1 Configuring Uboot bootargs Cpu idle state interferes with the JTAG debugging by impacting the clocks so we need to disable the cpu idle power management. We do this by appending "cpuidle.off=1" to the bootargs:- a. Stop at Uboot prompt. b. Execute command - setenv mmcargs "setenv bootargs ${jh_clock} ${mcore_clk} console=${console} root=${mmcroot}  cpuidle.off=1" [do not omit the inverted commas in the command] Step-2 Boot to Linux prompt   Step-3 Connect the USB cable of Lauterbach Power Debug probe to your windows machine and Open t32 - C:\T32\bin\windows64\t32start.exe   Select 'PowerView Instance' and click on 'Start'. A window like below will appear: -   Step- 4 Extract MMU translation info for the debugger For this either you can execute the below commands on the T32 in sequence: -   RESet SYStem.RESet SYStem.CPU IMX93-CA55 SYStem.JtagClock 10MHz SYStem.CONFIG.DEBUGPORTTYPE JTAG SYStem.Option EnReset OFF CORE.ASSIGN 1. 2. SYStem.Option MMUSPACES ON SYStem.Option IMASKASM ON SYStem.Mode Attach Data.LOAD.Elf <path_of_vmlinux> /NoCODE DO ~~/demo/arm/kernel/linux/board/generic-template/detect_translation.cmm OR simply edit the attached cmm script - detect_address_translation.cmm and modify the <path_of_vmlinux> as per your file location. Then execute it like this:- Do <file_path>/detect_address_translation.cmm In my case, this command was: - Do C:\Users\nxg05261\Documents\cmm_scripts\detect_address_translation.cmm Note:- <path_of_vmlinux> in my case was  C:\T32\demo\arm\bootloader\uboot\vmlinux. You can modify it as per the location where you have copied 'vmlinux' -- After executing the above commands, debugger address translation will be displayed: -    Now we will copy the above highlighted lines and paste it in the final cmm script that we will use for debugging. For readers' convenience this info has been collated into the final script - 'linux_attach_t32.cmm', attached with this blog.   Disclaimer:- The lines that are highlighted depends on the kernel version and customer design decisions, so it is strongly advised to take the output of detect_translation.cmm for your system and then paste it in the cmm script, instead of using the exact output that I have shown in the above picture. File -> Open File -> linux_attach_t32.cmm -- Click on 'Do' button to execute the script till the end. -- Set a breakpoint at start_kernel b.s start_kernel /Onchip   [Optional]Check the breakpoint via 'b.l'   -- Hit 'go' at t32 to let the cores execute the instructions, you will see 'running' state   -- Enter 'reboot' at Linux prompt and stop at Uboot command line prompt you will see trace32 at 'system down' state: - -- Execute 'system.mode.attach' at t32 to attach to the system, you will again see 'running' state -- Execute 'break' to stop the running state -- Check if the breakpoint 'start_kernel' still exist via command 'b.l' -- If you see the breakpoint is still set, Execute 'go' at t32 to take the cores to the running state. -- Then, at Uboot prompt, execute 'boot' so that it may load the linux kernel to the memory.   As soon as you do that you would see that Uboot will try to load kernel. The last print you will see on the serial console will be: - "Starting kernel …' the execution will stop and at t32 you will see that the breakpoint is hit, meaning the Program Counter is at the address of the function 'start_kernel'   Note- The Warning that you might observe[like in the above picture] means that trace32 is not able to find the source file 'main.c'. So you will not be able to see the 'C' source code at this point. To resolve this:- -- Right click on the 'List.auto' window where you see the assembly code. Click on 'Resolve Path' and navigate to the init/main.c in your kernel source code folder and click Open. You would see that the source path translation is now correct and you're able to view the disassembly as well as the source code: -     Now we will load kernel symbols and apply 2 breakpoints in the linux kernel to demonstrate kernel debugging:-   -- Load the kernel symbols Data.LOAD "C:\T32\demo\arm\bootloader\uboot\vmlinux"  H:0x0::0x0 /NoCODE /SOURCEPATH Z:\linux-imx   -- Apply breakpoints at t32 window b imx_rpmsg_init b imx_drm_bind   [Optionally] you can verify the breakpoints via 'b.l' These breakpoints are temporary as you can see in the above snapshot. That means after they are hit, they will be removed, so to make them permanent:- Right click the breakpoint -> Change -> Uncheck Temporary -> Click Ok like depicted in the following snapshots: -       Now, to reach the next breakpoint, execute 'go' on the t32 At this point linux kernel execution has reached the function imx_rpmsg_init   Again, to reach the next breakpoint, execute 'go'   So this is how you start debugging the linux kernel. Apart from this, there is a nice t32 feature called 'linux awareness' which allows you to easily debug the kernel loadable modules, user space applications amongst other things. To explore 'linux awareness', you can go about checking the 'Linux' drop down menu present at the top. Plenty of support documents are available on the web.       Feel free to drop in the comments section or DM if you have any queries. Happy debugging!!🙂🙂🙂🙂  

This sharing introduces how to porting the deepseek to the #i.MX8MP i.MX93EVK  with the Yocto BSP by llama.cpp The main test model used in this document is the Qwen model that is distilled and quantized based on the deepseek model. For other versions of the deepseek model, you can refer to the steps in the document to download different models for testing. 1. Set up the demo ON PC a. Prepare the cross-compiling. See the i.MX Yocto Project User's Guide for detailed information how to generate Yocto SDK environment for cross-compiling. Get the User's Guide. To activate this Yocto SDK environment on your host machine, use this command:   :$ source <Yocto_SDK_install_folder>/environment-setup-cortexa53-crypto-poky-linux   b. Cross-compile the llama.cpp eg: i.MX93   :$ git clone https://github.com/ggerganov/llama.cpp :$ mkdir build_93 :$ cd build_93 :build_93$ cmake .. -DCMAKE_SYSTEM_NAME=Linux -DCMAKE_SYSTEM_PROCESSOR=aarch64 -DCMAKE_C_COMPILER=aarch64-poky-linux-gcc -DCMAKE_CXX_COMPILER=aarch64-poky-linux-g++ :build_93$ make -j8 :build_93$ scp bin/llama-cli root@<your i.MX93 board IP>:~/ :build_93$ scp bin/*.so root@<your i.MX93 board IP>:/usr/lib/   c. Get the DeepSeek model on the huggingface eg: Dowload the DeepSeek-R1-Distill-Qwen-1.5B-Q4_K_M.gguf model Download the required Deepseek model in the huggingface. ON Board a.Test the Deepseek on the i.MX93 board   :~/# ./llama-cli --model DeepSeek-R1-Distill-Qwen-1.5B-Q4_K_M.gguf     b. Results shown below:   2. Results Analysis The effects of different models on different boards were tested. It should be noted that the biggest obstacle limiting the running of the model on the board is memory.The test results including CPU and memory usage are as follows: a. i.MX8mp + DeepSeek-R1-Distill-Qwen-7B-IQ4_XS b. i.MX93 + DeepSeek-R1-Distill-Qwen-1.5B-Q4_K_M   After testing, the speed at which i.MX8MP runs DeepSeek-R1-Distill-Qwen-7B-IQ4_XS to generate tokens is about 1 token per second. The speed at which i.MX93 runs DeepSeek-R1-Distill-Qwen-1.5B-Q4_K_M to generate tokens is about 1.6 token per second.  The above test results for the generation speed are only rough test results and are for reference only. The above icons show the CPU and memory usage of i.MX during the DeepSeek model running. It should be pointed out that the CPU efficiency affects the speed of model token generation. The memory size of the board limits whether the model can run in the corresponding development board. This is a balance between running speed and required memory size. Higher accuracy, such as using a 7B model, will result in a decrease in running speed.

The user interface has limited the use of the tool GUI Guider. Getting an interaction only through a mouse or touchscreen can be enough for some use cases. However, sometimes the use case requires to go beyond its limitations. This video/appnote explores the possibility of integrating voice by creating a bridge between a speech recognition technology, such as VIT, and the interface creator GUI Guider. It uses a universal way to link all the voice recognition commands and a wakeword to any interaction created by GUI Guider. The following video shows the steps necessary to create that connection by creating the voice recognition using VIT voice commands and wakewords, create an interface of GUI Guider using a template, how to connect between them using the board i.MX 93 evk and testing it. For more information consult the following links AppNote HTML: https://docs.nxp.com/bundle/AN14270/page/topics/abstract.html?_gl=1*1glzg9k*_ga*NDczMzk4MDYuMTcxNjkyMDI0OA..*_ga_WM5LE0KMSH*MTcxNjkyMDI0OC4xLjEuMTcxNjkyMDcyMy4wLjAuMA AppNote PDF: https://www.nxp.com/docs/en/application-note/AN14270.pdf Associated File: AN14270SW  

Why SWPDM? i.MX8MMINI, i.MX8MNANO and IMX8MPLUS  In order to process human voice, it is required to have the best audio resolution in the incoming data captured by the microphones. This mean, having a resolution of 16bits is not enough to capture all the information to properly process the voice. Voice processing requires a peripheral capable of capture data on a 32bits resolution within the range of the most common sample rates (16kHz, 44.1kHz, 48Khz, etc.). On the i.MX8M family there is a peripheral which fulfill those requirements and is called MICFIL. MICFIL is a peripheral which convert PDM (Pulse Density Modulation) data to PCM (Pulse-Code Modulation) data. The PDM format encode the analog signal in just one bit. Where 1 means the signal is increasing in amplitude while 0 means the opposite. In the other hand, the PCM format encode the data in 8, 16, or 32 bits. The advantage of PDM is that the creation of microphones is cheaper than having PCM microphones but then you will need a software or hardware which do the conversion for PDM to PCM since PDM cannot be processed. This is the reason of the MICFIL peripheral. However, not all the MICFIL's on the difference SOMs are the same. While the i.MX8MPLUS has a resolution of 32bits its smaller brothers do not. i.MX8MMINI and i.MX8MNANO have a MICFIL which only allows a resolution up to 16bits. For most of the cases it will be enough but not for voice processing. Nevertheless, not everything is lost; As mentioned previously, the PDM to PCM conversation can be done by hardware or by software. NXP also have the algorithm in software to do the conversation. Therefore, if a Mini or Nano is being used for voice processing it is fully recommended to use the ALSA SWPDM Plugin and avoid MICFIL peripheral.   Using the Plugin   In order to use the plugin, it is required to change the DTB to  imx8mm-evk-8mic-swpdm.dtb , when using the i.MX8MM or  imx8mn-evk-8mic-swpdm.dtb , when using the i.MX8MN. In order to do so follow the next steps: Please notice below example if for Mini. For Nano will be the same just changing the DTB name to imx8mn-evk-8mic-swpdm.dtb. # Stop at U-boot u-boot=> edit fdtfile edit: imx8mm-evk-8mic-swpmd.dtb u-boot=> saveenv u-boot=> boot   The change in the DTB is required to disable MICFIL so Linux can receive the raw data and sent it to the plugin. However, the plugin is not enabled by default, users need to explicit add the plugin to their ALSA pipeline. The way of doing so is by adding the following device to  /etc/asound.conf : pcm.cic { type cicFilter slave "hw:imxswpdmaudio,0" delay 100000 gain 0 OSR 48 }   Where: pcm.cic : Is an arbitrary name which allow ALSA to find the requested devices when setting the  -D  flag with  arecord  or  aplay . type cicFilter : This is the plugin type which is named with the algorithm name. slave: Name of the physical or virtual device which will be controlled by the cicFilter plugin. The recommendation is to always have the actual hardware connected to this plugin. delay : Amount of time in microsecond which the plugin won't write to the buffer, but it still does the conversion. The value could be between 100us to 1'000,000us. By removing the property from the structure, the delay will be set to 0. gain : A value between 0 and 100. OSR : Is related to the quality of the signal by increasing the PDM sample rate. With a higher valuer a best quality on the audio can be achieved. However, keep in mind than having a higher value will also require more memory to store all the new data due to the oversampling. The valid values for the OSR are: 48, 64, 96, 128, and 192. With all being said, the only thing left is to test the plugin by running the following command: $ arecord -D cic -c4 -r16000 -f s32_le --period-size=96 -d5 -v test.wav   Data Flow   When using PDM Microphones the default data flows is as shown in figure 1. Where the data is capture in the MICFIL peripheral and when it get to the Sound Drivers the data is already converted to PCM, so from the Kernel perspective the data is treaty as PCM values and the conversion from PDM to PCM is done under the hardware. However, with the changes we made earlier on the device tree and adding the plugin on /etc/asound.conf the data flows is as follow: Where the conversion from PDM to PCM is done just before giving the buffer to the application layer; Thus, conversion is made on User Space and the kernel is aware data have a PDM format. Another difference you can see is that MICFIL is disable and instead the datalines are controlled by SAI5. This is true for i.MX8MM, i.MX8MN, and i.MX8MP. Although for the application is a transparent change the truth is that the entire pipeline change, so please be aware of how the data is flowing to your application.   Integration With AFE   The next and final step is integrating the plugin with AFE and VoiceSeeker. The integration of SWPDM requires to apply a patch to the SWPDM repository. The patch changes the amount of period sizes allowed on the plugin. By default, the plugin only allows certain values which are:  48 Samples = 3ch x 4bytes format x 16samples = 192 bytes. 48 Samples = 2ch x 4bytes format x 48samples = 384 bytes. 48 Samples = 4ch x 4bytes format x 48samples = 768 bytes. 96 Samples = 4ch x 4bytes format x 96samples = 1,536 bytes. Although, AFE and VoiceSeeker are extremely configurable, 48 or 96 samples for the algorithm is too small. Meaning that the SWPDM should support a bigger period size, not all the way around. By applying the attached file, the plugin can have a period size from 64 bytes (1ch and 16 samples) up to 16,384 bytes (4ch and 1024 samples). However, the number of samples can vary depending on the OSR value and the number of channels. Once the patch has been applied in must be installed on: /usr/lib/alsa-lib (if the repository is being built on a standalone environment). AFE opens a device called mic  for capture the microphones' input. This device can have anything below it. By default, have the following definition on /etc/asound.conf  (after following the steps described on the TODO.md file). # mic represents the physical source (capture) pcm.mic { type plug slave.pcm "hw:micfilaudio,0" }   The devices opens the MICFIL driver, but on this case MICFIL is disable, which means the definition of the device must change. From above cic  device the definition can be copy and paste and then tweak one parameter. The delay must be set to 0 by removing the property or setting it explicitly on the structure. If this step if forgotten this might cause some underrun issues. The device definition will be: pcm.mic { type cicFilter slave "hw:imxswpdmaudio,0" delay 0 gain 0 OSR 48 }   The last thing to do will be running AFE with VoiceSeeker as usual. $ /unit_tests/nxp-afe/voice_ui_app & $ /unit_tests/nxp-afe/afe libvoiceseekerlight &   Considerations and Restrictions With all that said, there are few things left to mention, which are the considerations and restrictions on the plugin itself. These are good things to know before adding the plugin into any application. The plugin is supported from the Linux BSP 5.15.32. Currently the plugin only supports up to 4 channels. Plugin only outputs a S32_LE format (if required another format please use MICFIL). By applying above patch, the period size must be a multiple of 16, due to a limitation on the algorithm itself, rather than the plugin. The driver only allows to have one mic per data-line while MICFIL allows to have two microphones per data-line. The SWPDM Plugin is based on the External Plugin: I/O Plugin. This means it also have the restriction of this ALSA plugin, being the following restriction the most important one: "The I/O-type plugin is a PCM plugin to work as the input or output terminal point, i.e. as a user-space PCM driver". In other words, there can't be any device/plugin on top of it, not even a "plug" type. 

Note: This guide is specifically for use with Segger software. For steps to use with the MCUXpresso extension for VSCode please refer to How to Use Segger J-Link Plus with i.MX 8M Process... - NXP Community This guide aims to be a technical reference to start using the SEGGER J-Link Plus debug probe on the i.MX 8M Family processors. The board used for this guide specifically is the i.MX 8M Nano EVK, but it also applies to all processors of the i.MX 8M Family. Here we will describe the process using the following structure: Hardware requirements Software requirements How to find, build, and download the i.MX SDK Host setup Build an example application Target setup Run an example application Hardware requirements Evaluation Kit for the i.MX8M Nano Applications Processor (i.MX 8M Nano Evaluation Kit | NXP Semiconductors) Quick Start Guide for i.MX8M Nano (I.MX 8M Nano EVK Quick Start Guide (nxp.com)) J-Link Plus JTAG/SWD debug probe with USB interface (SEGGER J-Link PLUS) Features Download speed up to 1MB/s Unlimited breakpoints in flash memory Supports direct download into RAM and flash memory Supported NXP Devices Supported Devices - Search results "nxp" (segger.com) 9 Pin Cortex-M Adapter (9-Pin Cortex-M Adapter (segger.com)) Description Adapts from the 20-pin 0.1'' JTAG connector to a 9-pin 0.05'' Samtec FTSH connector as defined by Arm. Software requirements Windows 10 OS (host) J-Link Software and Documentation Pack for Windows (https://www.segger.com/products/debug-probes/j-link/models/j-link-plus/) i.MX 8M Nano SDK (Welcome | MCUXpresso SDK Builder (nxp.com)) MinGW CMake GNU ARM Embedded Toolchain Terminal Emulator for serial port connection (Tera Term, PuTTY, etc.)   How to find, build, and download the i.MX 8M Nano SDK Enter Welcome | MCUXpresso SDK Builder (nxp.com) Click on "Select Development Board"  Select EVK-MIMX8MN (MIMX8MN6xxxJZ) from Boards -> i.MX -> EVK-MIMX8MN Click on the Build MCUXpresso SDK button Click on Download SDK, you'll be redirected to the MCUXpresso SDK Dashboard Look for the i.MX 8M Nano SDK and click on Download SDK Click on Download SDK archive and documentation, accept the Software Terms and Conditions and the .zip file for the SDK will be downloaded.   Host Setup J-Link Software and Documentation Pack for Windows Download J-Link Software and Documentation Pack for Windows (https://www.segger.com/products/debug-probes/j-link/models/j-link-plus/) Execute .exe file downloaded and then click on "Next" Follow the installation wizard with default parameters and click on "Finish".   MinGW Download the MinGW installer from MinGW - Minimalist GNU for Windows - Browse /Installer at SourceForge.net. Follow the installer instructions leaving all options in their default values. Click on Continue when the installer finishes. A MinGW Installation Manager window will pop up, select mingw32-base and msys-base from basic setup. Click on the Installation menu and select Apply Changes. On the next window, click on Apply and wait for the package to finish downloading. Add the appropriate item to the Windows operating system path environment variable. It can be found under Control Panel->System and Security->System->Advanced System Settings in the Environment Variables... section. The path is: \bin. Assuming the default installation path, "C:\MinGW". If the path is not set correctly, the toolchain does not work. Note: If you have C:\MinGW\msys\x.x\bin in your PATH variable (as required by KSDK 1.0.0), remove it to ensure that the new GCC build system works correctly.   CMake Download CMake Windows x64 Installer from  Download CMake. Scroll down to find the latest release for the installer: Run the installer and follow the instructions. Make sure to check the Add CMake to system PATH for all users option during the installation process. Restart your PC to apply changes. GNU ARM Embedded Toolchain Download the GNU ARM Embedded Toolchain installer from Downloads | GNU Arm Embedded Toolchain Downloads – Arm Developer, scroll down to find the latest release for the installer: Follow the installer instructions and check the Add to PATH option at the end of the process. Add a new system environment variable named ARMGCC_DIR with the GNU ARM embedded Toolchain installation path as its value ARMGCC_DIR=ARMGCC_DIR=C:\Program Files (x86)\GNU Arm Embedded Toolchain\10 2021.10​   Build and example application Press the Windows Key and search for GCC Command Prompt and run it. Change the directory to the example application project directory (inside the armgcc folder), for example: C:\Users/<user>\Documents\8MNANO\boards\evkmimx8mn\demo_apps\hello_world\armgcc Type build_debug.bat on the command line or double click the build_debug.bat file (inside the armgcc folder of the application project) through Windows Explorer Wait for the building process to end and make sure no error messages are shown. Target Setup Connect the debug cable (USB-UART) to the board and the other end to your PC. Connect the power cable to the second USB-C port and to a wall socket. Don't turn on the board yet. Connect the JLink Plus to your PC with the USB cable. Connect the JLink Plus to the JTAG of the i.MX 8M Nano EVK board In this part we will need to identify pin number 1 from the 9 Pin Cortex-M adapter and from the i.MX 8M Nano EVK board. For the first one identify pin 7 identifiable by a "Non-connect pin". For the i.MX 8M Nano, you can identify easily with a number 1 in one corner of the connectors.    The whole setup should look similar to this: Run an example application Open a terminal application (TeraTerm, PuTTY, etc.) on your host PC and set it to the serial debug port with the lowest numbered port with the following settings: Speed: 115200 Data: 8-bit Parity: none Stop bits: 1 bit Flow Control: none Start SEGGER J-Link GDB Server. On section “Target Device” select MIMX8MN6_M7 and click “OK”. You will see the following window. Open a new instance of GCC Command Prompt. Change to the directory with the example previously compiled. Here is the path to folder that contains the files: <install_dir>/boards/<boad_name>/<example_type>/<application_name>/armgcc/debug​ Run the command: arm-none-eabi-gdb.exe <application_name>.elf.​ Example: At this point you are in the GDB Command Prompt, run the following commands: target remote localhost:2331 monitor reset monitor halt load monitor go The application will be now running and you can see the “hello world” on your terminal (PuTTY,Tera Term, etc.).  

What is a device tree? The device tree is a data structure that is passed to the Linux kernel to describe the physical devices in a system. Before device trees came into use, the bootloader (for example, U-Boot) had to tell the kernel what machine type it was booting. Moreover, it had to pass other information such as memory size and location, kernel command line, etc. Sometimes, the device tree is confused with the Linux Kernel configuration, but the device tree specifies what devices are available and how they are accessed, not whether the hardware is used. The device tree is a structure composed of nodes and properties: Nodes: The node name is a label used to identify the node. Properties: A node may contain multiple properties arranged with a name and a value. Phandle: Property in one node that contains a pointer to another node. Aliases: The aliases node is an index of other nodes. A device tree is defined in a human-readable device tree syntax text file such as .dts or .dtsi. The machine has one or several .dts files that correspond to different hardware configurations. With these .dts files we can compile them into a device tree binary (.dtb) blobs that can either be attached to the kernel binary (for legacy compatibility) or, as is more commonly done, passed to the kernel by a bootloader like U-Boot. What is Devshell? The Devshell is a terminal shell that runs in the same context as the BitBake task engine. It is possible to run Devshell directly or it may spawn automatically. The advantage of this tool is that is automatically included when you configure and build a platform project so, you can start using it by installing the packages and following the setup of i.MX Yocto Project User's Guide on section 3 “Host Setup”. Steps: Now, let’s see how to compile your device tree files of i.MX devices using Devshell. On host machine. Modify or make your device tree on the next path: - 64 bits. ~/imx-yocto-bsp/<build directory>/tmp/work-shared/<machine>/kernel-source/arch/arm64/boot/dts/freescale - 32 bits. ~/imx-yocto-bsp/<build directory>/tmp/work-shared/<machine>/kernel-source/arch/arm/boot/dts To compile, it is needed to prepare the environment as is mentioned on i.MX Yocto Project User's Guide on section 5.1 “Build Configurations”. $ cd ~/imx-yocto-bsp $ DISTRO=fsl-imx-xwayland MACHINE=<machine> source imx-setup-release.sh -b <build directory> $ bitbake -c devshell virtual/kernel (it will open a new window) On Devshell window. $ make dtbs (after finished, close the Devshell window) On host machine. $ bitbake -c compile -f virtual/kernel $ bitbake -c deploy -f virtual/kernel This process will compile all the device tree files linked to the machine declared on setup environment and your device tree files will be deployed on the next path: ~/imx-yocto-bsp/<build directory>/tmp/deploy/images/<machine> I hope this article will be helpful. Best regards. Jorge.

  Introduction   Prior to 6.1.22_2.0.0 BSP release, Bluetooth interface are based on the tty line discipline framework, so we need to use hciattach tool to enable it in the user space. From 6.1.22_2.0.0 BSP, the nxp bluetooth driver no longer needs the help of the userspace hciattach tool, and the tty port bound by bluetooth also won't be exported to the user space, so you cannot find the corresponding tty device anymore. So, you won't see the (/dev/ttymxcX), for the Bluetooth interface. All jobs has been done in the new NXP Bluetooth driver. New Method   The new NXP Bluetooth UART Driver is based on a server driver for the NXP BT serial protocol, which can enable the built-in Bluetooth device inside an NXP BT chip. This driver has a Power Save feature that will put the chip into a sleep state whenever there is no activity for 2000ms and will be woken up when any activity is to be initiated over UART.  Device Tree support The new BT framework requires adding a "bluetooth" sub node with a device compatibility string to the attached UART node in the dts file &uart1 { bluetooth { compatibility = "nxp,88w8987-bt"; fw-init-baudrate = <3000000>; #Optional. Default is considered 115200 if this parameter not defined. }; };   Note: The parameter ‘compatibility = “nxp,88w8987-bt”’ will use for 88W8987, IW416, 88Q9098, IW612 chipsets and need to change for 88W8997 with parameter ‘compatibility = “nxp,88w8997-bt”’.   Note: ’fw-init-baudrate’ parameter depends on the module vendor. The Murata and Azuere wifi modules support in BSP release uses the default value -- 115200. We strongly recommend looking at the module vendor-specific baud rate parameter. Note: For the old 88Q9098 Murata 1XL module that uses the 3Mbps by default, please add the fw-init-baudrate = <3000000> property in dts files to make it work. Enable Guide   Use wifi interface to load combo (wifi & bt) firmware and enable BT Need to load wifi driver first, then load the BT driver, otherwise, BT driver suspend/resume test will fail. This is a HW limitation, since NXP wifi and BT module use the same power control pin(W_DISABLE1#), if we don't load the wifi driver, SDIO bus will power down the wifi chip during suspend resume, which may cause the BT chip also been powered down and cannot work after resume back. So we need to load the wifi driver to make sure SDIO bus won't power down the BT chip to make sure BT functions can work during suspend resume. modprobe moal mod_para=nxp/wifi_mod_para.conf modprobe btnxpuart or insmod mlan.ko insmod moal.ko mod_para=nxp/wifi_mod_para.conf insmod btnxpuart   Unload UART Driver modprobe moal Make sure run hciconfig hci0 up or hciconfig hci0 reset or bluetootctl power on before unload btnxpuart driver. If we don't open hci0 interface, the driver cannot send change to 115200 baud rate command to BT chip, which causes the host and BT chip baud rate mismatch, the host still uses 115200bps talk to the BT chip which now use 3Mbps, it cannot work anymore. So we need to make sure open the hci0 interface before unload btnxpuart driver.   mod_para=nxp/wifi_mod_para.conf modprobe btnxpuart sleep 3 hciconfig hci0 up #Note: Need to up hci interface before unload the BT module hcitool -i hci0 cmd 3F 23 02 00 00 modprobe -r btnxpuart modprobe -r moal sleep 3​ For better reference: Please find the I.MX 8MQ Linux getting started user guide, UM11483, Chapter "7.1 Bring-up using NXP Bluetooth UART driver"  Bluetooth Deep Sleep Feature App Note AN13920, Chapter 6 Load NXP UART driver module NOTE: Please do not run the power save feature for Murata IW612 2EL Module Regards, Mario

current bsp fixed the lvds pixel clock up to 74.25Mhz for single channel and 148.5Mhz for dual channel, if customer wants to know why and how to change it, maybe can refer to the enclosed file, hope helpful for you

Since LF_v5.10.52-2.1.0 crypto_af_alg blackkey demo “caam-decrypt” becomes default in release. You can try it with binary demo release image. The demo is using black key to decrypt data. This document goes more detail based on BSP release document i.MX Linux® User's Guide, Rev. LF5.10.52_2.1.0, 15 October 2021 10.6 crypto_af_alg application support   HW: i.MX8MM EVK SW: LF_v5.10.52-2.1.0_images_IMX8MMEVK binary demo image PC side: 1. generate key and iv by openssl echo 12345 | openssl enc -aes-256-cbc -k - -P -md sha1 -pbkdf2 salt=1982686A7BACEE4D key=D84041EC14BB28543E8545BEB094FE643B5BC1345C31CD576BC708A1559FBD2D iv =F950CACE80F76F0AC00D9C8762B3A5C9 2. encrption by openssl echo "For test caam-decrypt" | openssl enc -e -aes-256-cbc -in - -out test.txt.enc -K D84041EC14BB28543E8545BEB094FE643B5BC1345C31CD576BC708A1559FBD2D -iv F950CACE80F76F0AC00D9C8762B3A5C9 3. decryption by openssl openssl enc -d -aes-256-cbc -in test.txt.enc -out - -K D84041EC14BB28543E8545BEB094FE643B5BC1345C31CD576BC708A1559FBD2D -iv F950CACE80F76F0AC00D9C8762B3A5C9 4. convert key and iv to plian txt for caam-decrypt. echo F950CACE80F76F0AC00D9C8762B3A5C9| xxd -r -p > fromopenssl.iv.txt echo D84041EC14BB28543E8545BEB094FE643B5BC1345C31CD576BC708A1559FBD2D| xxd -r -p > fromopenssl.key.txt 5. prepare data for caam-decrypt cat fromopenssl.iv.txt test.txt.enc > data.caam-decrypt.enc note: the format for with blackkey AES Encrypted file format 16 Octets - Initialization Vector (IV) is an input to encryption algorithm. nn Octets - Encrypted message (for AES-256-CBC, it must be multiple of 16) 6. send fromopenssl.key.txt and data.caam-decrypt.enc to the board on i.MX8MM evk board 1. generate blackkey blob caam-keygen create blackkey ecb -t $(cat fromopenssl.key.txt) 2. delete fromopenssl.key.txt 3. test decryption by caam-decrypt with blackkey caam-decrypt /data/caam/blackkey.bb AES-256-CBC data.caam-decrypt.enc data.caam-decrypt.dec root@imx8mmevk:/# cat data.caam-decrypt.dec For test caam-decrypt  

Here is the docment about arm64 kernel booting process, which is helpful for us to port kernel. It include the bootloader protocol, virtual memory layout, dtb, memory init, irq init, timer init and so on, please take the attachment for details. vmlinux ELF vmlinux.lds.S head.S __create_page_tables __cpu_setup __primary_switch init_task IRQ Vectors Start_kernel setup_arch paging_init bootmem_init psci_dt_init mm_init sched_init init_IRQ time_init rest_init You can refer the diagram show as below:  

1 - Introduction: The Ultra Secured Digital Host Controller (uSDHC) provides the interface between the host processor and the SD/SDIO/MMC cards. Most recent versions provides the ability to automatically select a quantized delay (in fractions of the clock period) regardless of on-chip variations such as process, voltage, and temperature (PVT). The auto tuning is performed during runtime at hardware level, no software enablement is needed to drive this feature. 2 - Failure description: SDIO cards can implement an optional feature that uses DATA[1] to signal the card's interrupt to the i.MX device, this feature can be enabled by the SDIO card device and does not depends on i.MX uSDHC driver configuration. NXP Linux BSP is enabling the auto tuning for high SDIO frequencies (SDR104 and SDR50). Out of reset uSDHC_VEND_SPEC2 register is configured to use DATA[3:0] for calibration, this setup can conflict with the SDIO interrupt as DATA[1] signal can be asserted asynchronously. SDIO failures can be observed when running SDIO applications that requires high usage of the SDIO interface (e.g Download of large files), SDIO controller cannot return an accurate DLL causing failures such as "CMD53 read error". Failure can be observed on i.MX8MM EVK and i.MX8MN EVK boards, both devices are running 88w8987 Wi-Fi chipset at 208Mhz (SDR104). Users can observe an SDIO crash followed by error message below at Linux Kernel level. [ 401.945627] cmd53 read error=-84 [ 401.974677] moal_read_data_sync: read registers failed 3 - Impacted devices: The following devices are impacted by this limitation. - i.MX6 Family:   i.MX6SL, i.MX6SLL, i.MX6SX, i.MX6UL, i.MX6ULZ and i.MX6ULL. - All i.MX7 and i.MX7ULP family:   i.MX7D, i.MX7S and i.MX7ULP. - All i.MX8M Family:   i.MX8MQuad, i.MX8M Mini, i.MX8M Nano, i.MX8M Nano UL and i.MX8M Plus. - All i.MX8/8X Family:   i.MX8DQXP, i.MX8DX and i.MX8QM. NXP Linux BSP is enabling the auto tuning for SDR104 and SDR50 modes. Other operation modes are not impacted by this limitation. Users can poll uSDHCx_CLK_TUNE_CTRL_STATUS register when running SDIO applications to confirm. TAP_SEL_PRE field is updated automatically during run time and constant variations can point to an incorrect delay cell calculated by the uSDHC controller.   All NXP Wi-Fi chipsets are enabling SDIO interrupt during firmware load, failures can be observed with any Wi-Fi vendor enabling SDIO asynchronous interrupt. 4 - Software changes: Recommendation is to enable auto tuning for DATA[0] and CMD signals only, DATA[1] should not be used for auto calibration to avoid a possible conflict with SDIO interrupt. This setup can only be used if SDIO interface length are well matched. Software patches can be found at codeaurora.org. Fix is already included in L5.10.52-2.1.0 BSP, users can add fsl,sdio-interrupt-enabled property to uSDHC device tree node to enable SW workaround. https://github.com/nxp-imx/linux-imx/commit/3b3d6dec05277f7786d813592a31ea4a1ce60a74 https://github.com/nxp-imx/linux-imx/commit/b9b5a43df1d709809b2b654ad8f8181b00a4ee55 https://github.com/nxp-imx/linux-imx/commit/95a846af9f82dc6ea60064d9d12d5d2378e23941      

Purpose This is early communication to notify i.MX 8M Dual/8M QuadLite/8M Quad customers of a potential incorrect PCIe power supply configuration on certain NXP BSP Linux and Android versions. Description The PCIE_VPH power supply is selectable in software  between 1.8V and 3.3V. When the PCIE_VPH supply is configured to operate at 3.3V, the 1.8V internal regulator (disabled by default) must be enabled to prevent overstress conditions on the PCIe PHY. If the 1.8V internal regulator is left disabled when the PCIE_VPH supply is configured to operate at 3.3V, it could potentially impact the product lifetime of the device.   Impact •i.MX 8M Dual/8M QuadLite/8M Quad (other i.MX processors are not impacted) •Only Impacts Linux/Android kernel versions earlier than L5.4.70_2.3.2 or Linux 5.10.9_1.0.0 releases MITIGATION •When the PCIE_VPH supply is configured to operate at 3.3V users need to enable the internal regulator by setting the IOMUXC_GPR_GPR14 and IOMUXC_GPR_GPR16 registers - PCIE1_VREG_BYPASS and PCIE2_VREG_BYPASS bit to 0. •There are 3 software patches for each release. Software patch details in the Code Aurora Forum (CAF): •For L5.4.70_2.3.2 patch release, the git log references are: •MLK-25349-3 PCI: imx: clear vreg bypass when pcie vph voltage is 3v3 •MLK-25349-2 arm64: dts: imx8mq-evk: add one regulator used to power up pcie phy •MLK-25349-1 dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy • •The L5.4.70_2.3.2, LF_5.10 Q2 and later BSP releases correctly configure and enable the internal regulator by setting the IOMUXC_GPR_GPR14 and IOMUXC_GPR_GPR16 registers The Patch MLK-25349 which correctly enables the internal regulator is already included in the L5.4.70_2.3.2 patch release and release versions after it. MITIGATION •The following branches of Linux/Android BSP releases contain the MLK-25349 patch. The patch is attached below for each respective release.   •Other branches which are not listed should try to apply the nearest Patch version patch. If a user encounters any conflicts in applying, they should back porting from below nearest patch release version below. imx_4.9.51_ga, imx_4.9.y_android_imx8m_ga_v2                           - Patch attached  imx_4.9.88_ga, imx_4.9.y_android_2.0.0_ga                                   - Patch attached  imx_4.14.y and imx_4.14.98_2.3.0, imx_4.14.98_2.3.0_android     - Patch attached  imx_4.19.y and imx_4.19.35_1.1.0, imx_4.19.35_1.1.0_android     - Patch attached  imx_5.4.y, imx_5.4.3_2.0.0, imx_5.4.3_2.0.0_android                     - Patch attached Documentation Change Description – 1 of 3 for Datasheet Updated Datasheets and Reference Manual will be published to nxp.com. Updated Hardware Design guide and Schematics have already been published on nxp.com.  Updated the descriptions of PCIE_VPH in the Datasheet Table 8, "Operating ranges"     Documentation Change Description – 2 of 3 for Reference Manual (RM) Updated the description of field 12 "PCIE1_VREG_BYPASS" in 8.2.4.15 GPR14 General Purpose Register (IOMUXC_GPR_GPR14)           Documentation Change Description – 3 of 3 for RM Updated the description of field 12 "PCIE2_VREG_BYPASS" in 8.2.4.17 GPR16 General Purpose Register (IOMUXC_GPR_GPR16)   REFERENCES •i.MX 8M Dual / 8M QuadLite / 8M Quad Product Lifetime Usage  •i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products •i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Consumer Products •i.MX 8MDQLQ Hardware Developer’s Guide  •i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual  

Environment: openjdk-8 with L5.4.24-2.1.0 and GCC-9 1. Clone meta-java with dedicated branch name: git clone git://git.yoctoproject.org/meta-java -b zeus 2. Update .bb file for compile error in meta-java: diff --git a/recipes-core/icedtea/icedtea7-native.inc b/recipes-core/icedtea/icedtea7-native.inc index 8d0dc71..153a604 100644 --- a/recipes-core/icedtea/icedtea7-native.inc +++ b/recipes-core/icedtea/icedtea7-native.inc @@ -26,7 +26,7 @@ CXXFLAGS_append = " -fno-tree-dse" CXX_append = " -std=gnu++98" # WORKAROUND: ignore errors from new compilers -CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type" +CFLAGS_append = " -Wno-error=stringop-overflow -Wno-error=return-type -Wno-error=format-overflow" inherit native java autotools pkgconfig inherit openjdk-build-helper 3. Add meta-java layer into bblayers.conf: BBLAYERS += "${BSPDIR}/sources/meta-java" 4. Edit the conf/local.conf to add openjdk variables # Possible provider: cacao-initial-native and jamvm-initial-native PREFERRED_PROVIDER_virtual/java-initial-native = "cacao-initial-native" # Possible provider: cacao-native and jamvm-native PREFERRED_PROVIDER_virtual/java-native = "jamvm-native" # Optional since there is only one provider for now PREFERRED_PROVIDER_virtual/javac-native = "ecj-bootstrap-native" PREFERRED_PROVIDER_java2-runtime = " openjdk-7-jre" IMAGE_INSTALL_append = " openjdk-7-jdk " diff --git a/recipes-core/openjdk/openjdk-8-common.inc b/recipes-core/openjdk/openjdk-8-common.inc index d8b30b8..ed03d60 100644 --- a/recipes-core/openjdk/openjdk-8-common.inc +++ b/recipes-core/openjdk/openjdk-8-common.inc @@ -181,5 +181,5 @@ FLAGS_GCC9 = "-fno-lifetime-dse -fno-delete-null-pointer-checks" BUILD_CFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" BUILD_CXXFLAGS_append = " ${@openjdk_build_helper_get_build_cflags(d)}" # flags for -cross -TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" +TARGET_CFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)} -Wno-error=format-overflow" TARGET_CXXFLAGS_append = " ${@openjdk_build_helper_get_target_cflags(d)}" diff --git a/recipes-core/openjdk/openjdk-8-native.inc b/recipes-core/openjdk/openjdk-8-native.inc index 321a43d..97ff03f 100644 5. Switch the host GCC to gcc-8 and g++-8: sudo apt-get install gcc-8 g++-8 sudo update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-8 --slave /usr/bin/g++ g++ /usr/bin/g++-8 --slave /usr/bin/gcov gcov /usr/bin/gcov-8 --slave /usr/bin/gcov-tool gcov-tool /usr/bin/gcov-tool-8 --slave /usr/bin/gcc-ar gcc-ar /usr/bin/gcc-ar-8 --slave /usr/bin/gcc-nm gcc-nm /usr/bin/gcc-nm-8 --slave /usr/bin/gcc-ranlib gcc-ranlib /usr/bin/gcc-ranlib-8 sudo update-alternatives --config gcc  6. And change the conf/local.conf from openjdk-7 -> openjdk-8: PREFERRED_PROVIDER_java2-runtime = " openjdk-8-jre" IMAGE_INSTALL_append = " openjdk-8 "