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i.MX Processors Knowledge Base

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Question: To eliminate the need for pull-ups AND  pull-downs on the gpio boot override pins to save board space, does anyone know when in the boot rom that the GPIO pins are sampled and whether the internal Pull Downs are already enabled? Is this true for all the GPIO override pins? To just be able to provide an external Pull-up to specify boot options and NOT both pull-up and pull-down option. Can this be done? Answer: The pull-ups and pull-downs are active while POR_B is low (as defined in the datasheet). The pins are sampled on the 2 nd rising edge of RTC_XTALO before the rising edge of POR_B. As a caution, on-chip pull-up/downs are very weak and are primarily intended for controlling the pin (keeping it from logically wiggling) if the pin is not connected at all. If a pin is connected out to a trace, relaying on the on-chip PU/PD alone could be a little risky. Since the PU/PD is weak, it's possible to have noise coupled onto the pin. [Similar to Brett's comment above].
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One of the important features that differentiates Xenomai from other real-time Linux extensions is its ability to offer hard real-time support to user-space applications. Ease of use of the user-space programming model should outweigh any gain one could expect from running the application directly from kernel space. User-space applications are memory protected from other processes, thus cannot crash the kernel should something goes wrong. Xenomai also provides generic building blocks for building different RTOS interfaces called skins, These skins imitates the different RTOS APIs thus allowing easy porting of existing applications to Xenomai. Required software 1. The current BSP version for iMX6 from Freescale is 3.0.35 does not fully work with the latest version Xenomai because the accompanying I-pipe patch does not support SMP. To use the latest I-pipe patch, a newer Linux kernel is need. Grab the latest stable kernel:   $ git clone git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git   $ cd ~/linux-stable   $ git branch -a   $ git checkout remotes/origin/linux-3.8.y -b linux-3.8.y   $ git checkout v3.8.1 -v v3.8.1 2. Configure the kernel. Make sure the kernel is built without any errors before patching it with Xenomai.   $ export ARCH=arm   $ export CROSS-COMPILE=arm-fsl-linux-gnueabi- $ make imx_v6_v7_defconfig $ make -j16 uImage 3. Note that this is a device-tree enabled kernel. You'll also need to generate the flattened device tree that U-Boot will pass to the kernel.   $ make imx6q-sabrelite.dtb 4. This step is not needed if your U-Boot supports device-tree kernel. Grab the latest U-Boot: $ git clone git://git.denx.de/u-boot.git $ cd u-boot/ $ make mx6qsabrelite_config $ make -j16 5. The boot script will need to updated to load the device-tree into memory and pass it to the bootm command.   U-Boot > setenv bootcmd 'fatload mmc 1 0x22000000 uImage; fatload mmc   1 0x11000000       imx6q-sabrelite.dtb; bo otm 0x22000000 – 0x11000000' 6. Grab the latest I-pipe patch from Adeos    $ wget http://download.gna.org/adeos/patches/v3.x/arm/ipipe-core-3.8-   arm-1.patch 7. Grab the latest Xenomai    $ wget http://www.xenomai.org/index.php/Xenomai:News#2013-10-           05_Xenomai_2.6.3   $ tar -xvjf xenomai-2.6.3.tar.bz2 Patching the kernel 1. Prepare the target kernel. This is to assume that the Linux kernel and I-pipe patch are located relatively to Xenomai.   $ cd xenomai-2.6.3   $ ./scripts/prepare-kernel.sh --linux=../linux-stable/ --adeos=../linux-stable/ipipe-core-3.8-arm-1.patch –arch=ARM   $ ./configure CFLAGS="-march=armv7-a -mfpu=vfp3" LDFLAGS="-march=armv7-a -mfpu=vfp3" --host=arm-fsl-linux-gnueabi 2. Build and installation   $ make -j8   $ sudo root   $ export PATH=/opt/freescale/usr/local/gcc-4.6.2-glibc-2.13-linaro-multilib-2011.12/fsl-linaro-toolchain/bin/:$PATH   $ make DESTDIR=~/BSP/ltib/rootfs install    Testing the installation 1. Verifying the kernel. If everything works, the kernel boot logs should messages like:    I-pipe: head domain Xenomai registered.   Xenomai: hal/arm started.   Xenomai: scheduling class idle registered.   Xenomai: scheduling class rt registered.   Xenomai: real-time nucleus v2.6.2.1 (Day At The Beach) loaded.   Xenomai: debug mode enabled.   Xenomai: starting native API services.   Xenomai: starting POSIX services.   Xenomai: starting RTDM services. 2. Comparison of Xenomai and unpatched Linux kernel real-time performance. We ran a couple benchmarks on a Freescale I.MX6q Sabrelite board to do the comparison. The tests used default configurations and fully stressed the system in order to measure scheduling jitter.                               Linux   Kernel     Zero load     100% loaded     Average latency   (us)     Worst-case   latency (us)     Average latency   (us)     Worst-case   latency (us)     Standard     4.625       41.311     5.120     1849.91   Patched with   Xenomai     4.825       15.568     6.654     16.655 The tests measure the jitter relative to expected time on a periodic task running every 1 millisecond. Data show the Xenomai implementations stand out for having by far the smallest difference between light and full load in the worst case. Stock Linux fare much worse as the timers miss a lot wake ups.
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Notes: + Run the pipelines in the presented order + The above example streams H263 video. + the gl command is equal to 'gst-launch' (two instead of 'gst-launch'.size() chars ) + Pending work: H264 test cases and other scenarios. Scenario Shell variables and pipelines # Export always these variables on the i.MX export VSALPHA=1 export WIDTH=320 export HEIGHT=240 export SEP=20 # decoded and displayed Uni-directional: from PC to i.MX. PC is streaming 4 H.263 streams and i.MX displays all in the screen. # On i.MX (Target) gl udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8890 ! rtph263depay ! vpudec ! mfw_isink sync=false axis-top=0 axis-left=0 disp-width=$WIDTH disp-height=$HEIGHT & gl udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8891 ! rtph263depay ! vpudec ! mfw_isink sync=false axis-top=0 axis-left=`expr $WIDTH + $SEP` disp-width=$WIDTH disp-height=$HEIGHT & gl udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8892 ! rtph263depay ! vpudec ! mfw_isink sync=false axis-top=`expr $HEIGHT + $SEP` axis-left=0   disp-width=$WIDTH disp-height=$HEIGHT & gl udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8893 ! rtph263depay ! vpudec ! mfw_isink sync=false axis-top=`expr $HEIGHT + $SEP` axis-left=`expr $WIDTH + $SEP` disp-width=$WIDTH disp-height=$HEIGHT & # On PC (Source) export IP_iMX= # Place the IP address of the i.MX board gst-launch -v videotestsrc ! ffenc_h263 ! rtph263pay ! multiudpsink clients=IP_iMX:8890,IP_iMX:8891,IP_iMX:8892,$IP_iMX:8893 Uni-directional: from PC to i.MX. PC is streaming one H.264 stream and i.MX displays it on the screen # On i.MX (Target) # Make sure you set the caps correctly, specially the sprop-parameter-sets cap. The one show below is just an example and works with the source file sintel_trailer-1080p.mp4 export VSALPHA=1 GST_DEBUG=*:2 gst-launch -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H264, sprop-parameter-sets=(string)\"Z2QAMqw05gHgCJ+WEAAAAwAQAAADAwDxgxmg\\,aOl4TLIs\", payload=(int)96' port=8890 ! rtph264depay ! vpudec ! mfw_isink sync=false # On PC (Source) gst-launch -v filesrc location=sintel_trailer-1080p.mp4 typefind=true ! qtdemux ! rtph264pay ! multiudpsink clients=10.112.102.168:8890 Bi-directional: PC is streaming 4 H.263 streams to i.MX, iMX displays it and sends the four back to PC # On i.MX export IP_PC= # Place the IP address of the PC host machine gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8890 ! rtph263depay ! vpudec ! tee name=t ! queue ! mfw_isink sync=false axis-top=0 axis-left=0 disp-width=$WIDTH disp-height=$HEIGHT t. ! queue ! vpuenc codec=5 ! rtph263pay ! udpsink host=$IP_PC port=9990 & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8891 ! rtph263depay ! vpudec ! tee name=t ! queue ! mfw_isink sync=false axis-top=0 axis-left=`expr $WIDTH + $SEP` disp-width=$WIDTH disp-height=$HEIGHT t. ! queue ! vpuenc codec=5 ! rtph263pay ! udpsink host=$IP_PC port=9991 & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8892 ! rtph263depay ! vpudec ! tee name=t ! queue ! mfw_isink sync=false axis-top=`expr $HEIGHT + $SEP` axis-left=0   disp-width=$WIDTH disp-height=$HEIGHT t. ! queue ! vpuenc codec=5 ! rtph263pay ! udpsink host=$IP_PC port=9992 & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=8893 ! rtph263depay ! vpudec ! tee name=t ! queue ! mfw_isink sync=false axis-top=`expr $HEIGHT + $SEP` axis-left=`expr $WIDTH + $SEP` disp-width=$WIDTH disp-height=$HEIGHT t. ! queue ! vpuenc codec=5 ! rtph263pay ! udpsink host=$IP_PC port=9993 & # On PC ## Stream received from iMX export IP_iMX= # Place the IP address of the i.MX board gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=9990 ! rtph263depay ! ffdec_h263 ! xvimagesink & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=9991 ! rtph263depay ! ffdec_h263 ! xvimagesink & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=9992 ! rtph263depay ! ffdec_h263 ! xvimagesink & gl -v udpsrc caps='application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H263' port=9993 ! rtph263depay ! ffdec_h263 ! xvimagesink & ## Stream sent to iMX gl -v videotestsrc ! videoscale ! video/x-raw-yuv,width=\(int\)1408,height=\(int\)1152 !  ffenc_h263 ! rtph263pay ! udpsink host=$IP_iMX port=8890 & gl -v videotestsrc ! videoscale ! video/x-raw-yuv,width=\(int\)1408,height=\(int\)1152 ! ffenc_h263 ! rtph263pay ! udpsink host=$IP_iMX port=8891 & gl -v videotestsrc ! videoscale ! video/x-raw-yuv,width=\(int\)1408,height=\(int\)1152 ! ffenc_h263 ! rtph263pay ! udpsink host=$IP_iMX port=8892 & gl -v videotestsrc ! videoscale ! video/x-raw-yuv,width=\(int\)1408,height=\(int\)1152 ! ffenc_h263 ! rtph263pay ! udpsink host=$IP_iMX port=8893 &
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Android Jelly Bean(4.2) locks HDMI rotation by default. You can unlock by the instruction of this commit. -- Author: Jeff Brown <[email protected]> Date:   Wed Oct 17 18:32:34 2012 -0700     Add special mirroring modes for demonstration purposes.     Assume rotation of HDMI display is portait.     $ adb shell setprop persist.demo.hdmirotation portrait     Don't lock rotation while HDMI is plugged in.     $ adb shell setprop persist.demo.hdmirotationlock false     Hide secondary displays from apps but continue mirroring to them.     $ adb shell setprop persist.demo.singledisplay true     Bug: 7326281     Change-Id: I8f9a3b0bc19821a3a01043b0f516806dac82ce53
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Wir laden Sie zum i.MX 6 Workshop in Mainz recht herzlich ein. Bei diesem Workshop wird Ihnen der Controller von Freescale im Detail erklärt. Neben der Vorstellung der Entwicklungsumgebungen steht der Gedankenaustausch mit den Referenten und Entwicklern ganz weit oben. Melden Sie sich jetzt an! Zielgerichtet aus der Praxis für die Praxis phyFLEX i.MX 6 Workshop Schulungen sind Investitionen, die sich durch Zeitgewinn und sichere Designs in kürzester Zeit amortisiert haben. Sie sichern vorhandenes Wissen und passen Arbeitsweisen an Weiterentwicklungen des Marktes an. Neue Controller mit erweiterten Fähigkeiten und neuen Hardwareansätzen erfordern erweitertes Wissen. Betriebssysteme und moderne Entwicklungsumgebungen bieten andere Arbeitsweisen, die der Komplexität heutiger Projekte gerecht werden. Ihre Weiterbildung ist uns wichtig. Termine: 07.11.2013 in Mainz Zeit: 9:00 Uhr bis 18:00 Uhr Begrüßung unserer Gäste ab 8:30 Uhr in der Robert-Koch-Straße 37 in 55129 Mainz. Workshopinhalt: Agenda Ab 8:30          Empfang in der Robert-Koch- Str. 37, 55129 Mainz 09:00 – 09:15 Begrüßung der Gäste und Vorstellung der Referenten 09:15 – 10:30 Vorstellung des Prozessors, Herr Rodrigue Simonneau, Freescale 10:30 – 10:45 Kaffeepause 10:45 – 11:45 Vorstellung Hardware (Modul & Carrier Board)                         - der i.MX 6 in unseren Produktfamilien                         - verfügbare Features des phyFLEX-i.MX 6 Moduls                        - Applikationsplatine: Welche Schnittstellen stehen schon im Kit zur Verfügung?                        - Mögliche Bestückungsvarianten des Serienmoduls 11:45 – 12:15 Zeit für Fachgespräche mit den Entwicklern 12:15 – 13:00 Mittagspause 13:00 – 14:00 Führung durch die Produktion 14:00 – 15:00 Digital Imaging mit i.MX 6 - Einführung in die Kameraschnittstellen des i.MX 6 - Konzepte zum Anschluss von Kameramodulen - Überblick über das Software-Interface 15:00 – 16:15 Vorstellung der Linux Entwicklungsumgebung bis hin zum Erarbeiten eines Beispiels                       - LiveDVD mit Eclipse                        - Beispiel-Programm unter Eclipse zur Ansteuerung der GPIO Platine              - Grafik Demos mit OpenGL und Mpeg Decoder               - Benchmark zum Anzeigen der Leistung einzelner Cores 16:15 – 16:45       Zeit für Fachgespräche mit den Entwicklern 16:45 – 17:00     Kaffeepause 17:00 – 18:15        Vorstellung Windows Embedded Compact 7              - Welche neuen Features stehen unter WEC7 zur Verfügung?                - Erste Schritte in WEC7 auf der phyFLEX-i.MX6              - Applikations-Debugging über USB Active Sync               - Verwendung der Remote Tools des Plattform Builders 18:15           Zeit für Fachgespräche mit den Entwicklern Am Tag des Workshops besteht die Möglichkeit ein Phytec i.MX 6 Kit (Linux oder WEC7) käuflich zu erwerben. Geben Sie gleich bei Ihrer Anmeldung an, ob an einem Kauf gernerelles Interesse besteht. Nutzen Sie diese Möglichkeit und melden Sie sich gleich zum i.MX 6 Workshop in Mainz an: Anmeldung Für nähere Fragen und Anmeldung steht Ihnen unser Vertriebsteam gerne zur Seite: Telefon: + 49 (0) 6131/ 9221-32 Unsere Produkte zum i.MX 6 finden Sie hier.
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Question: How is mx6 PMIC_ON_REQ under SW control? mx6 PMIC_ON_REQ is hooked up to the PFUZE100's PWRON and Linux and our 3.0.35bsp is used. Mx6 SW control is to drive the PMIC_ON_REQ pin low.  It appears from the documentation that this pin can be controlled by either another imx6 pin OR through SW control. The issue is that the reference manual is not clear on how to do this. While doing an SR search (SR 1-877711457), it does appear the PMIC_ON_REQ is controlled by SW. Answer: In latest RM version, Figure 60-3. Chip on/off state flow diagram and Table 60-3. Power mode transitions in IMX6DQRM.pdf show two ways to make PMIC_ON_REQ go low. I'm sure in latest BSP SW method had been included. It turns out the SNVS module on the mx6s/dl is different from the mx6q/d which is again different from the mx6slx. The bottom line is that the requirements for the SNVS functionality came primarily from the Android market so many of the Linux use cases are not supported. SW control of the PMIC_ON_REQ pin is an example of this. This means that you are correct, there only 2 ways to get PMIC_ON_REQ to power up for the mx6q/d 1 -  a low on the ON/OFF pin greater than the debounce time (750ms) 2 - a wake-up/tamper event. For the mx6s/dl, there are 3 ways to get PMIC_ON_REQ to power up 1 - power-on-reset on the VSNVS  (i.e first applying VSNVS) 2 -  a low on the ON/OFF pin greater than the debounce time (750ms) 3 - a wake-up/tamper event. Note, in my case, where there is an external input that actually wakes up the system, turns on the PMIC and brings up the mx6 there is only 1 way to get PMIC_ON_REQ to go back high 1 - a low on the ON/OFF pin greater than the debounce time (750ms) As it turns out, when the VSNVS_HP section is powered (i.e VDDHIGH is applied), it gates off the wake-up timer.
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Question: How do I add the opencore amrnb plugin to be the default for amrnb for use with playbin2? With a .3gp file to play and audio amrnb encoded, amr plugins do not work ( i.e. are not even part of the build and when configured to build, they do not even build ). Opencore had been added and got it to build and install with our ltib BSP and it plays the audio from the .3gp file in question fine ( but with an explicit pipeline ). But, the opencore amrnb plugin is not selected by gstreamer playbin2 when it does a typefind on the amrnb audio type. Answer: There are three options: 1. Fix the aiurdemux to allow correct demuxing 2. Lower the aiurdemux rank 3. Remove the /usr/lib/gstreamer-0.10/libmfw_gst_aiur_demux.so Obviously, 3 is a ugly hack but it can be just enough for customer. If option 1 or is selected, patches may be required from MM team. On this system, the aiurdemux does not have any issue, and audio playback works as expected. These are the VPU firmware and GST-FSL versions on YOCTO: VPU Version: firmware 1.4.50; libvpu: 5.3.2 MFW_GST_VPU_DECODER_PLUGIN 3.0.8 build on Sep 30 2013 16:36:27. where in LTIB: VPU Version: firmware 1.4.48; libvpu: 5.3.2 MFW_GST_VPU_DECODER_PLUGIN 2.0.3 build on Jul 23 2013 11:20:21. So the next moved would be to try upgrading versions on LTIB if they want to use this system; in case switching to Yocto is viable, then the upgrade is already done.
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ltib 编译的 解码插件包,官网比较难找到的。
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Patch for i.MX6 boards with LPDDR2 using single channel
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Kernel provides mtdoops to dump kmsg to MTD device, but MMC card is not a MTD device. We can let user-space program to execute the write operation to dump kmsg into block storage. The sample code is below. kernel space -- #include <linux/kernel.h> #include <linux/module.h> #include <linux/console.h> #include <linux/vmalloc.h> #include <linux/seq_file.h> #include <linux/workqueue.h> #include <linux/sched.h> #include <linux/wait.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/kmsg_dump.h> #include <linux/proc_fs.h> static struct kmsg_dumper dump; static struct proc_dir_entry *my_proc; static int is_panic = 0; static int my_proc_show(struct seq_file *m, void *v) {     seq_printf(m, "%d", is_panic);     return 0; } static int my_proc_open(struct inode *inode, struct file *file) {     return single_open(file, my_proc_show, NULL); } static const struct file_operations my_proc_ops = {     .open        = my_proc_open,     .read        = seq_read,     .llseek        = seq_lseek,     .release    = single_release, }; static void oops_do_dump(struct kmsg_dumper *dumper,         enum kmsg_dump_reason reason, const char *s1, unsigned long l1,         const char *s2, unsigned long l2) {     int i;     printk("### [%s:%d] reason = %d\n", __func__, __LINE__, reason);     is_panic = 1;     for (i = 0;i < 10; i++)         msleep(1000);     printk("### [%s:%d] should be done\n", __func__, __LINE__); } static int __init my_oops_init(void) {     int err;     dump.dump = oops_do_dump;     err = kmsg_dump_register(&dump);     if (err) {         printk(KERN_ERR "oops: registering kmsg dumper failed, error %d\n", err);         return -EINVAL;     }     my_proc = proc_create("dump_tester", 0, NULL, &my_proc_ops);     return 0; } static void __exit my_oops_exit(void) {     printk("### [%s:%d]\n", __func__, __LINE__);     if (my_proc)         remove_proc_entry( "dump_tester", NULL);     kmsg_dump_unregister(&dump); } module_init(my_oops_init); module_exit(my_oops_exit); MODULE_LICENSE("GPL"); User space -- #include <stdio.h> #include <stdlib.h> #include <string.h> #include <sys/types.h> #include <sys/stat.h> #include <unistd.h> #include <fcntl.h> #include <poll.h> #define BUF_LEN 40960 void main(int argc, char **argv) {     char tmp = 'X';     char buf[BUF_LEN];     int fd_src, fd_trg;     int fd = open("/proc/dump_tester", O_RDONLY, 0);     while(1) {         lseek(fd, 0, SEEK_SET);         read(fd, &tmp, 1);         //printf("### [%s:%d] ==> '%c'\n", __FUNCTION__, __LINE__, tmp);         if (tmp == '1') {             fd_src = open("/proc/kmsg", O_RDONLY, 0);             fd_trg = open("/dev/block/mmcblk0p6",  O_RDWR, 0);             memset(buf, 0, BUF_LEN);             write(fd_trg, buf, BUF_LEN);             lseek(fd_trg, 0, SEEK_SET);             read(fd_src, buf, BUF_LEN);             write(fd_trg, buf, BUF_LEN);             close(fd_src);             close(fd_trg);             sleep(1);             printf("### dump panic log into %s\n", "/dev/block/mmcblk0p6");             break;         }         sleep(1);     }     close(fd); }
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DEVREGS - Is a tool to display and modify a device's registers at runtime. Under Linux, you can access registers, or any area of physical memory through the /dev/mem pseudo-device and the wonders of the mmap system call. To use it, you open the /dev/mem device, mmap the page in which a register is located, then use the pointer returned to read and/or write the data. Boundary Devices, developed a tool known as " devregs  " that allows you to put a little structure around this facility. It allows you to give names to particular physical memory areas and to describe the bits within a register in the text file /etc/devregs.dat. How to read from register : To read one or more registers, use devregs with a single parameter that’s either an address or a register name. Ex : $  devregs 0x73f88000 :0x73f88000    =0x803dffaf If a register address matches a register in /etc/devregs.dat , you’ll see the register name: Ex : $ devregs 0x73f88000 GPIO2_DR:0x73f88000    =0x803dffaf If used with a register name, any bitfields defined will be shown: Ex: devregs UART1_UFCR UART1_UFCR: 0x73fc0090   =0x0801 UART1_UFCR:0x73fc0090    =0x0801       TXTL                      10-15     =0x2       RFDIV                    7 - 9      =0x0       DCEDTE                 6 - 6     = 0x0       RXTL                       0 - 5     = 0x1 How to write to register : Ex : $ devregs GPIO2_GDIR GPIO2_GDIR:0x73f88004    =0x0002c0a4 Ex: $ devregs GPIO2_GDIR 0x2c0a0 GPIO2_GDIR:0x73f88004    =0x0002c0a4 GPIO2_GDIR:0x73f88004 == 0x0002c0a4...0x0002c0a0 Ex: $ devregs GPIO2_GDIR GPIO2_GDIR:0x73f88004    =0x0002c0a0 For more detailed information please go through the following below links : http://boundarydevices.com/i-mx5x-device-register-access/ http://boundarydevices.com/configuring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite/
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Hello! Here's some CODE!!! #include <iostream> #include <stdio.h> #include <assert.h> #include <string.h> #include <fcntl.h> #include <malloc.h> #include <math.h> #include <stdlib.h> //#define EGL_USE_GLES2 #include <GLES2/gl2.h> #include <EGL/egl.h> #include <GLES2/gl2ext.h> #include <EGL/eglext.h> #include <termios.h> #include <unistd.h> #include <fcntl.h> #ifdef EGL_USE_X11 #include <X11/X.h> #include <X11/Xlib.h> #endif EGLDisplay egldisplay; EGLConfig eglconfig; EGLSurface eglsurface; EGLContext eglcontext; EGLNativeWindowType eglNativeWindow; EGLNativeDisplayType eglNativeDisplayType; EGLNativeDisplayType fsl_getNativeDisplay() {   EGLNativeDisplayType eglNativeDisplayType = NULL; #if (defined EGL_USE_X11)   eglNativeDisplayType = XOpenDisplay(NULL);   assert(eglNativeDisplayType != NULL); #elif (defined EGL_API_FB)   eglNativeDisplayType = fbGetDisplayByIndex(0); //Pass the argument as required to show the framebuffer #else   display = EGL_DEFAULT_DISPLAY; #endif   return eglNativeDisplayType; } EGLNativeWindowType fsl_createwindow(EGLDisplay egldisplay, EGLNativeDisplayType eglNativeDisplayType) {   EGLNativeWindowType native_window = (EGLNativeWindowType)0; #if (defined EGL_USE_X11)   Window window, rootwindow;   int screen = DefaultScreen(eglNativeDisplayType);   rootwindow = RootWindow(eglNativeDisplayType,screen);   window = XCreateSimpleWindow(eglNativeDisplayType, rootwindow, 0, 0, 400, 533, 0, 0, WhitePixel (eglNativeDisplayType, screen));   XMapWindow(eglNativeDisplayType, window);   native_window = window; #else   const char *vendor = eglQueryString(egldisplay, EGL_VENDOR);   if (strstr(vendor, "Imagination Technologies"))   native_window = (EGLNativeWindowType)0;   else if (strstr(vendor, "AMD"))   native_window = (EGLNativeWindowType)  open("/dev/fb0", O_RDWR);   else if (strstr(vendor, "Vivante")) //NEEDS FIX - functs don't exist on other platforms   { #if (defined EGL_API_FB)   native_window = fbCreateWindow(eglNativeDisplayType, 0, 0, 0, 0); #endif   }   else   {   printf("Unknown vendor [%s]\n", vendor);   return 0;   } #endif   return native_window; } void fsl_destroywindow(EGLNativeWindowType eglNativeWindowType, EGLNativeDisplayType eglNativeDisplayType) {   (void) eglNativeWindowType; #if (defined EGL_USE_X11)   //close x display   XCloseDisplay(eglNativeDisplayType); #endif } void GLInit (void) {   static const EGLint s_configAttribs[] =   {   EGL_RED_SIZE, 5,   EGL_GREEN_SIZE, 6,   EGL_BLUE_SIZE, 5,   EGL_ALPHA_SIZE, 0,   EGL_SAMPLES, 0,   EGL_NONE   };   EGLint numconfigs;   printf("1");   eglNativeDisplayType = fsl_getNativeDisplay();   printf("2");   egldisplay = eglGetDisplay(eglNativeDisplayType);   printf("3");   eglInitialize(egldisplay, NULL, NULL);   printf("4");   assert(eglGetError() == EGL_SUCCESS);   printf("5");   eglBindAPI(EGL_OPENGL_ES_API);   printf("6");   eglChooseConfig(egldisplay, s_configAttribs, &eglconfig, 1, &numconfigs);   assert(eglGetError() == EGL_SUCCESS);   assert(numconfigs == 1);   printf("7");   eglNativeWindow = fsl_createwindow(egldisplay, eglNativeDisplayType);   assert(eglNativeWindow);   printf("8");   eglsurface = eglCreateWindowSurface(egldisplay, eglconfig, eglNativeWindow, NULL);   assert(eglGetError() == EGL_SUCCESS);   printf("9");   EGLint ContextAttribList[] = { EGL_CONTEXT_CLIENT_VERSION, 2, EGL_NONE };   eglcontext = eglCreateContext( egldisplay, eglconfig, EGL_NO_CONTEXT, ContextAttribList );   assert(eglGetError() == EGL_SUCCESS);   printf("10");   eglMakeCurrent(egldisplay, eglsurface, eglsurface, eglcontext);   assert(eglGetError() == EGL_SUCCESS); } void GLEnd (void) {   printf("Cleaning up...\n");   eglMakeCurrent(egldisplay, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT);   assert(eglGetError() == EGL_SUCCESS);   eglDestroyContext(egldisplay, eglcontext);   eglDestroySurface(egldisplay, eglsurface);   fsl_destroywindow(eglNativeWindow, eglNativeDisplayType);   eglTerminate(egldisplay);   assert(eglGetError() == EGL_SUCCESS);   eglReleaseThread(); } int main (int argc, char **argv) {   GLInit();   for( int i = 0; i < 100000; ++i)   {   glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);     // Clear The Screen And The Depth Buffer   glClearColor (.0f, .0f, 1.0f, 1.0f);   eglSwapBuffers (egldisplay, eglsurface);   }   GLEnd(); } Above code is stitched together from samples from GPU SDK. I've built an image using Yocto (dylan branch) and build the meta-toolchain-qt (and qte). Successfully managed to build above code ONLY FOR X11. Issues i am facing: 1) if build for X11 and run app on the board, window shows, but it stays white, when it should be BLUE...doesn't update no matter what color i glClear to. 2) when compiling with FB, fbCreateWindow and etc don't get recognized, i.e. undefined reference to `fbCreateWindow' .... WHAT header contains these functions???? 3) if even the basic samples don't work, how the hell is anybody supposed to build a GL application on this board?? --- more rhetorical than a real question, just frustrated here... what did i do wrong? 4) please show me a working tutorial or some code on how to get this EGL context initialized...i'm running at wit's end here...
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Question: What exactly does the DTE/DCE interface in the i.MX6's UART module do and how are RTS and CTS affected by the UARTxUFCR[DTEDCE] bit? In i.MX6 RM, revision 1: Sections 64.2.1.2.1  (CTS) and 64.2.1.2.2 (RTS) both state that CTS and RTS change direction between DCE and DTE modes.  However, sections 64.4.3.1 (RTS_B) and 64.4.3.8 (CTS_B) state they do not change functions.  Is this a documentation error, or is there a difference between CTS/RTS and CTS_B/RTS_B? It appears that some of this is covered in the IOMUX daisy chain by switching which pins are connected to CTS and RTS. Answer: Example 1: UART1 in DTE mode. RTS is an output from the UART IP block so it must be routed to a CTS pin. Therefore, the SELECT_INPUT register could only use settings 00 or 10. Example 2: UART1 in DCE mode. RTS is an input to the UART IP block so it must be routed to an RTS pin. Therefore, the SELECT_INPUT register could only be set to 01 or 11. At this point, we have assumed that the internal signals connected to the UART block do not change direction.  We believe that DCEDTE from the UART block connects into the IOMUX logic and controls the direction of the PAD.  Then, the IOMUX INPUT_SELECT mux is used to choose one of four pads to connect to the UART inputs while the IMOUX MUX_CTRL connects the output path.  Further, we assume it is an error to connect the UART input to a pad configured as an output or a UART output to a pad configured as an input. The attached shows our assumptions For the Uart IP, the CTS_B is always an output and RTS_B always an input. But the RTS_B &CTS_B IO will be swapped  when UART operates in different DTE or DCE mode.  IO port DTE mode DCE mode direction Uart IP port(internal) direction Uart IP port(internal) UART_CTS_B O CTS_B I RTS_B UART_RTS_B I RTS_B O CTS_B UART_TXD O TXD I RXD UART_RXD I RXD O TXD Regarding how to configure the IOMUX, please see the attached PDF.
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Question: In a single uImage to contain the compressed kernel and rootfs, if the uImage is greater than 16MB, the system will not boot and reports errors. Is there a size limitation on uImage?  If so, is there a work around? Answer: uImage should only contains kernel compressed. rootfs should be read through a linux partition after the kernel boots up. Regarding the uImage's size, there is no limitation. In the other hand, a single uImage with kernel and filesystem is needed; in other words, kernel (alias uImage) needs a filesystem to work, and these are two independent systems in that sense. If u-boot, kernel and filesystem are in a single device (SD Card), the filesystem must be mounted in the first partition (SD, eMMC, etc) starting somewhere > 16M/512 sectors. But in cases where: * A fast boot is needed with  very small rootfs * As a intermediate (temporal) rootfs  before switching  to the real rootfs. The usage (actually used when flashing with the MFG tool) of this intermediate system is to load heavy modules, keeping the uImage small. This mechanism is called initramfs and the uImage will contain the kernel and the this mini rootfs compressed as cpio archive. But there appears to be a 16MB limitation. See here:  http://www.isysop.com/unpacking-and-repacking-u-boot-uimage-files/ It seems to be related to alignment suggesting that 24-bit addressing is used instead of 32-bit.  I did notice Thumb mode is used, which seems odd to me.
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This patch is for i.MX6 ESPI controller slave mode (SPI timing mode 0 and 3) support. Hardware prepare:   Connect two i.MX6 Sabresd boards, remove U14 SPI nor device, connect two boards like:          MISO --- MISO          MOSI --- MOSI          SS     --- SS          CLK   --- CLK          GND  ---  GND Software prepare: 1>Apply patch spi_slave_2013_10_12.patch on 3.0.35_4.1.0 Linux BSP release.     Note two board all need choose CONFIG_IMX6_SDP_MISCSPI, CONFIG_SPI_SPIDEV of kernel Symbol: IMX6_SDP_MISCSPI [=y]                                                                                                              Location:   |     -> Device Drivers                                                                                                                      |       -> Misc devices (MISC_DEVICES [=y]) Symbol: SPI_SPIDEV [=y]  Location:                                                                                                                                            |     -> Device Drivers                           |       -> SPI support (SPI [=y])    Spi master board choose CONFIG_SPI_IMX_VER_2_3 Symbol: SPI_IMX_VER_2_3 [=y] Location:                                                                                                                                           |     -> Device Drivers                                                                                                                                 |       -> SPI support (SPI [=y])                                                                                                                       |         -> Choose IMX SPI work mode (<choice> [=y])    Spi slave board choose CONFIG_SPI_IMX_VER_2_3_SLAVE. Symbol: SPI_IMX_VER_2_3_SLAVE [=y] Location:                                                                                                                                           |     -> Device Drivers                                                                                                                                 |       -> SPI support (SPI [=y])                                                                                                                       |         -> Choose IMX SPI work mode (<choice> [=y]) 2>Compile test application  mxc_spi_test1.c to generate mxc_spi_test. 3> Test steps : First  spi slave board input cmd mxc-spi-test –D 0 –b 32 –L 32 Then spi master board input cmd mxc-spi-test –D 0 –b 32 –L 32           This tool will write its buffer ( the content is same in two side ) to the  other board  through  SPI bus , then read data from the other board , and compare with its write buffer.
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Question: What does it means by depending on load? Is there a value? This is  related with i.MX6D Answer: The comment about the "load" means the total system load on the 2.5V rail. We understand that people design systems, not just MX6 devices. The documentation confusion stems from the design team changing from allowing customers to use the LDOs to power system devices back to just using the LDOs to power the MX6. Reasons - thermals, and also concern for uncontrolled system noise injection into the MX6 and causing failures.
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Question: If the i.mx6’s internal real time clock is not used,  instead an external I2C device is used,  does this create a problem with using any of the i.mx6’s security features? Answer: iMX6 Secure features uses and internal real time counter (SRTC) which if enabled and reaches the maximum value it generates an interrupt informing a security violation. External RTC can't be used in security iMX6 context. I2C external RTC for applications is needed, but for security features SNVS uses the internal SRTC. Question: If I'm interpreting your comments correctly - The customers external RTC can't be used in the context of iMX6 security but can still used be used for their applications needs.  To utilize the security features of the SNVS Module (RM Chp. 60), it must use the internal SRTC.  Disabling or otherwise not implementing the requirements the SNVS module has a cascading effect on many other security features such as High-Assurance Boot (HAB) and CAAM operation.  So it seems that if the customer must have an external RTC, they should still implement the requirements of the internal SNVS/SRTC. Answer: That's the case if secure features are needed they will end up using the internal SRTC, actually I don't think is possible to be used in other scenario as is part of SNVS. Question: To better understand the implications of not having battery backup for the SNVS supply as it pertains to security, if it is normally powered all the time via either a local AC supply or POE+ and is never powered down except for service, and reboots are done with a pushbutton. Given this, can you list what types of security features cannot be implemented or will be problematic? Answer: ???
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This is done with the 11.09 BSP for imx53 specifically. Attached is an amrnb.spec file, I put it in ltib/dist/lfs-5.1/amrnb. Then I extracted opencore-amr-0.1.3.tar.gz and put it in ltib/rpm/BUILD. I built with ltib ( ALl this could be added to the ltib menus as well 😞 ./ltib –m scbuild –p amrnb ./ltib –m scdeploy –p amrnb Then I applied the patch to .ltib for gst-plugins-ugly and built that with ltib. It will play a .3gp file with this pipeline: gst-launch filesrc location=/media/sd/test.3gp ! qtdemux name=demux demux.audio_00 ! queue ! amrnbdec ! alsasink demux.video_00 ! multiqueue ! mfw_vpudecoder ! mfw_isink Regards, Randy Krakora
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Question: How to enable HAB on the MX28, following the recommendations of AN4555 to get the "get_hab_status()" function working, but has run into an issue. Question #1 They believe they have all the HAB components worked out that are inputs to the efltosb tool as they are able to successfully run U-boot to the interactive prompt.  However, at the point where they:     - call the rvt_report_status() function, their board says "### ERROR ### Please RESET the board ###".      - call the rvt_entry(), their board prints some garbage characters on the screen and then hangs. This suggests that there is something wrong with the clock that in turn affects the baudrate on the serial console causing the above behavior. Question #2 Is there a concept of a "Bound Signature" in HABv4 as there is in HABv3? Any chance the addresses for the rvt_ calls are incorrect? Can you provide the u-boot source? Either Bound signature verification or UID is never mentioned in the HABv4 Application Note. So I suppose it is not supported. We have made assumptions about the RVT function pointer offsets.  The HAB 4 API does not explicitly say the offsets but uses a rvt_base::function_name notation.  We have assumed that function pointers are placed in order, at every word offset beyond the RVT header.  We have confirmed the RVT header exists at the latest address in the reference manual based on a memory dump but we cannot be certain the function offsets we have setup are correct. As far as source code, we modeled our changes for our mx28 board off of the hab.c and hab.h files available from the mainline u-boot for the mx6 architecture. This is basically the same code get_hab_status code that is written in the AN4555 document.  We did HAB API function pointer addresses to match the updated RVT base address and assumed offsets. Answer: Here are the first 3 instructions from report_status(), could your customer check the instructions from the address which they called is correct? <report_status>: :   b087b570        addlt   fp, r7, r0, ror r5 :   1c0e1c05        stcne   12, cr1, [lr], {5} :   22182433        andscs  r2, r8, #855638016      ; 0x33000000
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Question: How to enable touch functions on LVDS1/SabreAI base board? what should be soldered in order to connect the signals to i2c what to add in the Linux kernel (board-mx6q_sabreauto.c) BTW.: Why did we leave these disconnected? Is there any conflict on i2c? Answer: You can mount R305 and R306 to support touch on LVDS1, no code modification was needed. The only limitation is that the two LVDS's touch can't be connected to same I2C port, because they are using the same I2C address. Question: How is this working because the touch interrupt signal from LVDS1 called LCD1_TOUCH_INT_B is connected to pin21 on J44 on base board which is left floating (TP1) on CPU card P1A connector? Are both LVDS needed to work in the same time. Answer: That's the problem, the LVDS1 touch interrupt pin hasn't been connected to IMX6 CPU. Maybe you can use the SabreSD board, the two touch are ready on that board.
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