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Hi everyone, Welcome to the NXP Tech Days 2025 training session AUT-T437: Hands - On Workshop: Explore Ethernet Integration on the S32K3 Microcontroller. My name is Alejandro Flores Triana (Alex) and I will be your guide during this conference. I am an Automotive Applications Engineer supporting different OEMs, Tier1s, Partners and other internal NXP teams on topics related to communication protocols (e.g. CAN, LIN, SPI, I2C, Ethernet, etc.). The idea of this session is for you to understand how to program the S32K3 Ethernet interface using NXP Real-Time Drivers (RTDs) – Autosar MCAL Layer. We will use a base project and together modify it to create a simple Ethernet application. Therefore, to be ready follow the steps below to get your environment up and running before the session. On your laptop, install the NXP Software environment described in the attached presentation: Hands - On Workshop: S32K3 Ethernet Prerequisites.   Once you have the NXP software environment installed, download the attached project: S32K344_ETH_MCAL_TechDays.exe.   Run the .exe project with administrator rights. Accept the license and install in the desired folder.         Open the NXP Design Studio. Click File -> Import -> Existing Projects into Workspace.   Select root directory and browse the folder where you downloaded the project.   Select Copy projects into workspace. Then, click Finish.   Select the project. Click on the arrow next to the hammer. Click on Debug_FLASH. Then you are ready for the session! See you soon. Best Regards, Alejandro Flores Triana
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This document provides a brief explanation of the Excel-based calculator developed to assist with the computation of TX Arbitration Start Delay as described in the S32K3 reference manual. The tool implements the formula provided in the datasheet, allowing users to input relevant parameters and automatically calculate the delay values. It is intended to support engineers in evaluating CAN transmission timing and optimizing arbitration performance in S32K3-based applications.   1.Fill in the clock and CBT and FDCBT configuration parameters according to your requirements. For example, we fill the parameters according Case 3:  Then we can get the TASD value for non-FD frames is 24.05.   Please note that this summary is not officially released by NXP. It is a personal summary for reference only. If there are any errors, please contact me.
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****************************************************************************************************** * Detailed Description: These demos showcase how to configure the eMIOS module on the S32K3 series, highlighting various operational modes and their implementations using the RTD high-level drivers, commonly known as MCAL drivers. The implementations demonstrated in these examples follow the approach outlined in the community thread:  S32M27x/S32K3 – eMIOS Usage. * Connections:  ******************************************************************************************************* * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Debugger: S32DS 3.6.2, OpenSDA/ PEmicro Multilink Universal FX  * Target: internal_FLASH ******************************************************************************************************* * Important information:  The OPWMT channel does not support the notification function. In this mode, the Sn[FLAG] bit is only set upon an AS2 match, which defines the generation of a trigger event within the PWM period. As a result, OPWMT mode cannot support notifications based on signal edges. A bus exception may occur during the execution of Mcl_Init() if the eMIOS clock is not properly enabled. To avoid this issue, ensure that the eMIOS peripheral clock is activated in the configuration settings under: MCU driver → McuModuleConfiguration → McuModeSettingConf → McuPeripheral *******************************************************************************************************
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**************************************************************************************************** * Detailed Description: * * - CMU errors cannot be injected by any means other than manipulating the CMU thresholds, * except for FXOSC_CLK, which can be physically disrupted on the PCB. * * - CMU_FC_0 (FXOSC_CLK) is configured for **synchronous interrupt** on both LFF and HFF CMU events. * - CMU_FC_3 (CORE_CLK) is configured for **asynchronous destructive reset** triggered only by the LFF event; the HFF event is ignored. * - CMU_FC_4 (CORE_CLK) is configured identically to CMU_3: **asynchronous destructive reset** on LFF only; HFF is ignored. * - CMU_FC_5 (HSE_CLK) can be configured by the HSE_B core only. * Refer to the Reference Manual rev.10, Figure 122. Frequency checking (FC) instances * * - The configuration must be identical in both the MCU MCAL driver and the Clock Configuration Tool (clock details). * - To inject a specific CMU error, define one of the following macros: `INJECT_CMU_0`, `INJECT_CMU_3`, or `INJECT_CMU_4`. * * Behavior After Destructive Reset: * - Following a destructive reset (either `MCU_CORE_CLK_FAIL_RESET` or `MCU_AIPS_PLAT_CLK_FAIL_RESET`), * execution will halt in the `while(wait)` loop. * ------------------------------------------------------------------------------------------------ * Test HW: S32K3X4EVB_Q257 * MCU: S32K344, 0P55A * SDK: RTD 6.0.0 * Debugger: PEMicro Multilink FX * Target: internal_FLASH ****************************************************************************************************
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* ================================================================================================== * Detailed Description: * * This example shows how to implement ADC continuous scan with DMA read. * ADC1 is set to perform continuous scan of 4 channels (S10/S11/S12,S13) with DMA request enabled * for last channel S13. DMA reads respective sequential ADC data registers in one major loop. * * ADC1 channel S10 is connected to board's potentiometer, converted value is used to dim board's LED. * * ================================================================================================== * Test HW: S32K312EVB-Q172 * MCU: S32K312_172LQFP * Compiler: S32DS 3.6.3 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J40), Lauterbach * Target: Internal_FLASH * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.  
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Abstract This example presents an use case for complementary PWM outputs with dead-time insertion and hardware ADC triggering using eFlexPWM, TRGMUX, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs. Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_94 -> GPIO1_GPT J62-5 -> PTD2 -> pwm_0_a, 2 -> PWM1 J62-6 -> PTD3 -> pwm_0_b, 2 -> PWM2 J62-30 -> PTD24 -> pwm_0_a, 0 -> PWMT J62-2 -> PTC31 -> siul2_gpio_95 -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_102 -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB)   Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS 0 channel 0 generates a time-out period. Once time-out is reached its eMIOS notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eFlexPWM0 module is used for generating PWMs and hardware ADC triggering. The eFlexPWM0 Submodule 2 is employed to generate center-aligned complementary PWM outputs (PWM1 and PWM2) with dead-time insertion. The eFlexPWM0 Submodule 0 generates another independent PWM output (PWMT) and is utilized to generate the trigger signal for analog data capturing within the same PWM period —happens at half the time high in this case—using VAL0 register. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: • ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 • ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] [S32K Knowledge Base]   Application Software: - S32K396_RTD600_eFlexPWM_TRGMUX_BCTU_SARADC_DMA Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0
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Abstract This example presents an use case for analogue data capturing using eMIOS, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs.   Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_xx -> GPIO1_GPT (D0) J58-1 -> PTE14 -> emios_0_ch_19_z -> PWM1 J58-2 -> PTG9 -> siul2_gpio_xx -> GPIO2_eMIOS_Trigger J62-2 -> PTC31 -> siul2_gpio_xx -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_xx -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB) Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS_0_ch_0 generates a time-out period. Once time-out is reached its Emios Notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eMIOS_0_ch_23 channel is configured as global counter bus A. In this setup, it can act as the time base for other eMIOS_0 channels, enabling synchronization between other them—there is just one PWM in this case. This synchronization ensures that channels share the same time base, thereby defining a common period for their operation. The emios_0_ch_19_g channel is configured as OPWMT mode, which offer more flexibility for triggering. An interrupt is requested on every flag event, during which GPIO2 is toggled—happens at half the time high in this case. This flag event, can be configured using Trigger parameter. For more details about eMIOS, please refer to S32M27x/S32K3 – eMIOS Usage, considering differences for porting from S32K3 to S32K39-37-36 in AN14301. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32M27x/S32K3 – eMIOS Usage [S32M Knowledge Base] S32M27x/S32K3 – eMIOS/BTCU/ADC/DMA – [RTD600] [S32M Knowledge Base] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600] [S32M Knowledge Base] Application Software: - S32K396_RTD600_eMIOS_BCTU_SARADC_DMA_Ip_example Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0
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This simple example demonstrates how to configure and handle UART interrupts using the LPUART module on the S32K312-EVB. It sets up a UART callback function and initiates reception in single-byte mode. After each byte is received, the buffer is updated using  Lpuart_Uart_Ip_SetRxBuffer() , unless a newline character ( '\n' ) is detected, in which case a reception flag is set to signal the main loop. When the  LPUART_UART_IP_EVENT_END_TRANSFER  event occurs, reception is re-enabled using  Lpuart_Uart_Ip_AsyncReceive() . Only basic event handling is implemented; other UART events are acknowledged but not processed. The example uses LPUART instance 6, enabling serial communication via the USB port (J40) on the S32K312-EVB. If using TeraTerm, ensure the transmit setting is configured to LF (Line Feed) to properly send newline characters when pressing Enter.  ------------------------------------------------------------------------------ * Test HW: S32K312EVB-Q172 * MCU: S32K312 * IDE: S32DS3.6.2 * RTD release: 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ Test result:
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* ================================================================================================== Detailed Description: * This example shows how to implement the UART RX/TX using interrupt/callback under FreeRTOS. * LPUART6 is set for 115200, 8N1 using interrupt processing. Callback is called for single byte received. * Reception is advanced until buffer is full or "\n" is received. * 2 tasks (receive/send) and 1 Queue are created. * ReceiveTask starts new UART reception, waits for completion and puts received message into Queue. * SendTask gets the message from Queue, echoes it back and toggle pin (LED_PIN <-> PTA29). * ================================================================================================== * Test HW: S32K3x4EVB-T172 Rev B * MCU: S32K344_172HDQFP * Compiler: S32DS 3.6.2 * RTD release: S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0 * Debugger: On-Board Debugger (J41) * Target: Internal_FLASH * Serial: 115200, 8N1 * ==================================================================================================   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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******************************************************************************** * Detailed Description: * The S32K144 MCU is configured as a LIN Slave node. * When a MasterReq frame (0x3C) is received with Go-to-sleep command, the stack goes to sleep. * The application can read: * l_flg_tst_LI0_MasterReq_flag() * l_ifc_read_status(LI0) * When a falling edge is detected on the LPUART RX pin, * LinWakeUpTimerNotification() is called. * The notification has to be enabled in MEX. * Gpt (LPIT) timer is used to calculated the length of the wake-up signal. * * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 * Debugger: S32DS_ARM_3.6, S32K1_RTD_3_0_0_D2503 * Target: internal_FLASH ********************************************************************************   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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This post is an additional project to the S32K3 Low Power Management AN and demos.  A simple FlexCAN routine is configured for RX/TX and wakeup through the CAN0_RX pin (PTA6/WKPU19). The example is based on the S32K3X4EVB-T172, meaning that transceiver TJA1443 is used. TJA1443 only needs CAN0_EN & CAN0_STB pins in HIGH for normal configuration. In the example, the GREEN led is used to indicate that the MCU is in RUN mode. Once SW5 is pressed, MCU enters low power (STANDBY), and led is turned off. BLUE led toggles each time a CAN frame is received. MCU can be woken up with SW6 (WKPU42) or through a CAN RX. Note that CAN is not enabled in low-power, rather PTA6 (WKPU19) is configured for wake up, and once a rising edge signal is detected on the pin, MCU wakes up and reconfigures CAN module.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K344 * Compiler: S32DS3.6.2 * SDK release: RTD 6.0.0 * Debugger: PE Micro * Target: internal_FLASH  ------------------------------------------------------------------------------ This example is provided as is with no guarantees and no support.
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******************************************************************************** The purpose of this demo application is to show you how to use the Temperature Sensor module in S32DS. It includes two methods to obtain temperature. -The first one starts a normal software conversion with one-shot mode on temp sense channel and calculates the temperature on chip from the data conversion. -The second one calculates the temperature based on given data (if read directly using ADC). Note: Please adjust the ADC reference voltage according to the board you are using * ------------------------------------------------------------------------------ * Test HW: S32K344EVB-T172 * MCU: S32K344 1P55A * Compiler: S32DS.ARM.3.5/6 * SDK release: S32K3_RTD_6.0.0/5.0.0/4.0.0_P24 * Debugger: OpenSDA/PE&Micro * Target: internal_FLASH *Jumper:J18-1:2,5V used. ********************************************************************************* Note that if you use "sprintf", you need to check the following option.  
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MCU : S32K144 AFE : MC33771 RTD : 1.0.1 As we know BCC sample software for MC33771C which is delivered is based on SDK for S32K144 , and uses S32DS-2.2 :-- BCC_S32K144_FreeMASTER I am having a setup , for this combination, using SPI :-- FRDM33771CSPEVB evaluation board  + S32K144 + 14 cell Battery EMULATOR :    S32K144 pins used :-- MOSI :  LPSPI0  : PTB-4 MISO :  LPSPI0  : PTB-3 SCK :    LPSPI0  : PTB-2 CSB :    LPSPI0  : PTB-5 RESET line of MC33771C : PTD-4 FRDM33771CSPEVB pins used :-- https://www.nxp.com/docs/en/user-guide/UM11402.pdf SI of MC33771C : Connects to MOSI of S32K144 : K2-7 SO of MC33771C : Connects to MISO of S32K144 : K2-9 SCK of MC33771C : Connects to PTD-4 of S32K144 : K2-11 CSB :    K2 -5 RESET line of MC33771C : K4 -1 Freemaster uses UART-1 on S32K144 EVB ():-- TX : PTC7 RX : PTC6 I have ported the BCC_S32K144_FreeMASTER  sample code to S32K144 using RTD-1.0.1 & is working fine. This attached code work fine for SPI.  Two sample project i have attached, both are tested and working fine :--- 1> Chip select is controlled by LPSPI. 2> Chip select is controlled manually in user software. Fremaster project is also inside the folder, name of freemaster project is :-- 1> FreeMASTER_project.pmp TPL related part i have not ported & tested because at present i am not having MC33664ATL on S32K144 EVB board & do not have FRDM33771BTPLEVB (MC33771C board with TPL on it). Regards, Dinesh
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*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** DATA and Instruction CACHE is enabled by default --> in startup code :--     ========= This selection enable the use of CACHE driver API =========     ============= Use this MACRO ==================== #define USE_NON_CHACHABLE_REGION 1 This MACRO comment & uncomment will allocate the buffer in cachable & non cacable region of memory. You can allocate the SPI buffer in in cachable & non cacable region of memory. Enabling & disabling of this MACRO will adjust the example code.     ============ How this example works : Cacheable region used ============ I have connected MOSI and MISO pins of spi at hardware level. Whenever I am  sending and receiving total 10 numbers of 12 byte packet On each transmission of 12 byte packet I am incrementing the first bite of transmit buffer just to distinguish between packets at the receive side Cache_Ip_InvalidateByAddr() --> I have to call this API every time I receive 12 byte of data on receive buffer Cache_Ip_CleanByAddr() --> every time after incrementing the transmit buffer first byte ...I have to call this API then only the correct data is transmitted otherwise it will transmit the same data which was available at first time transfer ================ Cache API operation ============== Cache_Ip_InvalidateByAddr() is for the  invalidate operation. Cache_Ip_CleanByAddr() is for the clean operation or clean&invalidate operation that can be chosen by param of this api: @Param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate. Clean: This operation ensures that all dirty lines—data in the cache that has been modified but not yet written back to the main memory—are written back to the main memory ->(push data from cache memory to main memory)  Invalidate: This operation marks the cache lines as invalid, ensuring that any subsequent access to these lines results in a fetch from the main memory, thus ensuring data consistency ->(push data from main memory to cache memory) Clean&invalidate : A cache clean and invalidate operation behaves as the execution of a clean operation followed immediately by an invalidate operation. Both operations are performed to the same location. ================ Pins used ======================    
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This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file  to change the numbers of AFE connected in TPL.     RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode.   =============== MCU Pins used ===========   FRDM665SPIEVB Jumper setting  :---                   K1, K2 & K4 connector of S32J344 EVB :--             K1 on MC33665 & S32K334 evb :--      K2 on MC33665 & S32K334 evb :--    K4 on MC33665 & S32K334 evb :--        ================= EVB Link ==================   https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172 ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255)   Disable Communication timeout in code :--     ================= Results for TWO AFE ===========================          
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This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 3 AFE MC33774 board connected in TPL 3> Change following macro in mc33774_cfg.h file  to change the numbers of AFE connected in TPL.     RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33774 AFE connected in TPL mode. FRDM665SPIEVB stackable board used for MC33665.     =============== MCU Pins used =========== FRDM665SPIEVB Jumper setting  :---     K1, K2 & K4 connector of S32J344 EVB :--       K1 on MC33665 & S32K334 evb :--  K2 on MC33665 & S32K334 evb :--  K4 on MC33665 & S32K334 evb :--    ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM665SPIEVB https://www.nxp.com/design/design-center/development-boards-and-designs/mc33774ata-evaluation-board-with-isolated-daisy-chain-communication:RD33774ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172   ================== Measurement types used in example ===== Periodic measurement is done by 33774 , this is cyclic Other Two : application , sync  need send command to start Application measurement , need send app_capture command twice , and then read the result. Synchronous measurement take out the Primary adc result(VC)and secondary result(VB) .But the VC and VB result comes from different adc. Period measurement start when you send  API "MSR_StartMeasurement" and then 774 will do period measurement automatically periodically :--   Why we need to measure Vc & Vb both :-- ASIL-D ,yes we can measurement VC channel by primary ADC and measurement VB by secondary ADC from hardware VC and VB are come from same point of battery cell. Now 2 ADC compare with each other, that lead to high safety (ASIL D). Primary & Secondary Device temperature reading :-- This API is used for it MC33774_CDD_BCC_SWC_Running_Slot4(). ============= Cell Balancing =========== Cell Balancing method used :-- MC33774 balance will switch between odd channel (1,3,5,7,... 17) and even channel (2,4,6,8,..18) by 500ms period , (250ms for odd and then switch to even 250ms and then odd 250ms...)it is because of IC design and cannot change by software.   MC33774 have lots of balance method  this example uses "timer method ". How to check Balancing is enabled :-- Following function MC33774_CDD_BCC_SWC_Running_Slot5() read the : Balance status & fault registers BAL_SWITCH_STAT0, BAL_SWITCH_STAT1 represent the balancing MOSFET current status.   Measure the voltage drop across the balancing register is the best approach. You will see the voltage drop appears every 250ms if PWM is 100%.  Please check the schematic of the 33774 EVB, find the balancing resistor on which channel balancing is enabled.     ======= How much time to wait to extract the measurements results ======= 240 us is the time of one SCAN Time between each Application measurement sequence. Min App measure time for 16 sample :-- 4.08ms = (16+1) *240 Min 1 SYNC measurement time, for 16 samples = 18 cycle ≈ 18 * (16*240us) ≈ 69 ms ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :--   ================= Results for FIRST AFE ===========================            
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This example code brief  :-- 1> Tested without the SL of BMS, so no dependency on the BMS Safety library. 2> Its tested on 2 AFE MC33775 board connected in TPL 3> Change following macro in mc33775_cfg.h file  to change the numbers of AFE connected in TPL.   RTD : 3.0.0 P07 BMS SDK : 1.0.2 This example does this task :-- Application Measurement. SYNC measurement Periodic Measurement. Read AFE temperature. Cell balancing timer method. Reading the Cell balancing status register & fault registers. =================== Setup used ============ Attached code is tested with TWO MC33775 AFE connected in TPL mode.   =============== MCU Pins used =========== TPL1-TX :-- TPL1TXCSB  --> PTC6/LPSPI0_PCS1 TPL1TXSCLK --> TPL12TXCLK --> PTE1/LPSPI0_SCK    TPL1TXDATA --> TPL12TXDATA --> PTE2/LPSPI0_SOUT    TPL1-RX :-- TPL1RXCSB  --> PTB17/LPSPI1_PCS3 TPL1RXCLK  --> PTB14/LPSPI1_SCK TPL1RXDATA --> PTB15/LPSPI1_SIN     ================= EVB Link ================== https://www.nxp.com/design/design-center/development-boards-and-designs/18-cell-battery-pack-emulator-to-supply-mc33774-bcc-evbs:BATT-18EMULATOR https://www.nxp.com/design/design-center/development-boards-and-designs/analog-toolbox/evaluation-board-for-mc33664atl-isolated-network-high-speed-transceiver:FRDMDUALK3664EVB https://www.nxp.com/design/design-center/development-boards-and-designs/RD33775ADSTEVB https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:S32K3X4EVB-T172   ============= Using Debugger ============ Debugger breakpoint will cause the communication timeout at the AFE, which will RESET the AFE. To use the debugger while development you need to disable the communication timeout. In S32DS MEX file you cannot disable the timeout function ( limit the value of 0~255) Disable Communication timeout in code :--   ================= Results for FIRST AFE ===========================          
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*******************************************************************************  The purpose of this demo application is to present a usage of the HSE IP Driver for the S32K3xx MCU. This DEMO make use of SHE based keys & the RAM keys.  Step-1> Uncomment this MACRO to program the MASTER_ECU_KEY & BOOT_MAC_KEY #define FORMAT_HSE_KEY_CATALOG (1U) Step-2> Then comment the above mentioned MACRO to test the demo. Step-3> End of the DEMO in Switch case HSE_ERASE : keys are erased. HSE_EraseKeys(); SHE based secured boot :-- This demo uses the SHE based secured boot. You can test this after performing step-1. Once SHE is enabled code will be stuck at this point, after this issue an RESET.    ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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[S32K3 tool part]:How to flexibly debug elf files without source code  1.Doc Introduction When supporting customers with the MCU software technical issues, we often encounter situations where customers are unable to provide the source code of problematic projects due to company policies. At most, they can provide the elf files of problematic projects. This involves how to make good use of elf to achieve flexible debugging goals. Elf file is a binary file format that contains program code, data, symbol tables, segment tables, and other information. When debugging elf, you cannot see the source code, but you can see the function name corresponding to the assembly address. At this time, debugging can still relatively know the location. However, the problem is that it is not possible to freely modify and generate new files like modifying the source code. Is it feasible to make specific modifications to elf files to achieve the purpose of functional testing? This article will provide testing methods for skipping specific positions, erasing functions, replacing code, concatenating functions, etc. on an existing elf, to achieve skipping of code in certain positions of elf, or not executing it at any time, creating a new area to concatenate other functional functions, and then modifying the original call position to forcibly insert test function code. The testing platform for this article is S32K344 and RTD500.        Fig 1 2. Function implementation    Fig 1 is an elf file of the original function. The function is to call three functions after startup: Fun1, Fun2, and Fun3 Fun1: Flashing Red Light Fun2: Flashing green light Fun3: Flashing Blue Light The main functions that need to be implemented in this article are as follows: (1) Fun2 function skipped There are two types of function skipping here: When debugging, start from Fun2 and modify the PC to jump to Fun3 Do not run Fun2 even when powered on, simply erase the Fun2 value from the main as nop        Fig 2    (2)Add Fun4, modify Fun2 call in Main to jump to Fun4        This involves inserting Fun4 code into an empty flash address, modifying the jump asm code of Fun2 to jump to Fun4   Fig 3 2.1 Code and Tool preparation Hardware Platform: S32K344-EVB Software: RTD500, S32DS3.5, JFLASH, PE Multilink(built-in to EVB), Lauterbach  JFLASH tool download link:https://www.segger.com/downloads/jlink/  Create a simple led blinking project that can be based on RTD's existing Siul_2Dio_ip_Instance_S32K344 project, add three LED light pins, and construct three functions for flashing red, green, and blue lights respectively. Call the three functions sequentially in main. Generate elf backup when testing is working. 2.2 Implementation of elf modification function: Fun2 function skipped    Here is the specific implementation method for Figure 2: the PC crosses Fun2 and replaces Fun2 with asm nop 2.2.1 PC Crossing Fun2 In the Main function, call the assembly position breakpoint of Fun2, directly modify PC to the value of Fun3 address+1, and then run to skip Fun2. As shown in Figure 4, it has already been run to Fun2, but has not yet entered the function body of Fun2. Simply change the pointer entry that was originally intended to call Func2 to 0X4027B4+1, which is the function entry of Fun3. As can be seen, after modifying the PC, press enter and step into the Fun3 function body. If you modify the starting point of Fun2's function body to jump from PC to Fun3, both sides of Fun3 will run from the main function as a whole   Fig 4 Fig 5 2.2.2 Replace Fun2 with NOP The situation of directly using debug to jump to PC above bypasses Fun2. Although Fun2 can be skipped in testing, it should be noted that when downloading the code, it will actually run the code before entering debug. If some tests want to start from POR without running Fun2, then it is necessary to directly erase the location code of the original elf Fun2 call, and the commonly used method can be replaced with harmless nop instructions. The assembly hexadecimal value of the nop instruction is 00 BF, as shown in the following figure:       Fig 6 With the target modification value, the following is to find the call address of Fun2 in elf main and replace the corresponding 4 bytes with 00BF00BF. From the original elf file, we can see that the data location of the call Fun2 is 4 bytes starting from the absolute address 0X0040280E, use the JFLASH tool in the Segger JLINK driver to open the original elf file, modify the data of the 4 bytes starting address 0X0040280E from FFF7ABFF to 00BF00BF, save the modified data as an srec file, and then call the srec file in the temporary project to run the modified code. The following figure shows the modification process Fig 7 The modified debug result is as follows: Fig 8 As can be seen, the assembly that jumped from the 0X40280e area to Fun2 has now become a nop instruction. At this point, running at full speed will ignore fun2 and proceed in sequence. Whether debugging or after powering on, Fun2 calls have been completely erased from the overall runtime sequence. Of course, since manually modified elf cannot be directly saved as an elf file through JFLASH, choosing to save it as an Srec file will result in losing the symbol table when debugging again. When using elf in the early stage, remember the absolute addresses of several functions that need to be used. 2.3 Elf modification function implementation: Fun4 replaces Fun2 entrance     In the above content, we skip or insert nop directly at the main Fun2 call position, can we call another function body in the original Fun2 for testing, achieving the same area but with other functions? It's possible. There are also two types here: one is to destroy the original Fun2 function body position and directly replace the code content of the function body, of course, this is limited by the size of the original Fun2 function body. On the other hand, keep the original Fun2 for future use. You can start another function Fun4 at other blank addresses in flash, and then change the code that calls Fun2 in main to call Fun4 to achieve seamless docking of Fun1->Fun4->Fun3 operations.     This article mainly uses to create a new function at a specific absolute address in the flash blank space. Of course, attention should be paid to the original elf map situation to ensure that the blank area is sufficient for use. It is best for this new function to be self-contained and independent of other functions to avoid calling bias. If it is necessary to call other function bodies, it is necessary to set the addresses of other dependent functions in the sample project to be consistent when constructing this new function.     Here, we will create a S32DS project and allocate a flash area in the linkfile to store the newly created Fun4. The Fun4 function is to achieve alternating blink green and red led.      2.3.1 linkfile modification MEMORY { int_pflash : ORIGIN = 0x00400000, LENGTH = 0x00010000 /* 4096KB - 176KB (sBAF + HSE)*/ int_pflash_user : ORIGIN = 0x00410000, LENGTH = 0x003C4000 int_dflash : ORIGIN = 0x10000000, LENGTH = 0x00020000 /* 128KB */ int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64KB */ int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x0001F000 /* 124KB */ int_stack_dtcm : ORIGIN = 0x2001F000, LENGTH = 0x00001000 /* 4KB */ int_sram : ORIGIN = 0x20400000, LENGTH = 0x0002FF00 /* 184KB, needs to include int_sram_fls_rsv */ int_sram_fls_rsv : ORIGIN = 0x2042FF00, LENGTH = 0x00000100 int_sram_no_cacheable : ORIGIN = 0x20430000, LENGTH = 0x0000FF00 /* 64KB, needs to include int_sram_results */ int_sram_results : ORIGIN = 0x2043FF00, LENGTH = 0x00000100 int_sram_shareable : ORIGIN = 0x20440000, LENGTH = 0x00004000 /* 16KB */ ram_rsvd2 : ORIGIN = 0x20444000, LENGTH = 0 /* End of SRAM */ } SECTIONS { .FUNC4 : { *(.func4) } > int_pflash_user … } 2.3.2 Fun4 function code The function body code is constructed as follows, purely logical, without relying on any external functions or variables. __attribute__((section (".func4"))) void Func4(void) { uint8 count1 = 0U; static volatile uint32 DelayTimer = 0; volatile uint8 *red_addr_byte = (volatile uint8 *)0x4029131e; volatile uint8 *green_addr_byte = (volatile uint8 *)0x4029131d; volatile uint8 *blue_addr_byte = (volatile uint8 *)0x4029131c; //RED: GPIO29, 0x4029131e //green: GPIO30, 0x4029131d //blue: GPIO31, 0x4029131c while (count1++ < 6) { *red_addr_byte = 1; *green_addr_byte = 0; while(DelayTimer < 4800000) { DelayTimer++; } DelayTimer = 0; *red_addr_byte = 0; *green_addr_byte = 1; while(DelayTimer < 4800000) { DelayTimer++; } DelayTimer = 0; /* Siul2_Dio_Ip_WritePin(LED_RED_PORT, LED_RED_PIN, 1U); Siul2_Dio_Ip_WritePin(LED_GREEN_PORT, LED_GREEN_PIN, 0U); while(DelayTimer < 4800000) { DelayTimer++; } DelayTimer = 0; Siul2_Dio_Ip_WritePin(LED_RED_PORT, LED_RED_PIN, 0U); Siul2_Dio_Ip_WritePin(LED_GREEN_PORT, LED_GREEN_PIN, 1U); while(DelayTimer < 4800000) { DelayTimer++; } DelayTimer = 0; */ } *red_addr_byte = 0; *green_addr_byte = 0; } Here we know, this Fun4 address starts from flash 0x00410000 and generates elf after compiling the project with the above function. 2.3.3 Separate Fun4 function body into independent files Open the elf file with newly created Fun4 using JFLASH and delete all code above 0x00410000. Method: JFLASH->Edit->Delete range:   Fig 9 After deletion, obtain a file containing only Fun4 code and save it as the ElfdebugSource_S32K344_STD500_delete.srec file. 2.3.4 Merge the Fun4 function body into the corresponding Srec of the original elf      Open the Srec corresponding to the original elf and the Fun4 Srec file that was just separated using JFLASH. Choosing to merge two files will automatically concatenate Fun4 files with different addresses into the original Srec file and save them as a separate file.   Fig 10 Fig 11 2.3.5 Modify the original Fun2 calling in main to Fun4 calling Modify code from: 0040280e: ff f7 ab ff   bl      0x402768 <Func2> To: 0040280e: 0d f0 f7 fb   bl      0x410000 Among them, 0x410000 is the absolute address of Fun4. Fig12 Modify the Srec file that has already added Fun4 to start with 0040280e with a value of 0d f0 f7 fb, then save it as a new Srec and debug it. It can be found that the running order of main has changed to Fun1->Fun4->Fun3 Skipped Fun2 while also running the newly integrated Fun4. The above image was run in the S32DS+PE Multilink environment. At this time, due to the operation of the Srec file, the symbol table information for elf was no longer included, but the functionality was successful. 2.3 Lauderbach synchronously loads the original elf symbol table Due to a series of grafting modifications on the original elf and saving it as SREC, the symbol table was lost. So if you still want to view the symbol table of unmodified areas, you can use the Laubach tool. After attaching the code, you can load the original elf file in trace32 by following the command: Data.LOAD.Elf  C:\S32DS35_RTD500\elfdebug\elftest\Debug_FLASH\Elfdebug_S32K344_RTD500.elf /nocode As can be seen, the original part with Fun2 symbol table is only missing due to modifications, but other call header symbol tables still exist. This is also convenient for code execution and reading.     Fig 13 Fig 14 Fig 15 3. Knowledge points Here we share the corresponding hexadecimal data operations for BL addr jumps. The previous one was generated directly using S32DS 0040280e: 0d f0 f7 fb   bl      0x410000 It can be known that the value corresponding to the bl 0x410000 instruction is 0d f0 f7 fb So how is the value of 0d f0 f7 fb calculated? This requires reference to ARM's architecture document: DDI0403E_d_armv7m_arm.pdf For the situation corresponding to the BL jump thumb2 instruction: Fig 16 For BL, it is a long jump, which is actually composed of two jump instructions, Thumb instructions are all 2 bytes long, and BL consists of 2 jump instructions that make up 4 bytes. The 0-11 bits represent an 11 bit address, with the following specific meanings: The 11th digit is 0, representing a high offset The 11th digit is 1, representing a low offset The calculation formula is as follows: offset = (target address- source address -4) & 0x007fffff high = offset >> 12(decimalism) low = ( offset & 0x00000fff )>>1  machineCode = ((0xF800 | low) << 16) | (0xF000 | high) Let's calculate what we use here: bl      0x410000 Offset=(Destination Address - Source Address -4)&0x007fffff = (0x410000-0x40280e-4)& 0x007fffff =D7EE High=offset>>12 (decimal)=D low = ( offset & 0x00000fff )>>1  = 3F7 machineCode = ((0xF800 | low) << 16) | (0xF000 | high) =((0xF800 | 3F7) << 16) | (0xF000 | D) =0XFBF7F00D This corresponds to a low to high: 0D 00 7F FB This is also the source of the following binary modulation instructions: 0040280e: 0d f0 f7 fb   bl      0x410000    
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*********************************************************************************** * Detailed Description: * C40_Ip driver is moved to SRAM in files: C40_Ip.h, SchM_Mem_43_INFLS.h * The function that launches the C40_Ip APIs from main() is also placed in the SRAM. * Check the addresses of the APIs in the .map file. * ------------------------------------------------------------------------------ * Test HW: : S32K312EVB-Q172 * MCU: : S32K312 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : S32DS 3.5, RTD 5.0.0 * Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002 ***********************************************************************************
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