Example_S32K344_MCAL_MCU_ClockMonitor_v1_0_S32DS36_RTD600

[#1]

****************************************************************************************************

* Detailed Description:

*

* - CMU errors cannot be injected by any means other than manipulating the CMU thresholds,

* except for FXOSC_CLK, which can be physically disrupted on the PCB.

*

* - CMU_FC_0 (FXOSC_CLK) is configured for **synchronous interrupt** on both LFF and HFF CMU events.

* - CMU_FC_3 (CORE_CLK) is configured for **asynchronous destructive reset** triggered only by the LFF event; the HFF event is ignored.

* - CMU_FC_4 (CORE_CLK) is configured identically to CMU_3: **asynchronous destructive reset** on LFF only; HFF is ignored.

* - CMU_FC_5 (HSE_CLK) can be configured by the HSE_B core only.

* Refer to the Reference Manual rev.10, Figure 122. Frequency checking (FC) instances

*

* - The configuration must be identical in both the MCU MCAL driver and the Clock Configuration Tool (clock details).

* - To inject a specific CMU error, define one of the following macros: `INJECT_CMU_0`, `INJECT_CMU_3`, or `INJECT_CMU_4`.

*

* Behavior After Destructive Reset:

* - Following a destructive reset (either `MCU_CORE_CLK_FAIL_RESET` or `MCU_AIPS_PLAT_CLK_FAIL_RESET`),

* execution will halt in the `while(wait)` loop.

* ------------------------------------------------------------------------------------------------

* Test HW: S32K3X4EVB_Q257

* MCU: S32K344, 0P55A

* SDK: RTD 6.0.0

* Debugger: PEMicro Multilink FX

* Target: internal_FLASH

****************************************************************************************************